CN114284402A

CN114284402A - LED device, manufacturing method thereof, display device and light-emitting device

Info

Publication number: CN114284402A
Application number: CN202111614594.1A
Authority: CN
Inventors: 刘召军; 黄炳铨; 张珂
Original assignee: Shenzhen Stan Technology Co Ltd
Current assignee: Shenzhen Stan Technology Co Ltd
Priority date: 2021-12-27
Filing date: 2021-12-27
Publication date: 2022-04-05
Anticipated expiration: 2041-12-27
Also published as: CN114284402B

Abstract

The application provides a preparation method of an LED device, the LED device, a display device and a light-emitting device. The preparation method of the LED device comprises the following steps: forming an array of LED chips on a substrate; integrally arranging a passivation layer above the LED chip array, and arranging an electrode contact hole on the passivation layer to expose part of the electrode layer; a bonding layer is arranged in the electrode contact hole; wherein the bonding layer comprises a conductive layer and a solder layer, the conductive layer being located between the electrode layer and the solder layer; the conducting layer is made of a high-melting-point conducting material; and bonding the LED chip array and a driving substrate through the bonding layer, and stripping the substrate to obtain the LED device. According to the preparation method of the LED device and the LED device prepared by the method, the bonding layer with the double-layer structure is adopted, and the conducting layer is made of the high-melting-point conducting material, so that the chip is effectively prevented from falling off due to the melting of the solder in the laser stripping process.

Description

LED device, manufacturing method thereof, display device and light-emitting device

Technical Field

The application relates to the field of display, in particular to a preparation method of an LED device, the LED device, a display device and a light-emitting device.

Background

A Micro Light-Emitting Diode (hereinafter referred to as Micro-LED) based on a third-generation wide bandgap semiconductor GaN material has the characteristics of self-luminescence, low power consumption, high brightness, high contrast, high resolution and the like, a Micro-LED display screen has a high-density pixel array, and the size of a single pixel is dozens of micrometers or even several micrometers. The display screen can be applied to AR, VR, MR, micro projection and wearable equipment with high requirements on resolution and brightness, and can even combine illumination and display into a whole, so that the display screen has high commercial application value and considerable development prospect.

In order to obtain better light-emitting efficiency and reduce optical crosstalk, in the prior art, a laser lift-off (LLO) technology is generally adopted to lift off a Micro-LED substrate, while a Micro-LED using indium solder with a lower melting point is used, when the substrate is lifted off by laser, due to the heat effect of the laser, the indium is heated and melted to cause the Micro-LED to fall off from a driving board or a temporary bonding substrate, so that the yield of laser lift-off is reduced, and the cost is increased.

Disclosure of Invention

In order to solve at least one of the above technical problems, the present application provides a method for manufacturing an LED device, a display device, and a light emitting device. By adopting the method for preparing the LED device, the chip can be effectively prevented from falling off during laser stripping, the yield of laser stripping is effectively improved, and the cost is reduced.

In order to achieve the above object, the present application provides a method for manufacturing an LED device, comprising the steps of: forming an array of LED chips on a substrate; integrally arranging a passivation layer above the LED chip array, and arranging an electrode contact hole on the passivation layer to expose part of the electrode layer; a bonding layer is arranged in the electrode contact hole; wherein the bonding layer comprises a conductive layer and a solder layer, the conductive layer being located between the electrode layer and the solder layer; the conducting layer is made of a high-melting-point conducting material; and bonding the LED chip array and a driving substrate through the bonding layer, and stripping the substrate to obtain the LED device. This application adopts bilayer structure bonding layer, and the bottom conducting layer adopts high melting point conducting material to effectively avoided the chip to peel off because of the solder melting in-process at the laser, effectively reduced bonding temperature simultaneously, reduced technology cost.

Optionally, the forming an array of LED chips on a substrate includes: etching the epitaxial structure on the substrate to expose part of the first semiconductor layer; providing a current diffusion layer on the second semiconductor layer of the epitaxial structure; arranging electrode layers on the current diffusion layer and the first semiconductor layer to obtain the LED chip array; the electrode layer comprises a first electrode arranged on the periphery of the LED chip array, a second electrode arranged on the current diffusion layer and metal grid lines arranged between the epitaxial structures. The LED chip array adopts a common electrode design, namely the LED chip array shares the first electrode, current collection and transmission are realized through the metal grid lines and/or the first semiconductor layer, and the current uniformity is effectively improved.

Optionally, the width of the metal grid lines is narrower than the first electrode and/or the second electrode. The arrangement of the metal grid lines effectively improves the current uniformity on one hand, and on the other hand, the area of the first semiconductor layer covered by the metal grid lines is small, so that the light-emitting area of the LED device is effectively increased, and the light-emitting efficiency of the device is improved.

Optionally, the passivation layer comprises silicon nitride and/or silicon oxide.

Optionally, the electrode contact hole is disposed above the first electrode and the second electrode.

Optionally, the disposing a bonding layer in the electrode contact hole includes: depositing the conductive layer and the solder layer in the electrode contact hole in sequence; and after reflow treatment, the solder layer is solidified after being melted, and the solder salient point is obtained.

Optionally, the sequentially depositing the conductive layer and the solder layer within the electrode contact hole includes: depositing the conducting layer in the electrode contact hole, and forming a concave part in the middle of the conducting layer; depositing the solder layer within the recess.

Optionally, a central portion of the solder layer forms another recess.

Optionally, the reflow process includes: performing the reflux treatment in vacuum or oxygen-free atmosphere, wherein the reflux peak temperature is between 156 ℃ and 260 ℃; refluxing for 5-300s at the reflux peak temperature.

Optionally, the reflow treatment employs a eutectic reflow furnace.

Optionally, the high-melting-point conductive material is a high-melting-point metal conductive material or a high-melting-point non-metal conductive material.

Optionally, the melting point of the solder layer is lower than the melting point of the conductive layer.

Optionally, the high melting point conductive material is a high melting point solder.

Optionally, the conductive layer is made of gold-tin alloy, and the solder layer is made of indium metal.

Optionally, the thickness ratio of the conductive layer to the solder layer is 1:3-2: 1.

Optionally, the peeling is performed by a laser peeling method.

Optionally, the LED chip array is a Micro-LED chip array.

The application also provides an LED device, wherein the LED device is prepared by adopting the preparation method of the LED device.

Optionally, the LED device includes an LED chip array, a passivation layer, and a bonding layer, where the LED chip array includes a plurality of LED chips, and the LED chips include a first semiconductor layer, a multiple quantum well structure, a second semiconductor layer, a current diffusion layer, and an electrode layer, which are stacked from bottom to top; the passivation layer covers the LED chip array; the passivation layer is provided with an electrode contact hole, the bonding layer is arranged in the electrode contact hole, and the bonding layer is of a double-layer structure.

Optionally, the bonding layer includes a conductive layer and a solder layer, the conductive layer is located between the electrode layer and the solder layer, and the conductive layer is made of a high-melting-point conductive material.

Optionally, a concave portion is disposed in a middle portion of the conductive layer, and the solder layer is disposed in the concave portion; the cross section of the concave part is square, inverted triangle or inverted trapezoid.

Optionally, the electrode layer includes a first electrode disposed at the periphery of the LED chip array, a second electrode disposed on the current diffusion layer, and a metal grid line disposed between the LED chips, and the metal grid line is electrically connected to the first electrode.

Optionally, the width of the metal grid lines is narrower than the first electrode and/or the second electrode.

Optionally, the bonding layer is disposed on the first electrode and the second electrode.

Optionally, the LED chip array is a Micro-LED chip array.

The present application also provides a display apparatus, wherein the display apparatus includes the LED device.

The present application also provides a light emitting apparatus, wherein the light emitting apparatus includes the LED device.

According to the preparation method of the LED device and the LED device prepared by the method, the bonding layer with the double-layer structure is adopted, and the conducting layer is made of the high-melting-point conducting material, so that the chip is effectively prevented from falling off due to the melting of the solder in the laser stripping process. In addition, the design of the common electrode is adopted, namely the LED chip array shares the first electrode, current collection and transmission are realized through the metal grid lines and/or the first semiconductor layer, the current uniformity is effectively improved, and the photoelectric performance of the device is improved.

Drawings

The above and other objects, features and advantages of exemplary embodiments of the present application will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the present application are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar or corresponding parts and in which:

fig. 1 shows a flow diagram of a method of making an LED device according to an embodiment of the present application;

FIGS. 2 a-2 d show a schematic flow diagram of a fabrication process for an LED device according to a preferred embodiment of the present application;

fig. 3 shows a schematic cross-sectional structure of an LED device according to an embodiment of the present application.

Detailed Description

It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The technical solutions of the present application will be described in detail below with reference to the accompanying drawings in conjunction with embodiments. The drawings of the present application are for illustration purposes only and are not intended to be limiting.

It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

Spatially relative terms, such as "above … …," "above … …," "above … …," "above," and the like, may be used herein for ease of description to describe one device or feature's spatial relationship to another device or feature as illustrated in the figures, whether directly or indirectly through intervening media. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, devices described as "above" or "on" other devices or configurations would then be oriented "below" or "under" the other devices or configurations. Thus, the exemplary term "above … …" can include both an orientation of "above … …" and "below … …". The device may also be oriented 90 degrees or at other orientations and the spatially relative descriptors used herein interpreted accordingly.

Exemplary embodiments according to the present application will now be described in more detail with reference to the accompanying drawings. These exemplary embodiments may, however, be embodied in many different forms and should not be construed as limited to only the embodiments set forth herein. It is to be understood that these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art, in the drawings, the thicknesses of layers and regions are exaggerated for clarity, and the same devices are denoted by the same reference numerals, and thus the description thereof will be omitted.

One embodiment of the present application provides a method of fabricating an LED device. Referring to fig. 1, the method of manufacturing the LED device includes the following steps S101 to S104.

Step S101: an array of LED chips is formed on a substrate.

According to the embodiments of the present application, any method of forming an array of LED chips on a substrate in the prior art may be applied to the technical solution of the present application, and is not particularly limited herein. The material of the substrate may be selected according to actual needs, and may include any one of sapphire, aluminum nitride, silicon carbide, gallium nitride single crystal material, and the like, for example; the structure, size, number, arrangement and the like of the LED chips in the LED chip array can be set according to actual needs, and the LED chip array is not particularly limited in the application.

As a preferred embodiment, forming an array of LED chips on a substrate may include the steps of:

etching the epitaxial structure on the substrate to expose part of the first semiconductor layer;

providing a current diffusion layer on the second semiconductor layer of the epitaxial structure;

arranging electrode layers on the current diffusion layer and the first semiconductor layer to obtain the LED chip array;

the electrode layer comprises a first electrode arranged on the periphery of the LED chip array, a second electrode arranged on the current diffusion layer and metal grid lines arranged between the epitaxial structures.

As shown in fig. 2a, an epitaxial structure is disposed on a substrate 101, and the epitaxial structure includes a first semiconductor layer 102, a multiple quantum well structure 103, and a second semiconductor layer 104, which are stacked in sequence from bottom to top, and the epitaxial structure on the substrate 101 is etched to a depth equal to or slightly greater than the sum of the thicknesses of the second semiconductor layer 104 and the multiple quantum well structure 103, so as to expose a portion of the first semiconductor layer 102; depositing a current diffusion layer 105 over the second semiconductor layer 104, wherein the current diffusion layer 105 may be a single or multiple metal layers, and may also be an Indium Tin Oxide (ITO) layer; an electrode layer 106 is deposited over the current diffusion layer 105 and the first semiconductor layer 102, and an LED chip array 100 (shown by a dashed box) is obtained, wherein the electrode layer 106 includes a first electrode 1061 disposed on the periphery of the LED chip array 100, a second electrode 1062 disposed on the current diffusion layer 105, and a metal grid 1063 disposed between the epitaxial structures. It should be understood that the number of LED chips shown in fig. 2a is merely exemplary and not limiting.

Preferably, the current diffusion layer 105 is an ITO layer; prior to depositing the electrode layer 106, the current spreading layer 105 may be annealed, in particular, by disposing the current spreading layer 105 on the second semiconductor layer 104 of the epitaxial structure and then subjecting to a temperature of 500-₂Treating in a gas environment for 200-400s (preferably 300s) to oxidize ITO, and then placing at 600-800 deg.C (preferably 750 deg.C) temperature₂Treating in gas environment for 25-40s (preferably 30s) to obtainThe ITO alloy, thereby effectively improving the conductivity of the ITO.

It should be noted that, in the present application, the positional descriptions of the layers all refer to the substrate as the bottom layer, that is, the "upper" refers to the side away from the substrate, and the "B layer provided on the a layer" refers to the B layer provided on the side away from the substrate. The first electrode 1061, the second electrode 1062, and the metal grid lines 1063 may be the same or different in structure, material, thickness, etc., and are not limited herein; if the first electrode 1061, the second electrode 1062, and the metal grid lines 1063 have different structures, materials, thicknesses, etc., the deposition may be performed by a fractional photolithography and lift-off method, which is not described herein again.

Preferably, the LED chip array is a Micro-LED chip array, and the LED chip array 100 includes a plurality of LED chips with the same size and structure arranged in rows and columns at equal intervals; the size of each LED chip is preferably 1-50 μm; the width of the metal grid lines 1063 is narrower than the first and

second electrodes

1061 and 1062, and the width of the metal grid lines 1063 is preferably 0.5-5 μm. The metal grid lines 1063 are electrically connected to the first electrode 1061 for collecting and transmitting current, and the process, material, structure, etc. may be the same as the first electrode 1061 and the second electrode 1062, or other metals with better conductivity, such as silver, copper, gold, etc., may be selected.

The preferred embodiment adopts a common electrode design, namely the LED chip array shares the first electrode, and current collection and transmission are realized through the metal grid lines, so that the current uniformity is effectively improved, and the photoelectric performance of the device is improved. In addition, the area of the first semiconductor layer covered by the metal grid lines 1063 is smaller, so that the light emitting area is effectively increased, the utilization rate of the epitaxial wafer is improved, and the light emitting efficiency of the LED device is improved.

Alternatively, the substrate 101 may be sapphire, the first semiconductor layer 102 may be N-type gallium nitride (N-GaN), the multiple quantum well structure 103 may be an indium gallium nitride/gallium nitride (InGaN/GaN) multiple quantum well layer, the second semiconductor layer 104 may be P-type gallium nitride (P-GaN), the current diffusion layer may be ITO, and the first electrode 1061, the second electrode 1062, and the metal grid lines 1063 may be a titanium/aluminum/titanium/gold multilayer structure. The substrate 101 and the first semiconductor layer 102 may further include a buffer layer 107 and an undoped gallium nitride (U-GaN) layer 108, where the buffer layer 107 may be gallium nitride or aluminum nitride, and the arrangement of the buffer layer 107 and the U-GaN layer 108 is beneficial to reducing lattice mismatch and thermal stress mismatch between the chip epitaxial structure and the substrate.

Preferably, the first electrode 1061 and the second electrode 1062 have a titanium/aluminum/titanium/gold multilayer structure, and the electrodes of the multilayer structure can not only serve as electrode layers to realize current transmission of the LED device, but also function as an adhesion layer/diffusion barrier layer/wetting layer. Specifically, the titanium can play a role of an adhesion layer and/or a diffusion barrier layer so as to realize adhesion between the electrode layer and the current diffusion layer, and can effectively prevent the bonding layer from diffusing to the bottom metal of the electrode layer; the gold tool has good wettability, can play a role of a wetting layer, and has good wettability with a bonding layer so as to effectively improve the welding reliability.

It is understood that, in the embodiments of the present disclosure, the electrode layer may include only a first electrode disposed at the periphery of the LED chip array and a second electrode disposed on the current spreading layer, and the LED chips are connected to each other through the first semiconductor layer (i.e., the N-type semiconductor layer) and electrically connected to the first electrode. The arrangement method, structure, material, size, etc. of the first electrode and the second electrode may be the same as or similar to those of the first electrode 1061 and the second electrode 1062, and are not described herein again.

Step S102: and integrally arranging a passivation layer above the LED chip array, and arranging an electrode contact hole on the passivation layer to expose part of the electrode layer.

According to the embodiment of the application, the passivation layer is arranged above the LED chip array to wrap the LED chips, so that the LED chips are isolated from each other, short circuit is effectively avoided, and the interconnection between the LED chips is realized through the first semiconductor layer and the metal grid lines; and exposing part of the electrode layer by arranging an electrode contact hole on the passivation layer so as to subsequently arrange a bonding layer in the electrode contact hole.

It should be noted that "integrally disposed" in the present application means that the passivation layer covers not only each LED chip in the LED chip array and the first semiconductor layer and the metal grid lines exposed between the LED chips, but also the first semiconductor layer and the first electrodes exposed at the periphery of the LED chip array.

As a preferred embodiment, the electrode contact hole is provided only in the passivation layer over the first electrode and the second electrode; the size of the electrode contact hole can be set according to actual needs; the cross-sectional shape of the electrode contact hole may be square, inverted trapezoid, or inverted triangle, and the top-view projection shape of the electrode contact hole may be set according to actual needs, and may be square, circular, triangular, quadrangular, star-shaped, or hexagonal, for example.

As shown in fig. 2b, a passivation layer 109 is entirely disposed over the LED chip array, and the passivation layer 109 over the first electrode 1061 and the second electrode 1062 is perforated to obtain an electrode contact hole 110. It should be understood that the number of LED chips shown in fig. 2b is merely exemplary and not limiting.

Alternatively, the passivation layer 109 may employ silicon nitride and/or silicon oxide, preferably silicon nitride.

Step S103: a bonding layer is arranged in the electrode contact hole; wherein the bonding layer comprises a conductive layer and a solder layer, the conductive layer being located between the electrode layer and the solder layer; the conducting layer is made of a high-melting-point conducting material.

According to the embodiment of the disclosure, the bonding layer with the double-layer structure is adopted, and the conducting layer is made of the high-melting-point conducting material, so that the chip is effectively prevented from falling off due to the melting of the solder in the laser stripping process, and the product yield is effectively improved.

As a preferred embodiment, the disposing of the bonding layer in the electrode contact hole may include:

depositing the conductive layer and the solder layer in the electrode contact hole in sequence;

and after reflow treatment, the solder layer is solidified after being melted, and the solder salient point is obtained.

According to the laser stripping device, the conducting layer and the solder layer are deposited in the electrode contact hole, wherein the conducting layer is made of the high-melting-point conducting material, and in the subsequent laser stripping process, the high-melting-point conducting material can absorb part of laser heat, so that the melting of the solder layer can be effectively avoided, and the chip is prevented from falling off. In addition, through the arrangement of the bonding layer, the flux-free backflow is realized, so that the influence of flux on the performance of the light-emitting device is effectively avoided.

Preferably, the sequentially depositing the conductive layer and the solder layer in the electrode contact hole may include the steps of: depositing a conductive layer in the electrode contact hole, wherein the thickness of the conductive layer is equal to or greater than the depth of the electrode contact hole; a solder layer is deposited on the conductive layer. In the preferred embodiment, the conducting layer is arranged in the electrode contact hole to realize the electrical connection with the electrode layer, and the high-melting-point conducting material is not easily heated and melted in the subsequent laser stripping process, can absorb part of laser heat, and effectively avoids the heating and melting of the solder layer, thereby avoiding the chip from falling off in the laser stripping process.

In another preferred embodiment, the sequentially depositing the conductive layer and the solder layer in the electrode contact hole includes: depositing a conductive layer in the electrode contact hole, and forming a concave part in the middle of the conductive layer; depositing the solder layer within the recess. The cross-sectional shape of the recess may be a square, an inverted triangle, or an inverted trapezoid, preferably an inverted trapezoid.

Further preferably, another concave portion is formed in the middle of the solder layer.

It is to be understood that, in the present application, the bonding layer is disposed above the first electrode and the second electrode, and is in one-to-one correspondence with the electrode contact holes and is isolated from each other, and the "middle portion of the conductive layer" refers to the middle portion of the conductive layer corresponding to each electrode contact hole. In order to better distinguish the concave portion of the conductive layer from the concave portion of the solder layer, the concave portion of the conductive layer may be referred to as a "first concave portion" and the concave portion of the solder layer may be referred to as a "second concave portion".

As shown in fig. 2c, filling a high melting point conductive material into the electrode contact hole 110 to obtain a conductive layer 111, wherein the thickness of the conductive layer 111 is greater than the depth of the electrode contact hole 110, and a first recess 1110 is formed in the middle of the conductive layer, so that the cross-sectional shape of the conductive layer is in a shape of an inverted "pin"; filling solder into the first concave portion 1110 to obtain the solder layer 112, wherein the thickness of the solder layer 112 is greater than the depth of the first concave portion 1110, and a second concave portion 1120 is formed in the middle of the solder layer, so that the cross-sectional shape of the solder layer is in the shape of an inverted "Chinese character pin".

According to the preferred embodiment, the high melting point conductive material is filled in the electrode contact hole, and the concave part is formed in the middle of the conductive layer, so that the solder layer can be arranged in the concave part, and further, when the solder layer is subjected to reflow treatment, the solder cannot overflow, and the void ratio is effectively reduced. And the concave part in the middle of the solder layer ensures that the peripheral solder reflows to the middle part during reflow treatment, thereby being beneficial to avoiding overflow, obtaining larger solder salient points, being further beneficial to subsequent welding and effectively avoiding melting and falling off in the subsequent laser stripping process.

According to the embodiment of the application, the conductive layer is mainly used for contacting with the electrode layer to realize electrical connection with the electrode layer, the conductive layer is made of a high-melting-point conductive material, preferably a material with a high melting point (for example, above 250 ℃), high mechanical strength and good electrical and thermal conductivity, and can be a high-melting-point metal conductive material or a high-melting-point nonmetal conductive material, for example, one of gold-tin alloy, gold, titanium, nickel, aluminum, copper, graphite and graphene; the solder layer is mainly used for bonding the LED chip array and the driving substrate, and the solder layer is preferably a solder with good wettability and good electrical and thermal conductivity, such as one of indium, tin, and silver-tin alloy. The thickness ratio of the conducting layer to the solder layer is preferably 1:3-2:1, and the thickness of the conducting layer is preferably 0.3-7 μm, so that the good electric and heat conducting performance of the bonding layer can be ensured, the connection strength of the conducting layer and the electrode layer can be ensured, the falling off in the laser stripping process can be effectively avoided, and the yield of devices can be improved.

Further, if the high-melting-point conductive material is a high-melting-point non-metallic conductive material, such as graphene, the graphene may be deposited on the electrode layer by a chemical vapor deposition method, or the graphene coating may be disposed in the electrode contact hole by coating or filling. The graphene has a high melting point, and can be effectively prevented from being melted in the laser stripping process; the LED lamp has extremely high heat conductivity coefficient, and can effectively improve the heat dissipation efficiency of the LED device; in addition, the graphene has electrical and optical properties, and is beneficial to improving the photoelectric performance of the LED device.

Preferably, the high melting point conductive material is a high melting point solder comprising: gold-tin alloy, gold, titanium, nickel, aluminum, copper. Preferably, the melting point of the solder layer is lower than that of the conductive layer, so that low-temperature bonding can be realized, and the process cost is effectively reduced.

Optionally, the conductive layer is made of gold-tin alloy, the solder is made of indium metal, wherein the gold content of the gold-tin alloy is preferably 80%, and the eutectic point of the gold-tin alloy is 280 ℃, so that the thermal conductivity and the reliability are both excellent; the reflow process may include: performing the reflux treatment in vacuum or oxygen-free atmosphere, wherein the reflux peak temperature is between 156 ℃ and 260 ℃; refluxing for 5-300s at the reflux peak temperature. The reflux treatment is preferably performed by using a eutectic reflux furnace.

The embodiment of the application preferably selects gold-tin alloy as a conductive layer material, and selects indium as a solder layer material, wherein the gold-tin alloy has stronger mechanical strength and good heat and electricity conduction performance, and the indium is low-temperature solder with excellent performance, has better ductility, high heat conductivity, good wettability and plastic deformation, and the gold-tin alloy/indium bonding layer can effectively avoid falling off due to melting of the solder in the laser stripping process, and simultaneously effectively reduces the bonding temperature and the process cost. Because the melting point of indium is lower, the reflux peak temperature can be lower during reflux treatment, and the energy consumption is effectively reduced; in addition, due to the arrangement of the bonding layer, the using amount of indium can be properly reduced, so that the reflux time can be shortened, and the reflux energy consumption is further reduced.

In another preferred embodiment, after the conductive layer and the solder layer are sequentially deposited in the electrode contact hole, the solder layer is not subjected to reflow processing. In the preferred embodiment, the solder layer is preferably indium. The conductive layer is in reliable contact with the electrode layer, the indium is soft in texture and has good plastic deformation, and when the LED chip is bonded with the circuit substrate in the subsequent process, the indium can be directly heated to be softened or in a molten state to be bonded with the circuit substrate, so that the process steps are simplified.

Preferably, a conductive layer is deposited in the electrode contact hole, and a concave part is formed in the middle of the conductive layer; depositing the solder layer in the concave part, and forming another concave part in the middle of the solder layer. The cross-sectional shape of the recess may be a square, an inverted triangle, or an inverted trapezoid, preferably an inverted trapezoid.

In the preferred embodiment of the present disclosure, the conductive layer is disposed in the electrode contact hole and electrically connected to the electrode layer; the solder layer is arranged in the concave part of the conducting layer, so that the contact area between the conducting layer and the solder layer is effectively increased, and in the subsequent laser stripping process, the high-melting-point conducting material of the conducting layer can absorb a part of laser heat, so that the melting of the solder layer can be effectively avoided, and the chip is prevented from falling off; the other concave part is formed in the middle of the solder layer, so that when the LED chip array and the circuit substrate are bonded subsequently, the solder layer is softened or melted to enter the concave part in the middle of the solder layer, and short circuit caused by overflow of the solder can be effectively avoided.

Step S104: and bonding the LED chip array and a driving substrate through the bonding layer, and stripping the substrate to obtain the LED device.

Embodiments of the present application preferably use a laser lift-off process to lift off the substrate. The arrangement of the bonding layer with the double-layer structure effectively avoids the chip from falling off due to the melting of solder in the laser stripping process, and simultaneously effectively reduces the bonding temperature and the process cost.

As shown in fig. 2d, after the LED chip array 100 (indicated by the dashed line frame) is bonded to the driving substrate 113, the substrate 101, the buffer layer 107, and the U-GaN layer 108 are peeled off by a laser lift-off method to obtain an LED device. It should be understood that the number of LED chips shown in fig. 2d is merely exemplary and not limiting.

Another embodiment of the present application provides an LED device, which is prepared by the method for preparing an LED device provided in the foregoing examples of the present application.

As shown in fig. 3, the LED device 300 includes an LED chip array 100 (shown by a dashed-line frame), a passivation layer 109, a bonding layer, and a driving substrate 113, where the LED chip array 100 includes a plurality of LED chips, and the LED chips include a first semiconductor layer 102, a multiple quantum well structure 103, a second semiconductor layer 104, a current diffusion layer 105, and an electrode layer 106, which are stacked from bottom to top; a passivation layer 109 covering the LED chip array 100; an electrode contact hole 110 is formed in the passivation layer 109, a bonding layer is arranged in the electrode contact hole 110, and the bonding layer is of a double-layer structure; the driving substrate 113 is bonded to the LED chip array 100 and disposed on a side of the LED chip array 100 away from the first semiconductor layer 102. The LED device adopts the bonding layer with the double-layer structure, thereby effectively avoiding the falling off caused by the melting of the solder in the laser stripping process and effectively improving the yield of products. It should be understood that the number of LED chips shown in fig. 3 is merely exemplary and not limiting.

Optionally, the bonding layer includes a conductive layer 111 and a solder layer 112, the conductive layer 111 is located between the electrode layer 106 and the solder layer 112, and the conductive layer 111 is made of a high melting point conductive material. Preferably, the thickness ratio of the conductive layer 111 to the solder layer 112 is 1:3-2: 1.

Alternatively, the high melting point conductive material may be a high melting point metallic conductive material or a high melting point non-metallic conductive material, preferably any one of gold-tin alloy, gold, titanium, nickel, aluminum, copper, graphite, and graphene.

Optionally, the high melting point conductive material is a high melting point solder, preferably any one of gold-tin alloy, gold, titanium, nickel, aluminum, and copper.

Optionally, the melting point of the solder layer is lower than the melting point of the conductive layer; the solder layer is preferably any one of indium, tin, and silver-tin alloy.

Alternatively, the conductive layer is made of gold-tin alloy, and the solder layer is made of indium metal. The embodiment of the application preferably selects gold-tin alloy as a conductive layer material, and selects indium as a solder layer material, wherein the gold-tin alloy has stronger mechanical strength and good heat and electricity conduction performance, and the indium is low-temperature solder with excellent performance, has better ductility, high heat conductivity, good wettability and plastic deformation. Because the melting point of indium is lower, the reflux peak temperature can be lower when reflux treatment is carried out in the preparation process, and the energy consumption is effectively reduced; in addition, due to the arrangement of the bonding layer, the using amount of indium can be properly reduced, so that the reflux time can be shortened, and the reflux energy consumption is further reduced.

Optionally, a concave portion 1110 is disposed in the middle of the conductive layer 111, and the solder layer 112 is filled in the concave portion 1110; the cross-sectional shape of the recess 1110 is square, inverted triangle, or inverted trapezoid. The arrangement of the concave part of the conducting layer can effectively prevent the solder of the solder layer from overflowing during the backflow, and can effectively reduce the void ratio.

Optionally, the electrode layer 116 includes a first electrode 1161 disposed at the periphery of the LED chip array 100, a second electrode 1062 disposed on the current diffusion layer 105, and a metal grid 1063 disposed between the LED chips, wherein the metal grid 1063 is electrically connected to the first electrode 1161. The preferred embodiment adopts a common electrode design, namely the LED chip array shares the first electrode, and current collection and transmission are realized through the metal grid lines, so that the current uniformity is effectively improved, and the photoelectric performance of the device is improved. In addition, the area of the first semiconductor layer covered by the metal grid lines 1063 is smaller, so that the light emitting area is effectively increased, the utilization rate of the epitaxial wafer is improved, and the light emitting efficiency of the LED device is improved.

Optionally, the metal grid lines 1063 are narrower in width than the first electrode 1061 and/or the second electrode 1062.

Optionally, a bonding layer is disposed on the first electrode 1061 and the second electrode 1062.

Optionally, the LED chip array 100 is a Micro-LED chip array.

Optionally, a driving control circuit is disposed on the driving substrate 113, and the driving control circuit is electrically connected to the plurality of LED chips.

The LED device that this application above-mentioned embodiment provided adopts bilayer structure bonding layer, and the bottom conducting layer adopts high melting point conducting material to effectively avoided the chip to peel off because of the solder melting in-process at the laser, in addition, the melting point of solder layer is lower and good plastic deformation than the melting point of conducting layer, has effectively reduced bonding temperature, bonding pressure, has reduced processing cost, has improved the bonding reliability. In addition, the design of a common electrode is adopted, namely the LED chip array shares the first electrode, current collection and transmission are realized through the metal grid lines, the current uniformity is effectively improved, and the photoelectric performance of the device is improved. On the other hand, the area of the first semiconductor layer covered by the metal grid lines is small, so that the light-emitting area is effectively increased, and the light-emitting efficiency of the LED device is improved.

Another embodiment of the present application also provides a display apparatus including the LED device described herein.

The display device provided by the embodiment of the application can realize high PPI (polymer PPI) and has good device quality, and the display device can be applied to a display screen of electronic equipment. The electronic device may include: any device with a display screen, such as a smart phone, a smart watch, a laptop, a tablet computer, a vehicle data recorder, a navigator, a Virtual Reality (VR)/Augmented Reality (AR) display, etc.

Another embodiment of the present application also provides a light emitting device. The light emitting device comprises the LED device. The light emitting means may be, for example, a lighting means and an indicating means. The lighting device may be, for example, various lamps for illumination. The indicating device may be, for example, various indicating lamps for indicating or an illuminating lamp having a display function.

It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.

It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A preparation method of an LED device comprises the following steps:

forming an array of LED chips on a substrate;

integrally arranging a passivation layer above the LED chip array, and arranging an electrode contact hole on the passivation layer to expose part of the electrode layer;

a bonding layer is arranged in the electrode contact hole; wherein the bonding layer comprises a conductive layer and a solder layer, the conductive layer being located between the electrode layer and the solder layer; the conducting layer is made of a high-melting-point conducting material;

and bonding the LED chip array and a driving substrate through the bonding layer, and stripping the substrate to obtain the LED device.

2. The method of manufacturing an LED device according to claim 1, wherein said forming an array of LED chips on a substrate comprises:

3. The method of claim 2, wherein the metal grid lines are narrower in width than the first and/or second electrodes.

4. The method of manufacturing an LED device according to claim 1 or 2, wherein the passivation layer comprises silicon nitride and/or silicon oxide.

5. The method for manufacturing an LED device according to claim 2, wherein the electrode contact hole is provided above the first electrode and the second electrode.

6. The method for manufacturing an LED device according to claim 1, wherein the disposing a bonding layer in the electrode contact hole comprises:

7. The method of manufacturing an LED device according to claim 6, wherein said sequentially depositing said conductive layer and said solder layer within said electrode contact hole comprises:

depositing the conducting layer in the electrode contact hole, and forming a concave part in the middle of the conducting layer;

depositing the solder layer within the recess.

8. The method for manufacturing an LED device according to claim 6, wherein the reflow process comprises:

performing the reflux treatment in vacuum or oxygen-free atmosphere, wherein the reflux peak temperature is between 156 ℃ and 260 ℃; refluxing for 5-300s at the reflux peak temperature.

9. The method for manufacturing an LED device according to claim 1, wherein the high melting point conductive material is a high melting point solder.

10. The method for manufacturing an LED device according to claim 1, wherein the melting point of the solder layer is lower than the melting point of the conductive layer.

11. The method for manufacturing an LED device according to claim 1, wherein the conductive layer is made of gold-tin alloy, and the solder layer is made of indium metal.

12. The method for manufacturing an LED device according to claim 1, wherein a thickness ratio of the conductive layer to the solder layer is 1:3-2: 1.

13. The method for manufacturing an LED device according to claim 1, wherein the lift-off is performed by a laser lift-off method.

14. The method for preparing an LED device according to claim 1, wherein the LED chip array is a Micro-LED chip array.

15. An LED device, wherein the LED device is prepared by the method of any one of claims 1 to 14.

16. The LED device of claim 15, wherein the LED device comprises an LED chip array, a passivation layer, and a bonding layer, wherein the LED chip array comprises a plurality of LED chips, and the LED chips comprise a first semiconductor layer, a multi-quantum well structure, a second semiconductor layer, a current diffusion layer, and an electrode layer stacked from bottom to top; the passivation layer covers the LED chip array; the passivation layer is provided with an electrode contact hole, the bonding layer is arranged in the electrode contact hole, and the bonding layer is of a double-layer structure.

17. The LED device of claim 16, wherein the bonding layer comprises a conductive layer and a solder layer, the conductive layer is between the electrode layer and the solder layer, and the conductive layer is made of a high melting point conductive material.

18. The LED device of claim 17, wherein the high melting point conductive material is a high melting point solder.

19. The LED device of claim 17, wherein the solder layer has a lower melting point than the conductive layer.

20. The LED device of claim 17 wherein the conductive layer is gold-tin alloy and the solder layer is indium metal.

21. The LED device of claim 17, wherein a central portion of the conductive layer is provided with a recess, and the solder layer is provided in the recess.

22. The LED device of claim 16, wherein the electrode layer comprises first electrodes disposed at the periphery of the LED chip array, second electrodes disposed on the current spreading layer, and metal grid lines disposed between the LED chips, the metal grid lines being electrically connected with the first electrodes.

23. The LED device of claim 22, wherein the metal grid lines are narrower in width than the first and/or second electrodes.

24. The LED device of claim 22 or 23, wherein the bonding layer is disposed on the first and second electrodes.

25. The LED device of claim 16, wherein said LED chip array is a Micro-LED chip array.

26. A display apparatus, wherein the display apparatus comprises the LED device of any one of claims 15 to 25.

27. A light emitting apparatus, wherein the light emitting apparatus comprises the LED device of any one of claims 15 to 25.