CN111599832A

CN111599832A - Photoelectric element and manufacturing method thereof

Info

Publication number: CN111599832A
Application number: CN202010310878.0A
Authority: CN
Inventors: 陈昭兴; 王佳琨; 沈建赋; 柯竣腾
Original assignee: Epistar Corp
Current assignee: Epistar Corp
Priority date: 2014-06-23
Filing date: 2014-06-23
Publication date: 2020-08-28
Anticipated expiration: 2034-06-23
Also published as: CN105280665A; CN105280665B; CN111599832B

Abstract

The invention discloses a photoelectric element and a manufacturing method thereof, wherein the photoelectric element comprises: a substrate having a first side, a second side opposite to the first side, and a first outer boundary; the light emitting diode unit is formed on the first side; a first electrode electrically connected with the light emitting diode unit; a second electrode electrically connected with the light emitting diode unit; and a heat dissipation pad formed between the first electrode and the second electrode and electrically isolated from the light emitting diode unit.

Description

Photoelectric element and manufacturing method thereof

The application is a divisional application of Chinese invention patent application (application number: 201410283842.2, application date: 2014, 06 and 23, invention name: photoelectric element and manufacturing method thereof).

Technical Field

The present disclosure relates to optoelectronic devices, and particularly to an optoelectronic device with a heat dissipation pad.

Background

A light-emitting diode (LED) emits light in the form of light by utilizing an energy difference between an n-type semiconductor and a p-type semiconductor, and is different from an incandescent lamp in that it generates heat. In addition, since the led has advantages of high durability, long life, light weight, and low power consumption, the current lighting market is expected to look for the led as a new generation of lighting tool, which has gradually replaced the conventional light source and is applied to various fields, such as traffic signals, backlight modules, street lighting, medical devices, etc.

Fig. 1 is a schematic structural diagram of a conventional light emitting device, and as shown in fig. 1, a conventional light emitting device 100 includes a transparent substrate 10, a semiconductor stack 12 on the transparent substrate 10, and at least one electrode 14 on the semiconductor stack 12, wherein the semiconductor stack 12 at least includes a first conductive type semiconductor layer 120, an active layer 122, and a second conductive type semiconductor layer 124 from top to bottom.

In addition, the light-emitting device 100 can be further combined with other devices to form a light-emitting device (light-emitting apparatus). Fig. 2 is a schematic structural diagram of a conventional light emitting device, and as shown in fig. 2, a light emitting device 200 includes a sub-mount 20 having at least one circuit 202; at least one solder (holder) 22 is located on the sub-carrier 20, the light emitting device 100 is bonded and fixed on the sub-carrier 20 by the solder 22, and the substrate 10 of the light emitting device 100 is electrically connected to the circuit 202 on the sub-carrier 20; and an electrical connection structure 24 for electrically connecting the electrode 14 of the light emitting device 100 and the circuit 202 on the submount 20; the sub-carrier 20 may be a lead frame (lead frame) or a large-sized damascene substrate (mounting substrate), so as to facilitate circuit planning of the light emitting device 200 and improve the heat dissipation effect thereof.

Disclosure of Invention

To solve the above problems, the present invention provides a photovoltaic device, comprising: a substrate having a first side, a second side opposite to the first side, and a first outer boundary; the light emitting diode unit is formed on the first side; a first electrode electrically connected with the light emitting diode unit; a second electrode electrically connected with the light emitting diode unit; and a heat dissipation pad formed between the first electrode and the second electrode and electrically isolated from the light emitting diode unit.

Drawings

FIG. 1 is a side view of a conventional optoelectronic device;

FIG. 2 is a schematic view of a conventional light-emitting device;

FIG. 3A is a top view of a photoelectric device unit according to an embodiment of the present invention;

FIGS. 3B-3C are side view structural diagrams of a photoelectric element unit according to an embodiment of the invention;

FIGS. 4A-4E are top view structural diagrams of optoelectronic element units according to further embodiments of the present invention;

FIG. 5A is a top view of a photoelectric device unit according to another embodiment of the present invention;

FIG. 5B is a side view of the optoelectronic device unit according to an embodiment of the present invention;

FIGS. 5C-5D are top views of optoelectronic device units according to an embodiment of the present invention;

FIGS. 5E-5F are side views of the optoelectronic device unit according to an embodiment of the present invention;

FIG. 6A is a top view of a photoelectric device unit according to an embodiment of the present invention;

FIG. 6B is a side view of the optoelectronic device unit according to an embodiment of the present invention;

FIG. 6C is a top view of the optoelectronic device unit according to an embodiment of the present invention;

FIG. 6D is a side view of the optoelectronic device unit according to an embodiment of the present invention;

FIG. 6E is a top view of the optoelectronic device unit according to an embodiment of the present invention;

FIG. 6F is a side view of the optoelectronic device unit according to an embodiment of the present invention;

FIGS. 7A-7D are top views of optoelectronic device units according to another embodiment of the present invention;

FIGS. 8A-8C are schematic diagrams of a light module;

FIGS. 9A-9B are schematic views of a light source generating device; and

fig. 10 is a schematic view of a lamp.

Description of the symbols

Light emitting element

100, 200, 300', 400, 500

Transparent substrate 10

Semiconductor stack 12

Electrodes 14, E1, E2

Substrate 30

Photoelectric element unit U

First contact photoelectric element unit U1

Second contact photoelectric element unit U2

First semiconductor layer 321

Active layer 322

Second semiconductor layer 323

Groove S

First insulating layer 361

Conductive wiring structure 362

Second insulating layer 363

First electrode 341

Second electrode 342

Third electrode 381

Fourth electrode 382

First heat-dissipating pad 383

Carrier plate or circuit component P

Fifth electrode 40

Sixth electrode 42

Support element 44

Optical layer 46

Opening 461

Second heat-dissipating pad 48

Second thermal pad first portion 482

Second portion 481 of second thermal pad

Light emitting module 600

Lower carrier 501

Carrier 502

Upper carrier 503

Lenses

504, 506, 508, 510

Power supply terminals

512, 514

Through hole 515

Reflective layer 519

Rubber material 521

Outer cover 540

Light source generating device 700

Bulb 800

Outer cover 921

Lens 922

Lighting module 924

Support 925

Heat sink 926

Series connection portion 927

Electrical serializer 928

Detailed Description

In order to make the description of the present invention more detailed and complete, please refer to the following description in conjunction with the accompanying drawings of fig. 3A to 10.

Fig. 3A and 3B are a side view and a top view of a photoelectric device 300 according to a first embodiment of the invention. The photovoltaic element 300 has a substrate 30. The substrate 30 is not limited to a single material, and may be a composite substrate formed by combining a plurality of different materials. For example: the substrate 30 may include two first and second substrates (not shown) bonded to each other.

Next, a plurality of array-type photo-electric element units U, a first contact photo-electric element unit U1 and a second contact photo-electric element unit U2 are formed on the substrate 30. The array-type photo-electric element unit U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 are manufactured, for example, as follows:

first, an epitaxial stack including a first semiconductor layer 321, an active layer 322, and a second semiconductor layer 323 is formed on a substrate 30 by a conventional epitaxial growth process.

Next, as shown in fig. 3B, a photolithography process is used to selectively remove a portion of the epitaxial stack to form a plurality of spaced-apart photo cell units U, a first contact photo cell unit U1, and a second contact photo cell unit U2 on the growth substrate and to form at least one trench S. In one embodiment, the trench S may be etched by photolithography to expose an exposed region of the first semiconductor layer 321 of each of the plurality of unit cells U, U1 and U2 for forming a platform for subsequent conductive wiring structures.

In another embodiment, in order to increase the light extraction efficiency of the entire device, the epitaxial stacks of the photovoltaic device unit U, the first contact photovoltaic device unit U1 and the second contact photovoltaic device unit U2 may be disposed on the substrate 30 by a transfer epitaxial stack or substrate bonding technique. The epitaxial stacks of the photo-electric element unit U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 may be directly bonded to the substrate 30 by heating or pressing, or the epitaxial stacks of the photo-electric element unit U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 may be adhesively bonded to the substrate 30 by a transparent adhesive layer (not shown). The transparent adhesive layer may be an organic polymer transparent adhesive material, such as polyimide (polyimide), benzocyclobutane (BCB), Perfluorocyclobutane (PFCB), Epoxy Resin (Epoxy), Acrylic Resin (Acrylic Resin), polyester Resin (PET), polycarbonate Resin (PC), or a combination thereof; or a transparent conductive metal oxide layer, such as Indium Tin Oxide (ITO), indium oxide (InO), tin oxide (SnO)₂) Zinc oxide (ZnO), tin fluorine oxide (FTO), Antimony Tin Oxide (ATO), Cadmium Tin Oxide (CTO), zinc aluminum oxide (AZO), zinc gallium oxide (GZO), and the like, or combinations thereof; or an inorganic insulating layer, e.g. of alumina (Al)₂O₃) Silicon nitride (SiN)_x) Silicon oxide (SiO)₂) Aluminum nitride (AlN), titanium dioxide (TiO)₂) Tantalum pentoxide (Ta), tantalum pentoxide (Ta)₂O₅) Etc. or combinations thereof. In one embodiment, the substrate 30 may have a wavelength conversion material.

In fact, the method of disposing the epitaxial stacked layers of the photo-electric element unit U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 on the substrate 30 is not limited thereto, and those having ordinary knowledge in the art will understand. In addition, in an embodiment, a structure in which the second semiconductor layer 323 is adjacent to the substrate 30, the first semiconductor layer 321 is on the second semiconductor layer 323 with the active layer 322 interposed therebetween, may be formed according to the number of times the substrate 30 is transferred.

Next, a first insulating layer 361 is deposited by Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), sputtering, or the like on the partial surface of the epitaxial stack of the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 and between the epitaxial stacks of the adjacent photo-electric element units U, so as to protect the epitaxial stack and electrically insulate the adjacent photo-electric element units U. Then, a plurality of conductive wiring structures 362 completely separated from each other are formed on the surface of the first semiconductor layer 321 and the surface of the second semiconductor layer 323 of two adjacent photoelectric element units U by evaporation or sputtering, respectively. One end of each of the plurality of conductive wiring structures 362 completely separated from each other is disposed on the first semiconductor layer 321 in a unidirectional distribution, and the conductive wiring structures 362 are electrically connected to each other through the first semiconductor layer 321. The conductive wiring structures 362 spaced apart from each other extend to the second semiconductor layer 323 of another adjacent photo cell unit U, and the other end is electrically connected to the second semiconductor layer 323 of the photo cell unit U, so that two adjacent photo cell units U are electrically connected in series.

The method for electrically connecting adjacent photoelectric element units U is not limited thereto, and it will be understood by those skilled in the art that the two ends of the conductive wiring structure are respectively disposed on the semiconductor layers with the same or different conductivity of different photoelectric element units, so as to form a parallel or serial electrical connection structure between the photoelectric element units.

As seen in fig. 3A-3B, the optoelectronic devices 300 are arranged in a series array in the circuit design. A first electrode 341 is formed on the first semiconductor layer 321 of the photo-element cell U, the first contact photo-element cell U1, and the second contact photo-element cell U2, and a second electrode 342 is formed on the second semiconductor layer 323. The fabrication process for forming the first electrode 341 and the second electrode 342 may be performed in the same fabrication process as the conductive wiring structure 362, or may be performed in multiple fabrication processes. The material for forming the first electrode 341 and the second electrode 342 may be the same as or different from the material for forming the conductive wiring structure 362. In one embodiment, the second electrode 342 can be a multi-layer structure and/or include a metal reflective layer (not shown) with a reflectivity greater than 80%. In one embodiment, the conductive wiring structure 362 may be a metal reflective layer with a reflectivity greater than 80%.

Thereafter, as shown in fig. 3B, a second insulating layer 363 may be formed on the conductive wiring structures 362, a portion of the first insulating layer 361, and a portion of the sidewall of the epitaxial stack. In one embodiment, the first insulating layer 361 and the second insulating layer 363 can be transparent insulating layers. The first insulating layer 361 and the second insulating layer 363 may be made of oxide, nitride, or polymer (polymer), and the oxide may include aluminum oxide (Al)₂O₃) Silicon oxide (SiO)₂) Titanium dioxide (TiO)₂) Tantalum Pentoxide (Ta), Tantalum Pentoxide (Ta)₂O₅) Or aluminum oxide (AlO)_x) (ii) a The nitride may comprise aluminum nitride (AlN), silicon nitride (SiN)_x) (ii) a The polymer may comprise polyimide (polyimide) or benzocyclobutane (BCB) or a composite combination thereof. In one embodiment, the second insulating layer 363 may be a Distributed Bragg Reflector (Bragg Reflector) structure. In one embodiment, the thickness of the second insulating layer 363 is greater than the thickness of the first insulating layer 361.

Finally, a third electrode 381 is formed over the first electrode 341, and a fourth electrode 382 is formed over the second electrode 342; and at least one first heat-dissipating pad 383 on the second semiconductor layer 323 of the optoelectronic device unit U, wherein the first heat-dissipating pad 383 is electrically insulated from the second semiconductor layer 323 of the optoelectronic device unit U by a second insulating layer 363. In one embodiment, the projection of the first thermal pad 383 onto the surface of the vertical substrate 30 is not formed on the first insulating layer 361. In one embodiment, first thermal pad 383 is formed over a flat surface. As shown in fig. 3A, in an embodiment, the second semiconductor layer 323 of each of the optoelectronic device units U in the optoelectronic device 300 has a first heat-dissipation pad 383, and the first heat-dissipation pad 383 is electrically insulated from the second semiconductor layer 323 of the optoelectronic device unit U by a second insulating layer 363.

In one embodiment, the third electrode 381, the fourth electrode 382 and the first heat spreader 383 can be formed together in the same fabrication process or separately in different fabrication processes. In one embodiment, the third electrode 381, the fourth electrode 382 and the first heat sink pad 383 may have the same stacked structure. In order to achieve a certain conductivity, the materials of the first electrode 341, the second electrode 342, the conductive wiring structure 362, the third electrode 381, the fourth electrode 382 and the first thermal pad 383 may be metals, such as gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), nickel (Ni), titanium (Ti), tin (Sn), or the like, or alloys or stacked combinations thereof.

In one embodiment, the second semiconductor layer 323 has an upper surface and a first surface area, and the first heat-spreading pad 383 has a second surface area, and the ratio of the second surface area to the first surface area is between 80 and 100%. In one embodiment, the boundaries of any two first pads 383 may have a shortest distance D, and/or D is greater than 100 μm.

In one embodiment, as shown in fig. 3C, a carrier or a circuit device P may be provided, and a first carrier electrode E1 and a second carrier electrode E2 are formed on the carrier or the circuit device P by wire bonding or soldering. The first carrier electrode E1 and the second carrier electrode E2 can form a flip-chip structure with the third electrode 381 and the fourth electrode 382 of the optoelectronic device 300.

In one embodiment, the first carrier plate electrode E1 can be electrically connected to the third electrode 381 of the optoelectronic device 300 and a first heat dissipation pad 383, and the second carrier plate electrode E2 can be electrically connected to the fourth electrode 382 and another first heat dissipation pad 383, forming a flip-chip structure. In this embodiment, the first heat-dissipating pad 383 is electrically connected to the first carrier electrode E1 and the second carrier electrode E2, so as to help dissipate heat. In this embodiment, since each of the optoelectronic device units U in the optoelectronic devices 300 arranged in the series array has a voltage difference during operation, the voltage difference during operation can be prevented from causing breakdown or leakage between the respective optoelectronic device units U by the electrical insulation between the first heat dissipation pads 383 and the optoelectronic device units U. In addition, the projection of the first heat-dissipating pad 383 on the surface of the vertical substrate 30 is not formed on the first insulating layer 361, which can also prevent the disconnection caused by the height difference of the trench S in the manufacturing process, or prevent the leakage or short circuit caused by the incomplete insulation of the first insulating layer 361.

Fig. 4A-4E are structural diagrams illustrating top views of optoelectronic device units according to other embodiments of the present invention. Fig. 4A to 4E show possible variations of the photoelectric element according to the first embodiment of the present invention, and the manufacturing method, the materials and the reference numerals thereof are the same as those of the first embodiment, and are not repeated herein.

As shown in fig. 4A, the photoelectric element unit U, the first contact photoelectric element unit U1, and the second contact photoelectric element unit U2 are arranged in a straight line. In this embodiment, the first electrode 341 or the second electrode 342 of each of the photo-electric element unit U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 may have an extension electrode 3421 to increase the current distribution of each of the photo-electric element unit U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2. In addition, the first heat-dissipation pad 383 formed on the optoelectronic device unit U is adjusted according to the shape of the extension electrode, so as not to directly contact and electrically insulate the conductive wiring structure 362, the first electrode 341, or the second electrode 342.

Fig. 4B shows another possible variation of the present invention, in which the photo-electric element units U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 are not arranged linearly but connected in a ring shape like the previous embodiment, wherein at least one sidewall of the first contact photo-electric element unit U1 is connected to a sidewall of the second contact photo-electric element unit U2. In addition, the first heat-dissipation pad 383 formed on the optoelectronic device unit U is adjusted according to the shape of the extension electrode, so as not to directly contact and electrically insulate the conductive wiring structure 362, the first electrode 341, or the second electrode 342.

FIG. 4C shows another possible variation of the present invention, in which each of the cell units U, the first contact cell unit U1 and the second contact cell unit U2 may be connected in a ring. In addition to the first contact photo-element unit U1, the width of the first electrode 341 of each of the photo-element units U and U2 is narrower than the conductive wiring structure 362 and extends further into each unit to increase current spreading. In addition, the first thermal pad 383 formed on the optoelectronic device unit U is also adjusted according to the shape of the conductive wiring structure 362, the first electrode 341, or the second electrode 342, so as not to directly contact the conductive wiring structure 362, the first electrode 341, or the second electrode 342, and is electrically insulated therefrom.

Fig. 4D shows another possible variation of the present invention, in which each of the photo-electric element unit U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 may be connected in a ring shape, and the shapes of each of the photo-electric element unit U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 may be changed according to design requirements, but are not completely the same. In this embodiment, three different optoelectronic element units U are included, and it should be understood by those skilled in the art that the number, shape, size or arrangement of the optoelectronic element units U can be adjusted according to the required driving voltage of the product. In addition, the first thermal pad 383 formed on the optoelectronic device unit U is also adjusted according to the shape of the conductive wiring structure 362, the first electrode 341, or the second electrode 342, so as not to directly contact the conductive wiring structure 362, the first electrode 341, or the second electrode 342, and is electrically insulated therefrom.

Fig. 4E shows another possible variation of the present invention, in which each of the photo-electric element units U, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 may be connected in a W shape, that is, the connection directions of the photo-electric element units U in two adjacent rows are different, and a matrix arrangement with four rows and four columns is formed. It should be understood by those skilled in the art that the number or arrangement of the photo cell units U can be adjusted to suit the required driving voltage of the product. In the present embodiment, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 can be formed on the same row by the spiral arrangement, because the positions of the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 need to be matched with the subsequent connection with the external circuit, in another embodiment, the first contact photo-electric element unit U1 and the second contact photo-electric element unit U2 can be located at the two ends of the diagonal line of the matrix by adjusting the arrangement of the photo-electric element units U. In addition, the first thermal pad 383 formed on the optoelectronic device unit U is also adjusted according to the shape of the conductive wiring structure 362, the first electrode 341, or the second electrode 342, so as not to directly contact the conductive wiring structure 362, the first electrode 341, or the second electrode 342, and is electrically insulated therefrom.

Fig. 5A to 5E show a side view and a top view of a manufacturing process of an optoelectronic device according to a second embodiment of the present invention. The photoelectric element 300' is a modified example of the first embodiment described above. Fig. 5A-5B are manufactured after the above fig. 3A-3B are continued, and the manufacturing method, the materials and the reference numerals are the same as those of the first embodiment, and are not repeated herein. In the top view of this embodiment, in order to clearly show the differences from the first embodiment, some elements are omitted from the drawing to keep the drawing concise, and a person having ordinary skill in the art can fully understand the description of this embodiment with reference to the previous embodiments.

As shown in fig. 5A-5B, a support element 44 may be formed on the substrate 30 and cover the sidewall of the substrate 30. In one embodiment, the supporting element 44 may be transparent, and the material may be silicone resin, epoxy resin, or other materials. In one embodiment, a light guide element (not shown) may be formed on the supporting element 44, and in one embodiment, the light guide element may be made of glass.

Next, an optical layer 46 may be formed on the second insulating layer 363 of the optical device to cover each of the optoelectronic device units U, the first contact optoelectronic device unit U1, and the second contact optoelectronic device unit U2. The material of the optical layer 46 may comprise a mixture of a matrix, which may be a silicone resin, epoxy resin, or other material, and a high-reflectivity material, which may be TiO₂。

Next, as shown in fig. 5C, a plurality of openings 461 are formed in the optical layer 46, which correspond to the positions of the third electrode 381 and the fourth electrode 382 of the first contact electro-optical device unit U1 and the second contact electro-optical device unit U2, and expose portions of the third electrode 381 and the fourth electrode 382. In one embodiment, the opening 461 also corresponds to the position of the first heat-dissipation pad 383 of each optoelectronic device unit U, and exposes a portion of the first heat-dissipation pad 383.

Next, as shown in fig. 5D to 5E, a fifth electrode 40 and a sixth electrode 42 are formed to be electrically connected to the third electrode 381 and the fourth electrode 382, respectively. In one embodiment, the fifth electrode 40 and the sixth electrode 42 may also be selectively electrically connected to at least one first heat-dissipating pad 383 respectively to facilitate subsequent heat dissipation. In one embodiment, the fifth electrode 40 or the sixth electrode 42 includes a metal reflective layer. In one embodiment, the optical layer 46 is disposed between the third electrode 381 and the fifth electrode 40 and between the fourth electrode 382 and the sixth electrode 42. In one embodiment, the outer boundary of the optical layer 46 is greater than the outer boundary of the substrate 30.

Finally, as shown in fig. 5F, a carrier or a circuit device P may be provided, and a first carrier electrode E1 and a second carrier electrode E2 are formed on the carrier or the circuit device P by wire bonding or soldering. The first carrier plate electrode E1 and the second carrier plate electrode E2 may form a flip-chip structure with the fifth electrode 40 and the sixth electrode 42 of the optoelectronic device 300'. In one embodiment, the fifth electrode 40 and the sixth electrode 42 extend beyond the outer edge of the substrate 30. In one embodiment, the projection area of the fifth electrode 40 and the sixth electrode 42 perpendicular to the surface of the substrate 30 is larger than the area of the substrate 30. In this embodiment, the areas of the fifth electrode 40 and the sixth electrode 42 are increased, so that the subsequent connection with the carrier board or the circuit element P is more convenient, and the alignment trouble can be reduced.

Fig. 6A to 6F are side and top views illustrating a process of manufacturing a photoelectric device according to a third embodiment of the present invention. The photoelectric element 400 is a modified example of the second embodiment described above. Fig. 6A-6B are manufactured after the above fig. 5A-5B are continued, and the manufacturing method, the materials and the reference numerals are the same as those of the first embodiment, and are not repeated herein. In the top view of this embodiment, in order to clearly show the differences from the above-mentioned embodiments, some elements are omitted from the drawing to keep the drawing concise, and a person having ordinary knowledge in the art can fully understand the description of this embodiment in comparison with the above-mentioned embodiments.

As shown in fig. 6A-6B, the present embodiment includes a supporting element 44 formed on the substrate 30 of the optoelectronic device and covering the sidewall of the substrate 30. Then, a second heat pad 48 is formed on the optoelectronic device and the supporting device 44. In one embodiment, the second thermal pad 48 can be formed simultaneously with the first thermal pad 383 in the same fabrication process or separately in a different fabrication process. In one embodiment, the second thermal pad 48 may be made of the same material as the first thermal pad 383. In one embodiment, the material of the second thermal pad 48 may be a material with a thermal conductivity >50W/mk or an insulating material, such as metal or diamond-like carbon (dlc).

In the present embodiment, the second thermal pad 48 includes two first portions 482 formed on the supporting element 44 and a second portion 481 formed on the optoelectronic element, and the two first portions 481 are connected to two ends of the second portion 482 to form a dumbbell shape. In one embodiment, the first portion 482 has a width greater than a width of the second portion 481.

In one embodiment, the second thermal pad 48 is formed between the two optoelectronic device units U, and does not directly contact the first thermal pad 383, nor is it electrically connected to the first thermal pad 383. In one embodiment, the second thermal pad 48 is formed on the second insulating layer 363 between the two optoelectronic device units U.

Next, as shown in fig. 6C-6D, an optical layer 46 may be formed on the second insulating layer 363 of the optical device to cover each of the optoelectronic device units U, the first contact optoelectronic device unit U1, the second contact optoelectronic device unit U2, and the second heat dissipation pad 48. The material of the optical layer 46 may comprise a mixture of a matrix, which may be a silicone resin, epoxy resin, or other material, and a high-reflectivity material, which may be TiO₂。

Next, a plurality of openings 461 are formed in the optical layer 46, which correspond to the positions of the third electrode 381 and the fourth electrode 382 of the first contact electro-optical device unit U1 and the second contact electro-optical device unit U2, and expose portions of the third electrode 381 and the fourth electrode 382. In one embodiment, the opening 461 also corresponds to the position of the first heat-dissipation pad 383 of each optoelectronic device unit U, and exposes a portion of the first heat-dissipation pad 383.

Next, as shown in fig. 6E to 6F, a fifth electrode 40 and a sixth electrode 42 are formed to be electrically connected to the third electrode 381 and the fourth electrode 382, respectively. In an embodiment, the fifth electrode 40 and the sixth electrode 42 may also be selectively connected to at least one of the first heat-dissipation pad 383 and the second heat-dissipation pad 48, respectively, to facilitate subsequent heat dissipation, so as to complete the fabrication of the optoelectronic device 400 of the present embodiment. In one embodiment, the fifth electrode 40 or the sixth electrode 42 includes a metal reflective layer. In one embodiment, the optical layer 46 is disposed between the third electrode 381 and the fifth electrode 40 and between the fourth electrode 382 and the sixth electrode 42. In one embodiment, the outer boundary of the optical layer 46 is greater than the outer boundary of the substrate 30.

In one embodiment, a carrier or a circuit element (not shown) may be provided, and a first carrier electrode (not shown) and a second carrier electrode (not shown) are formed on the carrier or the circuit element by wire bonding or soldering. The first carrier electrode and the second carrier electrode may form a flip-chip structure with the fifth electrode 40 and the sixth electrode 42 of the optoelectronic device 400. In one embodiment, the fifth electrode 40 and the sixth electrode 42 extend beyond the outer edge of the substrate 30. In one embodiment, the projection area of the fifth electrode 40 and the sixth electrode 42 perpendicular to the surface of the substrate 30 is larger than the area of the substrate 30. In this embodiment, the areas of the fifth electrode 40 and the sixth electrode 42 are increased, so that the subsequent connection with the carrier board or the circuit device is more convenient, and the alignment trouble can be reduced.

Fig. 7A to 7D show a manufacturing flow chart of a photoelectric device according to a fourth embodiment of the invention. As shown in fig. 7A, the present embodiment includes a substrate (not shown). The substrate is not limited to a single material, and may be a composite substrate formed by combining a plurality of different materials. For example: the substrate may include two first and second substrates (not shown) bonded to each other.

Then, an epitaxial stack including the first semiconductor layer 321, an active layer (not shown), and a second semiconductor layer 323 is formed on the substrate by a conventional epitaxial growth process. Then, a trench S is formed to expose a portion of the first semiconductor layer 321, and a first insulating layer 361 is formed on the sidewall of the trench to electrically isolate the active layer and the second semiconductor layer 323. In one embodiment, a metal layer may be formed in the trench S to form a first extension electrode (not shown). Next, a first electrode 341 is formed over the first extension electrode and a second electrode 342 is formed over the second semiconductor layer 323. In one embodiment, the first electrode 341 or the second electrode 342 may be a multi-layer structure and/or include a metal reflective layer (not shown) with a reflectivity greater than 80%.

Next, as shown in fig. 7B, a supporting element 44 may be formed on the substrate and cover the sidewall of the substrate. In one embodiment, the supporting element 44 may be transparent, and the material may be silicone resin, epoxy resin, or other materials. In one embodiment, a light guide element (not shown) may be formed on the supporting element 44, and in one embodiment, the light guide element may be made of glass. Then, a second heat pad 48 is formed on the optoelectronic device and the supporting device 44. In one embodiment, the material of the second thermal pad 48 may be a material with a thermal conductivity >50W/mk, such as a metal; the material of the second thermal pad 48 may also be an insulating material such as diamond-like carbon (diamond), diamond (diamond), etc.

In one embodiment, the second thermal pad 48 is formed between the first electrode 341 and the second electrode 342, and does not directly contact the first electrode 341 or the second electrode 342, and is not electrically connected to the first electrode 341 or the second electrode 342.

Next, an optical layer 46 may be formed on the optical device and covers the second thermal pad 48, the first electrode 341, and the second electrode 342. The material of the optical layer 46 may comprise a mixture of a matrix, which may be a silicone resin, epoxy resin, or other material, and a high-reflectivity material, which may be TiO₂。

Next, a plurality of openings 461 are formed on the optical layer 46, wherein the openings correspond to the positions of the first electrodes 341 and the second electrodes 342, and expose portions of the first electrodes 341 and the second electrodes 342.

Next, as shown in fig. 7D, a fifth electrode 40 and a sixth electrode 42 are formed to be electrically connected to the first electrode 341 and the second electrode 342, respectively, so as to complete the fabrication of the photoelectric element 500 of the present embodiment. In one embodiment, the fifth electrode 40 and a sixth electrode 42 may also be selectively connected to the second thermal pad 48 to facilitate subsequent heat dissipation. In one embodiment, the fifth electrode 40 or the sixth electrode 42 includes a metal reflective layer. In one embodiment, the optical layer 46 is interposed between the first electrode 341 and the fifth electrode 40 and between the second electrode 342 and the sixth electrode 42. In one embodiment, the outer boundary of the optical layer 46 is larger than the outer boundary of the substrate.

In one embodiment, a carrier or a circuit element (not shown) may be provided, and a first carrier electrode (not shown) and a second carrier electrode (not shown) are formed on the carrier or the circuit element by wire bonding or soldering. The first and second carrier electrodes may form a flip-chip structure with the fifth and

sixth electrodes

40, 42 of the optoelectronic device 500. In one embodiment, the fifth electrode 40 and the sixth electrode 42 extend beyond the outer edge of the substrate. In one embodiment, the projected areas of the fifth electrode 40 and the sixth electrode 42 perpendicular to the substrate surface are larger than the substrate area. In this embodiment, the areas of the fifth electrode 40 and the sixth electrode 42 are increased, so that the subsequent connection with the carrier board or the circuit device is more convenient, and the alignment trouble can be reduced.

Fig. 8A to 8C are schematic diagrams illustrating a light emitting module, fig. 8A is an external perspective view illustrating a light emitting module, which can include a carrier 502, an optoelectronic device (not shown), a plurality of

lenses

504, 506, 508 and 510, and two

power supply terminals

512 and 514. The light emitting module 500 may be connected to a light emitting unit 540 described later.

Fig. 8B to 8C are sectional views of a light emitting module 600, wherein fig. 8C is an enlarged view of a region E of fig. 8B. The carrier 502 may comprise an upper carrier 503 and a lower carrier 501, wherein a surface of the lower carrier 501 may be in contact with the upper carrier 503.

Lenses

504 and 508 are formed over the upper carrier 503. The upper carrier 503 may form at least one through hole 515, and the optoelectronic device 300 according to the embodiment of the present invention or an optoelectronic device (not shown) according to another embodiment may be formed in the through hole 515 and in contact with the lower carrier 501, and surrounded by the adhesive 521. The glue 521 has a lens 508 thereon, wherein the glue 521 can be made of silicone resin, epoxy resin or other materials. In one embodiment, a reflective layer 519 can be formed on two sidewalls of the via 515 to increase light extraction efficiency; the lower surface of the lower carrier 501 may be formed with a metal layer 517 to improve heat dissipation efficiency.

Fig. 9A-9B illustrate a schematic diagram of a light source generating apparatus 700. a light source generating apparatus 700 may include a light emitting module 600, a light emitting unit 540, a power supply system (not shown) for supplying a current to the light emitting module 600, and a control element (not shown) for controlling the power supply system (not shown). The light source generating device 700 may be a lighting device, such as a street lamp, a car lamp, or an indoor lighting source, or a backlight source of a backlight module in a traffic signal or a flat panel display.

Fig. 10 is a schematic view of a lamp. The light bulb 800 includes a housing 921, a lens 922, an illumination module 924, a bracket 925, a heat sink 926, a serial connection 927, and an electrical series 928. The lighting module 924 includes a carrier 923, and at least one of the optoelectronic devices 300 in the above embodiments or optoelectronic devices (not shown) in other embodiments is included in the carrier 923.

Specifically, the substrate 30 is a growth and/or load bearing foundation. Candidate materials may include conductive or non-conductive substrates, transparent substrates, or opaque substrates. One of the conductive substrate materials may be germanium (Ge), gallium arsenide (GaAs), phosphorus indium (InP), silicon carbide (SiC), silicon (Si), lithium aluminate (LiAlO)₂) Zinc oxide (ZnO), gallium nitride (GaN), aluminum nitride (AlN), metal. One of the transparent substrate materials may be Sapphire (Sapphire), lithium aluminate (LiAlO)₂) Zinc oxide (ZnO), gallium nitride (GaN), glass, Diamond, CVD Diamond, and Diamond-Like Carbon (Diamond-Like Carbon; DLC), spinel (MgAl)₂O₄) Alumina (Al)₂O₃) Silicon oxide (SiO)_X) And lithium gallate (LiGaO)₂)。

The epitaxial stack (not shown) includes a first semiconductor layer 321, an active layer 322, and a second semiconductor layer 323. The first semiconductor layer 321 and the second semiconductor layer 323 may be a cladding layer (cladding layer) or a confining layer (confining layer), and may have a single-layer or multi-layer structure. The first semiconductor layer 331 and the second semiconductor layer 323 are different in electrical property, polarity or dopant, and the electrical property can be at least any two of p-type, n-type and i-type, which can provide electrons and holes respectively, so that the electrons and holes can combine in the active layer 322 to emit light. The materials of the first semiconductor layer 321, the active layer 322, and the second semiconductor layer 323 may include a group III-V semiconductor material, such as Al_xIn_yGa_(1-x-y)N or Al_xIn_yGa_(1-x-y)P, wherein x is more than or equal to 0, and y is less than or equal to 1; (x + y) is less than or equal to 1. Depending on the material of the active layer 322, the epitaxial stack may emit red light with a wavelength between 610nm and 650nm, green light with a wavelength between 530nm and 570nm,blue light with a wavelength between 450nm and 490nm, or ultraviolet light with a wavelength less than 400 nm.

In another embodiment of the present invention, the

optoelectronic device

300, 300', 400, 500 may be an epitaxial device or a light emitting diode, and the light emission spectrum thereof can be adjusted by changing the physical or chemical elements of the semiconductor layer or layers. The single-layer or multi-layer semiconductor material may be selected from the group consisting of aluminum (Al), gallium (Ga), indium (In), phosphorus (P), nitrogen (N), zinc (Zn), and oxygen (O). The active layer 322 has a structure such as: a Single Heterostructure (SH), a Double Heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW) structure. Further, adjusting the logarithm of the quantum wells of the active layer 322 may also change the emission wavelength.

In an embodiment of the invention, a buffer layer (not shown) may be further optionally included between the first semiconductor layer 321 and the substrate 30. The buffer layer is between the two material systems, which "transitions" the material system of the substrate 30 to that of the first semiconductor layer 321. For the structure of the light emitting diode, on one hand, the buffer layer is used for reducing the lattice mismatch between the two materials. Alternatively, the buffer layer may be a single layer, multiple layers or structures that combine two materials or two separate structures, which may be selected from materials such as: organic materials, inorganic materials, metals, semiconductors, and the like; the optional structure is as follows: the semiconductor device comprises a reflecting layer, a heat conduction layer, a conductive layer, an ohmic contact (ohmic contact) layer, an anti-deformation layer, a stress release (stress release) layer, a stress adjustment (stress adjustment) layer, a bonding (bonding) layer, a wavelength conversion layer, a mechanical fixing structure and the like. In one embodiment, the buffer Layer may be made of aluminum nitride (aln) or gallium nitride (gan), and the buffer Layer may be formed by sputtering or Atomic Layer Deposition (ALD).

A contact layer (not shown) may be optionally formed on the second semiconductor layer 323. The contact layer is disposed on a side of the second semiconductor layer 323 away from the active layer 322. In particular, the contact layer may be an optical layer, an electrical layer, or a combination of both. The optical layer may modify electromagnetic radiation or light from or into the active layer. As used herein, "altering" refers to altering at least one optical property of electromagnetic radiation or light, including, but not limited to, frequency, wavelength, intensity, flux, efficiency, color temperature, color rendering index, light field, and angle of view. The electrical layer may cause a change or a tendency to change in the value, density, distribution of at least one of voltage, resistance, current, capacitance between any set of opposing sides of the contact layer. The contact layer is made of a material including at least one of an oxide, a conductive oxide, a transparent oxide, an oxide having a transmittance of 50% or more, a metal, a relatively light-transmitting metal, a metal having a transmittance of 50% or more, an organic substance, an inorganic substance, a fluorescent substance, a phosphorescent substance, a ceramic, a semiconductor, a doped semiconductor, and an undoped semiconductor. In some applications, the material of the contact layer is at least one of indium tin oxide, cadmium tin oxide, antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide. If a relatively light-transmissive metal, the thickness is preferably about 0.005 μm to 0.6. mu.m.

While the drawings and description above correspond to particular embodiments, respectively, it should be understood that elements, embodiments, design criteria and technical principles described or disclosed in the various embodiments may be arbitrarily referenced, exchanged, matched, coordinated or combined as required, unless they conflict or conflict with each other or are difficult to implement together. Although the invention has been described with reference to specific embodiments, it is not intended to limit the scope, sequence, or use of the materials or process steps. Various modifications and alterations of this invention can be made without departing from the spirit and scope of this invention.

Claims

1. An optoelectronic device, comprising:

the substrate is provided with a first outer boundary, and the first side and the second side are opposite to the first side;

a first contact photoelectric element unit located on the first side of the substrate;

a second contact photoelectric element unit located on the first side of the substrate;

a plurality of third cell units on the first side of the substrate and coupled in series with the first contact cell units and the second contact cell units, wherein each of the cell units comprises: a first semiconductor layer; a second semiconductor layer; and an active layer formed between the first semiconductor layer and the second semiconductor layer;

a plurality of heat dissipation pads formed on the plurality of third photoelectric element units, respectively;

a plurality of conductive wiring structures electrically connected to the first contact photoelectric element unit, the second contact photoelectric element unit, and the plurality of third photoelectric element units;

a fifth electrode covering the first contact photoelectric element unit and at least one of the plurality of heat dissipation pads; and

the sixth electrode covers the second contact photoelectric element unit and covers at least another one of the plurality of heat dissipation pads.

2. The photovoltaic element of claim 1, further comprising a plurality of first electrodes formed on said first contact photovoltaic element unit, said second contact photovoltaic element unit and said plurality of third photovoltaic element units, respectively; and a plurality of second electrodes formed on the first contact photoelectric element unit, the second contact photoelectric element unit and the plurality of third photoelectric element units, respectively.

3. The optoelectronic device as claimed in claim 1 or 2, wherein the plurality of pads have different shapes in a top view of the optoelectronic device.

4. The optoelectronic device of claim 2 wherein in a cross-sectional view of the optoelectronic device, the plurality of thermal pads overlap the plurality of second electrodes formed over the plurality of third optoelectronic device units.

5. The optoelectronic device according to claim 1, wherein the conductive wiring structures are completely separated from each other, and any one of the conductive wiring structures electrically connects two adjacent optoelectronic device units and/or further comprises a first insulating layer between the conductive wiring structures and the optoelectronic device units, and/or a second insulating layer is formed on the conductive wiring structure.

6. The photovoltaic device of claim 1, wherein the second semiconductor layer has a first surface area, each of the plurality of heat dissipation pads is formed on the second semiconductor layer and has a second surface area, and a ratio of the second surface area to the first surface area is between 80 and 100%.

7. The photovoltaic element of claim 5, wherein the thickness of the second insulating layer is greater than the thickness of the first insulating layer.

8. The photovoltaic element of claim 1, further comprising a support element formed on the second side of the substrate and covering sidewalls of the substrate.

9. The optoelectronic device of claim 1 or 2, further comprising a third electrode formed over and electrically connected to the first contact optoelectronic device unit, and a fourth electrode formed over and electrically connected to the second electrode of the second contact optoelectronic device unit.

10. The photovoltaic element of claim 5, further comprising an optical layer formed over the second insulating layer, wherein the optical layer has a second outer boundary and the first outer boundary of the substrate is formed within the second outer boundary.