TW202327127A - Optoelectronic device - Google Patents

Abstract

An optoelectronic device including a epitaxial stack including a first semiconductor layer, an active layer formed on the first semiconductor layer, and a second semiconductor layer formed on the active layer; multiple boundaries exposing the first semiconductor layer, two adjacent boundaries of the multiple boundaries forming a corner of the first semiconductor layer; first parts of a first conductive type electrodes formed on the first semiconductor layer exposed by the multiple boundaries, wherein the first parts of a first conductive type electrodes are separated from each other, and not surrounded by the second semiconductor layer; a third electrode formed on the first parts of a first conductive type electrodes and the second semiconductor layer; and one or more fourth electrodes formed on the second semiconductor layer.

Description

Photoelectric components

The invention relates to a photoelectric element, in particular to an electrode design of a photoelectric element.

The light-emitting diode (light-emitting diode, LED) uses the energy difference between n-type semiconductors and p-type semiconductors to release energy in the form of light. This light-emitting principle is different from incandescent lamps. The principle of heating light, so light-emitting diodes are called cold light sources. In addition, light-emitting diodes have the advantages of high durability, long life, light weight, and low power consumption. Therefore, today's lighting market has high expectations for light-emitting diodes, which are regarded as a new generation of lighting tools, which have gradually replaced traditional lighting. Light source, and used in various fields, such as traffic signs, backlight modules, street lighting, medical equipment, etc.

Figure 1 is a schematic structural view of a known light-emitting element. As shown in Figure 1, a known light-emitting element 100 includes a transparent substrate 10, a semiconductor stack 12 on the transparent substrate 10, and at least one electrode 14 located on the above-mentioned semiconductor. On the laminated layer 12 , the semiconductor laminated layer 12 includes at least a first conductive type semiconductor layer 120 , an active layer 122 , and a second conductive type semiconductor layer 124 from top to bottom.

In addition, the above-mentioned light-emitting device 100 can be further combined and connected with other devices to form a light-emitting apparatus. FIG. 2 is a schematic structural view of a known light-emitting device. As shown in FIG. 2, a light-emitting device 200 includes a sub-mount 20 having at least one circuit 202; at least one solder (solder) 22 is located on the sub-mount 20, the above-mentioned light-emitting element 100 is bonded and fixed on the sub-carrier 20 by the solder 22, and the substrate 10 of the light-emitting element 100 is electrically connected with the circuit 202 on the sub-carrier 20; and an electrical connection structure 24, with Electrically connect the electrode 14 of the light-emitting device 100 to the circuit 202 on the sub-carrier 20; wherein, the above-mentioned sub-carrier 20 can be a lead frame or a large-size mosaic substrate (mounting substrate), so as to facilitate the circuit of the light-emitting device 200 Plan and improve its cooling effect.

A photoelectric element, comprising: a first semiconductor layer having at least four boundaries, a first surface, and a second surface opposite to the first surface, wherein any two adjacent boundaries can form a corner; a second semiconductor layer A layer is formed on the first surface of the first semiconductor layer; an electrode of the second electrical type is formed on the second semiconductor layer; and at least two electrodes of the first electrical type are formed on the first surface of the first semiconductor layer , wherein the at least two electrodes of the first electrical type are separated from each other and form a design pattern.

The present invention discloses a light-emitting element and a manufacturing method thereof. In order to make the description of the present invention more detailed and complete, please refer to the following description and cooperate with the illustrations in FIG. 3A to FIG. 7 .

FIG. 3A and FIG. 3B show a top view and a side view of a photoelectric device 300 according to a first embodiment of the present invention. Fig. 3B is a side view structure diagram showing the direction A-B-C in Fig. 3A. The photovoltaic element 300 has a substrate 30 . The substrate 30 is not limited to a single material, and may also be a composite substrate composed of a plurality of different materials. For example, the substrate 30 may include two first substrates (not shown) and second substrates (not shown) bonded to each other.

On the substrate 30, a conventional epitaxial growth process is used to form an epitaxial stack 31, including a first semiconductor layer 311 having a first surface 3111 and a second surface 3112 opposite to the first surface, and an active layer 312 is formed. On the first surface 3111 of the first semiconductor layer 311 , and a second semiconductor layer 313 are formed on the active layer 312 . Then, a part of the epitaxial stack is selectively removed by yellow light lithography process technology to expose part of the first semiconductor layer 311 at the boundary of the photoelectric device 300 , and a trench S is formed in the photoelectric device 300 . In one embodiment, the trench S exposes part of the first semiconductor layer 311 and is surrounded by the second semiconductor layer 313 . In one embodiment, the ditch S is a long strip in a top view.

Next, the first insulating layer 341 is deposited and formed on the surface of the epitaxial stack 31 of the photoelectric element 300 and the sidewalls of the trench S by chemical vapor deposition (CVD) or physical vapor deposition (PVD).

Next, at least one first first electrical type electrode 321 is formed on the exposed first semiconductor layer 311 beside the boundary of the optoelectronic element 300 . In one embodiment, the first first electrical type electrode 321 is not surrounded by the second semiconductor layer 313 , and a second first electrical type electrode 322 is formed in the trench S above. In this embodiment, the separated first first electrical type electrode 321 and second first electrical type electrode 322 form an electrode design type of a first electrical type electrode.

In an embodiment of the present invention, the design of the electrodes may include the selection of the number of electrodes, the shape of the electrodes, and the location of the electrodes, so as to enhance the current spreading of the photoelectric element near the boundary area. For example, the electrode design pattern of the first electrical type electrode may include one or more first first electrical type electrodes 321 and one or more second first electrical type electrodes 322, and the second first electrical type electrodes 322 are Viewed from above, it is surrounded by the second semiconductor layer 313 and is in an extended shape.

In one embodiment, the first semiconductor layer 311 of the photoelectric element 300 has at least four boundaries, two adjacent boundaries can form a corner, and there is no conductive structure crossing the boundaries. In this embodiment, the first first electrical type electrodes 321 are formed at two corners on the same boundary of the photoelectric element 300 , are separated from each other and do not cross the boundary of the photoelectric element 300 .

In one embodiment, the projection of the first first electrical type electrode 321 on the first semiconductor layer 311 may have a pattern, which may be a polygon, a circle, an ellipse, a semicircle or a circle. curved surface. The second first electrical type electrode 322 can be linear, curved, a mixture of linear and curved, or have at least one branch. In one embodiment, the second first electrical type electrode 322 may have a head end and a tail end, and the head end has a width greater than that of the tail end.

Next, a second electrical type electrode 33 is formed on the second semiconductor layer 313 . In one embodiment, the ratio of the projected area of the second electrical type electrode 33 on the first semiconductor layer 311 to the upper surface area of the second semiconductor layer 313 is between 90% and 100%.

After that, a second insulating layer 342 can be formed on the first first electrical type electrode 321 , the second first electrical type electrode 322 , the second electrical type electrode 33 and part of the first insulating layer 341 . Wherein the second insulating layer 342 may have a first opening 3421 for electrically connecting the second electrical electrode 33 with the subsequently formed fourth electrode 36, and the second insulating layer 342 may also have a second opening 3422 for the second A first electrical electrode 321 is used for electrical connection with the subsequently formed third electrode 35 . In one embodiment, the first insulating layer 341 or the second insulating layer 342 can completely cover the exposed first semiconductor layer 311 .

In one embodiment, the first insulating layer 341 or the second insulating layer 342 may be a transparent insulating layer. The material of the first insulating layer 341 or the second insulating layer 342 can be oxide, nitride, or polymer, and the oxide can include aluminum oxide (Al2O3), silicon oxide (SiO2), titanium dioxide (TiO2), Tantalum Pentoxide (Tantalum Pentoxide, Ta2O5) or Aluminum Oxide (AlOx); Nitride can include Aluminum Nitride (AlN), Silicon Nitride (SiNx); Polymer can include Polyimide (polyimide) or benzo ring Butane (benzocyclobutane, BCB) and other materials may be a composite combination of the above. In one embodiment, the first insulating layer 341 or the second insulating layer 342 may be a Distributed Bragg Reflector structure.

Finally, a third electrode 35 is formed on the second insulating layer 342, the first first electrical type electrode 321, and the second first electrical type electrode 322 and is connected with the first first electrical type electrode 321, the second first electrical type electrode 322 The electrical electrode 322 is electrically connected; and a fourth electrode 36 is formed on the second insulating layer 342 and the second electrical electrode 33 and is electrically connected to the second electrical electrode 33 . In one embodiment, viewed from above, the ratio of the projected areas of the third electrode 35 and the fourth electrode 36 on the first semiconductor layer 311 is between 80% and 100%.

In one embodiment, the third electrode 35 may only cover part of the first first electrical type electrode 321 ; in another embodiment, the third electrode 35 may not cover the first first electrical type electrode 321 at all.

In one embodiment, there is a height H1 from the upper edge of the third electrode 35 to the upper edge of the substrate 30 , and a height H2 from the upper edge of the fourth electrode 36 to the upper edge of the substrate 30 , and H1 is substantially equal to H2 . In one embodiment, the difference between H1 and H2 is less than 5-10%. By adjusting the difference between H1 and H2, the disconnection probability of the photoelectric element 300 and the carrier board or circuit element forming a flip-chip structure can be reduced, thereby increasing the product yield. In one embodiment, there is a minimum distance D1 between the boundary of the third electrode 35 and the boundary of the fourth electrode 36 , and D1 is greater than 50 μm. In one embodiment, D1 may be 50-200 μm, 100-200 μm.

In one embodiment, the first first electrical type electrode 321 , the second first electrical type electrode 322 , the second electrical type electrode 33 , the third electrode 35 and the fourth electrode 36 may be a multilayer structure, and/or It includes a reflective layer (not shown in the figure), and can have a reflectivity of more than 80% for the light emitted by the active layer 312 . In one embodiment, the first first electrical type electrode 321 , the second first electrical type electrode 322 and the third electrode 35 may also be formed in the same process. In one embodiment, the light emitted by the photoelectric element 300 can be reflected by the first electrode 321 , the second electrode 322 , the second electrode 33 , the third electrode 35 or the fourth electrode 36 . away from the photoelectric element 300 from the direction of the substrate 30 .

In order to achieve a certain degree of conductivity, the material of the first first electrical type electrode 321, the second first electrical type electrode 322, the second electrical type electrode 33, the third electrode 35 and the fourth electrode 36 is preferably metal, for example, Such as gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), nickel (Ni), titanium (Ti), tin (Sn), etc., their alloys or its layered combination.

In one embodiment, a carrier board or a circuit element (not shown) may be provided, and a first carrier electrode (not shown) and a first carrier electrode (not shown) may be formed on the carrier board or circuit element by wire bonding or soldering. The second carrier electrode (not shown). The first carrier electrode and the second carrier electrode can form a flip-chip structure with the third electrode 35 and the fourth electrode 36 of the photoelectric element 300 .

In one embodiment, a first adjustment layer (not shown) can be formed between the first first electrical type electrode 321 and/or between the second first electrical type electrode 322 and the third electrode 35, and the electrical property It is connected to the first first electrical type electrode 321 and/or the second first electrical type electrode 322 and the third electrode 35 . In one embodiment, a second adjustment layer (not shown) may be formed between the second electrical type electrode 33 and the fourth electrode 36 and electrically connected to the second electrical type electrode 33 and the fourth electrode 36 . In this embodiment, the first adjustment layer and the second adjustment layer can have a height respectively, and because of the formation positions of the first adjustment layer and the second adjustment layer, the height of the first adjustment layer and the second adjustment layer will affect The height of H1 and H2 mentioned above. Therefore, by designing the formation heights of the first adjustment layer and/or the second adjustment layer respectively, the above-mentioned height difference between H1 and H2 can be reduced, thereby reducing the subsequent disconnection between the photoelectric element 300 and the substrate or circuit element to form a flip-chip structure. Line probability, thereby increasing product yield. In one embodiment, the projected area of the first adjustment layer on the first semiconductor layer 311 is larger than the projected area of the third electrode 35 on the first semiconductor layer 311, or the projected area of the second adjustment layer on the first semiconductor layer 311 The area is larger than the projected area of the fourth electrode 36 on the first semiconductor layer 311 . In one embodiment, the material of the first adjustment layer or the second adjustment layer is preferably metal, such as gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), Platinum (Pt), nickel (Ni), titanium (Ti), tin (Sn), etc., their alloys or their laminated combinations. In one embodiment, the first adjustment layer or the second adjustment layer can be a multi-layer structure, and/or include a reflective layer (not shown), and can reflect more than 80% of the light emitted by the active layer 312 Rate.

FIG. 3C is a top view of the photoelectric element 400 according to the second embodiment of the present invention. The manufacturing method, materials and labels of this embodiment are the same as those of the first embodiment above, and will not be repeated here. In the embodiment of the present invention, the design of the electrodes may include the selection of the number of electrodes, the shape of the electrodes, and the positions of the electrodes, so as to improve the current spreading near the border region of the photovoltaic device 400 .

In one embodiment, the first semiconductor layer 311 of the photoelectric element 400 has at least four boundaries, two adjacent boundaries can form a corner, and there is no conductive structure crossing the boundaries. In this embodiment, the first first electrical type electrode 321 is formed on any corner of the first semiconductor layer 311, and the second insulating layer 342 may have a second opening 3422 as the first first electrical type electrode 321 is used for electrical connection with the third electrode 35 formed later. The second first electrical type electrode 322 is formed on the first semiconductor layer 311 and surrounded by the second semiconductor layer 313, and the second insulating layer 342 may also have a third opening 3423 as the second first electrical type electrode 322 is used for electrical connection with the third electrode 35 formed later.

In this embodiment, the projection of the first first electrical type electrode 321 on the first semiconductor layer 311 can have a pattern, wherein the pattern can be a polygon, a circle, an ellipse, a semicircle or have a Arc surface. The second first electrical type electrode 322 is an extension shape, and the shape can be linear, arc, a mixture of linear and arc, or can have at least one branch. In one embodiment, the second first electrical type electrode 322 may have a head end and a tail end, and the head end may have a width greater than that of the tail end.

In this embodiment, the third first electrical type electrode 323 is formed on the exposed first semiconductor layer 311 near the boundary of the photoelectric element 400 . In one embodiment, the third first electrical type electrode 323 is not surrounded by the second semiconductor layer 313 , and the second insulating layer 342 has a fourth opening 3424 to serve as the third first electrical type electrode 323 and the subsequent formed second semiconductor layer 313 . The three electrodes 35 are used for electrical connection. The fourth first electrical type electrode 324 is formed on the exposed first semiconductor layer 311 near the boundary of the photoelectric element 400 . In one embodiment, the fourth first electrical type electrode 324 is not surrounded by the second semiconductor layer 313 , and the second insulating layer 342 has a fifth opening 3425 to serve as the fourth first electrical type electrode 324 and the subsequent formed second semiconductor layer 313 . The three electrodes 35 are used for electrical connection.

In this embodiment, the projection of the third first electrical type electrode 323 on the first semiconductor layer 311 can have a pattern, wherein the pattern can be a polygon, a circle, an ellipse, a semicircle or have a Arc surface. The shape of the fourth first electrical type electrode 324 may be linear, arc, a mixture of linear and arc, or may have at least one branch. In one embodiment, the fourth first electrical type electrode 324 may have a head end and a tail end, and the head end may have a width greater than that of the tail end. In one embodiment, the shapes of the third first electrical type electrode 323 and the fourth first electrical type electrode 324 are different.

In one embodiment, according to product design requirements, the first first electrical type electrode 321 and the third first electrical type electrode 323 may be formed beside the same boundary of the photoelectric element 400 and separated from each other. In one embodiment, the first first electrical type electrode 321 and the fourth first electrical type electrode 324, or the third first electrical type electrode 323 and the fourth first electrical type electrode 324 are not formed on the same side of the photoelectric element 400. next to the border.

In one embodiment, the head end of the fourth first electrical type electrode 324 may be covered by the third electrode 35 , and the tail end of the fourth first electrical type electrode 324 is not covered by the fourth electrode 36 . In this embodiment, the projected area of the third electrode 35 on the first semiconductor layer 311 is greater than the projected area of the fourth electrode 36 on the first semiconductor layer 311, and the third electrode 35 and the fourth electrode 36 are on the first semiconductor layer 311. The ratio of the projected area on the layer 311 is between 110-120%. In one embodiment, the extension directions of the tail ends of the second first electrical type electrode 322 and the fourth first electrical type electrode 324 are substantially parallel to each other.

FIG. 4A is a top view of a photoelectric device 500 according to a third embodiment of the present invention. The manufacturing method, materials and labels of this embodiment are the same as those of the first embodiment above, and will not be repeated here. In the embodiment of the present invention, the design of the electrodes may include the selection of the number of electrodes, the shape of the electrodes, and the positions of the electrodes, so as to improve the current spreading near the boundary region of the photovoltaic device 500 .

In this embodiment, the four boundaries of the photoelectric element 500 form a rectangle, two adjacent boundaries can form a corner, and there is no conductive structure crossing the boundary, the above boundary has a first long side B1 and a second long side B3 , a first short side B2 and a second short side B4. In one embodiment, the first long side B1 or the second long side B3 is longer than the first short side B2 or the second short side B4. In this embodiment, the projections of the third electrode 35 and the fourth electrode 36 on the first semiconductor layer 311 are arranged along the first long side B1 or the second long side B3.

In this embodiment, two first first electrical electrodes 321 separated from each other are formed on two corners of the first short side B2, and the second insulating layer 342 may also have a second opening 3422 as a The first first electrical type electrode 321 is used for electrical connection with the subsequently formed third electrode 35 . The two fourth electrodes 324 of the first electrical type are respectively located on the exposed first semiconductor layer 311 beside the boundary of the first long side B1 and a second long side B3 . In this embodiment, the third first electrical type electrode 323 is formed on the first short side B2, and the second insulating layer 342 may also have a fourth opening 3424 as the third first electrical type electrode 323 and The third electrode 35 formed later is used for electrical connection. The fourth first electrical type electrode 324 is not surrounded by the second semiconductor layer 313, and the second insulating layer 342 may also have a third opening 3423 as an electrical connection between the fourth first electrical type electrode 324 and the subsequently formed third electrode 35. for sexual connection.

In one embodiment, the distance between the third first electrical type electrode 323 and the above two first first electrical type electrodes 321 is approximately equal. In addition, the first first electrical type electrode 321 , the fourth first electrical type electrode 324 , and the third electrode 35 can be formed in the same process.

In this embodiment, the projection of the first first electrical type electrode 321 on the first semiconductor layer 311 may have a pattern, wherein the pattern is a polygon, a circle, an ellipse, a semicircle or an arc noodle. The projection of the third first electrical type electrode 323 on the first semiconductor layer 311 may have a pattern, wherein the pattern is a polygon, a circle, an ellipse, a semicircle or an arc surface. The fourth first electrical type electrode 324 is extended, and may be linear, arc-shaped, a mixture of linear and arc-shaped, or may have at least one branch. In one embodiment, the fourth first electrical type electrode 324 has a head end and a tail end, and the head end may have a width greater than that of the tail end. In one embodiment, the shapes of the third first electrical type electrode 323 and the fourth first electrical type electrode 324 are different.

In one embodiment, the head end of the fourth first electrical type electrode 324 points to the first short side B2 and the tail end points to the second short side B4. In one embodiment, the head end of the fourth first electrical type electrode 324 can be covered by the third electrode 35 , and the tail end of the fourth first electrical type electrode 324 is not covered by the fourth electrode 36 . In one embodiment, the extension directions of the tail ends of the two fourth electrodes 324 of the first electrical type are substantially parallel to each other. In this embodiment, the projected area of the third electrode 35 on the first semiconductor layer 311 is larger than the projected area of the fourth electrode 36 on the first semiconductor layer 311; The ratio of the projected area on the layer 311 is between 110-120%.

FIG. 4B is a top view of a photoelectric element 600 according to a fourth embodiment of the present invention. The manufacturing method, materials and labels of this embodiment are the same as those of the first embodiment above, and will not be repeated here. In the embodiment of the present invention, the design of the electrodes may include the selection of the number of electrodes, the shape of the electrodes, and the positions of the electrodes, so as to improve the current spreading of the photoelectric device 600 near the boundary region.

In this embodiment, the four boundaries of the photoelectric element 600 form a rectangle, two adjacent boundaries can form a corner, and there is no conductive structure crossing the boundaries. The photoelectric element 600 has a first long side B1 , a second long side B3 , a first short side B2 and a second short side B4 . In one embodiment, the first long side B1 or the second long side B3 is longer than the first short side B2 or the second short side B4. In this embodiment, the projections of the third electrode 35 and the fourth electrode 36 on the first semiconductor layer 311 are arranged along the first long side B1 or the second long side B3.

In this embodiment, at least one first first electrical type electrode 321 is included. In one embodiment, four first electrodes 321 of the first electrical type can be formed on the four corners of the first semiconductor layer 311, and the second insulating layer 342 can also have a second opening 3422 as the first first electrode. An electrical electrode 321 is used for electrical connection with the subsequently formed third electrode 35 . Two second first electrical electrodes 322 are formed on the first semiconductor layer 311 and surrounded by the second semiconductor layer 313, and the second insulating layer 342 may also have a third opening 3423 as the second first electrical electrode. The sex electrode 322 is electrically connected to the third electrode 35 formed later.

In this embodiment, the projection of the first first electrical type electrode 321 on the first semiconductor layer 311 may have a pattern, wherein the pattern is a polygon, a circle, an ellipse, a semicircle or an arc noodle. The projection of the second first electrical type electrode 322 on the first semiconductor layer 311 may have a pattern, wherein the pattern is a polygon, a circle, an ellipse, a semicircle or an arc surface. In one embodiment, the projection shapes of the two second first electrical type electrodes 322 on the first semiconductor layer 311 may be the same or different.

In this embodiment, the third electrode 35 includes two extensions 351 , and the two extensions 351 can roughly form a notch R, and the fourth electrode 36 is located in the notch R. Referring to FIG. In addition, the first first electrical type electrode 321 , the second first electrical type electrode 322 and the third electrode 35 can be formed in the same process.

FIG. 4C is a top view of a photoelectric element 700 according to a fifth embodiment of the present invention. The manufacturing method, materials and labels of this embodiment are the same as those of the first embodiment above, and will not be repeated here. In the embodiment of the present invention, the design of the electrodes may include the selection of the number of electrodes, the shape of the electrodes, and the positions of the electrodes, so as to improve the current distribution of the photoelectric device 700 near the boundary region.

In one embodiment, the first semiconductor layer 311 of the photoelectric element 700 has at least four boundaries, two adjacent boundaries can form a corner, and there is no conductive structure crossing the boundaries. In this embodiment, four first first electrical electrodes 321 are formed respectively on the four corners of the first semiconductor layer 311, and the second insulating layer 342 may also have a second opening 3422 as a The first first electrical type electrode 321 is used for electrical connection with the subsequently formed third electrode 35 . A plurality of second first electrical electrodes 322 are formed on the first semiconductor layer 311 and surrounded by the second semiconductor layer 313, and the second insulating layer 342 may also have a fourth opening 3424 as the second first electrical electrode. The sex electrode 322 is electrically connected to the third electrode 35 formed later. A plurality of third electrodes 323 of the first electrical type are formed on the exposed first semiconductor layer 311 beside the boundary of the photoelectric element 700 . In other words, the third first electrical type electrode 323 is not surrounded by the second semiconductor layer 313 , and one or more third first electrical type electrodes 323 may be included beside any boundary of the first semiconductor layer 311 . The second insulating layer 342 may have a third opening 3423 for electrically connecting the second first electrical electrode 322 with the third electrode 35 formed later.

In this embodiment, the projection of the first first electrical type electrode 321 on the first semiconductor layer 311 may have a pattern, wherein the pattern is a polygon, a circle, an ellipse, a semicircle or an arc noodle. The projection of the second first electrical type electrode 322 on the first semiconductor layer 311 may have a pattern, wherein the pattern is a polygon, a circle, an ellipse, a semicircle or an arc surface. In one embodiment, the shape of the second first electrical type electrode 322 may be extended, and its extending direction may be parallel to the extending direction of the extending portion 351 . The second first electrical type electrode 322 can be linear, curved, a mixture of linear and curved, or have at least one branch. In one embodiment, the projected areas of the plurality of second first electrical type electrodes 322 on the first semiconductor layer 311 may be the same or different. The projection of the third first electrical type electrode 323 on the first semiconductor layer 311 may have a pattern, wherein the pattern is a polygon, a circle, an ellipse, a semicircle or an arc surface.

In this embodiment, the third electrode 35 includes three extensions 351, and the three extensions 351 can roughly form two notches R, and two fourth electrodes 36 can be formed in the two notches R . In this embodiment, at least one second first electrical type electrode 322 may be formed in the extension portion 351 .

In an embodiment, the projected shapes of the first first electrical type electrode 321 , the second first electrical type electrode 322 , and the third first electrical type electrode 323 on the first semiconductor layer 311 may also be the same or different. In addition, the first first electrical type electrode 321 , the second first electrical type electrode 322 , the third first electrical type electrode 323 and the third electrode 35 can also be formed in the same process.

Fig. 4D is a top view showing the photoelectric element 700' of the sixth embodiment of the present invention. This embodiment is a possible modification of the fifth embodiment. Its manufacturing method, materials used, electrode design and labels are the same as those of the fifth embodiment above, and will not be repeated here.

In this embodiment, the second insulating layer 342 of the photoelectric element 700' has a plurality of first openings 3421' for electrically connecting the second electrical electrode 33 to the fourth electrode 36 formed later. In this embodiment, the second insulating layer 342 has a plurality of first openings 3421, which can reduce the height difference between the third electrode 35 and the fourth electrode 36, and reduce the probability of disconnection in subsequent flip-chip structure formation with the carrier board or circuit components. , thereby increasing product yield.

Figures 5A to 5C are schematic diagrams of a light-emitting module. Figure 5A shows an external perspective view of a light-emitting module. A light-emitting module 800 may include a carrier 502, a photoelectric element (not shown), and a plurality of There are three lenses 504, 506, 508 and 510, and two power supply terminals 512 and 514. The light emitting module 800 can be connected to the light emitting unit 540 described later.

5B-5C are cross-sectional views showing a light emitting module 800, wherein FIG. 8C is an enlarged view of area E in FIG. 8B. The carrier 502 can include an upper carrier 503 and a lower carrier 501 , wherein a surface of the lower carrier 501 can be in contact with the upper carrier 503 . Lenses 504 and 508 are formed on the upper carrier 503 . The upper carrier 503 can form at least one through hole 515, and the photoelectric element 300 formed according to the embodiment of the present invention or the photoelectric element (not shown) of other embodiments can be formed in the above-mentioned through hole 515 and contact with the lower carrier 501, and be Adhesive material 521 surrounds. There is a lens 508 on the adhesive material 521 , wherein the material of the adhesive material 521 can be silicone resin, epoxy resin or other materials. In one embodiment, a reflective layer 519 may be formed on both sidewalls of the through hole 515 to increase light extraction efficiency; a metal layer 517 may be formed on the lower surface of the lower carrier 501 to enhance heat dissipation efficiency.

Figures 6A-6B show a schematic diagram of a light source generating device 900. A light source generating device 900 may include a light emitting module 800, a light emitting unit 540, and a power supply system (not shown) to supply a current to the light emitting module 800. , and a control element (not shown) for controlling the power supply system (not shown). The light source generating device 900 can be a lighting device, such as a street lamp, a car lamp or an indoor lighting source, and can also be a traffic sign or a backlight source of a backlight module in a flat panel display.

Fig. 7 is a schematic diagram of a light bulb. The bulb 1000 includes a housing 921 , a lens 922 , a lighting module 924 , a bracket 925 , a radiator 926 , a serial connection 927 and an electrical serial connector 928 . The lighting module 924 includes a carrier 923, and the carrier 923 includes at least one optoelectronic element 300 in the above embodiment or the optoelectronic element in other embodiments (not shown).

Specifically, the substrate 30 is a growth and/or carrying base. Candidate materials may include conductive substrates or non-conductive substrates, light-transmissive substrates or light-impermeable substrates. One of the conductive substrate materials can be germanium (Ge), gallium arsenide (GaAs), indium phosphorus (InP), silicon carbide (SiC), silicon (Si), lithium aluminate (LiAlO2), zinc oxide (ZnO) , gallium nitride (GaN), aluminum nitride (AlN), metal. One of the transparent substrate materials can be sapphire (Sapphire), lithium aluminate (LiAlO2), zinc oxide (ZnO), gallium nitride (GaN), glass, diamond, CVD diamond, and diamond-like carbon (Diamond-Like Carbon; DLC), spinel (spinel, MgAl2O4), aluminum oxide (Al2O3), silicon oxide (SiOX) and lithium gallate (LiGaO2).

The epitaxial stack 31 includes a first semiconductor layer 311 , an active layer 312 , and a second semiconductor layer 313 . The first semiconductor layer 311 and the second semiconductor layer 313 are, for example, cladding layers or confinement layers, which can be a single-layer or multi-layer structure. The above-mentioned first semiconductor layer 311 and the second semiconductor layer 313 are different in electrical property, polarity or dopant, and the electrical property selection can be a combination of at least any two of p-type, n-type, and i-type, and can provide Electrons and holes are combined in the active layer 312 to emit light. The materials of the first semiconductor layer 311, the active layer 312, and the second semiconductor layer 313 may include III-V group semiconductor materials, such as AlxInyGa(1-x-y)N or AlxInyGa(1-x-y)P, where 0≦x, y ≦1; (x+y)≦1. Depending on the material of the active layer 312, the epitaxial stack can emit red light with a wavelength between 610 nm and 650 nm, green light with a wavelength between 530 nm and 570 nm, and green light with a wavelength between 450 nm and 490 nm. between blue light, or ultraviolet light with a wavelength less than 400nm.

In another embodiment of the present invention, the photoelectric element 300, 400, 500, 600, 700, 700' can be an epitaxial element or a light-emitting diode, and its light emission spectrum can be changed by changing the single layer of the epitaxial stack or multi-layer physical or chemical elements to be adjusted. The single-layer or multi-layer epitaxial stack material can be selected from aluminum (Al), gallium (Ga), indium (In), phosphorus (P), nitrogen (N), zinc (Zn) and oxygen (O) group. The structure of the active layer 312 is such as: single heterostructure (single heterostructure; SH), double heterostructure (double heterostructure; DH), double-side double heterostructure (double-side double heterostructure; DDH), or multi-layer quantum wells (multi- quantum well; MQW) structure. Furthermore, adjusting the logarithm of the quantum wells in the active layer 312 can also change the emission wavelength.

In an embodiment of the present invention, a buffer layer (not shown) may optionally be included between the first semiconductor layer 311 and the substrate 30 . The buffer layer is between the two material systems, so that the material system of the substrate 30 “transitions” to the material system of the first semiconductor layer 311 . For the structure of the light-emitting diode, on the one hand, the buffer layer is a material layer used to reduce the lattice mismatch between the two materials. On the other hand, the buffer layer can also be a single layer, multi-layer or structure used to combine two materials or two separate structures, and the optional materials are such as: organic materials, inorganic materials, metals, and semiconductors; The selected structure is such as: reflective layer, thermal conductive layer, conductive layer, ohmic contact layer, anti-deformation layer, stress release layer, stress adjustment layer, bonding layer, wavelength Conversion layer, and mechanical fixing structure, etc. In one embodiment, the material of the buffer layer can be selected from aluminum nitride or gallium nitride, and the buffer layer can be formed by sputtering or atomic layer deposition (Atomic Layer Deposition, ALD).

A contact layer (not shown) can be optionally formed between the second semiconductor layer 313 and the second electrical type electrode 33 . Specifically, the contact layer may be an optical layer, an electrical layer, or a combination thereof. The optical layer system can modify electromagnetic radiation or light from or into the active layer. "Changing" as used herein refers to changing at least one optical property of electromagnetic radiation or light, the aforementioned properties including but not limited to frequency, wavelength, intensity, flux, efficiency, color temperature, rendering index, light field (light field), and angle of view (angle of view). The electrical layer system can cause the value, density, and distribution of at least one of voltage, resistance, current, and capacitance between any set of opposite sides of the contact layer to change or have a tendency to change. The constituent materials of the contact layer include oxides, conductive oxides, transparent oxides, oxides with a transmittance of 50% or more, metals, relatively transparent metals, metals with a transmittance of 50% or more, organic matter, At least one of inorganic substances, fluorescent substances, phosphorescent substances, ceramics, semiconductors, doped semiconductors, and undoped semiconductors. In some applications, the material of the contact layer is at least one of indium tin oxide, cadmium tin oxide, antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide. If it is a relatively light-transmitting metal, its thickness is preferably about 0.005 μm˜0.6 μm.

Although the above drawings and descriptions only correspond to specific embodiments, however, the components, implementation methods, design principles, and technical principles described or disclosed in each embodiment are unless they conflict with each other, contradict, or are difficult to implement together. In addition, we can refer to, exchange, match, coordinate, or merge arbitrarily according to our needs. Although the present invention has been described above, it is not intended to limit the scope of the present invention, the implementation sequence, or the materials and process methods used. Various modifications and changes made to the present invention do not depart from the spirit and scope of the present invention.

100, 200, 300, 400, 500, 600, 700, 700': light emitting element

10: Transparent substrate

12: Semiconductor stack

14. E1, E2: electrodes

30: Substrate

31: Epitaxy stack

311: the first semiconductor layer

312: active layer

313: the second semiconductor layer

S: ditch

341: first insulating layer

342: second insulating layer

3421: first opening

3422: second opening

3423: the third opening

3424: The fourth opening

3425: fifth opening

321: the first first electrical electrode

322: the second first electrical electrode

323: the third first electrical electrode

324: the fourth first electrical electrode

33: Second electrical electrode

35: The third electrode

B1: the first long side

B3: second long side

B2: First short side

B4: second short side

351: Long extension

R: notch

36: The fourth electrode

800: Lighting module

501: download body

502: carrier

503: upload carrier

504, 506, 508, 510: lens

512, 514: power supply terminals

515: through hole

519: reflective layer

521: Glue

540: shell

900: light source generating device

1000: bulb

721: shell

722: lens

724:Lighting module

725: Bracket

726: Radiator

727: Serial connection

728: Electric serial connector

ABC: Direction

D1: distance

H1, H2: Height

Figure 1 is a structural diagram showing a side-view structural diagram of a conventional array photoelectric element;

Figure 2 is a schematic diagram showing the structure of a conventional light-emitting device;

FIG. 3A is a structural diagram showing a top structural diagram of a photoelectric element unit according to an embodiment of the present invention;

FIG. 3B is a structural diagram showing a side view structural diagram of a photoelectric element unit according to an embodiment of the present invention;

FIG. 3C is a structural diagram showing a top structural diagram of a photoelectric element unit according to another embodiment of the present invention;

Figures 4A-4D are structural diagrams showing a top structural diagram of a photoelectric element unit according to another embodiment of the present invention;

Figures 5A-5C show a schematic diagram of a light-emitting module;

Figures 6A-6B show a schematic diagram of a light source generating device; and

Fig. 7 is a schematic diagram of a light bulb.

700: photoelectric components

311: the first semiconductor layer

321: the first first electrical electrode

322: the second first electrical electrode

323: the third first electrical electrode

342: second insulating layer

3422: second opening

3423: the third opening

3424: The fourth opening

35: The third electrode

351: Extension

36: The fourth electrode

Claims (10)

A photoelectric component comprising: An epitaxial stack, comprising a first semiconductor layer, the first semiconductor layer has a first region and a second region connected to the first region, an active layer is formed on the first region, and a second A semiconductor layer is formed on the active layer, wherein the second semiconductor layer and the active layer are not formed on the second region; a first electrical type electrode formed only on the second region and not surrounded by the second semiconductor layer; a second electrical type electrode formed on the second semiconductor layer; as well as A first electrode is electrically connected to the first semiconductor layer through the first electrode. A photoelectric component comprising: An epitaxial stack, comprising a first semiconductor layer, the first semiconductor layer has a first region and a second region connected to the first region, an active layer is formed on the first region, and a second A semiconductor layer is formed on the active layer, wherein the second semiconductor layer and the active layer are not formed on the second region; A plurality of first electrical contacts, including a first portion of the plurality of first electrical contacts formed on the second region and surrounded by the second semiconductor layer and a second portion of the plurality of first electrical contacts A point is formed on the second region and is not surrounded by the second semiconductor layer, wherein one of the plurality of first electrical contact points of the first portion is connected to one of the plurality of first electrical contact points of the second portion The first distance between is greater than the second distance between the other one of the plurality of first electrical contacts of the first portion and the one of the plurality of first electrical contacts of the second portion; and A first electrode is electrically connected to the first semiconductor layer through the plurality of first electrical contact points. The optoelectronic element as described in item 1 or item 2 of the patent claims further includes a second electrode electrically connected to the second semiconductor layer. The photoelectric device as described in item 3 of the patent claims further includes a contact layer located between the second semiconductor layer and the fourth electrode, wherein the contact layer includes oxide, conductive oxide, or transparent oxide. The photoelectric element as described in item 3 of the scope of the patent application further includes an insulating layer including a first opening for electrically connecting the second electrode with the second semiconductor layer and a second opening for the The first electrode is electrically connected to the first semiconductor layer, wherein the insulating layer includes a Bragg reflector (Distributed Bragg Reflector) structure. The photoelectric element as described in claim 3 of the patent application, wherein viewed from the top, the top view area of the second electrode is smaller than the top view area of the first electrode. The photoelectric element as described in claim 3, wherein a minimum distance between a boundary of the first electrode and a boundary of the second electrode is greater than 50 μm. The photoelectric element described in item 1 of the scope of the patent application, wherein the first semiconductor layer includes two long sides and two short sides, any one long side and one short side form a corner, and the first electrical electrode is formed on On the corner of the first semiconductor layer, the projection of the first electrical electrode on the first semiconductor layer has a pattern, and the pattern includes polygon, circle, ellipse or semicircle. The photoelectric element as described in item 8 of the scope of the patent application further includes another first electrical electrode close to one of the two long sides of the first semiconductor layer, wherein the other first electrical electrode includes a head end and a tail end, and the head end includes a width greater than a width of the tail end, wherein the first electrical type electrode and the other first electrical type electrode are separated from each other and are not in contact with each other. The optoelectronic element as described in item 9 of the scope of the patent application further includes a second electrode electrically connected to the second semiconductor layer, wherein the head end of the other electrode of the first electrical type is covered by the third electrode, the The tail end is not covered by the first electrode and the second electrode.

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