CN114221529B

CN114221529B - Driving method and device of bridge circuit, control system and ultrasonic equipment

Info

Publication number: CN114221529B
Application number: CN202111547755.XA
Authority: CN
Inventors: 郑丰周; 敬仕林; 徐明燕; 李俊锴; 赵跃
Original assignee: Gree Electric Appliances Inc of Zhuhai
Current assignee: Gree Electric Appliances Inc of Zhuhai
Priority date: 2021-12-16
Filing date: 2021-12-16
Publication date: 2024-05-03
Anticipated expiration: 2041-12-16
Also published as: CN114221529A

Abstract

The invention discloses a driving method and device of a bridge circuit, a control system and ultrasonic equipment. Wherein the method comprises the following steps: adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signals of a first bridge arm of the bridge circuit are first pulse broadband modulation (PWM) signals, the driving signals of a second bridge arm of the bridge circuit are second PWM signals, and the duty ratio of the first PWM signals is the same as that of the second PWM signals; the bridge circuit is driven according to the first PWM signal and the second PWM signal. The invention solves the technical problems that one bridge arm of the bridge circuit is excessively long in conduction time and the MOS tube is extremely easy to burn out due to excessively high temperature during power reduction treatment.

Description

Driving method and device of bridge circuit, control system and ultrasonic equipment

Technical Field

The present invention relates to the field of device control technologies, and in particular, to a driving method and apparatus for a bridge circuit, a control system, and an ultrasonic device.

Background

In general, the ultrasonic transducer and the inductor form an LC resonant network, and when the duty ratio of the driving signal is 50% and the driving frequency is the natural resonant frequency of the ultrasonic transducer, the output power and the conversion efficiency of the ultrasonic transducer are both maximized. Fig. 1 is a schematic diagram of driving waveforms of PWM1 and PWM2 when output power of an ultrasonic transducer is maximum according to the prior art, and as shown in fig. 1, duty ratios of PWM1 and PWM2 are both 50% and complementary. In addition, the driving mode of the ultrasonic transducer includes single tube driving, half-bridge driving, H-bridge driving, and the like. The H-bridge driving mode is suitable for driving high-power loads. When load power reduction processing is needed in some application scenes, the most common technical means at present is to adjust the duty ratio of the two driving signals under the condition of ensuring that the two driving signals are complementary, fig. 2 is a schematic diagram of driving waveforms of PWM1 and PWM2 during common power reduction processing according to the prior art, as shown in fig. 2, the duty ratio of the driving signal of the first bridge arm is adjusted to 30%, and the duty ratio of the driving signal of the second bridge arm is adjusted to 70%; or the duty ratio of the driving signal of the first bridge arm is adjusted to 70%, and the duty ratio of the driving signal of the corresponding second bridge arm is adjusted to 30%, so that the positive and negative voltage maintaining time of the secondary output voltage of the step-up transformer is different, the conversion efficiency of the resonant network is reduced, and the ultrasonic output power is reduced. The driving mode reduces the output power by reducing the conversion efficiency of the transducer, but the input power is kept unchanged, and the on time of the MOS tube of one bridge arm is longer than the maximum output power (the duty ratio is 50%), so that the MOS tube is extremely easy to burn out due to overhigh temperature.

Further, during power reduction processing, conversion efficiency cannot be simply sacrificed to reduce output power, but input power and output power are reduced simultaneously under the condition of ensuring maximum conversion efficiency, so that the purposes of energy conservation and environmental protection are achieved. Meanwhile, under the condition that the product size is limited, the MOS tube radiator is small in size, the problem of temperature rise of the MOS tube needs to be solved, and the reliability of circuit design is improved.

In view of the above problems, no effective solution has been proposed at present.

Disclosure of Invention

The embodiment of the invention provides a driving method, a driving device, a control system and ultrasonic equipment of a bridge circuit, which at least solve the technical problems that one bridge arm of the bridge circuit is excessively long in conduction time and a MOS tube is extremely easy to burn due to excessively high temperature during power reduction treatment.

According to an aspect of an embodiment of the present invention, there is provided a driving method of a bridge circuit, including: adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signals of a first bridge arm of the bridge circuit are first pulse broadband modulation (PWM) signals, the driving signals of a second bridge arm of the bridge circuit are second PWM signals, and the duty ratio of the first PWM signals is the same as that of the second PWM signals; and driving the bridge circuit according to the first PWM signal and the second PWM signal.

Optionally, adjusting the driving signal of each bridge arm of the bridge circuit includes: controlling the first PWM signal to output high level, the second PWM signal to output low level and setting a first timer to start timing; judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the first PWM signal is controlled to be converted and output a low level, the second PWM signal is continuously output a low level, the first timer is set to be clear, and meanwhile, the second timer starts to time; and when the timing time of the first timer is smaller than or equal to the MOS tube conduction time corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is larger than the MOS tube conduction time corresponding to the first bridge arm.

Optionally, adjusting the driving signal of each bridge arm of the bridge circuit includes: after the first PWM signal is controlled to be converted and output a low level, the second PWM signal is controlled to continuously output the low level, judging whether the timing time of the second timer is longer than a preset time, wherein the preset time is obtained according to the MOS tube conduction time corresponding to the first bridge arm or the MOS tube conduction time and the driving period of the second bridge arm; when the timing time of the second timer is longer than the preset time, the first PWM signal is controlled to continuously output a low level, the second PWM signal is converted to output a high level, the second timer is set to be clear, and meanwhile, the first timer starts to count; and when the timing time of the second timer is smaller than or equal to the preset time, continuing to judge whether the timing time of the second timer is larger than the preset time.

Optionally, adjusting the driving signal of each bridge arm of the bridge circuit includes: after the first PWM signal is controlled to continuously output a low level and the second PWM signal is converted to output a high level, judging whether the timing time of the first timer is longer than the MOS tube conduction time corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the first PWM signal is controlled to be converted and output a low level, the second PWM signal is continuously output a low level, the first timer is set to be clear, and meanwhile, the second timer starts to time; and when the timing time of the first timer is smaller than or equal to the MOS tube conduction time corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is larger than the MOS tube conduction time corresponding to the first bridge arm.

Optionally, adjusting the driving signal of each bridge arm of the bridge circuit further includes: after the first PWM signal is controlled to be converted and output a low level and the second PWM signal is controlled to continuously output a low level, judging whether the timing time of the second timer is longer than the preset time; when the timing time of the second timer is longer than the preset time, continuously controlling the first PWM signal to output high level, the second PWM signal to output low level and setting the first timer to start timing; and when the timing time of the second timer is smaller than or equal to the preset time, continuing to judge whether the timing time of the second timer is larger than the preset time.

Optionally, before controlling the first PWM signal to output a high level and the second PWM signal to output a low level, the method further includes: acquiring the duty ratio of each driving signal; obtaining a driving period of each driving signal, wherein the driving period corresponding to the first PWM signal is the same as the driving period corresponding to the second PWM signal; and determining the MOS tube conduction time of the bridge circuit according to the duty ratio and the driving period, wherein the MOS tube conduction time corresponding to the first bridge arm is the same as the MOS tube conduction time of the second bridge arm.

According to another aspect of the embodiment of the present invention, there is also provided a driving apparatus of a bridge circuit, including: the device comprises an adjusting module, a first PWM signal generation module and a second PWM signal generation module, wherein the adjusting module is used for adjusting driving signals of all bridge arms of a bridge circuit, the driving signals of a first bridge arm of the bridge circuit are first pulse broadband modulation PWM signals, the driving signals of a second bridge arm of the bridge circuit are second PWM signals, and the duty ratio of the first PWM signals is the same as that of the second PWM signals; the driving module is used for driving the bridge circuit according to the first PWM signal and the second PWM signal.

According to another aspect of the embodiment of the present invention, there is further provided a control system, where the control system includes an ultrasonic transducer and a bridge circuit driving chip connected to the ultrasonic transducer, where the bridge circuit driving chip is used to run a program, and the program executes the driving method of the bridge circuit described in any one of the above during running.

According to another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium including a stored program, wherein the program, when executed, controls a device in which the computer-readable storage medium is located to perform the method for driving the bridge circuit according to any one of the above.

According to another aspect of the embodiments of the present invention, there is also provided an ultrasonic apparatus including a memory in which a computer program is stored, and a processor configured to execute the driving method of the bridge circuit of any one of the above through the computer program.

In the embodiment of the invention, driving signals of all bridge arms of a bridge circuit are regulated, wherein the driving signals of a first bridge arm of the bridge circuit are first pulse broadband modulation (PWM) signals, the driving signals of a second bridge arm of the bridge circuit are second PWM signals, and the duty ratio of the first PWM signals is the same as that of the second PWM signals; according to the first PWM signal and the second PWM signal, the bridge circuit is driven, the driving mode of the bridge circuit is changed, the two bridge arms of the bridge circuit are mutually balanced and the conduction time is consistent during power reduction processing, so that the maximization of the conversion efficiency of the transducer and the synchronous reduction of the temperature rise of the MOS tube are realized during power reduction processing, the size of the MOS tube radiator is reduced, the design cost is reduced, the technical effect of improving the reliability of the circuit is improved, and the technical problems that the conduction time of one bridge arm of the bridge circuit is overlong and the MOS tube is extremely easy to burn due to overhigh temperature during power reduction processing are solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute a limitation on the application. In the drawings:

fig. 1 is a schematic diagram of driving waveforms of PWM1 and PWM2 when an output power of an ultrasonic transducer is maximum according to the related art;

FIG. 2 is a schematic diagram of the drive waveforms for PWM1 and PWM2 during a common power down process according to the prior art;

FIG. 3 is a flow chart of a method of driving a bridge circuit according to an embodiment of the present invention;

FIG. 4 is a schematic topology diagram of an ultrasonic transducer implementing target power control in accordance with an alternative embodiment of the invention;

FIG. 5 is a schematic circuit diagram of a bridge circuit drive in accordance with an alternative embodiment of the invention;

FIG. 6 is a schematic diagram of the drive waveforms for PWM1 and PWM2 during a new power down process according to an alternative embodiment of the present invention;

FIG. 7 is a logic diagram during power down processing in accordance with an alternative embodiment of the present invention;

Fig. 8 is a schematic diagram of a driving apparatus of a bridge circuit according to an embodiment of the present invention.

Detailed Description

In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Example 1

According to an embodiment of the present invention, there is provided an embodiment of a driving method of a bridge circuit, it should be noted that the steps shown in the flowcharts of the drawings may be performed in a computer system such as a set of computer executable instructions, and that although a logical order is shown in the flowcharts, in some cases, the steps shown or described may be performed in an order different from that herein.

Fig. 3 is a flowchart of a driving method of a bridge circuit according to an embodiment of the present invention, as shown in fig. 3, the method includes the steps of:

Step S302, driving signals of all bridge arms of a bridge circuit are adjusted, wherein the driving signals of a first bridge arm of the bridge circuit are first pulse broadband modulation PWM signals, the driving signals of a second bridge arm of the bridge circuit are second PWM signals, and the duty ratio of the first PWM signals is the same as that of the second PWM signals;

Step S304, driving the bridge circuit according to the first PWM signal and the second PWM signal.

It should be noted that, the duty ratio of the first PWM signal and the duty ratio of the second PWM signal may be adjusted according to the actual load power requirement, for example, the duty ratios of 45%, 38%, 20% and the like may be set according to the actual requirement. The bridge circuit includes, but is not limited to, an H-bridge drive circuit.

Through the steps, the driving mode of the bridge circuit can be changed, the two bridge arms of the bridge circuit are mutually balanced and the conduction time is consistent during power reduction processing, so that the maximization of the conversion efficiency of the transducer is realized, the synchronous reduction of the temperature rise of the MOS tube is realized during power reduction processing, the volume of the MOS tube radiator is reduced, the design cost is reduced, the technical effect of circuit reliability is improved, and the technical problem that one bridge arm of the bridge circuit is excessively long in conduction time and the MOS tube is extremely easy to burn out due to excessively high temperature during power reduction processing is solved.

In an alternative embodiment, adjusting the drive signals of each leg of the bridge circuit includes: controlling the first PWM signal to output a high level, the second PWM signal to output a low level and setting a first timer to start timing; judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the first PWM signal is controlled to be converted and output a low level, the second PWM signal is continuously output a low level, the first timer is set to be clear, and meanwhile, the second timer starts to time; and when the timing time of the first timer is smaller than or equal to the MOS tube conduction time corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is larger than the MOS tube conduction time corresponding to the first bridge arm.

In an alternative embodiment, adjusting the drive signals of each leg of the bridge circuit includes: after the first PWM signal is controlled to convert and output a low level and the second PWM signal continues to output the low level, judging whether the timing time of the second timer is longer than the preset time, wherein the preset time is obtained according to the MOS tube conduction time corresponding to the first bridge arm or the MOS tube conduction time and the driving period of the second bridge arm; when the timing time of the second timer is longer than the preset time, the first PWM signal is controlled to continuously output a low level, the second PWM signal is converted to output a high level, the second timer is set to be clear, and the first timer starts to count at the same time; and when the timing time of the second timer is smaller than or equal to the preset time, continuously judging whether the timing time of the second timer is larger than the preset time.

In an alternative embodiment, adjusting the drive signals of each leg of the bridge circuit includes: after the first PWM signal is controlled to continuously output a low level and the second PWM signal is converted to output a high level, judging whether the timing time of the first timer is longer than the MOS tube conduction time corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the first PWM signal is controlled to be converted and output a low level, the second PWM signal is continuously output a low level, the first timer is set to be clear, and meanwhile, the second timer starts to time; and when the timing time of the first timer is smaller than or equal to the MOS tube conduction time corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is larger than the MOS tube conduction time corresponding to the first bridge arm.

In an alternative embodiment, adjusting the driving signals of the bridge arms of the bridge circuit further comprises: after the first PWM signal is controlled to convert and output the low level and the second PWM signal continues to output the low level, judging whether the timing time of the second timer is longer than the preset time; when the timing time of the second timer is longer than the preset time, continuously controlling the first PWM signal to output high level, the second PWM signal to output low level and setting the first timer to start timing; and when the timing time of the second timer is smaller than or equal to the preset time, continuously judging whether the timing time of the second timer is larger than the preset time.

In an alternative embodiment, before controlling the first PWM signal to output a high level and the second PWM signal to output a low level, the method further includes: acquiring the duty ratio of each driving signal; obtaining a driving period of each driving signal, wherein the driving period corresponding to the first PWM signal is the same as the driving period corresponding to the second PWM signal; and determining the MOS tube conduction time of the bridge circuit according to the duty ratio and the driving period, wherein the MOS tube conduction time corresponding to the first bridge arm is the same as the MOS tube conduction time of the second bridge arm.

An alternative embodiment of the present invention will be described in detail below.

Fig. 4 is a schematic topology diagram of an ultrasonic transducer implementing target power control according to an alternative embodiment of the invention, as shown in fig. 4. FIG. 5 is a schematic diagram of a bridge circuit drive circuit according to an alternative embodiment of the present invention, as shown in FIG. 5, wherein Q1 and Q3 form a first leg and Q2 and Q4 form a second leg, when PWM1 (corresponding to the first PWM signal) outputs a high level, the first leg is turned on, the step-up transformer is turned on in the forward direction, and a positive voltage is output; when PWM2 (corresponding to the second PWM signal) outputs a high level, the second bridge arm is conducted, the step-up transformer is reversely conducted, and a negative voltage is output; in addition, Y1 is an ultrasonic transducer and forms a resonant network with the inductor L2.

Fig. 6 is a schematic diagram of driving waveforms of PWM1 and PWM2 in the new power-down process according to an alternative embodiment of the present invention, as shown in fig. 6, the duty ratio is 30%, and the driving mode makes the positive and negative voltage maintaining time of the secondary output voltage of the step-up transformer the same, and the center is symmetrical, at this time, the resonant network conversion efficiency is kept the maximum, and the input power and the ultrasonic output power are synchronously reduced only because the driving time is shortened.

Further, through changing the driving mode of the bridge circuit, the maximization of the conversion efficiency of the transducer is realized during the power reduction processing, the conduction time of the MOS tube of the first bridge arm is the same as that of the MOS tube of the second bridge arm, the temperature rise is synchronously reduced, the volume of the MOS tube radiator can be reduced, the design cost is reduced, and the reliability of the circuit is improved.

Fig. 7 is a logic block diagram during power down processing according to an alternative embodiment of the present invention, and as shown in fig. 7, the steps are implemented as follows:

Step S701, U3 is a bridge circuit driving chip, PWM1 and PWM2 are driving signals sent by the main chip, wherein PWM1 drives AHI and BLI, PWM2 drives ALI and BHI, and the logical truth table correspondence is as follows:

Table 1 logical truth table

AHI/BLI	ALI/BHI	ALO/BHO	AHO/BLO
				0	0	0	0
0	1	0	1
				1	0	1	0
1	1	1	1

In step S702, when power reduction processing is required, the target duty ratios D of PWM1 and PWM2 are obtained, and the on time is d×t (T is the period of the driving signal, and under this driving period, the transducer can work at its natural resonant frequency to achieve the maximum ultrasonic output power).

In step S703, PWM1 outputs a high level, PWM2 outputs a low level, and the first timer starts to count.

In step S704, when the accumulated time T1 of the first timer is greater than d×t, the PWM1 is switched to output a low level, the PWM2 continues to output a low level, and the first timer is cleared, and the second timer starts to count. Note that if T1> d×t, PWM1 is switched from output high level to output low level; if T1 is less than or equal to D, the PWM1 continues to output a high level, so that the rapid switching of the PWM1 from the high level to the low level is realized; in this process, PWM2 continues to hold the output low.

In step S705, when the accumulated time T2 of the second timer is greater than T/2-D, PWM1 continues to output low level, PWM2 switches to output high level, and clears the second timer, and the first timer starts to count. It should be noted that if T2> T/2-D is T, PWM2 is switched from output low level to output high level; if T2 is less than or equal to T/2-D, the PWM2 continuously outputs a low level, so that the rapid switching of the PWM2 from the low level to the high level is realized; in this process, PWM1 continues to hold the output low.

In step S706, when the accumulated time T1 of the first timer is greater than d×t, the PWM1 continues to output the low level, the PWM2 switches to output the low level, and clears the first timer, and the second timer starts to count. Note that if T1> d×t, PWM2 is switched from the output high level to the output low level; if T1 is less than or equal to D, the PWM2 continues to output a high level, so that the rapid switching of the PWM2 from the high level to the low level is realized; in this process, PWM1 continues to hold the output low.

Step S707, returning to step S703 when the second timer accumulated time T2> T/2-D. When T2> T/2-d×t, PWM1 outputs a high level, PWM2 outputs a low level, and the first timer starts to count.

It should be noted that, in the above embodiment, by changing the driving mode of the bridge circuit, the maximization of the conversion efficiency of the transducer is realized during the power reduction processing, the input power is synchronously reduced, and the energy is saved and the environment is protected; and the MOS tubes of the first bridge arm and the second bridge arm are conducted in the same time, the temperature rise is synchronously reduced, the volume of the MOS tube radiator can be reduced, the design cost is reduced, and the reliability of the circuit is improved.

Example 2

According to another aspect of the embodiment of the present invention, there is also provided a driving apparatus of a bridge circuit, fig. 8 is a schematic diagram of the driving apparatus of the bridge circuit according to the embodiment of the present invention, and as shown in fig. 8, the driving apparatus of the bridge circuit includes: an adjustment module 82 and a drive module 84. The driving device of the bridge circuit will be described in detail.

The adjusting module 82 is configured to adjust driving signals of each bridge arm of the bridge circuit, where the driving signal of a first bridge arm of the bridge circuit is a first pulse broadband modulation PWM signal, the driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and a duty ratio of the first PWM signal is the same as a duty ratio of the second PWM signal; the driving module 84 is connected to the adjusting module 82, and is configured to drive the bridge circuit according to the first PWM signal and the second PWM signal.

It should be noted that each of the above modules may be implemented by software or hardware, for example, in the latter case, it may be implemented by: the above modules may be located in the same processor; and/or the above modules are located in different processors in any combination.

In the above embodiment, the driving device of the bridge circuit can change the driving mode of the bridge circuit, so that the two bridge arms of the bridge circuit are balanced with each other and the conduction time is consistent during the power reduction treatment, thereby realizing the maximization of the conversion efficiency of the transducer and the synchronous reduction of the temperature rise of the MOS tube during the power reduction treatment, reducing the volume of the radiator of the MOS tube, reducing the design cost and improving the technical effect of circuit reliability, and further solving the technical problems that one bridge arm of the bridge circuit is excessively long in conduction time and the MOS tube is extremely easy to burn due to excessively high temperature during the power reduction treatment.

Here, it should be noted that the adjustment module 82 and the driving module 84 correspond to steps S302 to S304 in embodiment 1, and the modules are the same as examples and application scenarios implemented by the corresponding steps, but are not limited to those disclosed in embodiment 1.

Optionally, the adjusting module 82 includes: the first control unit is used for controlling the first PWM signal to output a high level, the second PWM signal to output a low level and setting a first timer to start timing; the first judging unit is used for judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm; the first processing unit is used for controlling the first PWM signal to convert and output a low level when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the second PWM signal continues to output the low level, the first timer is set to be clear, and the second timer starts timing at the same time; and the second processing unit is used for continuously judging whether the timing time of the first timer is longer than the MOS tube conduction time corresponding to the first bridge arm when the timing time of the first timer is shorter than or equal to the MOS tube conduction time corresponding to the first bridge arm.

Optionally, the adjusting module 82 includes: the second judging unit is used for judging whether the timing time of the second timer is longer than the preset time after the first PWM signal is controlled to output a low level in a conversion mode and the second PWM signal is continuously output the low level, wherein the preset time is obtained according to the MOS tube conduction time corresponding to the first bridge arm or the MOS tube conduction time and the driving period of the second bridge arm; the third processing unit is used for controlling the first PWM signal to continuously output a low level when the timing time of the second timer is longer than the preset time, converting the second PWM signal to output a high level, setting the second timer to zero, and starting timing by the first timer; and the fourth processing unit is used for continuously judging whether the timing time of the second timer is longer than the preset time or not when the timing time of the second timer is shorter than or equal to the preset time.

Optionally, the adjusting module 82 includes: the third judging unit is used for judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm after the first PWM signal is controlled to continuously output a low level and the second PWM signal is converted to output a high level; the fifth processing unit is used for controlling the first PWM signal to convert and output a low level when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the second PWM signal continues to output the low level, the first timer is set to be clear, and the second timer starts timing at the same time; and the sixth processing unit is used for continuously judging whether the timing time of the first timer is longer than the MOS tube conduction time corresponding to the first bridge arm when the timing time of the first timer is shorter than or equal to the MOS tube conduction time corresponding to the first bridge arm.

Optionally, the adjusting module 82 further includes: a fourth judging unit, configured to judge whether the timing time of the second timer is longer than the preset time after the first PWM signal is controlled to switch to output the low level and the second PWM signal continues to output the low level; the seventh processing unit is used for continuously controlling the first PWM signal to output a high level, the second PWM signal to output a low level and setting the first timer to start timing when the timing time of the second timer is longer than the preset time; and the eighth processing unit is used for continuously judging whether the timing time of the second timer is greater than the preset time or not when the timing time of the second timer is less than or equal to the preset time.

Optionally, the adjusting module 82 further includes: a first acquisition unit for acquiring the duty ratio of each driving signal before controlling the first PWM signal to output a high level and the second PWM signal to output a low level; the second acquisition unit is used for acquiring the driving period of each driving signal, wherein the driving period corresponding to the first PWM signal is the same as the driving period corresponding to the second PWM signal; the determining unit is used for determining the MOS tube conduction time of the bridge circuit according to the duty ratio and the driving period, wherein the MOS tube conduction time corresponding to the first bridge arm is the same as the MOS tube conduction time of the second bridge arm.

Example 3

According to another aspect of the embodiment of the present invention, there is also provided a control system including an ultrasonic transducer and a bridge circuit driving chip connected thereto, wherein the bridge circuit driving chip is configured to run a program, and wherein the driving method of the bridge circuit of any one of the above is performed when the program runs.

Example 4

According to another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium including a stored program, wherein the apparatus in which the computer-readable storage medium is controlled to execute the driving method of the bridge circuit of any one of the above when the program runs.

Example 5

The ultrasonic device includes, but is not limited to, an ultrasonic transducer, a home appliance equipped with the ultrasonic transducer, and the like.

Example 6

According to another aspect of the embodiments of the present invention, there is also provided a processor for running a program, wherein the program runs to perform the method for driving the bridge circuit according to any one of the above.

The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.

In the foregoing embodiments of the present invention, the descriptions of the embodiments are emphasized, and for a portion of this disclosure that is not described in detail in this embodiment, reference is made to the related descriptions of other embodiments.

In the several embodiments provided in the present application, it should be understood that the disclosed technology may be implemented in other manners. The above-described embodiments of the apparatus are merely exemplary, and the division of the units, for example, may be a logic function division, and may be implemented in another manner, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interfaces, units or modules, or may be in electrical or other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a usb disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.

Claims

1. A driving method of a bridge circuit, comprising:

Adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signals of a first bridge arm of the bridge circuit are first PWM signals, the driving signals of a second bridge arm of the bridge circuit are second PWM signals, and the duty ratio of the first PWM signals is the same as that of the second PWM signals;

Driving the bridge circuit according to the first PWM signal and the second PWM signal; adjusting driving signals of each bridge arm of the bridge circuit comprises: controlling the first PWM signal to output high level, the second PWM signal to output low level and setting a first timer to start timing; judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the first PWM signal is controlled to be converted and output a low level, the second PWM signal is continuously output a low level, the first timer is set to be clear, and meanwhile, the second timer starts to time; when the timing time of the first timer is smaller than or equal to the MOS tube conduction time corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is larger than the MOS tube conduction time corresponding to the first bridge arm; adjusting driving signals of each bridge arm of the bridge circuit comprises: after the first PWM signal is controlled to be converted and output a low level, the second PWM signal is controlled to continuously output the low level, judging whether the timing time of the second timer is longer than a preset time, wherein the preset time is obtained according to the MOS tube conduction time corresponding to the first bridge arm or the MOS tube conduction time and the driving period of the second bridge arm; when the timing time of the second timer is longer than the preset time, the first PWM signal is controlled to continuously output a low level, the second PWM signal is converted to output a high level, the second timer is set to be clear, and meanwhile, the first timer starts to count; when the timing time of the second timer is smaller than or equal to the preset time, continuing to judge whether the timing time of the second timer is larger than the preset time; adjusting driving signals of each bridge arm of the bridge circuit comprises: after the first PWM signal is controlled to continuously output a low level and the second PWM signal is converted to output a high level, judging whether the timing time of the first timer is longer than the MOS tube conduction time corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the first PWM signal is controlled to be converted and output a low level, the second PWM signal is continuously output a low level, the first timer is set to be clear, and meanwhile, the second timer starts to time; when the timing time of the first timer is smaller than or equal to the MOS tube conduction time corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is larger than the MOS tube conduction time corresponding to the first bridge arm; adjusting driving signals of each bridge arm of the bridge circuit, further comprising: after the first PWM signal is controlled to be converted and output a low level and the second PWM signal is controlled to continuously output a low level, judging whether the timing time of the second timer is longer than the preset time; when the timing time of the second timer is longer than the preset time, continuously controlling the first PWM signal to output high level, the second PWM signal to output low level and setting the first timer to start timing; and when the timing time of the second timer is smaller than or equal to the preset time, continuing to judge whether the timing time of the second timer is larger than the preset time.

2. The method of claim 1, further comprising, prior to controlling the first PWM signal to output a high level and the second PWM signal to output a low level:

acquiring the duty ratio of each driving signal;

Obtaining a driving period of each driving signal, wherein the driving period corresponding to the first PWM signal is the same as the driving period corresponding to the second PWM signal;

And determining the MOS tube conduction time of the bridge circuit according to the duty ratio and the driving period, wherein the MOS tube conduction time corresponding to the first bridge arm is the same as the MOS tube conduction time of the second bridge arm.

3. A driving device for a bridge circuit, comprising:

the device comprises an adjusting module, a first PWM signal generation module and a second PWM signal generation module, wherein the adjusting module is used for adjusting driving signals of all bridge arms of a bridge circuit, the driving signals of a first bridge arm of the bridge circuit are first PWM signals, the driving signals of a second bridge arm of the bridge circuit are second PWM signals, and the duty ratio of the first PWM signals is the same as that of the second PWM signals;

The driving module is used for driving the bridge circuit according to the first PWM signal and the second PWM signal; the adjustment module includes: a first control unit, configured to control the first PWM signal to output a high level, the second PWM signal to output a low level, and set a first timer to start timing; the first judging unit is used for judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm; the first processing unit is used for controlling the first PWM signal to switch and output a low level when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the second PWM signal continues to output the low level, the first timer is set to be clear, and meanwhile, the second timer starts to time; the second processing unit is used for continuously judging whether the timing time of the first timer is greater than the MOS tube conduction time corresponding to the first bridge arm when the timing time of the first timer is less than or equal to the MOS tube conduction time corresponding to the first bridge arm; the adjustment module further includes: the second judging unit is used for judging whether the timing time of the second timer is longer than the preset time after the first PWM signal is controlled to be converted and output a low level and the second PWM signal is continuously output the low level, wherein the preset time is obtained according to the MOS tube conduction time corresponding to the first bridge arm or the MOS tube conduction time and the driving period of the second bridge arm; the third processing unit is used for controlling the first PWM signal to continuously output a low level when the timing time of the second timer is longer than the preset time, converting the second PWM signal to output a high level, setting the second timer to be clear, and starting timing by the first timer; the fourth processing unit is used for continuously judging whether the timing time of the second timer is greater than the preset time or not when the timing time of the second timer is less than or equal to the preset time; the adjustment module includes: the third judging unit is used for judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm after the first PWM signal is controlled to continuously output a low level and the second PWM signal is converted to output a high level; the fifth processing unit is used for controlling the first PWM signal to convert and output a low level when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, the second PWM signal continues to output the low level, the first timer is set to be clear, and the second timer starts timing at the same time; the sixth processing unit is configured to continuously determine whether the timing time of the first timer is greater than the on time of the MOS transistor corresponding to the first bridge arm when the timing time of the first timer is less than or equal to the on time of the MOS transistor corresponding to the first bridge arm; a fourth judging unit, configured to judge whether the timing time of the second timer is longer than the preset time after the first PWM signal is controlled to switch to output the low level and the second PWM signal continues to output the low level; the seventh processing unit is used for continuously controlling the first PWM signal to output a high level, the second PWM signal to output a low level and setting the first timer to start timing when the timing time of the second timer is longer than the preset time; and the eighth processing unit is used for continuously judging whether the timing time of the second timer is greater than the preset time or not when the timing time of the second timer is less than or equal to the preset time.

4. A control system comprising an ultrasonic transducer and a bridge circuit driver chip connected thereto, wherein the bridge circuit driver chip is configured to run a program, wherein the program runs to perform the method of driving the bridge circuit of any one of claims 1 to 2.

5. A computer-readable storage medium, characterized in that the computer-readable storage medium comprises a stored program, wherein the program, when run, controls a device in which the computer-readable storage medium is located to perform the method of driving the bridge circuit according to any one of claims 1 to 2.

6. An ultrasonic apparatus comprising a memory in which a computer program is stored and a processor arranged to execute the method of driving the bridge circuit of any one of claims 1 to 2 by means of the computer program.