CN114221529A - Bridge circuit driving method, bridge circuit driving device, bridge circuit control system and ultrasonic equipment - Google Patents

Bridge circuit driving method, bridge circuit driving device, bridge circuit control system and ultrasonic equipment Download PDF

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Publication number
CN114221529A
CN114221529A CN202111547755.XA CN202111547755A CN114221529A CN 114221529 A CN114221529 A CN 114221529A CN 202111547755 A CN202111547755 A CN 202111547755A CN 114221529 A CN114221529 A CN 114221529A
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China
Prior art keywords
pwm signal
timer
bridge circuit
driving
time
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CN202111547755.XA
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CN114221529B (en
Inventor
郑丰周
敬仕林
徐明燕
李俊锴
赵跃
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Gree Electric Appliances Inc of Zhuhai
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Gree Electric Appliances Inc of Zhuhai
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a bridge circuit driving method, a bridge circuit driving device, a bridge circuit control system and ultrasonic equipment. Wherein, the method comprises the following steps: adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signal of a first bridge arm of the bridge circuit is a first Pulse Width Modulation (PWM) signal, the driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and the duty ratio of the first PWM signal is the same as that of the second PWM signal; the bridge circuit is driven according to the first PWM signal and the second PWM signal. The invention solves the technical problems that one bridge arm of a bridge circuit is too long in conduction time and an MOS (metal oxide semiconductor) tube is easy to burn due to too high temperature during power reduction treatment.

Description

Bridge circuit driving method, bridge circuit driving device, bridge circuit control system and ultrasonic equipment
Technical Field
The invention relates to the technical field of equipment control, in particular to a bridge circuit driving method, a bridge circuit driving device, a bridge circuit control system and ultrasonic equipment.
Background
Normally, the ultrasonic transducer and the inductor form an LC resonant network, and when the duty ratio of the driving signal is 50% and the driving frequency is the natural resonant frequency of the ultrasonic transducer, the output power and the conversion efficiency of the ultrasonic transducer are both maximized. Fig. 1 is a schematic diagram of driving waveforms of PWM1 and PWM2 when the output power of an ultrasonic transducer is maximum according to the prior art, and as shown in fig. 1, the duty ratios of PWM1 and PWM2 are both 50% and complementary. The ultrasonic transducer may be driven by a single tube drive, a half bridge drive, an H bridge drive, or the like. The H-bridge driving mode is suitable for driving high-power loads. When load power reduction processing is required in some application scenarios, the most common technical means at present is to adjust the duty ratio of two driving signals under the condition of ensuring that the two driving signals are complementary, fig. 2 is a schematic diagram of driving waveforms of PWM1 and PWM2 during ordinary power reduction processing according to the prior art, as shown in fig. 2, the duty ratio of the driving signal of a first bridge arm is adjusted to 30%, and the duty ratio of the driving signal of a second bridge arm is 70%; or, the duty ratio of the driving signal of the first bridge arm is adjusted to 70%, and the duty ratio of the driving signal of the corresponding second bridge arm is adjusted to 30%, so that the maintaining time of the positive voltage and the negative voltage of the secondary output voltage of the booster transformer are different, the conversion efficiency of the resonant network is reduced, and the output power of the ultrasonic wave is reduced. The driving mode reduces the output power by reducing the conversion efficiency of the transducer, but the input power is kept unchanged, the conduction time of the MOS tube of one bridge arm is longer than that of the MOS tube with the maximum output power (the duty ratio is 50%), and the MOS tube is easy to burn due to overhigh temperature.
Further, when the power is reduced, the conversion efficiency cannot be simply sacrificed to reduce the output power, but the input power and the output power are simultaneously reduced under the condition of ensuring the maximum conversion efficiency, so that the purposes of energy conservation and environmental protection are achieved. Meanwhile, under the condition that the size of a product is limited, the size of the MOS tube radiator is small, the temperature rise problem of the MOS tube needs to be solved, and the reliability of circuit design is improved.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
The embodiment of the invention provides a bridge circuit driving method, a bridge circuit driving device, a bridge circuit control system and ultrasonic equipment, and at least solves the technical problems that one bridge arm of a bridge circuit is too long in conducting time and an MOS (metal oxide semiconductor) tube is easily burnt due to too high temperature during power reduction treatment.
According to an aspect of an embodiment of the present invention, there is provided a driving method of a bridge circuit, including: adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signal of a first bridge arm of the bridge circuit is a first Pulse Width Modulation (PWM) signal, the driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and the duty ratio of the first PWM signal is the same as that of the second PWM signal; and driving the bridge circuit according to the first PWM signal and the second PWM signal.
Optionally, adjusting the driving signal of each bridge arm of the bridge circuit includes: controlling the first PWM signal to output a high level, controlling the second PWM signal to output a low level and setting a first timer to start timing; judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, controlling the first PWM signal to convert and output a low level, continuously outputting the low level by the second PWM signal, setting the first timer to zero, and starting timing by the second timer; and when the timing time of the first timer is less than or equal to the conduction time of the MOS tube corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm.
Optionally, adjusting the driving signal of each bridge arm of the bridge circuit includes: after the first PWM signal is controlled to convert and output a low level, and the second PWM signal continues to output the low level, judging whether the timing time of the second timer is greater than a preset time, wherein the preset time is obtained according to the conduction time of the MOS tube corresponding to the first bridge arm or the conduction time of the MOS tube of the second bridge arm and a driving period; when the timing time of the second timer is longer than the preset time, controlling the first PWM signal to continuously output a low level, converting the second PWM signal to output a high level, setting the second timer to zero, and starting timing by the first timer; and when the timing time of the second timer is less than or equal to the preset time, continuously judging whether the timing time of the second timer is greater than the preset time.
Optionally, adjusting the driving signal of each bridge arm of the bridge circuit includes: after the first PWM signal is controlled to continuously output a low level and the second PWM signal is switched to output a high level, judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, controlling the first PWM signal to convert and output a low level, continuously outputting the low level by the second PWM signal, setting the first timer to zero, and starting timing by the second timer; and when the timing time of the first timer is less than or equal to the conduction time of the MOS tube corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm.
Optionally, adjusting the driving signal of each bridge arm of the bridge circuit further includes: after the first PWM signal is controlled to be converted to output a low level and the second PWM signal continues to output the low level, judging whether the timing time of the second timer is greater than the preset time; when the timing time of the second timer is longer than the preset time, continuing to control the first PWM signal to output a high level and the second PWM signal to output a low level and setting the first timer to start timing; and when the timing time of the second timer is less than or equal to the preset time, continuously judging whether the timing time of the second timer is greater than the preset time.
Optionally, before controlling the first PWM signal to output a high level and the second PWM signal to output a low level, the method further includes: acquiring the duty ratio of each driving signal; acquiring a driving period of each driving signal, wherein the driving period corresponding to the first PWM signal is the same as the driving period corresponding to the second PWM signal; and determining the conduction time of the MOS tube of the bridge circuit according to the duty ratio and the driving period, wherein the conduction time of the MOS tube corresponding to the first bridge arm is the same as the conduction time of the MOS tube of the second bridge arm.
According to another aspect of the embodiments of the present invention, there is also provided a driving apparatus of a bridge circuit, including: the adjusting module is used for adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signal of a first bridge arm of the bridge circuit is a first Pulse Width Modulation (PWM) signal, the driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and the duty ratio of the first PWM signal is the same as that of the second PWM signal; and the driving module is used for driving the bridge circuit according to the first PWM signal and the second PWM signal.
According to another aspect of the embodiments of the present invention, there is also provided a control system, including an ultrasonic transducer and a bridge circuit driving chip connected thereto, where the bridge circuit driving chip is configured to run a program, and the program is configured to execute the method for driving the bridge circuit according to any one of the above aspects when running.
According to another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium, where the computer-readable storage medium includes a stored program, and when the program runs, the apparatus on which the computer-readable storage medium is located is controlled to execute the method for driving the bridge circuit according to any one of the above.
According to another aspect of embodiments of the present invention, there is also provided an ultrasonic apparatus including a memory in which a computer program is stored, and a processor configured to execute the driving method of the bridge circuit according to any one of the above through the computer program.
In the embodiment of the invention, the driving signals of each bridge arm of the bridge circuit are adjusted, wherein the driving signal of a first bridge arm of the bridge circuit is a first Pulse Width Modulation (PWM) signal, the driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and the duty ratio of the first PWM signal is the same as that of the second PWM signal; the bridge circuit is driven according to the first PWM signal and the second PWM signal, and the two bridge arms of the bridge circuit are balanced with each other and have consistent conduction time when the power is reduced by changing the driving mode of the bridge circuit, so that the maximization of the conversion efficiency of the transducer is realized, the synchronous reduction of the temperature rise of the MOS tube is realized when the power is reduced, the size of the MOS tube radiator is reduced, the design cost is reduced, and the technical effect of improving the reliability of the circuit is realized, and the technical problems that one bridge arm of the bridge circuit has overlong conduction time and the MOS tube is easily burnt due to overhigh temperature when the power is reduced are solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a schematic diagram of the drive waveforms of PWM1 and PWM2 at maximum output power of an ultrasonic transducer according to the prior art;
FIG. 2 is a schematic diagram of the drive waveforms of PWM1 and PWM2 during a normal power down process according to the prior art;
FIG. 3 is a flow chart of a driving method of a bridge circuit according to an embodiment of the present invention;
FIG. 4 is a schematic topology of an ultrasonic transducer implementing target power control in accordance with an alternative embodiment of the present invention;
FIG. 5 is a circuit schematic of a bridge circuit driver according to an alternative embodiment of the present invention;
FIG. 6 is a schematic diagram of the drive waveforms of PWM1 and PWM2 during a new power down process in accordance with an alternative embodiment of the present invention;
FIG. 7 is a logic block diagram during power down processing in accordance with an alternative embodiment of the present invention;
fig. 8 is a schematic diagram of a driving apparatus of a bridge circuit according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
In accordance with an embodiment of the present invention, there is provided an embodiment of a driving method for a bridge circuit, it is noted that the steps illustrated in the flowchart of the drawings may be performed in a computer system such as a set of computer executable instructions, and that while a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than that herein.
Fig. 3 is a flowchart of a driving method of a bridge circuit according to an embodiment of the present invention, as shown in fig. 3, the method including the steps of:
step S302, adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signal of a first bridge arm of the bridge circuit is a first Pulse Width Modulation (PWM) signal, the driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and the duty ratio of the first PWM signal is the same as that of the second PWM signal;
step S304, driving the bridge circuit according to the first PWM signal and the second PWM signal.
The duty ratio of the first PWM signal and the duty ratio of the second PWM signal may be adjusted according to actual load power requirements, for example, the duty ratios of 45%, 38%, 20%, etc. may be set according to actual requirements. The bridge circuit includes, but is not limited to, an H-bridge driver circuit.
Through the steps, two bridge arms of the bridge circuit are balanced with each other and are consistent in conduction time during power reduction processing by changing the driving mode of the bridge circuit, so that the maximization of the conversion efficiency of the transducer is realized during the power reduction processing, the synchronous reduction of the temperature rise of the MOS tube is realized, the size of the MOS tube radiator is reduced, the design cost is reduced, the technical effect of improving the reliability of the circuit is realized, and the technical problems that one bridge arm of the bridge circuit is too long in conduction time and the MOS tube is easily burnt due to too high temperature during the power reduction processing are solved.
In an alternative embodiment, adjusting the driving signals of each leg of the bridge circuit includes: controlling the first PWM signal to output a high level, controlling the second PWM signal to output a low level and setting a first timer to start timing; judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, controlling the first PWM signal to convert and output a low level, continuously outputting the low level by the second PWM signal, setting the first timer to zero, and starting timing by the second timer; and when the timing time of the first timer is less than or equal to the conduction time of the MOS tube corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm.
In an alternative embodiment, adjusting the driving signals of each leg of the bridge circuit includes: after the first PWM signal is controlled to convert and output a low level, and the second PWM signal continues to output the low level, judging whether the timing time of the second timer is greater than a preset time, wherein the preset time is obtained according to the conduction time of the MOS tube corresponding to the first bridge arm or the conduction time of the MOS tube of the second bridge arm and a driving period; when the timing time of the second timer is longer than the preset time, controlling the first PWM signal to continuously output a low level, converting the second PWM signal to output a high level, setting the second timer to zero, and starting timing by the first timer; and when the timing time of the second timer is less than or equal to the preset time, continuously judging whether the timing time of the second timer is greater than the preset time.
In an alternative embodiment, adjusting the driving signals of each leg of the bridge circuit includes: after the first PWM signal is controlled to continuously output a low level and the second PWM signal is converted to output a high level, judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm; when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, controlling the first PWM signal to convert and output a low level, continuously outputting the low level by the second PWM signal, setting the first timer to zero, and starting timing by the second timer; and when the timing time of the first timer is less than or equal to the conduction time of the MOS tube corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm.
In an alternative embodiment, adjusting the driving signal of each leg of the bridge circuit further includes: after the first PWM signal is controlled to convert and output a low level and the second PWM signal continues to output the low level, judging whether the timing time of the second timer is greater than the preset time; when the timing time of the second timer is longer than the preset time, continuously controlling the first PWM signal to output a high level and the second PWM signal to output a low level and setting the first timer to start timing; and when the timing time of the second timer is less than or equal to the preset time, continuously judging whether the timing time of the second timer is greater than the preset time.
In an optional implementation manner, before controlling the first PWM signal to output a high level and the second PWM signal to output a low level, the method further includes: acquiring the duty ratio of each driving signal; acquiring a driving period of each driving signal, wherein the driving period corresponding to the first PWM signal is the same as the driving period corresponding to the second PWM signal; and determining the conduction time of the MOS tube of the bridge circuit according to the duty ratio and the driving period, wherein the conduction time of the MOS tube corresponding to the first bridge arm is the same as the conduction time of the MOS tube of the second bridge arm.
An alternative embodiment of the invention is described in detail below.
FIG. 4 is a schematic topological diagram of an ultrasonic transducer according to an alternative embodiment of the present invention to achieve target power control, as shown in FIG. 4. Fig. 5 is a schematic circuit diagram of a bridge circuit driver according to an alternative embodiment of the present invention, as shown in fig. 5, wherein Q1 and Q3 constitute a first bridge arm, Q2 and Q4 constitute a second bridge arm, and when PWM1 (corresponding to the first PWM signal) outputs a high level, the first bridge arm is turned on, and the step-up transformer is turned on in a forward direction to output a positive voltage; when the PWM2 (corresponding to the second PWM signal) outputs a high level, the second bridge arm is turned on, the step-up transformer is turned on in the reverse direction, and a negative voltage is output; in addition, Y1 is an ultrasonic transducer, and forms a resonant network with the inductor L2.
Fig. 6 is a schematic diagram of driving waveforms of PWM1 and PWM2 during new power reduction processing, as shown in fig. 6, the duty ratios are both 30%, and this driving method makes the positive and negative voltage maintaining time of the secondary output voltage of the step-up transformer the same and center-symmetric, and the conversion efficiency of the resonant network is kept maximum at this time, and the input power and the ultrasonic output power are reduced synchronously only because the driving time is shortened.
Furthermore, by changing the driving mode of the bridge circuit, the maximization of the conversion efficiency of the energy converter is realized during the power reduction treatment, the conduction time of the MOS tubes of the first bridge arm and the second bridge arm is the same, the temperature rise is synchronously reduced, the size of the MOS tube radiator can be reduced, the design cost is reduced, and the reliability of the circuit is improved.
Fig. 7 is a logic block diagram during power down processing according to an alternative embodiment of the present invention, as shown in fig. 7, the specific implementation steps are as follows:
steps S701 and U3 are bridge circuit driving chips, and PWM1 and PWM2 are driving signals sent by the main chip, where PWM1 drives AHI and BLI, and PWM2 drives ALI and BHI, and the corresponding relationship of the logic truth table is as follows:
TABLE 1 logic truth table
AHI/BLI ALI/BHI ALO/BHO AHO/BLO
0 0 0 0
0 1 0 1
1 0 1 0
1 1 1 1
Step S702, when power down processing is required, target duty ratios D of the PWM1 and the PWM2 are obtained, and the on times are both D × T (T is a period of the driving signal, and in this driving period, the transducer can operate at its natural resonant frequency to achieve maximum ultrasonic output power).
In step S703, the PWM1 outputs high, the PWM2 outputs low, and the first timer starts counting.
And step S704, when the accumulated time T1 of the first timer is greater than D × T, the PWM1 switches to output low level, the PWM2 continues to output low level, the first timer is cleared, and the second timer starts to time. Note that if T1> D × T, the PWM1 switches from outputting high to outputting low; if T1 is not more than D × T, the PWM1 continues to output high level, so that the fast switching of the PWM1 from high level to low level is realized; during this process, the PWM2 continues to keep outputting low.
Step S705, when the accumulated time T2 of the second timer is greater than T/2-D T, the PWM1 continues to output low level, the PWM2 switches to output high level, the second timer is cleared, and the first timer starts to count time. Note that if T2> T/2-D × T, PWM2 transitions from outputting low to outputting high; if T2 is not more than T/2-D T, the PWM2 continues to output low level, so that the rapid switching of the PWM2 from low level to high level is realized; during this process, the PWM1 continues to keep outputting low.
Step S706, when the accumulated time T1 of the first timer is greater than D × T, the PWM1 continues to output low level, the PWM2 switches to output low level, the first timer is cleared, and meanwhile the second timer starts to time. Note that if T1> D × T, the PWM2 switches from outputting high to outputting low; if T1 is not more than D × T, the PWM2 continues to output high level, so that the fast switching of the PWM2 from high level to low level is realized; during this process, the PWM1 continues to keep outputting low.
In step S707, when the second timer cumulative time T2> T/2-D × T, the process returns to step S703. When T2> T/2-D × T, the PWM1 outputs high, the PWM2 outputs low, and the first timer starts counting.
It should be noted that, in the above embodiment, by changing the driving mode of the bridge circuit, the maximization of the conversion efficiency of the transducer is realized during the power reduction processing, the input power is synchronously reduced, and the energy saving and environmental protection are realized; and the conduction time of the MOS tubes of the first bridge arm and the second bridge arm is the same, the temperature rise is synchronously reduced, the volume of the MOS tube radiator can be reduced, the design cost is reduced, and the reliability of the circuit is improved.
Example 2
According to another aspect of the embodiments of the present invention, there is also provided a driving apparatus of a bridge circuit, fig. 8 is a schematic diagram of the driving apparatus of the bridge circuit according to the embodiments of the present invention, as shown in fig. 8, the driving apparatus of the bridge circuit includes: an adjustment module 82 and a drive module 84. The driving device of the bridge circuit will be described in detail below.
The adjusting module 82 is configured to adjust driving signals of each bridge arm of the bridge circuit, where a driving signal of a first bridge arm of the bridge circuit is a first Pulse Width Modulation (PWM) signal, a driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and a duty ratio of the first PWM signal is the same as a duty ratio of the second PWM signal; the driving module 84 is connected to the adjusting module 82, and configured to drive the bridge circuit according to the first PWM signal and the second PWM signal.
It should be noted that the above modules may be implemented by software or hardware, for example, for the latter, the following may be implemented: the modules can be located in the same processor; and/or the modules are located in different processors in any combination.
In the above embodiment, the driving device of the bridge circuit can make the two bridge arms of the bridge circuit balanced with each other and have the same conduction time during power down processing by changing the driving mode of the bridge circuit, thereby realizing the maximization of the conversion efficiency of the transducer during power down processing, realizing the synchronous reduction of the temperature rise of the MOS transistor, reducing the volume of the MOS transistor radiator, reducing the design cost, and improving the technical effect of the reliability of the circuit, and further solving the technical problems that one bridge arm of the bridge circuit has too long conduction time and the MOS transistor is easily burnt due to too high temperature during power down processing.
It should be noted here that the adjusting module 82 and the driving module 84 correspond to steps S302 to S304 in embodiment 1, and the modules are the same as the examples and application scenarios realized by the corresponding steps, but are not limited to the disclosure of embodiment 1.
Optionally, the adjusting module 82 includes: the first control unit is used for controlling the first PWM signal to output a high level, the second PWM signal to output a low level and setting a first timer to start timing; the first judgment unit is used for judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm; the first processing unit is used for controlling the first PWM signal to convert and output a low level and the second PWM signal to continuously output the low level when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, and setting the first timer to zero and the second timer to start timing; and the second processing unit is used for continuously judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm or not when the timing time of the first timer is less than or equal to the conduction time of the MOS tube corresponding to the first bridge arm.
Optionally, the adjusting module 82 includes: the second judgment unit is used for judging whether the timing time of the second timer is greater than the preset time after controlling the first PWM signal to convert and output the low level and the second PWM signal to continuously output the low level, wherein the preset time is obtained according to the conduction time of the MOS tube corresponding to the first bridge arm or the conduction time of the MOS tube of the second bridge arm and the driving period; the third processing unit is used for controlling the first PWM signal to continuously output a low level and the second PWM signal to convert and output a high level when the timing time of the second timer is greater than the preset time, setting the second timer to zero and starting timing by the first timer; and the fourth processing unit is used for continuously judging whether the timing time of the second timer is greater than the preset time or not when the timing time of the second timer is less than or equal to the preset time.
Optionally, the adjusting module 82 includes: the third judging unit is used for judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm or not after controlling the first PWM signal to continuously output the low level and the second PWM signal to convert and output the high level; the fifth processing unit is used for controlling the first PWM signal to convert and output a low level and the second PWM signal to continuously output the low level when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, and setting the first timer to zero and the second timer to start timing; and the sixth processing unit is used for continuously judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm or not when the timing time of the first timer is less than or equal to the conduction time of the MOS tube corresponding to the first bridge arm.
Optionally, the adjusting module 82 further includes: the fourth judging unit is used for judging whether the timing time of the second timer is greater than the preset time or not after controlling the first PWM signal to convert and output the low level and the second PWM signal to continuously output the low level; the seventh processing unit is used for continuously controlling the first PWM signal to output a high level and the second PWM signal to output a low level and setting the first timer to start timing when the timing time of the second timer is greater than the preset time; and the eighth processing unit is used for continuously judging whether the timing time of the second timer is greater than the preset time or not when the timing time of the second timer is less than or equal to the preset time.
Optionally, the adjusting module 82 further includes: the first acquisition unit is used for acquiring the duty ratio of each driving signal before controlling the first PWM signal to output a high level and the second PWM signal to output a low level; the second acquisition unit is used for acquiring the driving period of each driving signal, wherein the driving period corresponding to the first PWM signal is the same as the driving period corresponding to the second PWM signal; and the determining unit is used for determining the conduction time of the MOS tube of the bridge circuit according to the duty ratio and the driving period, wherein the conduction time of the MOS tube corresponding to the first bridge arm is the same as the conduction time of the MOS tube of the second bridge arm.
Example 3
According to another aspect of the embodiments of the present invention, there is also provided a control system, which includes an ultrasonic transducer and a bridge circuit driving chip connected thereto, wherein the bridge circuit driving chip is used for running a program, and when the program is running, the method for driving the bridge circuit in any one of the above-mentioned items is executed.
Example 4
According to another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium including a stored program, wherein when the program runs, the apparatus on which the computer-readable storage medium is located is controlled to execute the driving method of the bridge circuit in any one of the above.
Example 5
According to another aspect of embodiments of the present invention, there is also provided an ultrasonic apparatus including a memory in which a computer program is stored, and a processor configured to execute the driving method of the bridge circuit of any one of the above through the computer program.
The ultrasonic device includes, but is not limited to, an ultrasonic transducer, a home appliance to which the ultrasonic transducer is attached, and the like.
Example 6
According to another aspect of the embodiments of the present invention, there is also provided a processor for executing a program, wherein the program executes the method for driving a bridge circuit according to any one of the above.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (10)

1. A method of driving a bridge circuit, comprising:
adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signal of a first bridge arm of the bridge circuit is a first Pulse Width Modulation (PWM) signal, the driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and the duty ratio of the first PWM signal is the same as that of the second PWM signal;
and driving the bridge circuit according to the first PWM signal and the second PWM signal.
2. The method of claim 1, wherein adjusting the drive signals for each leg of the bridge circuit comprises:
controlling the first PWM signal to output a high level, controlling the second PWM signal to output a low level and setting a first timer to start timing;
judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm;
when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, controlling the first PWM signal to convert and output a low level, continuously outputting the low level by the second PWM signal, setting the first timer to zero, and starting timing by the second timer;
and when the timing time of the first timer is less than or equal to the conduction time of the MOS tube corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm.
3. The method of claim 2, wherein adjusting the drive signals for each leg of the bridge circuit comprises:
after the first PWM signal is controlled to convert and output a low level, and the second PWM signal continues to output the low level, judging whether the timing time of the second timer is greater than a preset time, wherein the preset time is obtained according to the conduction time of the MOS tube corresponding to the first bridge arm or the conduction time of the MOS tube of the second bridge arm and a driving period;
when the timing time of the second timer is longer than the preset time, controlling the first PWM signal to continuously output a low level, converting the second PWM signal to output a high level, setting the second timer to zero, and starting timing by the first timer;
and when the timing time of the second timer is less than or equal to the preset time, continuously judging whether the timing time of the second timer is greater than the preset time.
4. The method of claim 3, wherein adjusting the drive signals for each leg of the bridge circuit comprises:
after the first PWM signal is controlled to continuously output a low level and the second PWM signal is switched to output a high level, judging whether the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm;
when the timing time of the first timer is longer than the conduction time of the MOS tube corresponding to the first bridge arm, controlling the first PWM signal to convert and output a low level, continuously outputting the low level by the second PWM signal, setting the first timer to zero, and starting timing by the second timer;
and when the timing time of the first timer is less than or equal to the conduction time of the MOS tube corresponding to the first bridge arm, continuously judging whether the timing time of the first timer is greater than the conduction time of the MOS tube corresponding to the first bridge arm.
5. The method of claim 4, wherein adjusting the drive signals for each leg of the bridge circuit further comprises:
after the first PWM signal is controlled to be converted to output a low level and the second PWM signal continues to output the low level, judging whether the timing time of the second timer is greater than the preset time;
when the timing time of the second timer is longer than the preset time, continuing to control the first PWM signal to output a high level and the second PWM signal to output a low level and setting the first timer to start timing;
and when the timing time of the second timer is less than or equal to the preset time, continuously judging whether the timing time of the second timer is greater than the preset time.
6. The method of claim 2, further comprising, before controlling the first PWM signal to output a high level and the second PWM signal to output a low level:
acquiring the duty ratio of each driving signal;
acquiring a driving period of each driving signal, wherein the driving period corresponding to the first PWM signal is the same as the driving period corresponding to the second PWM signal;
and determining the conduction time of the MOS tube of the bridge circuit according to the duty ratio and the driving period, wherein the conduction time of the MOS tube corresponding to the first bridge arm is the same as the conduction time of the MOS tube of the second bridge arm.
7. A driving apparatus for a bridge circuit, comprising:
the adjusting module is used for adjusting driving signals of all bridge arms of a bridge circuit, wherein the driving signal of a first bridge arm of the bridge circuit is a first Pulse Width Modulation (PWM) signal, the driving signal of a second bridge arm of the bridge circuit is a second PWM signal, and the duty ratio of the first PWM signal is the same as that of the second PWM signal;
and the driving module is used for driving the bridge circuit according to the first PWM signal and the second PWM signal.
8. A control system, characterized in that the control system comprises an ultrasonic transducer and a bridge circuit driving chip connected with the ultrasonic transducer, wherein the bridge circuit driving chip is used for running a program, and wherein the program runs to execute the driving method of the bridge circuit according to any one of claims 1 to 6.
9. A computer-readable storage medium, comprising a stored program, wherein when the program runs, the computer-readable storage medium controls an apparatus to execute the driving method of the bridge circuit according to any one of claims 1 to 6.
10. An ultrasonic apparatus, characterized in that the ultrasonic apparatus comprises a memory in which a computer program is stored and a processor arranged to execute the method of driving the bridge circuit according to any one of claims 1 to 6 by means of the computer program.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000074222A1 (en) * 1999-05-27 2000-12-07 Hitachi, Ltd. H-type bridge circuit and integrated circuit
CN103647437A (en) * 2013-10-28 2014-03-19 青岛艾迪森科技有限公司 High-voltage high-current IGBT driving system
CN111509954A (en) * 2020-05-26 2020-08-07 深圳市雷能混合集成电路有限公司 Correction control method and device for pulse width modulation signal and switching power supply
CN111987914A (en) * 2020-08-03 2020-11-24 哈尔滨工程大学 Isolated full-bridge converter
CN213342022U (en) * 2020-11-03 2021-06-01 深圳市大能创智半导体有限公司 Power circuit and power module

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000074222A1 (en) * 1999-05-27 2000-12-07 Hitachi, Ltd. H-type bridge circuit and integrated circuit
CN103647437A (en) * 2013-10-28 2014-03-19 青岛艾迪森科技有限公司 High-voltage high-current IGBT driving system
CN111509954A (en) * 2020-05-26 2020-08-07 深圳市雷能混合集成电路有限公司 Correction control method and device for pulse width modulation signal and switching power supply
CN111987914A (en) * 2020-08-03 2020-11-24 哈尔滨工程大学 Isolated full-bridge converter
CN213342022U (en) * 2020-11-03 2021-06-01 深圳市大能创智半导体有限公司 Power circuit and power module

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