CN114203855A - Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same - Google Patents
Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same Download PDFInfo
- Publication number
- CN114203855A CN114203855A CN202010989107.9A CN202010989107A CN114203855A CN 114203855 A CN114203855 A CN 114203855A CN 202010989107 A CN202010989107 A CN 202010989107A CN 114203855 A CN114203855 A CN 114203855A
- Authority
- CN
- China
- Prior art keywords
- silicon wafer
- manufacturing
- solution
- mass percentage
- composite
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 72
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 72
- 239000010703 silicon Substances 0.000 title claims abstract description 72
- 239000002131 composite material Substances 0.000 title claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 238000000034 method Methods 0.000 claims abstract description 35
- 238000005260 corrosion Methods 0.000 claims abstract description 23
- 230000007797 corrosion Effects 0.000 claims abstract description 23
- 239000012670 alkaline solution Substances 0.000 claims description 27
- 239000000243 solution Substances 0.000 claims description 26
- 239000003929 acidic solution Substances 0.000 claims description 25
- 239000000654 additive Substances 0.000 claims description 25
- 230000000996 additive effect Effects 0.000 claims description 25
- 238000005530 etching Methods 0.000 claims description 20
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- 239000002923 metal particle Substances 0.000 claims description 13
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 12
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 12
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 9
- 239000000126 substance Substances 0.000 claims description 8
- 229910021645 metal ion Inorganic materials 0.000 claims description 7
- 239000004115 Sodium Silicate Substances 0.000 claims description 6
- 230000003197 catalytic effect Effects 0.000 claims description 6
- 239000007800 oxidant agent Substances 0.000 claims description 6
- NTHWMYGWWRZVTN-UHFFFAOYSA-N sodium silicate Chemical compound [Na+].[Na+].[O-][Si]([O-])=O NTHWMYGWWRZVTN-UHFFFAOYSA-N 0.000 claims description 6
- 229910052911 sodium silicate Inorganic materials 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 6
- 239000002253 acid Substances 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 5
- 229910017604 nitric acid Inorganic materials 0.000 claims description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- 108091005804 Peptidases Proteins 0.000 claims description 3
- 239000004365 Protease Substances 0.000 claims description 3
- 102100037486 Reverse transcriptase/ribonuclease H Human genes 0.000 claims description 3
- 239000002736 nonionic surfactant Substances 0.000 claims description 3
- 238000003486 chemical etching Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 8
- 238000002161 passivation Methods 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000013082 photovoltaic technology Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Weting (AREA)
Abstract
The invention provides a silicon wafer composite suede manufacturing method and a silicon wafer manufactured by the method, based on the silicon wafer composite suede manufacturing method provided by the invention, inverted pyramid corrosion pits can be formed at the top of a regular pyramid structure on the surface of the silicon wafer, namely, a composite suede formed by the regular pyramid structure and the inverted pyramid corrosion pits is formed on the surface of the obtained silicon wafer, and the composite suede has the advantages of good passivation effect of the regular pyramid and high open voltage in a scene of being particularly applied to a solar cell; the method also has the advantages of good light trapping effect of the inverted pyramid, high current, large contact area with the electrode and small contact resistance.
Description
Technical Field
The invention relates to the field of photovoltaic manufacturing, in particular to a method for manufacturing a silicon wafer composite suede and a silicon wafer manufactured by the method.
Background
With the development of photovoltaic technology, the requirements for the photoelectric conversion efficiency of solar cells are continuously improved. In the aspect of silicon wafer texture, the space for optimizing the regular pyramid texture is small. In recent years, an inverted pyramid textured surface is proposed as a more effective light trapping structure, which can enable incident light to be reflected on the surface of a silicon wafer for multiple times, increase the absorption of the silicon wafer on the incident light, reduce reflection, and accordingly improve the short-circuit current of corresponding solar cells. However, the inverted pyramid has a deeper depth, so that the passivation effect is inferior to that of the regular pyramid, the open-circuit voltage of the corresponding solar cell is lost, the overall efficiency is not obviously improved compared with that of the solar cell formed by the regular pyramid textured silicon wafer, and the power of the module is not facilitated.
In view of the above, there is a need to provide an improved solution to the above problems.
Disclosure of Invention
The invention aims to at least solve one technical problem in the prior art, and provides a method for manufacturing a silicon wafer composite suede to achieve the aim.
A method for manufacturing a silicon wafer composite suede comprises the following steps:
s1, placing the silicon wafer in a first alkaline solution for anisotropic etching treatment, and forming a positive pyramid structure on the surface of the silicon wafer;
s2, placing the silicon wafer with the positive pyramid structure in a first acid solution containing metal ions for metal selective deposition, and depositing metal particles on the top of the positive pyramid;
s3, placing the silicon wafer deposited with the metal particles in a second acidic solution for metal catalytic chemical corrosion, and forming a nano-scale corrosion pit on the top of the regular pyramid;
and S4, placing the silicon wafer with the nano-scale corrosion pits in a second alkaline solution for etching again, so that the nano-scale corrosion pits are enlarged into submicron inverted pyramid corrosion pits.
Further, the first alkaline solution comprises a NaOH solution or a KOH solution with the mass percentage concentration of 1% -10%.
Further, the first alkaline solution also comprises a first auxiliary additive, wherein the first auxiliary additive comprises 1-10% by mass of isopropanol or ethanol, 1-10% by mass of tetramethylammonium hydroxide and 1-10% by mass of sodium silicate.
Further, in the step S1, the temperature of the first alkaline solution is 50-85 ℃, and the time of the anisotropic etching treatment is 200-600S.
Further, the metal ions include Au+、Ag+、Cu2+、Pt2+、Ni2+Or Pd2+At least one of (1).
Further, the first acidic solution comprises an HF solution with a mass percentage concentration of 1% -5%.
Further, the first acidic solution also comprises a second auxiliary additive, and the second auxiliary additive comprises 1-10% by mass of protease and 5-10% by mass of nonionic surfactant.
Further, in the step S2, the temperature of the first acidic solution is 20 to 40 ℃, and the time for selective deposition of the metal is 20 to 200S.
Further, the second acidic solution comprises an HF solution with the mass percent concentration of 5% -20% and an oxidant with the mass percent concentration of 1% -10%, wherein the oxidant comprises H2O2、HNO3And ozonated water.
Further, in the step S3, the temperature of the second acidic solution is 20-40 ℃, and the time of the metal catalytic chemical corrosion is 20-200S.
Further, the second alkaline solution comprises a NaOH solution or a KOH solution with the mass percentage concentration of 1% -10%.
Further, the second alkaline solution also comprises a third auxiliary additive, wherein the third auxiliary additive comprises 1-10% by mass of isopropanol or ethanol, 1-10% by mass of tetramethylammonium hydroxide and 1-10% by mass of sodium silicate.
Further, in the step S4, the temperature of the second alkaline solution is 50-70 ℃, and the time for the metal to catalyze the chemical corrosion is 200-600S.
Further, the step of S4 is followed by the step of S5: and placing the silicon wafer in a third acid solution for cleaning.
Further, the third acidic solution comprises HNO with the mass percent concentration of 20-50%3Or 10-30ppm ozone water.
Further, in the step S5, the temperature of the third acidic solution is 20-40 ℃, and the cleaning time is 100-300S.
The invention also provides a silicon wafer which is manufactured by the silicon wafer composite suede manufacturing method.
The invention has the beneficial effects that: based on the method for manufacturing the silicon wafer composite texture surface, the inverted pyramid corrosion pits can be formed at the tops of the regular pyramid structures on the surface of the silicon wafer, namely the obtained silicon wafer surface is provided with the composite texture surface formed by the regular pyramid structures and the inverted pyramid corrosion pits, and the composite texture surface has the advantages of good passivation effect of the regular pyramid and high open pressure in a scene of being particularly applied to solar cells; the method also has the advantages of good light trapping effect of the inverted pyramid, high current, large contact area with the electrode and small contact resistance.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts. The front and back sides referred to herein are only defined with respect to the positional relationship in the drawings of the embodiments, that is, the front side corresponds to the upper surface of the drawings, and the back side corresponds to the lower surface of the drawings.
FIG. 1 is a schematic diagram showing the specific steps of the method for manufacturing the silicon wafer composite texture surface;
FIG. 2 is a schematic SEM diagram of a silicon wafer processed by step S1;
FIG. 3 is a schematic SEM diagram of a silicon wafer after selective metal deposition in S2;
FIG. 4 is a SEM diagram of a silicon wafer processed by step S4.
In the figure, 100 is a silicon wafer, 11 is a positive pyramid, 110 is a nano-scale etching pit, 12 is a submicron inverted pyramid etching pit, and 200 is a metal particle.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, the method for manufacturing the silicon wafer composite texture surface provided by the invention comprises the following steps:
s1, placing the silicon wafer 100 in a first alkaline solution to perform an anisotropic etching process, so as to form a positive pyramid 11 structure on the surface of the silicon wafer 100, which can refer to the structure shown in fig. 2.
S2, placing the silicon wafer 100 with the positive pyramid 11 structure in a first acidic solution containing metal ions for metal selective deposition, and depositing metal particles 200 on the tops of the positive pyramids 11, as shown in fig. 3.
S3, placing the silicon wafer 100 deposited with the metal particles 200 in a second acidic solution for metal catalytic chemical corrosion, and forming the nano-scale corrosion pits 110 on the tops of the regular pyramids 11.
S4, the silicon wafer 100 with the nano-scale etching pits 110 formed thereon is placed in the second alkaline solution and etched again, so that the nano-scale etching pits 110 are enlarged into sub-micron-scale inverted pyramid etching pits 12, as shown in fig. 4.
It is to be understood that, for the convenience of illustration, in fig. 1, the silicon wafer 100 structure obtained in the steps S2, S3, and S4 is only partially illustrated, and each illustrated portion matches with the position corresponding to the portion a.
The invention also provides a silicon wafer which is manufactured by the silicon wafer composite suede manufacturing method.
Based on the method for manufacturing the silicon wafer composite texture surface, the inverted pyramid corrosion pits 12 can be formed at the tops of the regular pyramid 11 structures on the surface of the silicon wafer, namely the composite texture surface formed by the regular pyramid 11 structures and the inverted pyramid corrosion pits 12 is formed on the surface of the obtained silicon wafer 100, and the composite texture surface has the advantages of good passivation effect of the regular pyramid and high open voltage in a scene of being particularly applied to a solar cell; the method also has the advantages of good light trapping effect of the inverted pyramid, high current, large contact area with the electrode and small contact resistance. In the specific implementation process, the inverted pyramid etching pits 12 are formed at the top ends of the regular pyramids 11, so that the passivation effect on the solar cell fabricated by the silicon wafer 100 is small.
In more specific embodiments, the first alkaline solution comprises a NaOH solution or KOH solution with a concentration of 1% to 10% by weight. Preferably, the first alkaline solution further comprises a first auxiliary additive, wherein the first auxiliary additive comprises isopropanol or ethanol with a mass percentage concentration of 1-10%, tetramethylammonium hydroxide with a mass percentage concentration of 1-10%, and sodium silicate with a mass percentage concentration of 1-10%.
In the first alkaline solution having the first auxiliary additive of the present invention, the first auxiliary additive may control a reaction rate of the anisotropic etching process, thereby making the pyramid 11 structure on the surface of the silicon wafer 100 relatively more uniform.
Further, in the step S1, the temperature of the first alkaline solution is 50-85 ℃, and the time of the anisotropic etching treatment is 200-600S.
Typically, the metal ions involved in step S2 include Au+、Ag+、Cu2+、Pt2+、Ni2+Or Pd2+At least one of (1). Based on these metal ions, the metal particles 200 deposited on top of the positive pyramids 12 may be Au, Ag, Cu, Pt, Ni, or Pd particles, respectively.
The first acidic solution involved in step S2 includes a HF solution having a concentration of 1% -5% by mass. Preferably, the first acidic solution further comprises a second auxiliary additive, wherein the second auxiliary additive comprises protease with a mass percentage concentration of 1% -10% and a nonionic surfactant with a mass percentage concentration of 5% -10%.
In step S2, the deposition rate of the metal particles 200 at the top of the positive pyramids 11 is much greater than that at other positions due to the structural characteristics of the positive pyramids. The first auxiliary additive provided in this embodiment can suppress the deposition rate of the metal particles 200 on the surface of the silicon wafer 100, and the deposition suppression effect of the metal particles 200 at the top of the positive pyramids 11 is limited during the specific action, so that most of the metal particles 200 are deposited on the tops of the positive pyramids 11, as shown in fig. 3.
In the specific implementation process, in the step S2, the temperature of the first acidic solution is 20-40 ℃, and the time for selective deposition of the metal is 20-200S.
In some embodiments of the present invention, the second acidic solution involved in the step S3 includes 5-20% by mass of HF solution and 1-10% by mass of an oxidizing agent, and the oxidizing agent includes H2O2、HNO3And ozonated water. Preferably, in the step of S3, the temperature of the second acidic solution is 20-40 ℃, and the time for metal catalytic chemical corrosion is 20-200S.
In the step S4 of the present invention, the second alkaline solution includes NaOH solution or KOH solution with a mass percentage concentration of 1% -10%. Preferably, the second alkaline solution further comprises a third auxiliary additive, and the third auxiliary additive comprises isopropanol or ethanol with a mass percentage concentration of 1-10%, tetramethylammonium hydroxide with a mass percentage concentration of 1-10%, and sodium silicate with a mass percentage concentration of 1-10%. In specific implementation, the proportion of the additive can be completely consistent with that of the first auxiliary additive.
In step S4, due to the existence of the nano-scale etching pits 110, the top of the positive pyramid 12 is more loose relative to other positions, so that the etching rate of the second alkaline solution is faster relative to other positions when the top of the positive pyramid 12 is aligned, and further, the sub-micron inverse pyramid etching pits 12 can be formed on the basis of the nano-scale etching pits 110, as shown in fig. 4. In the second alkaline solution having the third auxiliary additive according to the present invention, the third auxiliary additive can optimize the reaction rate of the etching process, thereby preventing the positive pyramids 11 from being excessively corroded at other positions except the top.
In some embodiments of the present invention, the temperature of the second alkaline solution in the step S4 is 50-70 ℃, and the time for the metal to catalyze the chemical corrosion is 200-600S.
In still other embodiments of the present invention, the step of S4 is followed by the step of S5: and (4) putting the silicon wafer into a third acid solution for cleaning. The metal particles 200 and other metal impurities on the surface of the silicon wafer 100 can be removed by the process of S5, so that the silicon wafer 100 has a cleaner surface.
In specific implementation, the third acidic solution comprises 20-50% by mass of HNO3Or 10-30ppm ozone water. Preferably, in the step S5, the temperature of the third acidic solution is 20-40 ℃, and the washing time is 100-300S.
The above-listed detailed description is only a specific description of a possible embodiment of the present invention, and they are not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention should be included in the scope of the present invention.
Claims (17)
1. A method for manufacturing a silicon wafer composite suede is characterized by comprising the following steps:
s1, placing the silicon wafer in a first alkaline solution for anisotropic etching treatment, and forming a positive pyramid structure on the surface of the silicon wafer;
s2, placing the silicon wafer with the positive pyramid structure in a first acid solution containing metal ions for metal selective deposition, and depositing metal particles on the top of the positive pyramid;
s3, placing the silicon wafer deposited with the metal particles in a second acidic solution for metal catalytic chemical corrosion, and forming a nano-scale corrosion pit on the top of the regular pyramid;
and S4, placing the silicon wafer with the nano-scale corrosion pits in a second alkaline solution for etching again, so that the nano-scale corrosion pits are enlarged into submicron inverted pyramid corrosion pits.
2. The method for manufacturing the composite suede of the silicon wafer as claimed in claim 1, wherein the first alkaline solution comprises a NaOH solution or a KOH solution with a mass percentage concentration of 1% -10%.
3. The method for manufacturing the composite suede of the silicon wafer as claimed in claim 2, wherein the first alkaline solution further comprises a first auxiliary additive, and the first auxiliary additive comprises isopropanol or ethanol with a mass percentage concentration of 1-10%, tetramethylammonium hydroxide with a mass percentage concentration of 1-10%, and sodium silicate with a mass percentage concentration of 1-10%.
4. The method as claimed in any one of claims 1 to 3, wherein in the step S1, the temperature of the first alkaline solution is 50-85 ℃, and the time of the anisotropic etching treatment is 200-600S.
5. The method of claim 1, wherein the metal ions comprise Au+、Ag+、Cu2+、Pt2+、Ni2+Or Pd2+At least one of (1).
6. The method for manufacturing the composite suede of the silicon wafer as claimed in claim 5, wherein the first acidic solution comprises an HF solution with a mass percentage concentration of 1% -5%.
7. The method for manufacturing the composite suede of the silicon wafer as claimed in claim 6, wherein the first acidic solution further comprises a second auxiliary additive, and the second auxiliary additive comprises protease with the mass percentage concentration of 1-10% and a nonionic surfactant with the mass percentage concentration of 5-10%.
8. The method for manufacturing the silicon wafer composite suede according to any one of claims 1, 5, 6 or 7, wherein in the step S2, the temperature of the first acidic solution is 20-40 ℃, and the time for selective deposition of metal is 20-200S.
9. The method for manufacturing a composite texture surface of a silicon wafer as claimed in claim 1, wherein the second acidic solution comprises 5-20% by mass of HF solution and 1-10% by mass of an oxidizing agent, and the oxidizing agent comprises H2O2、HNO3And ozonated water.
10. The method for manufacturing the silicon wafer composite suede according to claim 1 or 9, wherein in the step S3, the temperature of the second acidic solution is 20-40 ℃, and the time of the metal catalytic chemical corrosion is 20-200S.
11. The method for manufacturing the composite suede of the silicon wafer as claimed in claim 1, wherein the second alkaline solution comprises a NaOH solution or a KOH solution with a mass percentage concentration of 1% -10%.
12. The method for manufacturing a composite suede of a silicon wafer as claimed in claim 11, wherein the second alkaline solution further comprises a third auxiliary additive, and the third auxiliary additive comprises isopropanol or ethanol with a mass percentage concentration of 1-10%, tetramethylammonium hydroxide with a mass percentage concentration of 1-10%, and sodium silicate with a mass percentage concentration of 1-10%.
13. The method as claimed in claim 1, 11 or 12, wherein in the step S4, the temperature of the second alkaline solution is 50-70 ℃, and the time for the metal to catalyze the chemical etching is 200-600S.
14. The method for manufacturing a silicon wafer composite suede according to claim 1, wherein the step of S4 is followed by a step of S5: and placing the silicon wafer in a third acid solution for cleaning.
15. The method for manufacturing a composite texture surface of a silicon wafer as claimed in claim 14, wherein the third acidic solution comprises HNO with a mass percentage concentration of 20-50%3Or 10-30ppm ozone water.
16. The method for fabricating a composite textured surface on a silicon wafer as claimed in claim 14 or 15, wherein in the step S5, the temperature of the third acidic solution is 20-40 ℃, and the cleaning time is 100-300S.
17. A silicon wafer, characterized in that it is manufactured by the method for manufacturing a silicon wafer composite texture surface according to any one of claims 1 to 16.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010989107.9A CN114203855A (en) | 2020-09-18 | 2020-09-18 | Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010989107.9A CN114203855A (en) | 2020-09-18 | 2020-09-18 | Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114203855A true CN114203855A (en) | 2022-03-18 |
Family
ID=80645152
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010989107.9A Pending CN114203855A (en) | 2020-09-18 | 2020-09-18 | Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114203855A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11887844B2 (en) | 2022-06-10 | 2024-01-30 | Zhejiang Jinko Solar Co., Ltd. | Solar cell and production method thereof, photovoltaic module |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106816487A (en) * | 2015-11-30 | 2017-06-09 | 苏州协鑫光伏科技有限公司 | Metal inducement catalytic reaction liquid and preparation method thereof and application |
| CN114551614A (en) * | 2020-11-24 | 2022-05-27 | 苏州阿特斯阳光电力科技有限公司 | Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same |
-
2020
- 2020-09-18 CN CN202010989107.9A patent/CN114203855A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106816487A (en) * | 2015-11-30 | 2017-06-09 | 苏州协鑫光伏科技有限公司 | Metal inducement catalytic reaction liquid and preparation method thereof and application |
| CN114551614A (en) * | 2020-11-24 | 2022-05-27 | 苏州阿特斯阳光电力科技有限公司 | Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same |
Non-Patent Citations (1)
| Title |
|---|
| 邹帅 等: ""全角度陷光的微-纳复合绒面单晶PERC太阳电池"", 《太阳能学报》, vol. 43, no. 7, pages 134 - 139 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11887844B2 (en) | 2022-06-10 | 2024-01-30 | Zhejiang Jinko Solar Co., Ltd. | Solar cell and production method thereof, photovoltaic module |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101962469B1 (en) | A method for producing a textured structure of a crystalline silicon solar cell | |
| US20170358695A1 (en) | Textured structure of crystalline silicon solar cell and preparation method thereof | |
| CN104195645B (en) | Acidic texturing solution for etching solar cell silicon wafer, texturing method, solar cell and manufacturing method thereof | |
| TWI431797B (en) | Solar cell with selective emitter and fabrications thereof | |
| CN105932080B (en) | Heterojunction solar battery and preparation method thereof | |
| CN103441182B (en) | The matte processing method of solar cell and solar cell | |
| CN116936687B (en) | Combined passivation back contact battery and post-texturing method for removing undercut residual mask layer | |
| WO2024221750A1 (en) | Back contact solar cell and method for preparing same | |
| CN113328012B (en) | PERC battery and manufacturing method for reducing composite rate | |
| CN106373862A (en) | Processing method applicable to wet cleaning of heterojunction cell | |
| CN113314626A (en) | Manufacturing method of solar cell | |
| JP2014511038A (en) | Manufacturing method of solar cell | |
| CN109473487B (en) | Crystalline silicon solar cell based on composite light trapping structure and preparation method thereof | |
| CN114005908A (en) | Solar cell and preparation method thereof | |
| CN114447142B (en) | N-type TOPCON solar cell and manufacturing method thereof | |
| KR101212896B1 (en) | Texturing of multicrystalline silicon for solar cell using an acidic solution | |
| CN111509089A (en) | Double-sided solar cell and manufacturing method thereof | |
| CN104630900A (en) | Surface texturing processing method of monocrystalline silicon solar cell | |
| CN114203855A (en) | Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same | |
| CN113013293A (en) | Preparation method of heterojunction battery | |
| CN114551614B (en) | Silicon wafer composite suede manufacturing method and silicon wafer manufactured by same | |
| CN116646424A (en) | Silicon-based solar cell and preparation method thereof | |
| CN114792740B (en) | Preparation method of semiconductor substrate layer and preparation method of solar cell | |
| CN104409564A (en) | N-type nanometer black silicon manufacturing method and solar cell manufacturing method | |
| CN111211199B (en) | Preparation method of efficient IBC battery |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |