CN114203097A

CN114203097A - Display panel under spread spectrum and driving method thereof

Info

Publication number: CN114203097A
Application number: CN202210078901.7A
Authority: CN
Inventors: 耿启育; 张书豪; 杜明鸿; 洪志豪; 陈雅芳; 杨智翔
Original assignee: AU Optronics Corp
Current assignee: AU Optronics Corp
Priority date: 2021-10-06
Filing date: 2022-01-24
Publication date: 2022-03-18
Anticipated expiration: 2042-01-24
Also published as: TW202316398A; TWI789942B; CN114203097B

Abstract

A driving method of a display panel under spread spectrum. The driving method of the display panel under the spread spectrum includes the following steps. A clock signal (GCLK) is spread so that a clock frequency of the clock signal is periodically modulated at a plurality of scan lines. The clock frequency of the clock signal is controlled to be complementary at the corresponding position of a first picture and a second picture so as to make the brightness of the first picture and the second picture complementary at the corresponding position.

Description

Display panel under spread spectrum and driving method thereof

Technical Field

The present invention relates to a display panel and a driving method thereof, and more particularly, to a display panel under spread spectrum and a driving method thereof.

Background

With the development of display technology, various display panels are continuously being developed. In the driving process of the display panel, each scanning line is driven by a clock signal (GCLK). And, the brightness of each scan line is controlled by a pulse width modulation signal (PWM).

In order to improve the phenomenon of electromagnetic interference, researchers have proposed a spread spectrum technique to eliminate the electromagnetic interference. However, researchers have found that in the spread spectrum technique, the display panel may have water ripples, which seriously affect the display quality.

Disclosure of Invention

The invention relates to a display panel under spread spectrum and a driving method thereof, which controls the clock pulse frequency of a clock pulse signal to be complementary at the corresponding positions of a first picture and a second picture so as to make the brightness of the first picture and the second picture complementary at the corresponding positions. Under the phenomenon of persistence of vision, the user can feel stable brightness without water wave.

According to an aspect of the present invention, a driving method of a display panel at spread spectrum is provided. The driving method of the display panel includes the following steps. A clock signal (GCLK) is spread so that a clock frequency of the clock signal is periodically modulated at a plurality of scan lines. The clock frequency of the clock signal is controlled to be complementary at the corresponding position of a first picture and a second picture so as to make the brightness of the first picture and the second picture complementary at the corresponding position.

According to another aspect of the present invention, a display panel at spread spectrum is provided. The display panel comprises a frequency spreading circuit and a control circuit. The spread spectrum circuit is used for spreading a clock signal (GCLK) so that a clock frequency of the clock signal is periodically modulated at a plurality of scanning lines. The control circuit is used for controlling the clock pulse frequency of the clock pulse signal to be complementary at the corresponding position of a first picture and a second picture so as to make the brightness of the first picture and the second picture complementary at the corresponding position.

The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.

Drawings

FIG. 1 is a diagram illustrating a relationship between a clock signal (GCLK) and a pulse width modulation signal (PWM) according to an embodiment.

FIG. 2 is a schematic diagram of a display panel according to an embodiment.

FIG. 3 is a diagram illustrating a relationship between brightness of a first frame and brightness of a second frame according to an embodiment.

FIG. 4 is a flowchart illustrating a driving method of a display panel according to an embodiment.

Fig. 5 illustrates an example of step S120.

Fig. 6 illustrates another example of step S120.

Fig. 7 illustrates another example of step S120.

Fig. 8 illustrates another example of step S120.

Fig. 9 illustrates another example of step S120.

Fig. 10 illustrates a flowchart of a method of setting the first movement amount and the second movement amount.

Fig. 11 illustrates a relationship diagram of a first screen and a second screen.

Wherein, the reference numbers:

110 spread spectrum circuit

120 control circuit

121 computing unit

122 signal processing unit

130 temporary storage device

140 PWM signal generating circuit

150 output circuit

1000 display panel

F _ c is the first picture

F _ d is the second picture

GCLK0, GCLK1, GCLK _ a, GCLK _ b clock signals

L1, L2, L3, L26, L27, L28, L29, L30 scanning lines

PWM _ a, PWM _ b pulse width modulation signals

Ra, Rb time interval

S110, S120, S210, S220, S230, S240, S250, S260

SF1, SF2 sub-picture frame

SN11, SN21, SN31, SN41, SN51, first scan timing

SN12, SN22, SN32, SN42, SN52, second scan timing

Tframe scan time

Time points T21, T22, T41, T42, T51, T52

Trest delay time

Tr, Tr _ c, Tr _ d, remainder time

Ts is a timing adjustment signal

Tsb sub-frame scanning time

Tshift1 first amount of movement

Tshift2 second amount of movement

Tsc-spread period

Tscan line scan time

Ty time to persistence of vision

Wa, Wb opening width

Detailed Description

The invention will be described in detail with reference to the following drawings, which are provided for illustration purposes and the like:

referring to fig. 1, a graph of a relationship between a clock signal (GCLK) and a pulse width modulation signal (PWM) according to an embodiment is shown. In spread spectrum techniques, a clock frequency of a clock signal is modulated. As shown in fig. 1, the clock frequency of the clock signal GCLK _ a is, for example, 10MHz, and the clock frequency of the clock signal GCLK _ b is, for example, 8 MHz. When both the PWM signal PWM _ a and the PWM signal PWM _ b are 2T, the PWM signal PWM _ a has an on-width Wa and the PWM signal PWM _ b has an on-width Wb. The scanning line is lighted for a time interval Ra under the condition that the pulse width modulation signal PWM _ a adopts the opening width Wa; the scan line is lit for a time interval Rb with the pulse width modulation signal PWM _ b adopting the on width Wb. It is obvious that the on-width Wb of the PWM signal PWM _ b is greater than the on-width Wa of the PWM signal PWM _ a, which results in the time interval Rb being greater than the time interval Ra, and thus the brightness of each scan line is different.

Referring to fig. 2, a schematic diagram of a display panel 1000 according to an embodiment is shown. The display panel 1000 includes a spreading circuit 110, a control circuit 120, a temporary memory 130, a PWM signal generating circuit 140, and an output circuit 150. The control circuit 120 includes a calculating unit 121 and a signal processing unit 122. The spreading circuit 110 is used for spreading a clock signal GCLK0 so that a clock frequency of the output clock signal GCLK1 is periodically modulated at a plurality of scan lines.

Referring to fig. 3, a luminance relationship diagram of a first frame F _ c and a second frame F _ d according to an embodiment is shown. The first screen F _ c and the second screen F _ d are, for example, two adjacent screens. The first frame F _ c and the second frame F _ d each have a plurality of subframes SF1, SF2, …. Each of the subframes SF1, SF2, … has a plurality of scan lines L1, L2, L3 … (the number of scan lines is not limited in the present invention). The long graph shows the luminance of each of the scanning lines L1, L2, L3, and …. When the frequency of the clock signal GCLK1 is lower, it will generate higher brightness; the clock signal GCLK1 produces a lower brightness when its frequency is higher.

In FIG. 3, the scanning lines L1, L2, L3, … of the first frame F _ c and the second frame F _ d are aligned (the clock signal GCLK1 is not aligned), so as to indicate the corresponding position of the first frame F _ c and the second frame F _ d. In the present technology, the control circuit 120 controls the clock frequency of the clock signal GCLK1 to be complementary at the corresponding position of the first frame F _ c and the second frame F _ d, so that the brightness of the first frame F _ c and the second frame F _ d is complementary at the corresponding position. The term "complementary" in this case means that a higher one corresponds to a lower one and a lower one corresponds to a higher one, so that the sum of the two can be substantially equal in each correspondence.

Fig. 4 is a flowchart illustrating a driving method of the display panel 1000 according to an embodiment. According to the above description, the driving method of the display panel 1000 of the present embodiment includes steps S110 and S120. In step S110, the spread circuit 110 spreads the clock signal GCLK0 so that the clock frequency of the output clock signal GCLK1 is periodically modulated on the scan lines L1, L2, L3, and …. In step S120, the control circuit 120 controls the clock frequency of the clock signal GCLK1 to be complementary at the corresponding position (each of the scanning lines L1, L2, L3, …) of the first frame F _ c and the second frame F _ d, so that the brightness of the first frame F _ c and the second frame F _ d at the corresponding position (each of the scanning lines L1, L2, L3, …) are complementary.

Once each correspondence (each of the scanning lines L1, L2, L3, …) of the first frame F _ c and the second frame F _ d can be complementary in brightness, the user can feel stable brightness without water ripples under the phenomenon of persistence of vision.

Referring to fig. 2, the clock frequency of the clock signal GCLK1 output by the spread spectrum circuit 110 is periodically modulated on the scan lines L1, L2, L3, and …. The calculating unit 121 of the control circuit 120 is configured to output a timing adjustment signal Ts. The signal processing unit 122 controls the clock signal GCLK1 according to the timing adjustment signal Ts, so that the clock frequency of the clock signal GCLK1 is complementary to the corresponding positions of the first frame F _ c and the second frame F _ d.

Various embodiments of the clock signal GCLK1 having a clock frequency complementary to the first frame F _ c and the second frame F _ d are further described below.

Referring to fig. 5, an example of step S120 is illustrated. As shown in fig. 5, the periodically modulated clock signal GCLK1 has a spreading period Tssc. The first frame F _ c and the second frame F _ d each require a frame scan time Tframe. The respective scanning lines L1, L2, L3, … require a one-line scanning time Tscan. In the example of fig. 5, the frame scanning time Tframe is K1 times the spreading period Tssc (Tframe — K1 — Tssc), the spreading period Tssc is K2 times the line scanning time Tscan (Tssc — K2 — Tscan), K1 is a positive integer, and K2 is a positive integer and an even number. In the example of fig. 5, K2 is, for example, 6.

As shown in the upper diagram of FIG. 5, in the first frame F _ c, the periodically modulated clock signal GCLK1 is provided to the scan lines L1, L2, L3, … according to a first scan timing SN 11.

As shown in the lower diagram of FIG. 5, the periodically modulated clock signal GCLK1 is provided to the scan lines L1, L2, L3, … at the second frame F _ d according to a second scan timing SN 12.

As shown in fig. 5, the first scan timing SN11 has a scan sequence of scan line L1, scan line L2, scan lines L3, …, scan line L28, scan line L29, and scan line L30. The scanning sequence of the second scanning timing SN12 is scanning line L28, scanning line L29, scanning line L30, scanning line L1, scanning lines L2 and …, scanning line L26, and scanning line L27.

With respect to the first scan timing SN11, the start scan line of the second scan timing SN12 is moved from the scan line L1 to the scan line L28. That is, the start scan line of the second scan timing SN12 is shifted by 0.5 × K2 scan lines (i.e., 3 scan lines) with respect to the first scan timing SN 11.

As shown in fig. 5, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame F _ d, which are complementary to each other. The clock frequency of the clock signal GCLK1 is the lowest value at the scanning line L28 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the highest value at the scanning line L28 of the second frame F _ d, which are complementary to each other.

The clock frequency of the clock signal GCLK1 is complementary at the corresponding locations (each scan line L1, L2, L3, …) of the first frame F _ c and the second frame F _ d, so that the brightness of the corresponding locations (each scan line L1, L2, L3, …) of the first frame F _ c and the second frame F _ d are complementary. Under the phenomenon of persistence of vision, the user can feel stable brightness without water wave.

Referring to fig. 6, another example of step S120 is illustrated. As shown in fig. 6, the frame scanning time Tframe is K1 times the spreading period Tssc (Tframe — K1 × Tssc), the spreading period Tssc is K2 times the line scanning time Tscan (Tscan — K2 × Tssc), K1 is a positive integer, and K2 is a positive integer and an odd number. K2 is for example 7.

As shown in the upper diagram of FIG. 6, in the first frame F _ c, the periodically modulated clock signal GCLK1 is provided to the scan lines L1, L2, L3, … according to a first scan timing SN 21.

As shown in the lower diagram of FIG. 6, the periodically modulated clock signal GCLK1 is provided to the scan lines L1, L2, L3, … at the second frame F _ d according to a second scan timing SN 22.

As shown in fig. 6, the start scanning time of the first scanning timing SN21 is a time point T21. The start scan time of the second scan timing SN12 is time point T22.

The start scan time of the second scan timing SN22 is shifted from the time point T21 to the time point T22 with respect to the first scan timing SN 21. The time T22 is the midpoint of the first spreading period Tssc. That is, the start scan time of the second scan timing SN22 is shifted by 0.5 times the spreading period Tssc with respect to the first scan timing SN 21.

As shown in fig. 6, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame F _ d, which are complementary to each other. The clock frequency of the clock signal GCLK1 is the lowest value at the scanning line L28 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the highest value at the scanning line L28 of the second frame F _ d, which are complementary to each other.

Referring to fig. 7, another example of step S120 is illustrated. As shown in FIG. 7, each of the subframes SF1, SF2, … requires a subframe scanning time Tsb. In the example of fig. 7, the frame scan time Tframe is K1 times the spreading period Tssc (Tframe — K1 × Tssc), the sub-frame scan time Tsb is greater than 2 times the spreading period Tssc (Tssc >2 × Tsb), and K1 is a positive integer.

As shown in the upper diagram of FIG. 7, in the first frame F _ c, the periodically modulated clock signal GCLK1 is provided to the scan lines L1, L2, L3, … according to a first scan timing SN 31.

As shown in the upper diagram of FIG. 7, the periodically modulated clock signal GCLK1 is provided to the scan lines L30, L29, L28, … at the second frame F _ d according to a second scan timing SN 32.

As shown in fig. 7, the first scan timing SN31 has the scan sequence of scan line L1, scan line L2, scan lines L3, …, scan line L28, scan line L29, and scan line L30. The scanning sequence of the second scanning timing SN32 is scanning line L30, scanning line L29, scanning lines L28, …, scanning line L3, scanning line L2, and scanning line L1.

The scanning order of the second scan timing SN32 is opposite with respect to the first scan timing SN 31.

As shown in fig. 7, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame F _ d, which are complementary to each other. The clock frequency of the clock signal GCLK1 is the lowest value at the scanning line L30 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the highest value at the scanning line L30 of the second frame F _ d, which are complementary to each other.

Referring to fig. 8, another example of step S120 is illustrated. As shown in fig. 8, in the example of fig. 8, the frame scan time Tframe is K1 times the spreading period Tssc (Tframe — K1 × Tssc), the sub-frame scan time Tsb is greater than 2 times the spreading period Tssc (Tssc >2 × Tsb), and K1 is a positive integer.

As shown in the upper diagram of FIG. 8, in the first frame F _ c, the periodically modulated clock signal GCLK1 is provided to the scan lines L1, L2, L3, … according to a first scan timing SN 41.

As shown in the upper diagram of FIG. 8, the periodically modulated clock signal GCLK1 is provided to the scan lines L30, L29, L28, … at the second frame F _ d according to a second scan timing SN 42.

As shown in fig. 8, the first scan timing SN41 has the scan sequence of scan line L1, scan line L2, scan lines L3, …, scan line L28, scan line L29, and scan line L30. The start scanning time of the first scanning timing SN41 is time point T41. The scanning sequence of the second scanning timing SN42 is scanning line L30, scanning line L29, scanning lines L28, …, scanning line L3, scanning line L2, and scanning line L1. The start scan time of the second scan timing SN42 is time point T42.

The scanning order of the second scan timing SN42 is reversed with respect to the first scan timing SN41, and the start scan time is shifted from the time point T41 to the time point T42. That is, the start scanning time of the second scanning timing SN42 is shifted by a delay time Trest, which is less than 0.5 times the difference between the spreading period Tssc and the sub-frame scanning time Tsb.

As shown in fig. 8, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame F _ d, which are complementary to each other. The clock frequency of the clock signal GCLK1 is the lowest value at the scanning line L30 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the highest value at the scanning line L30 of the second frame F _ d, which are complementary to each other.

Referring to fig. 9, another example of step S120 is illustrated. As shown in fig. 9, the frame scanning time Tframe is not divided by the spreading period Tssc.

As shown in the middle diagram of FIG. 9, in the first frame F _ c, the periodically modulated clock signal GCLK1 is provided to the scan lines L1, L2, L3, … according to a first scan timing SN 51.

As shown in the lower diagram of FIG. 9, the periodically modulated clock signal GCLK1 is provided to the scan lines L1, L2, L3, … at the second frame F _ d according to a second scan timing SN 52. The first picture F _ c is, for example, an odd picture, and the second picture F _ d is, for example, an even picture.

As shown in fig. 9, the start scanning time of the first scanning timing SN51 is a time point T51. The start scan time of the second scan timing SN52 is time point T52.

The start scan time of the first scan timing SN51 is shifted by a first shift amount Tshift1, the start scan time of the second scan timing SN52 is shifted by a second shift amount Tshift2, and the first shift amount Tshift1 is different from the second shift amount Tshift 2.

The first frame F _ c is preceded by a remainder time Tr _ c of the spreading period Tssc, which is not fixed, depending on the previous frame. The remainder time Tr _ c is the time less than one spreading period Tssc. The second frame F _ d is a frame before the first frame with a remainder time Tr _ d of the spreading period Tssc, and the remainder time Tr _ d is not constant, depending on the previous frame. The remainder time Tr _ d is a time less than one spreading period Tssc.

If the remainder time Tr _ c is smaller than 0.5 times the spreading period Tssc, the first shift amount Tshift1 is the difference between 0.5 times the spreading period Tssc and the remainder time Tr _ c; if the remainder time Tr _ c is not less than 0.5 times the spreading period Tssc, the first shift amount Tshift1 is the difference between 1.5 times the spreading period Tssc and the remainder time Tr _ c. The second shift amount Tshift2 is the difference between the spread spectrum period Tssc and the remainder time Tr _ d. The first shift amount Tshift1 differs from the second shift amount Tshift2 by a spreading period Tssc of 0.5 times.

As shown in fig. 9, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame F _ d, which are complementary to each other. The clock frequency of the clock signal GCLK1 is the lowest value at the scanning line L28 of the first frame F _ c, and the clock frequency of the clock signal GCLK1 is the highest value at the scanning line L28 of the second frame F _ d, which are complementary to each other.

In one embodiment, the control circuit 120 sets the first shift amount Tshift1 and the second shift amount Tshift2 according to the following procedure. Referring to fig. 10, a flowchart of a method for setting the first shift amount Tshift1 and the second shift amount Tshift2 is illustrated. In step S210, the calculating unit 121 of the control circuit 120 calculates the remainder times Tr _ c and Tr _ d according to the frame scanning time Tframe and the spreading period Tssc.

Next, in step S220, the signal processing unit 122 of the control circuit 120 determines that the object to be processed is the first frame F _ c or the second frame F _ d. If the object to be processed is the first frame F _ c, go to step S230; if the object to be processed is the second screen F _ d, the process proceeds to step S260.

In step S230, the signal processing unit 122 of the control circuit 120 further determines whether the remainder time Tr _ c is less than 0.5 times the spreading period Tssc. If the remainder time Tr _ c is less than 0.5 times the spreading period Tssc, the process proceeds to step S250; if the remaining time Tr _ c is not less than 0.5 times the spreading period Tssc, the process proceeds to step S260.

In step S240, the signal processing unit 122 of the control circuit 120 sets the difference between the spread period Tssc of 0.5 times the first shift amount Tshift1 and the remainder time Tr _ c.

In step S250, the signal processing unit 122 of the control circuit 120 sets the difference between the spread period Tssc, in which the first shift amount Tshift1 is 1.5 times, and the remainder time Tr _ c.

In step S260, the signal processing unit 122 of the control circuit 120 sets the second shift amount Tshift2 as the difference between the spread spectrum period Tssc and the remainder time Tr _ d.

Referring to fig. 11, a relationship diagram of the first frame F _ c and the second frame F _ d is illustrated. In the above embodiments, the first picture F _ c and the second picture F _ d may be adjacent pictures or non-adjacent pictures. As shown in fig. 11, as long as the difference between the scanning time points of the first frame F _ c and the second frame F _ d is within the persistence time Ty, the effect of visually stabilizing the brightness can be achieved.

The present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof, and it should be understood that various changes and modifications can be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A method for driving a display panel at spread spectrum, comprising:

spreading a clock signal (GCLK) so that a clock frequency of the clock signal is periodically modulated at a plurality of scanning lines; and

controlling the clock frequency of the clock signal to complement at the corresponding position of a first picture and a second picture so as to complement the brightness of the first picture and the second picture at the corresponding position.

2. The method for driving a display panel at spread spectrum according to claim 1, wherein

The periodically modulated clock pulse signal has a spread spectrum period, the first picture and the second picture respectively need a picture scanning time, and each scanning line needs a line scanning time;

providing the clock pulse signal which is periodically modulated to the scanning lines according to a first scanning time sequence in the first picture;

providing the clock pulse signal which is periodically modulated to the scanning lines according to a second scanning time sequence in the second picture;

if the frame scan time is K1 times the spreading period, the spreading period is K2 times the line scan time, K1 is a positive integer, and K2 is a positive integer and an even number, then a starting scan line of the second scan timing is shifted relative to the first scan timing.

3. The method as claimed in claim 2, wherein the start scan line of the second scan timing is shifted by 0.5 xK 2 scan lines relative to the first scan timing.

4. The method for driving a display panel at spread spectrum according to claim 1, wherein

if the frame scan time is K1 times the spreading period, the spreading period is K2 times the line scan time, K1 is a positive integer, and K2 is a positive integer and is an odd number, then an initial scan time of the second scan timing is shifted relative to the first scan timing.

5. The method as claimed in claim 4, wherein the start scan time of the second scan timing is shifted by 0.5 times the spreading period with respect to the first scan timing.

6. The method for driving a display panel at spread spectrum according to claim 1, wherein

The clock pulse signal which is periodically modulated has a spread spectrum period, the first picture and the second picture require a picture scanning time, the first picture and the second picture are respectively provided with a plurality of subframes, and each subframe requires a subframe scanning time;

if the frame scan time is K1 times the spread spectrum period, the spread spectrum period is greater than 2 times the subframe scan time, and K1 is a positive integer, a scan sequence of the second scan sequence is opposite to that of the first scan sequence.

7. The method as claimed in claim 6, wherein the start scanning time of the second scanning timing is shifted by a delay time relative to the first scanning timing, the delay time being less than 0.5 times the difference between the spread spectrum period and the sub-frame scanning time.

8. The method for driving a display panel at spread spectrum according to claim 1, wherein

The periodically modulated clock pulse signal has a spread spectrum period, and the first picture and the second picture respectively need a picture scanning time;

providing the clock pulse signal which is periodically modulated to the scanning lines according to a first scanning time sequence in the first picture, wherein the first picture is an odd picture;

providing the clock pulse signal which is periodically modulated to the scanning lines according to a second scanning time sequence in the second picture, wherein the second picture is an even picture;

if the frame scanning time is not divided by the spreading period, the initial scanning time of the first scanning sequence is shifted by a first shift amount, the initial scanning time of the second scanning sequence is shifted by a second shift amount, and the first shift amount is different from the second shift amount.

9. The method as claimed in claim 8, wherein the difference between the first shift amount and the second shift amount is 0.5 times the spreading period.

10. The method according to claim 8, wherein a frame before the first frame or the second frame has a remainder time of the spreading period;

if the remainder time is less than 0.5 times the spreading period, the first shift amount is the difference between 0.5 times the spreading period and the remainder time;

if the remainder time is not less than 0.5 times the spreading period, the first shift amount is 1.5 times the difference between the spreading period and the remainder time;

the second shift amount is the difference between the spreading period and the remainder time.

11. A display panel at spread spectrum, comprising:

a spread spectrum circuit for spreading a clock signal (GCLK) to make a clock frequency of the clock signal periodically modulated at a plurality of scan lines; and

the control circuit is used for controlling the clock pulse frequency of the clock pulse signal to be complementary at the corresponding position of a first picture and a second picture so as to make the brightness of the first picture and the second picture complementary at the corresponding position.

12. The display panel according to claim 11, wherein the control circuit comprises a computing unit and a signal processing unit, the computing unit is configured to output a timing adjustment signal, the signal processing unit controls the clock signal according to the timing adjustment signal, the clock signal modulated periodically has a spreading period, the first frame and the second frame each require a frame scanning time, and each scanning line requires a line scanning time;

in the first picture, the signal processing unit provides the clock pulse signals which are periodically modulated to the scanning lines according to a first scanning time sequence;

in the second picture, the signal processing unit provides the clock pulse signal which is periodically modulated to the scanning lines according to a second scanning time sequence;

13. The display panel of claim 12, wherein the starting scan line of the second scan sequence is shifted by 0.5 xK 2 scan lines relative to the first scan sequence.

14. The display panel according to claim 11, wherein the control circuit comprises a computing unit and a signal processing unit, the computing unit is configured to output a timing adjustment signal, the signal processing unit controls the clock signal according to the timing adjustment signal, the clock signal modulated periodically has a spreading period, the first frame and the second frame each require a frame scanning time, and each scanning line requires a line scanning time;

15. The display panel with spread spectrum according to claim 14, wherein the start scan time of the second scan timing is shifted by 0.5 times the spreading period with respect to the first scan timing.

16. The display panel according to claim 11, wherein the control circuit comprises a computing unit and a signal processing unit, the computing unit is configured to output a timing adjustment signal, the signal processing unit controls the clock signal according to the timing adjustment signal, the clock signal modulated periodically has a spreading period, the first frame and the second frame each require a frame scan time, the first frame and the second frame each have a plurality of subframes, and each subframe requires a subframe scan time;

17. The display panel with spread spectrum according to claim 16, wherein the starting scan time of the second scan timing is shifted by a delay time relative to the first scan timing, the delay time being less than 0.5 times the difference between the spread spectrum period and the subframe scan time.

18. The display panel according to claim 11, wherein the control circuit comprises a computing unit and a signal processing unit, the computing unit is configured to output a timing adjustment signal, the signal processing unit controls the clock signal according to the timing adjustment signal, the periodically modulated clock signal has a spreading period, and the first frame and the second frame each require a frame scanning time;

in the first picture, the signal processing unit provides the clock pulse signal which is periodically modulated to the scanning lines according to a first scanning time sequence, and the first picture is an odd picture;

in the second picture, the signal processing unit provides the clock pulse signal which is periodically modulated to the scanning lines according to a second scanning time sequence, and the second picture is an even picture;

19. The display panel with spread spectrum according to claim 18, wherein the difference between the first shift amount and the second shift amount is 0.5 times the spreading period.

20. The display panel at spread spectrum of claim 18, wherein

A frame before the first frame or the second frame has a remainder time of the spreading period;