CN114203097B

CN114203097B - Display panel under spread spectrum and driving method thereof

Info

Publication number: CN114203097B
Application number: CN202210078901.7A
Authority: CN
Inventors: 耿启育; 张书豪; 杜明鸿; 洪志豪; 陈雅芳; 杨智翔
Original assignee: AU Optronics Corp
Current assignee: AU Optronics Corp
Priority date: 2021-10-06
Filing date: 2022-01-24
Publication date: 2023-09-08
Anticipated expiration: 2042-01-24
Also published as: TW202316398A; CN114203097A; TWI789942B

Abstract

A driving method of display panel under spread spectrum. The driving method of the display panel under spread spectrum includes the following steps. A clock signal (GCLK) is spread so that a clock frequency of the clock signal is periodically modulated on a plurality of scan lines. The clock frequency of the clock signal is controlled to be complementary to the corresponding position of a first picture and a second picture, so that the brightness of the first picture and the brightness of the second picture at the corresponding position are complementary.

Description

Display panel under spread spectrum and driving method thereof

Technical Field

The present invention relates to a display panel and a driving method thereof, and more particularly, to a display panel under spread spectrum and a driving method thereof.

Background

Along with the development of display technology, various display panels are continuously being developed. In the driving process of the display panel, each scan line is driven by a clock signal (GCLK). And, the brightness of each scan line is controlled by a pulse width modulation signal (PWM).

In order to improve the phenomenon of electromagnetic interference, researchers have proposed a spread spectrum technique to eliminate electromagnetic interference. However, researchers find that the display panel has water ripple under the spread spectrum technology, which seriously affects the display quality.

Disclosure of Invention

The invention relates to a display panel under spread spectrum and a driving method thereof, which control the clock frequency of a clock signal to be complementary at the corresponding position of a first picture and a second picture so as to make the brightness of the first picture and the second picture complementary at the corresponding position. Under the phenomenon of persistence of vision, the user can feel stable brightness without water ripple.

According to an aspect of the present invention, a method for driving a display panel under spread spectrum is provided. The driving method of the display panel includes the following steps. A clock signal (GCLK) is spread so that a clock frequency of the clock signal is periodically modulated on a plurality of scan lines. The clock frequency of the clock signal is controlled to be complementary to the corresponding position of a first picture and a second picture, so that the brightness of the first picture and the brightness of the second picture at the corresponding position are complementary.

According to another aspect of the present invention, a display panel under spread spectrum is provided. The display panel comprises a spread spectrum circuit and a control circuit. The spread spectrum circuit is used for spreading a clock signal (GCLK) so that a clock frequency of the clock signal is periodically modulated on a plurality of scanning lines. The control circuit is used for controlling the clock frequency of the clock signal to be complementary at the corresponding position of a first picture and a second picture so as to enable the brightness of the first picture and the brightness of the second picture to be complementary at the corresponding position.

The invention will now be described in more detail with reference to the drawings and specific examples, which are not intended to limit the invention thereto.

Drawings

FIG. 1 is a graph showing a relationship between a clock signal (GCLK) and a pulse width modulation signal (PWM) according to an embodiment.

Fig. 2 is a schematic diagram of a display panel according to an embodiment.

FIG. 3 is a diagram showing a luminance relationship between a first frame and a second frame according to an embodiment.

Fig. 4 is a flowchart illustrating a driving method of a display panel according to an embodiment.

Fig. 5 illustrates an example of step S120.

Fig. 6 illustrates another example of step S120.

Fig. 7 illustrates another example of step S120.

Fig. 8 illustrates another example of step S120.

Fig. 9 illustrates another example of step S120.

Fig. 10 illustrates a flowchart of a method of setting the first movement amount and the second movement amount.

Fig. 11 illustrates a relationship diagram of the first screen and the second screen.

Wherein, the reference numerals:

110 spread spectrum circuit

120 control circuit

121 calculating unit

122 signal processing unit

130 temporary storage memory

140 PWM signal generating circuit

150 output circuit

1000 display panel

F_c first picture

Fd second picture

GCLK0, GCLK1, GCLK_a, GCLK_b, clock signal

L1, L2, L3, L26, L27, L28, L29, L30: scan line

PWM_a, PWM_b pulse width modulation signal

Ra, rb time interval

S110, S120, S210, S220, S230, S240, S250, S260 steps

SF1, SF2, sub-frame

SN11, SN21, SN31, SN41, SN51: first scan timing

SN12, SN22, SN32, SN42, SN52: second scan timing

Tfame: time of frame scan

T21, T22, T41, T42, T51, T52: time point

Trest delay time

Tr, tr_c, tr_d, remainder time

Ts timing adjustment signal

Tsb sub-frame scan time

Tshift1 first movement amount

Tshift2 second movement amount

Tsc: spread spectrum period

Tscan line scan time

Ty, persistence of vision

Wa, wb opening width

Detailed Description

The structural and operational principles of the present invention are described in detail below with reference to the accompanying drawings:

referring to FIG. 1, a diagram of a relationship between a clock signal (GCLK) and a pulse width modulation signal (PWM) according to one embodiment is shown. In spread spectrum techniques, a clock frequency of a clock signal is modulated. As shown in FIG. 1, the clock frequency of the clock signal GCLK_a is, for example, 10MHz, and the clock frequency of the clock signal GCLK_b is, for example, 8MHz. When the PWM signal pwm_a and the PWM signal pwm_b are both 2T, the PWM signal pwm_a has an on width Wa, and the PWM signal pwm_b has an on width Wb. Under the pulse width modulation signal pwm_a adopting the on width Wa, the scan line is illuminated for a time interval Ra; the scan line is illuminated for a time interval Rb below the PWM signal pwm_b with the on-width Wb. It is obvious that the on width Wb of the PWM signal pwm_b is larger than the on width Wa of the PWM signal pwm_a, which results in a time interval Rb being larger than the time interval Ra, so that the brightness of each scan line is different.

Referring to fig. 2, a schematic diagram of a display panel 1000 according to an embodiment is shown. The display panel 1000 includes a spread spectrum circuit 110, a control circuit 120, a temporary memory 130, a PWM signal generating circuit 140 and an output circuit 150. The control circuit 120 includes a computing unit 121 and a signal processing unit 122. The spread spectrum circuit 110 is used for spreading a clock signal GCLK0 so that a clock frequency of the output clock signal GCLK1 is periodically modulated on a plurality of scan lines.

Referring to fig. 3, a luminance relationship diagram of a first frame f_c and a second frame f_d according to an embodiment is shown. The first frame f_c and the second frame f_d are, for example, two adjacent frames. The first frame f_c and the second frame f_d each have a plurality of subframes SF1, SF2, …. Each of the subframes SF1, SF2, … has a plurality of scan lines L1, L2, L3 … (the number of scan lines is not limited to the present invention). The long chart shows the brightness of each of the scanning lines L1, L2, L3, …. When the frequency of the clock signal GCLK1 is low, a higher brightness is generated; the higher the frequency of the clock signal GCLK1, the lower the brightness is.

In fig. 3, the scan lines L1, L2, L3, … of the first frame f_c and the second frame f_d are aligned (the clock signal GCLK1 is not aligned) so as to conveniently represent the corresponding positions of the first frame f_c and the second frame f_d. In the present technology, the control circuit 120 controls the clock frequency of the clock signal GCLK1 to be complementary to the corresponding position of the first frame f_c and the second frame f_d, so that the brightness of the first frame f_c and the second frame f_d at the corresponding position are complementary. The term "complementary" in this case means that the higher corresponds to the lower and the lower corresponds to the higher, so that the sum of the two can be substantially equal at each correspondence.

Fig. 4 is a flowchart illustrating a driving method of the display panel 1000 according to an embodiment. According to the above description, the driving method of the display panel 1000 of the present embodiment includes steps S110, S120. In step S110, the spread spectrum circuit 110 spreads the clock signal GCLK0 so that the clock frequency of the output clock signal GCLK1 is periodically modulated on the scan lines L1, L2, L3, …. In step S120, the control circuit 120 controls the clock frequency of the clock signal GCLK1 to be complementary to the corresponding position (each scan line L1, L2, L3, …) of the first frame f_c and the second frame f_d, so that the brightness of the first frame f_c and the second frame f_d is complementary to the corresponding position (each scan line L1, L2, L3, …).

Once each corresponding position (each scanning line L1, L2, L3, …) of the first frame f_c and the second frame f_d can be complemented in brightness, the user can feel stable brightness without water ripple under the phenomenon of persistence of vision.

Referring to fig. 2, the clock frequency of the clock signal GCLK1 outputted from the spread spectrum circuit 110 is periodically modulated on the scan lines L1, L2, L3, …. The calculating unit 121 of the control circuit 120 is configured to output a timing adjustment signal Ts. The signal processing unit 122 controls the clock signal GCLK1 according to the timing adjustment signal Ts so that the clock frequency of the clock signal GCLK1 is complementary to the corresponding position of the first frame f_c and the second frame f_d.

Various embodiments are described below in which the clock frequency of the clock signal GCLK1 is complementary to the corresponding locations of the first frame F_c and the second frame F_d.

Referring to fig. 5, an example of step S120 is illustrated. As shown in fig. 5, the periodically modulated clock signal GCLK1 has a spread spectrum period Tssc. The first frame f_c and the second frame f_d each require a frame scan time Tframe. The respective scanning lines L1, L2, L3, … require a line scanning time Tscan. In the example of fig. 5, the frame scanning time Tframe is K1 times (tframe=k1×tssc) of the spreading period Tssc, the spreading period Tssc is K2 times (tssc=k2×tscan) of the line scanning time Tscan, K1 is a positive integer, and K2 is a positive integer and an even number. In the example of fig. 5, K2 is, for example, 6.

As shown in the upper diagram of fig. 5, the periodically modulated clock signal GCLK1 to the scan lines L1, L2, L3, … are provided according to a first scan timing SN11 on the first frame f_c.

As shown in the lower diagram of fig. 5, the periodically modulated clock signal GCLK1 to the scan lines L1, L2, L3, … are provided according to a second scan timing SN12 on the second frame f_d.

As shown in fig. 5, the scanning order of the first scanning timing SN11 is a scanning line L1, a scanning line L2, scanning lines L3, …, a scanning line L28, a scanning line L29, and a scanning line L30. The second scan timing SN12 is a scan order of a scan line L28, a scan line L29, a scan line L30, a scan line L1, scan lines L2, …, a scan line L26, and a scan line L27.

With respect to the first scan timing SN11, the start scan line of the second scan timing SN12 is shifted from the scan line L1 to the scan line L28. That is, the start scan line of the second scan timing SN12 is shifted by 0.5×k2 scan lines (i.e., 3 scan lines) with respect to the first scan timing SN 11.

As shown in fig. 5, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame f_c, the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame f_d, and the corresponding positions are complementary. The clock frequency of the clock signal GCLK1 is at the lowest value on the scan line L28 of the first frame F_c, and the clock frequency of the clock signal GCLK1 is at the highest value on the scan line L28 of the second frame F_d, which are complementary to each other.

The clock frequency of the clock signal GCLK1 is complementary to the corresponding position (each scan line L1, L2, L3, …) of the first frame f_c and the second frame f_d, so that the brightness of the first frame f_c and the second frame f_d is complementary to the corresponding position (each scan line L1, L2, L3, …). Under the phenomenon of persistence of vision, the user can feel stable brightness without water ripple.

Referring to fig. 6, another example of step S120 is illustrated. As shown in fig. 6, the frame scanning time Tframe is K1 times (tframe=k1×tssc) of the spreading period Tssc, the spreading period Tssc is K2 times (tscan=k2×tssc) of the line scanning time Tscan, K1 is a positive integer, and K2 is a positive integer and an odd number. K2 is, for example, 7.

As shown in the upper diagram of fig. 6, the periodically modulated clock signal GCLK1 to the scan lines L1, L2, L3, … are provided according to a first scan timing SN21 on the first frame f_c.

As shown in the lower diagram of fig. 6, the periodically modulated clock signal GCLK1 to the scan lines L1, L2, L3, … are provided according to a second scan timing SN22 on the second frame f_d.

As shown in fig. 6, the start scan time of the first scan timing SN21 is a time point T21. The start scan time of the second scan sequence SN12 is a time point T22.

The start scan time of the second scan timing SN22 is shifted from the time point T21 to the time point T22 with respect to the first scan timing SN 21. The time point T22 is the midpoint of the first spreading period Tssc. That is, the start scan time of the second scan timing SN22 is shifted by 0.5 times the spread period Tssc with respect to the first scan timing SN 21.

As shown in fig. 6, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame f_c, the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame f_d, and the corresponding positions are complementary. The clock frequency of the clock signal GCLK1 is at the lowest value on the scan line L28 of the first frame F_c, and the clock frequency of the clock signal GCLK1 is at the highest value on the scan line L28 of the second frame F_d, which are complementary to each other.

Referring to fig. 7, another example of step S120 is illustrated. As shown in fig. 7, each of the subframes SF1, SF2, … requires a subframe scan time Tsb. In the example of fig. 7, the frame scan time Tframe is K1 times (tframe=k1×tssc) of the spread period Tssc, the spread period Tssc is greater than 2 times the sub-frame scan time Tsb (Tssc >2×tsb), and K1 is a positive integer.

As shown in the upper diagram of fig. 7, the periodically modulated clock signal GCLK1 to the scan lines L1, L2, L3, … are provided according to a first scan timing SN31 on the first frame f_c.

As shown in the upper diagram of fig. 7, the periodically modulated clock signal GCLK1 is provided to the scan lines L30, L29, L28, … in accordance with a second scan timing SN32 on the second frame f_d.

As shown in fig. 7, the scanning order of the first scanning timing SN31 is a scanning line L1, a scanning line L2, scanning lines L3, …, a scanning line L28, a scanning line L29, and a scanning line L30. The second scan timing SN32 is a scan order of scan line L30, scan line L29, scan lines L28, …, scan line L3, scan line L2, and scan line L1.

The scan order of the second scan timing SN32 is opposite to that of the first scan timing SN 31.

As shown in fig. 7, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame f_c, the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame f_d, and the corresponding positions are complementary. The clock frequency of the clock signal GCLK1 is at the lowest value on the scan line L30 of the first frame F_c, and the clock frequency of the clock signal GCLK1 is at the highest value on the scan line L30 of the second frame F_d, which are complementary to each other.

Referring to fig. 8, another example of step S120 is illustrated. As shown in fig. 8, in the example of fig. 8, the frame scan time Tframe is K1 times (tframe=k1×tssc) of the spread period Tssc, the spread period Tssc is greater than 2 times the sub-frame scan time Tsb (Tssc >2×tsb), and K1 is a positive integer.

As shown in the upper diagram of fig. 8, the periodically modulated clock signal GCLK1 to the scan lines L1, L2, L3, … are provided according to a first scan timing SN41 on the first frame f_c.

As shown in the upper diagram of fig. 8, the periodically modulated clock signal GCLK1 is provided to the scan lines L30, L29, L28, … in accordance with a second scan timing SN42 on the second frame f_d.

As shown in fig. 8, the scanning order of the first scanning timing SN41 is a scanning line L1, a scanning line L2, scanning lines L3, …, a scanning line L28, a scanning line L29, and a scanning line L30. The start scan time of the first scan sequence SN41 is a time point T41. The second scan timing SN42 is a scan order of scan line L30, scan line L29, scan lines L28, …, scan line L3, scan line L2, and scan line L1. The start scan time of the second scan sequence SN42 is the time point T42.

The scanning order of the second scanning timing SN42 is opposite with respect to the first scanning timing SN41, and the start scanning time is shifted from the time point T41 to the time point T42. That is, the start scan time of the second scan timing SN42 is shifted by a delay time Trest, which is less than 0.5 times the difference between the spread period Tssc and the sub-frame scan time Tsb.

As shown in fig. 8, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame f_c, the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame f_d, and the corresponding positions are complementary. The clock frequency of the clock signal GCLK1 is at the lowest value on the scan line L30 of the first frame F_c, and the clock frequency of the clock signal GCLK1 is at the highest value on the scan line L30 of the second frame F_d, which are complementary to each other.

Referring to fig. 9, another example of step S120 is illustrated. As shown in fig. 9, the frame scanning time Tframe is not divided by the spreading period Tssc.

As shown in the middle diagram of fig. 9, the periodically modulated clock signal GCLK1 to the scan lines L1, L2, L3, … are provided in the first frame f_c according to a first scan timing SN 51.

As shown in the lower diagram of fig. 9, the periodically modulated clock signal GCLK1 to the scan lines L1, L2, L3, … are provided according to a second scan timing SN52 on the second frame f_d. The first picture f_c is, for example, an odd picture, and the second picture f_d is, for example, an even picture.

As shown in fig. 9, the start scan time of the first scan timing SN51 is a time point T51. The start scan time of the second scan sequence SN52 is the time point T52.

The start scan time of the first scan sequence SN51 is shifted by a first shift amount Tshift1, and the start scan time of the second scan sequence SN52 is shifted by a second shift amount Tshift2, wherein the first shift amount Tshift1 is different from the second shift amount Tshift2.

The previous frame of the first frame f_c has a remainder time tr_c of the spread period Tssc, which is not fixed, depending on the previous frame. The remainder time tr_c refers to a time less than one spread period Tssc. The previous frame of the second frame f_d has a remainder time tr_d of the spread period Tssc, and the remainder time tr_d is not fixed, depending on the previous frame. The remainder time tr_d refers to a time less than one spread period Tssc.

If the remainder time tr_c is smaller than 0.5 times of the spread period Tssc, the first movement amount Tshift1 is the difference between the 0.5 times of the spread period Tssc and the remainder time tr_c; if the remainder time tr_c is not smaller than 0.5 times the spread period Tssc, the first shift amount Tshift1 is a difference between the spread period Tssc of 1.5 times and the remainder time tr_c. The second shift amount Tshift2 is the difference between the spread period Tssc and the remainder time tr_d. The first moving amount Tshift1 and the second moving amount Tshift2 differ by a spreading period Tssc of 0.5 times.

As shown in fig. 9, under the same periodically modulated clock signal GCLK1, the clock frequency of the clock signal GCLK1 is the highest value at the scan line L1 of the first frame f_c, the clock frequency of the clock signal GCLK1 is the lowest value at the scan line L1 of the second frame f_d, and the corresponding positions are complementary. The clock frequency of the clock signal GCLK1 is at the lowest value on the scan line L28 of the first frame F_c, and the clock frequency of the clock signal GCLK1 is at the highest value on the scan line L28 of the second frame F_d, which are complementary to each other.

In one embodiment, the control circuit 120 sets the first moving amount Tshift1 and the second moving amount Tshift2 through the following procedure, for example. Referring to fig. 10, a flowchart of a method for setting the first movement amount Tshift1 and the second movement amount Tshift2 is illustrated. In step S210, the calculating unit 121 of the control circuit 120 calculates the remainder times tr_c and tr_d according to the frame scan time Tframe and the spread period Tssc.

Next, in step S220, the signal processing unit 122 of the control circuit 120 determines whether the object to be processed is the first frame f_c or the second frame f_d. If the object to be processed is the first frame f_c, go to step S230; if the object to be processed is the second frame f_d, the process proceeds to step S260.

In step S230, the signal processing unit 122 of the control circuit 120 further determines whether the remainder time tr_c is smaller than 0.5 times the spread period Tssc. If the remainder time tr_c is less than 0.5 time of the spread period Tssc, the step S250 is entered; if the remainder time tr_c is not less than 0.5 time of the spreading period Tssc, the process proceeds to step S260.

In step S240, the signal processing unit 122 of the control circuit 120 sets the difference between the spread period Tssc and the remainder time tr_c, which is 0.5 times the first movement amount Tshift 1.

In step S250, the signal processing unit 122 of the control circuit 120 sets the difference between the spread period Tssc and the remainder time tr_c, which is 1.5 times the first movement amount Tshift 1.

In step S260, the signal processing unit 122 of the control circuit 120 sets the second movement amount Tshift2 as a difference between the spread period Tssc and the remainder time tr_d.

Referring to fig. 11, a relationship diagram between a first frame f_c and a second frame f_d is illustrated. In the above-described various embodiments, the first frame f_c and the second frame f_d may be adjacent frames or non-adjacent frames. As shown in fig. 11, as long as the difference between the scanning time points of the first frame f_c and the second frame f_d is within the persistence time Ty, an effect of visually stabilizing brightness can be achieved.

Of course, the present invention is capable of other various embodiments and its several details are capable of modification and variation in light of the present invention, as will be apparent to those skilled in the art, without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A method for driving a display panel under spread spectrum, comprising:

spreading a clock signal (GCLK) so that a clock frequency of the clock signal is periodically modulated on the plurality of scan lines; and

the clock frequency of the clock signal is controlled to be complementary to each scanning line of a first picture and a second picture, the sum of the clock frequency of each scanning line of the first picture and the second picture is substantially equal, so that the brightness of each scanning line of the first picture and the second picture is complementary, and the sum of the brightness of each scanning line of the first picture and the second picture is substantially equal.

2. The method of driving a display panel under spread spectrum according to claim 1, wherein

The periodically modulated clock signal has a spread spectrum period, the first picture and the second picture each require a picture scanning time, and each scanning line requires a line scanning time;

providing the periodically modulated clock signal to the scan lines according to a first scan sequence in the first frame;

providing the periodically modulated clock signal to the scan lines according to a second scan sequence on the second frame;

if the frame scan time is K1 times the spread period, the spread period is K2 times the line scan time, K1 is a positive integer, K2 is a positive integer and is an even number, then an initial scan line of the second scan timing is shifted relative to the first scan timing.

3. The method of claim 2, wherein the initial scan line of the second scan sequence is shifted by 0.5 x k2 of the scan lines with respect to the first scan sequence.

4. The method of driving a display panel under spread spectrum according to claim 1, wherein

if the frame scan time is K1 times the spread period, the spread period is K2 times the line scan time, K1 is a positive integer, K2 is a positive integer and is an odd number, then an initial scan time of the second scan timing is shifted relative to the first scan timing.

5. The method of claim 4, wherein the initial scan time of the second scan timing is shifted by 0.5 times the spreading period with respect to the first scan timing.

6. The method of driving a display panel under spread spectrum according to claim 1, wherein

The periodically modulated clock signal has a spread spectrum period, the first picture and the second picture each need a picture scanning time, the first picture and the second picture each have a plurality of sub-picture frames, and each sub-picture frame needs a sub-picture frame scanning time;

if the frame scanning time is K1 times of the spread spectrum period, and K1 is a positive integer, a scanning order of the second scanning time sequence is opposite to that of the first scanning time sequence.

7. The method of claim 6, wherein the start scan time of the second scan sequence is shifted by a delay time, which is less than 0.5 times the difference between the spread period and the sub-frame scan time, relative to the first scan sequence.

8. The method of driving a display panel under spread spectrum according to claim 1, wherein

The periodically modulated clock signal has a spread spectrum period, and the first frame and the second frame each require a frame scanning time;

providing the periodically modulated clock signal to the scanning lines according to a first scanning time sequence in the first picture, wherein the first picture is an odd picture;

providing the periodically modulated clock signal to the scan lines according to a second scan sequence in the second frame, wherein the second frame is an even frame;

if the frame scanning time is not divided by the spreading period, the initial scanning time of the first scanning time sequence is shifted by a first shift amount, and the initial scanning time of the second scanning time sequence is shifted by a second shift amount, wherein the first shift amount is different from the second shift amount.

9. The method of claim 8, wherein the first shift amount and the second shift amount differ by 0.5 times the spreading period.

10. The method of claim 8, wherein a frame preceding the first frame or the second frame has a remainder time of the spreading period;

if the remainder time is less than 0.5 times of the spread period, the first shift amount is 0.5 times of the difference between the spread period and the remainder time;

if the remainder time is not less than 0.5 times of the spread period, the first movement amount is 1.5 times of the difference between the spread period and the remainder time;

the second shift amount is the difference between the spread period and the remainder time.

11. A display panel under spread spectrum, comprising:

a spread spectrum circuit for spreading a clock signal (GCLK) so that a clock frequency of the clock signal is periodically modulated on a plurality of scan lines; and

the control circuit is used for controlling the clock frequency of the clock signal to be complementary to each scanning line of a first picture and a second picture, the clock frequency is substantially equal to the sum of each scanning line of the first picture and the second picture, so that the brightness of the first picture and the second picture on each scanning line is complementary, and the sum of the brightness of the first picture and the brightness of the second picture on each scanning line are substantially equal.

12. The display panel according to claim 11, wherein the control circuit comprises a computing unit and a signal processing unit, the computing unit is configured to output a timing adjustment signal, the signal processing unit is configured to control the clock signal according to the timing adjustment signal, the clock signal that is periodically modulated has a spreading period, the first frame and the second frame each require a frame scan time, and each of the scan lines requires a line scan time;

in the first picture, the signal processing unit provides the periodically modulated clock signal to the scanning lines according to a first scanning time sequence;

in the second picture, the signal processing unit provides the periodically modulated clock signal to the scanning lines according to a second scanning time sequence;

13. The spread spectrum display panel as set out in claim 12, wherein the start scan line of the second scan sequence is shifted by 0.5 x k2 of the scan lines with respect to the first scan sequence.

14. The display panel according to claim 11, wherein the control circuit comprises a computing unit and a signal processing unit, the computing unit is configured to output a timing adjustment signal, the signal processing unit is configured to control the clock signal according to the timing adjustment signal, the clock signal that is periodically modulated has a spreading period, the first frame and the second frame each require a frame scan time, and each of the scan lines requires a line scan time;

15. The spread spectrum display panel as set out in claim 14, wherein the start scan time of the second scan timing is shifted by 0.5 times the spread spectrum period relative to the first scan timing.

16. The display panel according to claim 11, wherein the control circuit comprises a computation unit and a signal processing unit, the computation unit is configured to output a timing adjustment signal, the signal processing unit is configured to control the clock signal according to the timing adjustment signal, the clock signal that is periodically modulated has a spreading period, the first frame and the second frame each require a frame scan time, the first frame and the second frame each have a plurality of subframes, and each subframe requires a subframe scan time;

17. The display panel according to claim 16, wherein the start scan time of the second scan sequence is shifted with respect to the first scan sequence by a delay time that is less than 0.5 times the difference between the spread period and the sub-frame scan time.

18. The display panel according to claim 11, wherein the control circuit comprises a computation unit and a signal processing unit, the computation unit is used for outputting a timing adjustment signal, the signal processing unit controls the clock signal according to the timing adjustment signal, the periodically modulated clock signal has a spread spectrum period, and each of the first frame and the second frame requires a frame scanning time;

in the first picture, the signal processing unit provides the periodically modulated clock pulse signal to the scanning lines according to a first scanning time sequence, wherein the first picture is an odd picture;

the signal processing unit provides the periodically modulated clock pulse signal to the scanning lines according to a second scanning time sequence in the second picture, wherein the second picture is an even picture;

19. The spread spectrum display panel as claimed in claim 18, wherein the first shift amount and the second shift amount differ by 0.5 times the spread spectrum period.

20. The spread spectrum display panel of claim 18, wherein

A frame preceding the first frame or the second frame has a remainder time of the spread spectrum period;