CN114156266A - 功率半导体元件 - Google Patents

功率半导体元件 Download PDF

Info

Publication number
CN114156266A
CN114156266A CN202010927143.2A CN202010927143A CN114156266A CN 114156266 A CN114156266 A CN 114156266A CN 202010927143 A CN202010927143 A CN 202010927143A CN 114156266 A CN114156266 A CN 114156266A
Authority
CN
China
Prior art keywords
power semiconductor
semiconductor device
well region
gate structure
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010927143.2A
Other languages
English (en)
Inventor
林宗翰
叶宜函
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
United Microelectronics Corp
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to CN202010927143.2A priority Critical patent/CN114156266A/zh
Priority to US17/072,064 priority patent/US11101384B1/en
Priority to US17/378,820 priority patent/US11637200B2/en
Publication of CN114156266A publication Critical patent/CN114156266A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7817—Lateral DMOS transistors, i.e. LDMOS transistors structurally associated with at least one other device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66484—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with multiple gate, at least one gate being an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

本发明公开一种功率半导体元件，包括:基材、第一阱区、第二阱区、漏极、源极、第一栅极结构、第二栅极结构及掺杂区。第一阱区具有第一电性，由基材表面延伸进入基材中。第二阱区具有第二电性，由基材表面延伸进入基材中。漏极具有第一电性，并位于第一阱区中。源极具有第一电性，并位于第二阱区中。第一栅极结构位于基材表面上，且与第一阱区和第二阱区至少部分重叠。第二栅极结构位于基材表面上，且与第二阱区重叠，并与第一栅极结构隔离。掺杂区具有该第一电性，位于第二阱区中，并且连接第一栅极结构和第二栅极结构。

Description

功率半导体元件
技术领域
本发明涉及一种半导体元件，特别是涉及一种功率半导体元件(powersemiconductor device)。
背景技术
功率半导体元件，例如，金属氧化物半导体场效晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor，MOSFET)，为电子信息产品的电源控制元件，具备大导通电流、低导通电阻值、高切换速度及耐高压电流的特性，主要应用于计算机、移动电话及可携式产品的交换式电源控制系统。
而为了实现更高电压的操作，现有的作法是延长金属氧化物半导体场效晶体管的栅极长度(Lg)，以防止热载流子注入(hot carriers injectionHCI)所引发的击穿(punchthrough)漏电现象。然而考虑元件的尺寸(design rule)与制作工艺技术(例如，化学机械研磨(Chemical-Mechanical Planarization，CMP)的平整度)的局限性，栅极长度无法过度延长。因此如何在不过度延长栅极长度的前提下，提高金属氧化物半导体场效晶体管的操作电压以及元件的可靠度，已经成为该技术领域的重要课题之一。
因此，有需要提供一种先进的功率半导体元件，来解决现有技术所面临的问题。
发明内容
本发明的一实施例揭露一种功率半导体元件，其特征在于，该功率半导体元件包括:基材、第一阱区、第二阱区、漏极、源极、第一栅极结构、第二栅极结构以及掺杂区。第一阱区具有第一电性，由基材表面延伸进入基材之中。第二阱区具有第二电性，由基材表面延伸进入基材之中。漏极具有第一电性，并位于第一阱区之中。源极具有第一电性，并位于第二阱区之中。第一栅极结构位于基材表面上，且与第一阱区和第二阱区至少部分重叠。第二栅极结构位于基材表面上，且与第二阱区重叠，并与第一栅极结构隔离。掺杂区具有该第一电性，位于第二阱区之中，并且连接第一栅极结构和第二栅极结构。
根据上述实施例，本发明是在提供一种功率半导体元件包括至少二个金属氧化物半导体场效晶体管元件，其在源极和漏极之间至少形成彼此分隔的第一栅极结构和第二栅极结构，再以一个掺杂区将此二个栅极结构电连接在一起。其中，此一掺杂区的电性与源极和漏极相同，用于使第一栅极结构与源极和漏极组合形成一个第一晶体管单元；且使第二栅极结构与掺杂区和漏极的组合形成一个第二晶体管单元，并与第一晶体管单元彼此串连。通过此一设计可以在不过度延长栅极长度的前提下，提高功率半导体元件的操作电压以及可靠度。
附图说明
为了对本发明的上述及其他方面有更佳的了解，下文特举实施例，并配合所附的附图详细说明如下：
图1A至图1E为本发明的一实施例所绘示的一系列制作功率半导体元件的制作工艺结构剖面示意图；
图2为本发明的另一实施例所绘示的功率半导体元件的结构剖面示意图；
图3A为图2所提供的功率半导体元件和比较例的功率半导体元件的栅极-源极/漏极重叠长度-驱动电流(Ion)关系曲线图；
图3B为图2所提供的功率半导体元件和比较例的功率半导体元件的栅极-源极/漏极重叠长度-截止电流(Ioff)关系曲线图；
图3C为图2所提供的功率半导体元件和比较例的功率半导体元件的栅极-源极/漏极重叠长度-最大基材电流(Isubmax)关系曲线图；
图4为本发明的又一实施例所绘示的功率半导体元件的结构剖面示意图；
图5A为图4所提供的功率半导体元件和比较例的功率半导体元件的栅极-源极/漏极重叠长度-驱动电流(Ion)关系曲线图；
图5B为图4所提供的功率半导体元件和比较例的功率半导体元件的栅极-源极/漏极重叠长度-截止电流(Ioff)关系曲线图；以及
图5C为图4所提供的功率半导体元件和比较例的功率半导体元件的栅极-源极/漏极重叠长度-最大基材电流(Isubmax)关系曲线图。
符号说明
100、200、400:功率半导体元件
101、401:基材
101a、401a:基材表面
102、403:p型阱区
103、402:n型阱区
104:栅介电层
105:导体层
106、107、407:栅极结构
108、408:虚拟栅极结构
109、409:源极
110、410:漏极
111、411:掺杂区
112:金属内连线结构
113:共同电压源
120、130:金属氧化物半导体场效晶体管单元
240:浅沟隔离结构
301、302、303、311、312、313、501、502、503、511、512、513:栅极-源极/漏极重叠长度-驱动电流关系曲线
P:p型阱区和n型阱区之间的距离
Lov2、Lov4:栅极-源极/漏极重叠长度
H:p型阱区和n型阱区之间的距离
具体实施方式
本发明是提供一种功率半导体元件，可在不过度延长栅极长度的前提下，提高金属氧化物半导体场效晶体管的操作电压以及元件可靠度。为了对本发明的上述实施例及其他目的、特征和优点能更明显易懂，下文特举多个实施例，并配合所附的附图作详细说明。
但必须注意的是，这些特定的实施案例与方法，并非用以限定本发明。本发明仍可采用其他特征、元件、方法及参数来加以实施。优选实施例的提出，仅用以例示本发明的技术特征，并非用以限定本发明的权利要求。该技术领域中具有通常知识者，将可根据以下的描述，在不脱离本发明的精神范围内，作均等的修饰与变化。在不同实施例与附图之中，相同的元件，将以相同的元件符号加以表示。
请参照图1A至图1E，图1A至图1E是根据本发明的一实施例所绘示的一系列制作功率半导体元件100的制作工艺结构剖面示意图。功率半导体元件100的制作方法包括下述步骤：首先提供一个基材101。在本发明的一些实施例中，基材101可以是由半导体材质，例如硅(silicon，Si)、锗(germanium，Ge)，或化合半导体材质，例如砷化镓(gallium arsenide，GaAs)，所构成。但在另一些实施例中，基材101。也可以是一种绝缘层上覆硅(SilicononInsulator，SOI)基板。在本实施例之中，基材101较佳是一种硅基材，例如是硅晶片(如图1A所绘示)。
接着，以至少一次离子掺杂(ion implantation)制作工艺，在元件基材101表面101a中形成至少一个p型阱区102以及至少一个n型阱区103。在本发明的一些实施例中，p型阱区102(或以PW表示)和n型阱区103(或以NW表示)都由基材101表面101a延伸进入基材101之中。其中，n型阱区103与p型阱区102邻接，但彼此隔离。在本实施例中，基材101具有p型电性；p型阱区102和n型阱区103具有比基材101还大的掺杂浓度，且二者是通过一部分的基材101彼此隔离。其中p型阱区102和n型阱区103之间的距离H(如图1B所绘示)。
然而n型阱区103与p型阱区102的配置并不以此为限，例如在本发明的另一实施例中，n型阱区103与p型阱区102并未彼此隔离。
接着，在基材101表面101a形成依序堆叠的栅介电层104和导体层105。在本发明的一些实施例中，构成介电层104的材料可以是二氧化硅(SiO2)、氮化硅(SiN)、氮氧化硅(SiNO)、高介电系数(high-κ)介电材料(例如，氧化鋡(HfO2)、氧化铝(AlOx))或上述介电材料的组合。构成导体层105可以是多晶硅、金属(例如、金、银、铜、铝或钨)、金属化合物(例如，氮化钛或氮化钽)或上述的组合。
之后，以光致抗蚀剂蚀刻制作工艺对栅介电层104和导体层105进行图案化，用于在基材101表面101a形成多个包含一部分介电层104和一部分导体层105的栅极结构106和107。其中，栅极结构106与p型阱区102重叠；栅极结构107则分别与p型阱区102和n型阱区103至少部分重叠。换言之，栅极结构107横跨p型阱区102和n型阱区103，且与用来隔离p型阱区102和n型阱区103的一部分基材101重叠(如图1C所绘示)。
在本发明的一些实施例中，图案化介电层104和导体层105的步骤，还可以基材101表面101a上形成至少一个包含一部分介电层104和一部分导体层105的虚拟栅极结构108。例如，在本实施例中，图案化介电层104和导体层105的步骤还包括形成一个虚拟栅极结构108与n型阱区103重叠，并且与栅极结构106和107隔离。栅极结构107位于栅极结构106和虚拟栅极结构108之间。
后续，通过至少一次离子掺杂或外延制作工艺，在元件基材101表面101a中形成具有n型电性的源极109、漏极110和掺杂区111；使源极109位于p型阱区102之中，并且邻接栅极结构106；使漏极110位于n型阱区103之中，并邻接虚拟栅极结构108，且使虚拟栅极结构108位于栅极结构107和漏极110之间；使掺杂区111位于p型阱区102之中，并且连接栅极结构106和栅极结构107(如图1D所绘示)。在本发明的一些实施例中，源极109、漏极110和掺杂区111的掺杂浓度，都大于p型阱区102和n型阱区103的掺杂浓度，故而，源极109、漏极110和掺杂区111以N+表示之。
其中，栅极结构106、源极109、漏极110、p型阱区102、n型阱区103和基材101构成一个金属氧化物半导体场效晶体管单元120。栅极结构107、掺杂区111、漏极110、p型阱区102、n型阱区103和基材101构成另一个金属氧化物半导体场效晶体管单元130，且二个金属氧化物半导体场效晶体管单元120和130通过掺杂区111彼此串联。
后续，进行后段制作工艺，例如金属镶嵌制作工艺(metal damascene process)，在基材101的表面101a上形成金属内连线结构112，使虚拟栅极结构108浮置(floating)，并使栅极结构106和栅极结构107连接至一个共同电压源113，即可形成如图1E所绘示的功率半导体元件100。
制备完成的功率半导体元件100，包括:基材101、p型阱区102、n型阱区103、漏极110、源极109、栅极结构106、栅极结构107、虚拟栅极结构108以及掺杂区111。p型阱区102和n型阱区103由基材101表面101a延伸进入基材101之中，并且可(但不限)彼此隔离。源极109、漏极110和掺杂区111都具有n型电性，其中，漏极110位于n阱区103之中；源极109位于p型阱区102之中。栅极结构107位于基材101表面101a上，且与p型阱区102和n型阱区103至少部分重叠。栅极结构106位于基材101表面101a上，且与p型阱区102重叠，并与栅极结构107隔离。掺杂区111位于p型阱区102之中，并且连接栅极结构106和栅极结构107。虚拟栅极结构108位于基材101表面101a上，与n型阱区103重叠；且位于栅极结构107和漏极110之间。
然而值得注意的是，功率半导体元件100的结构并不以此为限，例如在本发明的另一些实施例中，功率半导体元件100可以包括更多的虚拟栅极结构(未绘示)，具有与虚拟栅极结构108相同的结构，且位于栅极结构107和虚拟栅极结构108之间。在本发明的另一些实施例中，功率半导体元件100可以包括更多与栅极结构106相同的栅极结构，配置于栅极结构107和栅极结构106之间。
另外，请参照图2，图2是根据本发明的另一实施例所绘示的功率半导体元件200的结构剖面示意图。在本实施例中，功率半导体元件200的结构大致与功率半导体元件100类似，差别在于功率半导体元件200还包括一个隔离结构，例如浅沟隔离结构(shallowtrench insulator，STI)240，位于型n阱区103之中，且位于栅极结构107和虚拟栅极结构108(或位于栅极结构107和漏极111)之间。
接着，按照本发明图2所述的功率半导体元件200的结构，制作出具有不同栅极-源极/漏极重叠长度(gate-to-S/D overlap length，LOV)Lov2的多个功率半导体元件200，并记录及分析这些功率半导体元件200的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)的变化。且与现有具有单一n型金属氧化物半导体场效晶体管单元的功率半导体元件的比较例进行比较。
请参照图3A至图3C，图3A是绘示图2所提供的功率半导体元件200和比较例的功率半导体元件的栅极-源极/漏极重叠长度-驱动电流(Ion)关系曲线图。图3B是绘示图2所提供的功率半导体元件200和比较例的功率半导体元件的栅极-源极/漏极重叠长度-截止电流(Ioff)关系曲线图。图3C是绘示图2所提供的功率半导体元件200和比较例的功率半导体元件的栅极-源极/漏极重叠长度-最大基材电流(Isubmax)关系曲线图。
其中，横轴代表标准化之后(normalized)的栅极-源极/漏极重叠长度(单位为a.u.)，横轴分别代表标准化之后的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)(单位分别为a.u.)。曲线301、302和303分别代表功率半导体元件200的栅极-源极/漏极重叠长度-驱动电流(Ion)关系曲线、栅极-源极/漏极重叠长度-截止电流(Ioff)关系曲线以及栅极-源极/漏极重叠长度-最大基材电流(Isubmax)关系曲线。曲线311、312和313分别代表比较例所提供的功率半导体元的栅极-源极/漏极重叠长度-驱动电流(Ion)关系曲线、栅极-源极/漏极重叠长度-截止电流(Ioff)关系曲线以及栅极-源极/漏极重叠长度-最大基材电流(Isubmax)关系曲线。
由图3A至图3C可以看出，在相同栅极-源极/漏极重叠长度Lov2下，功率半导体元件200的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)，都小于比较例所提供的功率半导体元的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)。可见，和比较例所提供的功率半导体元件相比，当具有相同驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)的情况下，功率半导体元件200可以具有较长的栅极-源极/漏极重叠长度Lov2，较不易产生热载流子注入(所引发的击穿漏电现象，因此具有较高的操作电压。
另外，功率半导体元件200驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)，随着栅极-源极/漏极重叠长度的增长并无明显的波动。反观，比较例所提供的功率半导体元件的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)随着栅极-源极/漏极重叠长度的增长明显飙高。显示功率半导体元件200，相对于比较例所提供的功率半导体元，具有较高的设计弹性与操作可靠度。
另外，虽然上述实施例所述的功率半导体元件100和200所包含的且横向扩散金属氧化物半导体场效晶体管元件120和晶体管元件130，都为n型电性场效晶体管。但在本发明所述的功率半导体元件并不以此为限，在例如请参照图4，图4是根据本发明的又一实施例所绘示的功率半导体元件400结构剖面示意图。功率半导体元件400一些实施例中，功率半导体元件400的结构大致与功率半导体元件200类似，差别在于功率半导体元件400包括p型电性场效晶体管。
在本实施例中，功率半导体元件400，包括:基材401、n型阱区402、p型阱区403、漏极410、源极409、栅极结构406、栅极结构407、虚拟栅极结构408以及掺杂区411。其中基材401具有n型电性。
n型阱区402和p型阱区403由基材401表面401a延伸进入基材401之中，并且彼此隔离。源极409、漏极410和掺杂区411都具有p型电性。其中，漏极410位于p型阱区403之中；源极409位于n型阱区402之中。栅极结构407位于基材401表面401a上，且与n型阱区402和p型阱区403至少部分重叠。栅极结构406位于基材401表面401a上，且与n型阱区402重叠，并与栅极结构407隔离。掺杂区411位于n型阱区402之中，并且连接栅极结构406和栅极结构407。虚拟栅极结构408位于基材401表面401a上，与p型阱区403重叠；且位于栅极结构407和漏极410之间。浅沟隔离结构440，位于p型阱区403之中，且位于栅极结构407和虚拟栅极结构408(或位于栅极结构407和漏极411)之间。
同样地，按照本发明图4所述的功率半导体元件400的结构，制作出具有不同栅极-源极/漏极重叠长度Lov4的多个功率半导体元件400，并记录及分析这些功率半导体元件400的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)的变化。且与现有具有单一p型金属氧化物半导体场效晶体管单元的功率半导体元件的比较例进行比较。
请参照图5A至图5C，图5A是绘示图4所提供的功率半导体元件400和比较例的功率半导体元件的栅极-源极/漏极重叠长度-驱动电流(Ion)关系曲线图。图5B是绘示图4所提供的功率半导体元件400和比较例的功率半导体元件的栅极-源极/漏极重叠长度-截止电流(Ioff)关系曲线图。图5C是绘示图4所提供的功率半导体元件400和比较例的功率半导体元件的栅极-源极/漏极重叠长度-最大基材电流(Isubmax)关系曲线图。
其中，横轴代表标准化之后的栅极-源极/漏极重叠长度(单位为a.u.)，横轴分别代表标准化之后的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)(单位分别为a.u.)。曲线501、502和503分别代表功率半导体元件400的栅极-源极/漏极重叠长度-驱动电流(Ion)关系曲线、栅极-源极/漏极重叠长度-截止电流(Ioff)关系曲线以及栅极-源极/漏极重叠长度-最大基材电流(Isubmax)关系曲线。曲线511、512和513分别代表比较例所提供的功率半导体元的栅极-源极/漏极重叠长度-驱动电流(Ion)关系曲线、栅极-源极/漏极重叠长度-截止电流(Ioff)关系曲线以及栅极-源极/漏极重叠长度-最大基材电流(Isubmax)关系曲线。
由图5A至图5C可以看出，在相同栅极-源极/漏极重叠长度下，功率半导体元件400的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)，都小于比较例所提供的功率半导体元的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)。可见，和比较例所提供的功率半导体元件相比，当具有相同驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)的情况下，功率半导体元件400可以具有较长的栅极-源极/漏极重叠长度，较不易产生热载流子注入(所引发的击穿漏电现象，因此具有较高的操作电压。
另外，功率半导体元件400驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)，随着栅极-源极/漏极重叠长度的增长，并无明显的波动。反观，比较例所提供的功率半导体元件的驱动电流(Ion)、截止电流(Ioff)和最大基材电流(Isubmax)随着栅极-源极/漏极重叠长度的增会长明显飙高。显示功率半导体元件400，相对于比较例所提供的功率半导体元，件具有较高的设计弹性与操作可靠度。
根据上述实施例，本发明是在提供一种功率半导体元件包括至少二个金属氧化物半导体场效晶体管元件，其在源极和漏极之间至少形成彼此分隔的第一栅极结构和第二栅极结构，再以一个掺杂区将此二个栅极结构电连接在一起。其中，此一掺杂区的电性与源极和漏极相同，用于使第一栅极结构与源极和漏极组合形成一个第一晶体管单元；使第二栅极结构与掺杂区和漏极的组合形成一个第二晶体管单元，并与第一晶体管单元彼此串连。通过此一设计可以在不过度延长栅极长度的前提下，提高功率半导体元件的操作电压以及可靠度。
虽然结合以上优选实施例公开了本发明，然而其并非用以限定本发明，任何该技术领域中具有通常知识者，在不脱离本发明的精神和范围内，可作些许的更动与润饰，因此本发明的保护范围应当以附上的权利要求所界定的为准。

Claims (9)

1.一种功率半导体元件，其特征在于，该功率半导体元件包括:
基材，具有表面；
第一阱区，具有第一电性，由该表面延伸进入该基材之中；
第二阱区，具有第二电性，由该表面延伸进入该基材之中，并与该第一阱区隔离；
漏极，具有该第一电性，并位于该第一阱区之中；
源极，具有该第一电性，并位于该第二阱区之中；
第一栅极结构，位于该表面上，且与该第一阱区和该第二阱区至少部分重叠；
第二栅极结构，位于该表面上，且与该第二阱区重叠；以及
掺杂区，具有该第一电性，位于该第二阱区之中，并且连接该第一栅极结构和该第二栅极结构。
2.如权利要求1所述的功率半导体元件，其特征在于，还包括隔离结构，位于该第一阱区中，且位于该第一栅极结构和该漏极之间。
3.如权利要求2所述的功率半导体元件，其特征在于，该隔离结构是浅沟隔离结构(shallow trench insulator，STI)。
4.如权利要求1所述的功率半导体元件，其特征在于，还包括虚拟栅极(dummy gate)结构，位于该表面上，且位于该第一栅极结构和该漏极之间。
5.如权利要求4所述的功率半导体元件，其特征在于，该虚拟栅极结构邻接该漏极，且与该第一栅极结构隔离。
6.如权利要求1所述的功率半导体元件，其特征在于，该第一电性为n型电性；且该第二电性为p型电性。
7.如权利要求1所述的功率半导体元件，其特征在于，该第一电性为p型电性；且该第二电性为n型电性。
8.如权利要求1所述的功率半导体元件，其特征在于，该第一栅极结构和该第二栅极结构连接至一共同电压源。
9.如权利要求1所述的功率半导体元件，其特征在于，该第二栅极结与该第一栅极结构隔离。
CN202010927143.2A 2020-09-07 2020-09-07 功率半导体元件 Pending CN114156266A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202010927143.2A CN114156266A (zh) 2020-09-07 2020-09-07 功率半导体元件
US17/072,064 US11101384B1 (en) 2020-09-07 2020-10-16 Power semiconductor device
US17/378,820 US11637200B2 (en) 2020-09-07 2021-07-19 Power semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010927143.2A CN114156266A (zh) 2020-09-07 2020-09-07 功率半导体元件

Publications (1)

Publication Number Publication Date
CN114156266A true CN114156266A (zh) 2022-03-08

Family

ID=77390104

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010927143.2A Pending CN114156266A (zh) 2020-09-07 2020-09-07 功率半导体元件

Country Status (2)

Country Link
US (2) US11101384B1 (zh)
CN (1) CN114156266A (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114156266A (zh) * 2020-09-07 2022-03-08 联华电子股份有限公司 功率半导体元件

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0175277B1 (ko) 1996-02-29 1999-02-01 김광호 중첩된 필드플레이트구조를 갖는 전력반도체장치 및 그의 제조방법
US6927453B2 (en) 2003-09-30 2005-08-09 Agere Systems Inc. Metal-oxide-semiconductor device including a buried lightly-doped drain region
US7560324B2 (en) 2004-07-08 2009-07-14 Texas Instruments Incorporated Drain extended MOS transistors and methods for making the same
US7405443B1 (en) * 2005-01-07 2008-07-29 Volterra Semiconductor Corporation Dual gate lateral double-diffused MOSFET (LDMOS) transistor
JP5031996B2 (ja) 2005-03-28 2012-09-26 ラピスセミコンダクタ株式会社 半導体装置及びその製造方法
US7368785B2 (en) 2005-05-25 2008-05-06 United Microelectronics Corp. MOS transistor device structure combining Si-trench and field plate structures for high voltage device
US7372104B2 (en) 2005-12-12 2008-05-13 Taiwan Semiconductor Manufacturing Company, Ltd. High voltage CMOS devices
US7824968B2 (en) 2006-07-17 2010-11-02 Chartered Semiconductor Manufacturing Ltd LDMOS using a combination of enhanced dielectric stress layer and dummy gates
US7728388B1 (en) 2008-12-19 2010-06-01 United Microelectronics Corp. Power semiconductor device
US8115253B2 (en) * 2009-09-10 2012-02-14 United Microelectronics Corp. Ultra high voltage MOS transistor device
US8507987B2 (en) 2009-09-21 2013-08-13 United Microelectronics Corp. Radio frequency device and method for fabricating the same
JP5504187B2 (ja) * 2011-01-26 2014-05-28 株式会社東芝 半導体装置及びその製造方法
US8610206B2 (en) 2011-02-18 2013-12-17 Macronix International Co., Ltd. Split-gate lateral diffused metal oxide semiconductor device
US8643101B2 (en) 2011-04-20 2014-02-04 United Microelectronics Corp. High voltage metal oxide semiconductor device having a multi-segment isolation structure
US8921937B2 (en) 2011-08-24 2014-12-30 United Microelectronics Corp. High voltage metal-oxide-semiconductor transistor device and method of fabricating the same
TWI523196B (zh) 2012-02-24 2016-02-21 聯華電子股份有限公司 高壓金氧半導體電晶體元件及其佈局圖案
TWI675473B (zh) 2015-11-16 2019-10-21 聯華電子股份有限公司 高壓半導體裝置
JP7114290B2 (ja) * 2018-03-16 2022-08-08 株式会社東芝 半導体装置
CN114156266A (zh) * 2020-09-07 2022-03-08 联华电子股份有限公司 功率半导体元件

Also Published As

Publication number Publication date
US20220077313A1 (en) 2022-03-10
US11637200B2 (en) 2023-04-25
US11101384B1 (en) 2021-08-24

Similar Documents

Publication Publication Date Title
US10971624B2 (en) High-voltage transistor devices with two-step field plate structures
US6977419B2 (en) MOSFETs including a dielectric plug to suppress short-channel effects
US10134868B2 (en) MOS devices with mask layers and methods for forming the same
US11721738B2 (en) Laterally diffused metal oxide semiconductor with gate poly contact within source window
US6835967B2 (en) Semiconductor diodes with fin structure
US10396166B2 (en) Semiconductor device capable of high-voltage operation
US20130230954A1 (en) Tunneling field-effect transistor with direct tunneling for enhanced tunneling current
US10910377B2 (en) LDMOS devices, integrated circuits including LDMSO devices, and methods for fabricating the same
US11410991B2 (en) Series resistor over drain region in high voltage device
US20170263761A1 (en) Semiconductor device capable of high-voltage operation
US10879389B2 (en) Semiconductor device capable of high-voltage operation
US8278683B2 (en) Lateral insulated gate bipolar transistor
US20090159968A1 (en) BVDII Enhancement with a Cascode DMOS
KR20080073313A (ko) 반도체 장치 및 그 제조 방법
US10615159B2 (en) Integrated LDMOS and VFET transistors
US8598659B2 (en) Single finger gate transistor
US11316036B2 (en) Insulated gate bipolar transistor structure and manufacturing method thereof
US11637200B2 (en) Power semiconductor device
US9525058B2 (en) Integrated circuit and method of manufacturing an integrated circuit
CN103367407A (zh) 不通电的伪栅极
CN108022926B (zh) 半导体器件及其形成方法
US20130149848A1 (en) Method for manufacturing vertical-channel tunneling transistor
CN114068701A (zh) 半导体结构及其形成方法
US8921888B2 (en) Method of making semiconductor device
US20230420560A1 (en) Semiconductor device and method for forming the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination