CN114138301B - Device and server for online updating BIOS chip - Google Patents

Device and server for online updating BIOS chip Download PDF

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Publication number
CN114138301B
CN114138301B CN202111424571.4A CN202111424571A CN114138301B CN 114138301 B CN114138301 B CN 114138301B CN 202111424571 A CN202111424571 A CN 202111424571A CN 114138301 B CN114138301 B CN 114138301B
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bios
switch
update
switching circuit
bmc
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CN114138301A (en
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王世鹏
李岩
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Inspur Electronic Information Industry Co Ltd
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Inspur Electronic Information Industry Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/60—Software deployment
    • G06F8/65—Updates

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  • General Engineering & Computer Science (AREA)
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Abstract

The utility model discloses a device and server of BIOS chip on-line updating, this scheme forms binary tree structure through each change over switch in 0 th level change over circuit, first level change over circuit through nth level change over circuit, and when receiving the update instruction, BMC is according to the BIOS chip that updates of update instruction determination to control corresponding change over switch and switch between its input and output so that BMC is connected with the BIOS chip that waits to update through the change over switch at every level, comes the BIOS chip that waits to update on line. According to the method and the device, the on-line updating of the plurality of BIOS chips is realized by setting the change-over switch in the multi-stage switching circuit, and the practicability is higher.

Description

Device and server for online updating BIOS chip
Technical Field
The invention relates to the technical field of online updating, in particular to a device and a server for online updating of a BIOS chip.
Background
In the prior art, a BMC (Baseboard Management Controller ) and a processing module such as a PCH (Platform Controller Hub, platform control center) or a CPU (Central Processing Unit ) are connected to a BIOS (Basic Input Output System ) chip through a switch. When the BIOS chip works normally, the processing module is connected with the BIOS chip through the change-over switch; when the BIOS chip is updated, the BMC is connected with the BIOS chip through a change-over switch, so that the BMC updates the BIOS chip; however, there are a plurality of BIOS chips in some servers, by adopting the above manner, the BMC can only complete the update of one BIOS chip through the switch, and cannot support the online update of a plurality of BIOS chips, so that the practicality is low.
Disclosure of Invention
The invention aims to provide a device and a server for online updating of BIOS chips, which realize online updating of a plurality of BIOS chips by setting a change-over switch in a multi-stage switching circuit and have higher practicability.
In order to solve the above technical problems, the present invention provides a device for online updating a BIOS chip, including:
BMC, 0 th level switching circuit, first level switching circuit through N th level switching circuit, N th level switching circuit includes 2 n A 0 th level switching circuit, a first switchThe switching circuit is divided into a single input switch and a single output switch until each switching switch in the N-1 switching circuit is a single input switch and a single output switch, each switching switch in the N switching circuit is a positive integer, and N is a non-negative integer less than or equal to N;
the method comprises the steps that a 0 th-stage switching circuit and all the switching switches in the first-stage switching circuit to an N-stage switching circuit form a binary tree structure, an update pin of a BMC is connected with the input end of the switching switch of the 0 th-stage switching circuit, the other input end of each switching switch in the N-stage switching circuit is connected with a corresponding processing module, and the output end of each switching switch in the N-stage switching circuit is connected with a corresponding BIOS chip; the control pins of the BMC are also connected with the control ends of all the change-over switches;
and the BMC is used for determining the BIOS chip to be updated according to the update instruction when receiving the update instruction, and controlling the corresponding change-over switch to switch between the input end and the output end of the BIOS chip to be updated so that the BMC is connected with the BIOS chip to be updated through the change-over switches at all levels, so as to update the BIOS chip to be updated on line.
Preferably, the nth stage switching circuit further comprises 2 n And one end of the resistor is connected with the control end of the change-over switch, the connected public end of the resistor is connected with the BMC, and the other end of the resistor is grounded.
Preferably, the BMC is further configured to control the corresponding switch to switch between the input end and the output end thereof when receiving the normal working instruction, so that all the BIOS chips are connected with the corresponding processing modules.
Preferably, the processing module comprises a CPU and a level conversion module, and the level conversion module is connected between the CPU and the switch and is used for performing level conversion on data transmitted between the CPU and the switch.
Preferably, when the update instruction is an instruction for updating a single BIOS chip:
the BMC is specifically configured to determine a single BIOS chip to be updated according to the update instruction when the update instruction is received, and control the corresponding change-over switch to switch between the input end and the output end thereof, so that the BMC is connected with the single BIOS chip to be updated through the change-over switches at each stage, so as to update the single BIOS chip to be updated online.
Preferably, when the update instruction is an instruction for updating a plurality of BIOS chips:
the BMC is specifically configured to determine a plurality of BIOS chips to be updated and determine update sequences of the plurality of BIOS chips to be updated according to the update instructions when receiving the update instructions, and control corresponding switches to switch between an input end and an output end according to the update sequences, so that the BMC is sequentially connected with the BIOS chips to be updated through the switches at each level, so as to update the BIOS chips to be updated online.
Preferably, determining the update sequence of the plurality of BIOS chips to be updated includes:
and determining the updating sequence of the plurality of BIOS chips to be updated based on the serial numbers of the plurality of BIOS chips to be updated.
In order to solve the technical problems, the invention also provides a server, which comprises the device for updating the BIOS chip on line, and further comprises 2 N BIOS chips and 2 N The device for online updating the BIOS chip is respectively connected with the processing module 2 N Each BIOS chip and 2 N And the processing modules are connected.
The utility model provides a device and server that BIOS chip was updated on line, this scheme forms binary tree structure through each change over switch in 0 th level change over circuit, first level change over circuit through nth level change over circuit, and when receiving the update instruction, BMC is according to the BIOS chip that updates of update instruction determination to control corresponding change over switch and switch between its input and output so that BMC is connected with the BIOS chip that waits to update through the change over switch at every level, comes the BIOS chip that waits to update on line. According to the method and the device, the on-line updating of the plurality of BIOS chips is realized by setting the change-over switch in the multi-stage switching circuit, and the practicability is higher.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a device for online updating BIOS chips according to the present invention;
FIG. 2 is a schematic diagram of a device for online updating BIOS chips in the prior art according to the present invention;
fig. 3 is a schematic structural diagram of another device for online updating of a BIOS chip according to the present invention.
Detailed Description
The invention provides a device and a server for online updating of BIOS chips, which realize online updating of a plurality of BIOS chips by setting a change-over switch in a multi-stage switching circuit and have higher practicability.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 is a schematic structural diagram of an apparatus for online updating a BIOS chip according to the present invention, where the apparatus includes:
BMC1, 0 th stage switching circuit 21, first stage switching circuit 22 through N th stage switching circuit, the N th stage switching circuit including 2 n The switching switches 3, the 0 th switching circuit 21, the first switching circuit 22 and the switching switches 3 in the N-1 th switching circuit are single-input and two-output switches, and the N-1 th switching circuit is respectivelyThe change-over switch 3 is a two-input and single-output switch, N is a positive integer, and N is a non-negative integer less than or equal to N;
the 0 th level switching circuit 21 and the first level switching circuit 22 form a binary tree structure until each switching switch 3 in the N level switching circuit, an update pin of the BMC1 is connected with the input end of each switching switch 3 of the 0 th level switching circuit 21, the other input end of each switching switch 3 in the N level switching circuit is connected with a corresponding processing module 4, and the output end of each switching switch 3 in the N level switching circuit is connected with a corresponding BIOS chip; the control pins of the BMC1 are also connected with the control ends of all the change-over switches 3;
when receiving the update instruction, the BMC1 is configured to determine a BIOS chip to be updated according to the update instruction, and control the corresponding switch 3 to switch between an input end and an output end thereof, so that the BMC1 is connected with the BIOS chip to be updated through the switches 3 at each stage, so as to update the BIOS chip to be updated online.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a device for online updating of a BIOS chip in the prior art, in which a BMC and a processing module, such as a PCH or a CPU, are connected to the BIOS chip through a switch. The specific control mode of the change-over switch can be as follows: when the BIOS chip works normally, the change-over switch receives a low-level control signal SEL, at the moment, an A port of the change-over switch is connected with a B1 port, and the processing module sends a PCH_SPI (Serial Peripheral interface ) signal to the BIOS chip as a BIOS_SPI signal of the BIOS chip; when the BIOS chip is updated, the BMC outputs a high level through a General-Purpose Input/Output (GPIO) interface to enable the change-over switch to receive a control signal SEL of the high level, at the moment, an A port and a B2 port of the change-over switch are connected, and the BMC sends a BMC_SPI (Serial Peripheral interface ) signal to the BIOS chip as a BIOS_SPI signal of the BIOS chip, so that the BMC updates the BIOS chip; however, there are a plurality of BIOS chips in some servers, and the above manner cannot support online update of the plurality of BIOS chips, so that the practicability is low.
Specifically, in this application, taking 4 BIOS chips as an example, referring to fig. 1, in order to implement online update of the BMC1 on the 4 BIOS chips, connection between the BMC1 and the 4 BIOS chips needs to be completed online, a binary tree structure circuit is set between the BMC1 and the 4 BIOS chips by the 0 th level switching circuit 21, the first level switching circuit 22 and the second level switching circuit 23, after the BMC1 receives an update instruction and determines the BIOS chip to be updated according to the update instruction, a circuit that is connected in the binary tree structure is formed by controlling the switch 3 in each level switching circuit to switch between the input end and the output end thereof, so that the BIOS chip to be updated is updated online.
In addition, the second-stage switching circuit 23, which is the last-stage switching circuit connected to the BIOS chip, is composed of two-input single-output switches, and two inputs thereof, one of which is connected to the first-stage switching circuit 22, which is the last-stage switching circuit, and the other of which is connected to the processing module 4; the second-stage switching circuit 23 is connected to the processing module 4 or the first-stage switching circuit 22 with the BIOS chip under the control of the BMC1, and updates the BIOS chip when the first-stage switching circuit 22 is connected to the BIOS chip.
In summary, the present application provides a device for online updating of a BIOS chip, where the device forms a binary tree structure through each of the switches 3 from the 0 th level switching circuit 21 to the first level switching circuit 22 to the nth level switching circuit, when the BMC1 receives an update instruction, determines the BIOS chip to be updated according to the update instruction, and controls the corresponding switch 3 to switch between the input end and the output end thereof so that the BMC1 is connected with the BIOS chip to be updated through each level of switch 3, so as to update the BIOS chip to be updated online. The on-line updating of a plurality of BIOS chips is realized by setting the change-over switch 3 in the multi-stage switching circuit, and the practicability is higher.
Based on the above embodiments:
referring to fig. 3, fig. 3 is a schematic structural diagram of another device for online updating of a BIOS chip according to the present invention.
As a preferred embodiment, the nth stage switching circuit further includes 2 n A resistor R, one end of the resistor RThe common end connected with the control end of the change-over switch 3 is connected with the BMC1, and the other end of the resistor R is grounded.
In this embodiment, the input signal at the control end of the switch 3 is set to be low level by default through the resistor R, and specifically, the control manner of the switch 3 may be: when the control end of the change-over switch 3 receives a low-level control signal SEL, the port A of the change-over switch 3 is connected with the port B1; when the control end of the change-over switch 3 receives a high-level control signal SEL sent by the BMC1, the port A of the change-over switch 3 is connected with the port B2; other modes of control of the changeover switch 3 are also possible, and are not particularly limited here.
In addition, after the BMC1 finishes the update instruction, the control ends of all the change-over switches 3 can be released back to the default value, so that the next control is convenient.
In summary, the control end of the switch 3 is set to be low by connecting the control end of the switch 3 with the resistor R grounded, and the control mode is simple and convenient after receiving the high level signal sent by the BMC 1.
As a preferred embodiment, the BMC1 is further configured to control the corresponding switch 3 to switch between its input and output ends when receiving a normal operation command, so that all the BIOS chips are connected to the respective corresponding processing modules 4.
In this embodiment, when the BIOS chip does not need to be updated, the BMC1 receives a normal operation instruction, and then controls all the BIOS chips to connect with the corresponding processing modules 4, so that the BIOS chips perform normal operation; the BIOS chip can be better controlled correspondingly according to actual conditions.
As a preferred embodiment, the processing module 4 includes a CPU41 and a level conversion module 42, and the level conversion module 42 is connected between the CPU41 and the switch 3, for level converting data transferred between the CPU41 and the switch 3.
In this embodiment, when the BIOS chip performs normal operation and is connected to the CPU41, the BIOS chip is a start-up memory chip of the CPU41 and is used to load a start-up program when the CPU41 is started up, but considering that some of the CPU41 has a working voltage of 1.8V, the CPU needs to be converted into a general 3.3V working voltage at this time, and the BIOS chip can be connected to the BIOS chip through the switch 3, so a level conversion module 42 is further required to be set between the CPU41 and the switch 3 to perform level conversion on data transmitted between the CPU41 and the switch 3, so that reliability of data transmission is improved, and the transmitted data may be a cpu_spi signal and be used as a bios_spi signal of the BIOS chip.
As a preferred embodiment, the update instruction is an instruction to update a single BIOS chip:
the BMC1 is specifically configured to determine a single BIOS chip to be updated according to the update instruction when the update instruction is received, and control the corresponding switch 3 to switch between the input end and the output end thereof, so that the BMC1 is connected with the single BIOS chip to be updated through the switches 3 at each stage, so as to perform online update on the single BIOS chip to be updated.
Taking 4 BIOS chips as an example, referring to fig. 3, in this embodiment, for example, when the BMC1 receives an update command, it determines that a single BIOS chip to be updated is the first BIOS chip from top to bottom in fig. 3 according to the update command, and controls the corresponding switch 3 to switch between the input end and the output end thereof, so that the BMC1 is connected to the first BIOS chip from top to bottom in fig. 3 through the switches 3 at each stage, so as to update the BIOS chip.
Specifically, the binary tree structure corresponding to the 4 BIOS chips may be: the bmc_spi signal of BMC1 is first divided into two paths of signals, i.e., a bmc_spi_b1 signal and a bmc_spi_b2 signal, by the level 0 switching circuit 21; the first stage switching circuit 22 then divides the two signals into four signals, namely, a bmc_spi0 signal, a bmc_spi1 signal, a bmc_spi2 signal, and a bmc_spi3 signal; the control flow for the corresponding change-over switch 3 may be: the control signal SEL0 is set to a high level through the GPIO0 interface of the BMC1, and the control signals SEL1,2 and 3 are set to a low level through the GPIO1 interface, the GPIO2 interface and the GPIO3 interface, at this time, the bmc_spi signal is switched to the bmc_spi_b1 signal and then to the bmc_spi0 signal, and the bmc_spi0 signal is used as the bios_spi signal of the first BIOS chip from top to bottom in fig. 3.
In sum, through controlling the switching circuits at all levels to connect the BMC1 with a single BIOS chip to be updated, the update of the single BIOS chip to be updated is completed, the connection of the BMC1 to any BIOS chip can be realized, and the practicability is higher.
As a preferred embodiment, the update instruction is an instruction to update a plurality of BIOS chips:
the BMC1 is specifically configured to, when receiving an update instruction, determine a plurality of BIOS chips to be updated according to the update instruction and determine update sequences of the plurality of BIOS chips to be updated, and control the corresponding switch 3 to switch between the input end and the output end according to the update sequences, so that the BMC1 is sequentially connected with the BIOS chips to be updated through the switches 3 at each stage, so as to update the BIOS chips to be updated online.
Taking 4 BIOS chips as an example, referring to fig. 3, in this embodiment, for example, when the BMC1 receives an update instruction, it determines that a plurality of BIOS chips to be updated are 4 BIOS chips in fig. 3 according to the update instruction, determines that the update sequence is from top to bottom in fig. 3, and controls the corresponding switch 3 to switch between the input end and the output end thereof so that the BMC1 is sequentially connected with the 4 BIOS chips from top to bottom in fig. 3 through the switches 3 at each stage to update.
Specifically, the binary tree structure corresponding to the 4 BIOS chips may be: the bmc_spi signal of BMC1 is first divided into two paths of signals, i.e., a bmc_spi_b1 signal and a bmc_spi_b2 signal, by the level 0 switching circuit 21; the first stage switching circuit 22 then splits the two signals into four signals, namely, a BMC_SPI0 signal, a BMC_SPI1 signal, a BMC_SPI2 signal, and a BMC_SPI3 signal.
The control flow for the corresponding change-over switch 3 may be: the control signal SEL0 is set to a high level through the GPIO0 interface of the BMC1, and the control signals SEL1,2 and 3 are set to a low level through the GPIO1 interface, the GPIO2 interface and the GPIO3 interface, at this time, the bmc_spi signal is switched to the bmc_spi_b1 signal and then to the bmc_spi0 signal, and the bmc_spi0 signal is used as the bios_spi signal of the first BIOS chip from top to bottom in fig. 3.
The control signals SEL0 and SEL1 are set to high level through the GPIO0 interface and the GPIO1 interface of the BMC1, and the control signals SEL2 and SEL3 are set to low level through the GPIO2 interface and the GPIO3 interface, at this time, the bmc_spi signal is switched to the bmc_spi_b1 signal and then to the bmc_spi1 signal, and the bmc_spi1 signal is used as the bios_spi signal of the second BIOS chip from top to bottom in fig. 3.
The control signals SEL0 and SEL3 are set to high level through the GPIO0 interface and the GPIO3 interface of the BMC1, and the control signals SEL1 and SEL2 are set to low level through the GPIO1 interface and the GPIO2 interface, at this time, the bmc_spi signal is switched to the bmc_spi_b2 signal and then to the bmc_spi2 signal, and the bmc_spi2 signal is used as the bios_spi signal of the third BIOS chip from top to bottom in fig. 3.
The control signals SEL0, SEL2 and SEL3 are set to high level through the GPIO0 interface, the GPIO2 interface and the GPIO3 interface of the BMC1, the control signal SEL1 is set to low level through the GPIO1 interface, at this time, the bmc_spi signal is switched to the bmc_spi_b2 signal and then to the bmc_spi3 signal, and the bmc_spi3 signal is used as the bios_spi signal of the fourth BIOS chip from top to bottom in fig. 3.
In summary, through controlling the switching circuit at all levels to connect BMC1 with a plurality of BIOS chips that wait to update in proper order, accomplish the update to a plurality of BIOS chips that wait to update, can realize BMC1 to a plurality of BIOS chips's connection in proper order, the practicality is higher.
As a preferred embodiment, determining an update sequence of a plurality of BIOS chips to be updated includes:
and determining the updating sequence of the plurality of BIOS chips to be updated based on the serial numbers of the plurality of BIOS chips to be updated.
In this embodiment, the update sequence of the plurality of BIOS chips to be updated may be determined according to the serial numbers of the plurality of BIOS chips to be updated, or may be other features capable of indicating the sequence, which is not particularly limited herein, and the update sequence may be determined according to the serial numbers, so that the BIOS chips may be updated in order more clearly and orderly.
The application also provides a server, which comprises the device for online updating the BIOS chip, and further comprises 2 N BIOS chips and 2 N The device for online updating the BIOS chip is respectively connected with 2 N BIOS chips and 2 N The processing modules are connected.
The device for online updating of the BIOS chip in the server provided in the present application is described in detail in all the above embodiments, and will not be described herein again.
It should be noted that in this specification the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (8)

1. An apparatus for online updating of a BIOS chip, comprising:
BMC, 0 th level switching circuit, first level switching circuit through N th level switching circuit, N th level switching circuit includes 2 n Each of the switching switches in the 0 th switching circuit and the first switching circuit up to the N-1 th switching circuit is a single-input and two-output switch, each of the switching switches in the N-th switching circuit is a two-input and single-output switch, N is a positive integer, and N is a non-negative integer less than or equal to N;
the method comprises the steps that a 0 th-stage switching circuit and all the switching switches in the first-stage switching circuit to an N-stage switching circuit form a binary tree structure, an update pin of a BMC is connected with the input end of the switching switch of the 0 th-stage switching circuit, the other input end of each switching switch in the N-stage switching circuit is connected with a corresponding processing module, and the output end of each switching switch in the N-stage switching circuit is connected with a corresponding BIOS chip; the control pins of the BMC are also connected with the control ends of all the change-over switches;
and the BMC is used for determining the BIOS chip to be updated according to the update instruction when receiving the update instruction, and controlling the corresponding change-over switch to switch between the input end and the output end of the BIOS chip to be updated so that the BMC is connected with the BIOS chip to be updated through the change-over switches at all levels, so as to update the BIOS chip to be updated on line.
2. The apparatus for on-line updating of BIOS chip as recited in claim 1, wherein the n-th level switching circuit further comprises 2 n And one end of the resistor is connected with the control end of the change-over switch, the connected public end of the resistor is connected with the BMC, and the other end of the resistor is grounded.
3. The apparatus for online updating of BIOS chips as in claim 1, wherein said BMC is further configured to control respective switches to switch between input and output terminals thereof to connect all of said BIOS chips to respective corresponding processing modules upon receiving a normal operation command.
4. The device for on-line updating of a BIOS chip according to claim 1, wherein said processing module comprises a CPU and a level shift module, said level shift module being connected between said CPU and said switch for level shifting data transferred between said CPU and said switch.
5. The apparatus for online updating of BIOS chips as recited in any one of claims 1 to 4, wherein said update instruction is an instruction to update a single BIOS chip:
the BMC is specifically configured to determine a single BIOS chip to be updated according to the update instruction when the update instruction is received, and control the corresponding change-over switch to switch between the input end and the output end thereof, so that the BMC is connected with the single BIOS chip to be updated through the change-over switches at each stage, so as to update the single BIOS chip to be updated online.
6. The apparatus for online updating of BIOS chips as claimed in any one of claims 1 to 4, wherein said update instruction is an instruction to update a plurality of BIOS chips:
the BMC is specifically configured to determine a plurality of BIOS chips to be updated and determine update sequences of the plurality of BIOS chips to be updated according to the update instructions when receiving the update instructions, and control corresponding switches to switch between an input end and an output end according to the update sequences, so that the BMC is sequentially connected with the BIOS chips to be updated through the switches at each level, so as to update the BIOS chips to be updated online.
7. The apparatus for on-line updating of BIOS chips as recited in claim 6, wherein determining an update sequence of a plurality of said BIOS chips to be updated comprises:
and determining the updating sequence of the plurality of BIOS chips to be updated based on the serial numbers of the plurality of BIOS chips to be updated.
8. A server, comprising the device for online updating of BIOS chips according to any one of claims 1 to 7, further comprising 2 N BIOS chips and 2 N The device for online updating the BIOS chip is respectively connected with the processing module 2 N Each BIOS chip and 2 N And the processing modules are connected.
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