CN113703850A - BIOS program starting method, system and related components - Google Patents
BIOS program starting method, system and related components Download PDFInfo
- Publication number
- CN113703850A CN113703850A CN202110808065.9A CN202110808065A CN113703850A CN 113703850 A CN113703850 A CN 113703850A CN 202110808065 A CN202110808065 A CN 202110808065A CN 113703850 A CN113703850 A CN 113703850A
- Authority
- CN
- China
- Prior art keywords
- bios
- speed
- south bridge
- program
- integrated south
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 37
- 238000004891 communication Methods 0.000 claims abstract description 102
- 230000008569 process Effects 0.000 claims description 5
- 238000004590 computer program Methods 0.000 claims description 3
- 238000012360 testing method Methods 0.000 abstract description 9
- 230000006870 function Effects 0.000 description 7
- 230000009471 action Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000011112 process operation Methods 0.000 description 2
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application discloses a starting method, a system and related components of a BIOS program, wherein the method comprises the following steps: acquiring the switch state of a dial switch unit; determining the BIOS communication rate according to the switch state; updating the BIOS communication rate in a rate register of the BIOSFLASH; and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register. The method and the device have the advantages that the dial switch unit is used for setting the adjustment premise of the BIOS communication speed, different switch states correspond to different BIOS communication speeds, and then the BIOS communication speed is updated in the speed register of the BIOS FLASH, so that the problem that the whole BIOS program is comprehensively covered and programmed in the BIOS FLASH is avoided, the BIOS communication speed is rapidly adjusted, and the method and the device are suitable for various scene switching and function testing.
Description
Technical Field
The present invention relates to the field of BIOS programs, and in particular, to a method and a system for starting a BIOS program, and related components.
Background
Generally, each time a server is powered on, a platform Peripheral Controller (PCH) will load a BIOS (Basic Input Output System) program from a BIOS Flash chip, the server enters a POST stage to perform operations such as power-on self-test and System configuration setting, and after the BIOS program runs out and confirms that hardware is correct, the server will deliver the server control right to an OS (open System) to provide computing services.
The integrated south bridge loads a BIOS program in a BIOS Flash chip through an SPI (Serial Peripheral Interface) bus, and configuration information such as communication modes, speed information and the like of the SPI bus is also stored in the Flash information, so that the integrated south bridge establishes communication with the Flash chip at a fixed frequency during each loading, acquires the configuration information and then configures the SPI bus to a communication mode specified by BIOS codes. Currently, if the communication mode of the SPI needs to be modified, the BIOS version needs to be updated. Because the BIOS is a program code solidified in the Flash chip, the update of the BIOS version requires a BIOS engineer to complete code modification firstly, then the BIOS of a new version is burnt into the Flash chip in a code refreshing mode supported by a server, and after the server is restarted after the AC is cut off, the new BIOS code can take effect. The communication mode of the whole SPI is modified, the process operation is complicated, the time cost is high, and a great deal of inconvenience exists in the function test and the scene switching.
Therefore, how to provide a solution to the above technical problems is a problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above, the present invention provides a method, a system and related components for starting a BIOS program easily and quickly. The specific scheme is as follows:
a starting method of a BIOS program comprises the following steps:
acquiring the switch state of a dial switch unit;
determining the BIOS communication rate according to the switch state;
updating the BIOS communication speed in a speed register of a BIOS FLASH;
and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register.
Preferably, the switch state of the dial switch unit includes: a default switch state corresponding to the default rate; one or more speed-regulating switch states in one-to-one correspondence with one or more preset rates.
Preferably, the dial switch unit includes three dial switches, and different switch states of the three dial switches respectively correspond to the default switch state or the speed regulation switch state.
Preferably, the process of completing the power-on of all power supplies of the integrated south bridge to enable the integrated south bridge to start the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register includes:
and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge modifies the version number of the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register, and starting the BIOS program.
Correspondingly, the application also discloses a starting system of the BIOS program, which comprises: control module, dial switch unit and integrated south bridge, wherein, control module is used for:
acquiring the switch state of the dial switch unit;
determining the BIOS communication rate according to the switch state;
updating the BIOS communication speed in a speed register of a BIOS FLASH;
and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register.
Preferably, the control module is specifically a CPLD.
Preferably, the control module specifically includes a CPLD and a BMC, wherein:
the CPLD is used for: acquiring the switch state, determining the BIOS communication rate according to the switch state and sending the BIOS communication rate to the BMC;
the BMC is configured to: updating the BIOS communication rate in the rate register, and sending a rate updating signal to the CPLD;
the CPLD is further configured to: and when the speed updating signal is received, completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register.
Preferably, the control module further comprises a channel switching unit, wherein a fixed end of the channel switching unit is connected with the BIOS FLASH, a first movable end of the channel switching unit is connected with the BMC, and a second movable end of the channel switching unit is connected with the integrated south bridge;
the CPLD is further configured to:
after the BIOS communication rate is sent to the BMC, the channel switching unit is controlled to conduct the BMC and the BIOS FLASH;
and when the speed updating signal is received, controlling the channel switching unit to conduct the integrated south bridge and the BIOS FLASH.
Preferably, the integrated south bridge is configured to:
and modifying the version number of the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register, and starting the BIOS program.
Accordingly, the present application discloses a readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method for booting a BIOS program as described in any of the above.
The application discloses a starting method of a BIOS program, which comprises the following steps: acquiring the switch state of a dial switch unit; determining the BIOS communication rate according to the switch state; updating the BIOS communication speed in a speed register of a BIOS FLASH; and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register. The method and the device have the advantages that the dial switch unit is used for setting the adjustment premise of the BIOS communication speed, different switch states correspond to different BIOS communication speeds, and then the BIOS communication speed is updated in the speed register of the BIOS FLASH, so that the problem that the whole BIOS program is comprehensively covered and programmed in the BIOS FLASH is avoided, the BIOS communication speed is rapidly adjusted, and the method and the device are suitable for various scene switching and function testing.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a flowchart illustrating steps of a method for booting a BIOS program according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating a structure of a dial switch unit according to an embodiment of the present invention;
FIG. 3 is a block diagram of a boot system of a BIOS program according to an embodiment of the present invention;
FIG. 4 is a block diagram of another starting system of a BIOS program according to another embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Currently, if the communication mode of the SPI needs to be modified, the BIOS version needs to be updated. Because the BIOS is a program code solidified in the Flash chip, the update of the BIOS version requires a BIOS engineer to complete code modification firstly, then the BIOS of a new version is burnt into the Flash chip in a code refreshing mode supported by a server, and after the server is restarted after the AC is cut off, the new BIOS code can take effect. The communication mode of the whole SPI is modified, the process operation is complicated, the time cost is high, and a great deal of inconvenience exists in the function test and the scene switching.
The method and the device have the advantages that the dial switch unit is used for setting the adjustment premise of the BIOS communication speed, different switch states correspond to different BIOS communication speeds, and then the BIOS communication speed is updated in the speed register of the BIOS FLASH, so that the problem that the whole BIOS program is comprehensively covered and programmed in the BIOS FLASH is avoided, the BIOS communication speed is rapidly adjusted, and the method and the device are suitable for various scene switching and function testing.
The embodiment of the invention discloses a starting method of a BIOS program, which is shown in figure 1 and comprises the following steps:
s1: acquiring the switch state of a dial switch unit;
s2: determining the BIOS communication rate according to the switch state;
s3: updating the BIOS communication speed in a speed register of the BIOS FLASH;
s4: and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register.
It can be understood that the BIOS communication rate in this embodiment is also the SPI communication rate of the SPI bus connected to the BIOS FLASH. The starting method in this embodiment is implemented by a certain controller.
Further, the dial switch unit has at least two switch states, so that the dial switch unit switches the switch states to switch the BIOS communication rate. Under this condition, the two switch states may include a switch state at a default rate and a switch state at another preset rate in the BIOS program, or may not include a switch state corresponding to the default rate, and the switch states corresponding to more than two preset rates are directly set, where common preset rates include 14M, 25M, 33M, and 50M.
In this embodiment, the switch states of the dial switch unit may include: a default switch state corresponding to a default rate; one or more speed-regulating switch states in one-to-one correspondence with one or more preset rates.
Furthermore, the dial switch unit internally comprises a plurality of dial switches, and each dial switch corresponds to two physical states of on and off and outputs one-bit binary information. If the four common speed-regulating switch states with the preset speed and the default switch state corresponding to the default speed are set in the dial switch unit, the dial switch unit at least comprises three dial switches, and the different switch states of the three dial switches respectively correspond to the default switch state or the speed-regulating switch state.
Specifically, the connections of the three dial switches K1-K3 may be as shown in fig. 2, where any one of the dial switches is turned on to output a low level signal, and any one of the dial switches is turned off to output a high level signal, and at this time, the corresponding relationship between the switch state and the BIOS communication rate may be set as in the following table 1:
TABLE 1 corresponding relationship table of switch state and BIOS communication rate
FM_ID2 | FM_ID1 | FM_ID0 | BIOS communication rate |
0 | 0 | 0 | Default rate |
0 | 0 | 1 | 14M |
0 | 1 | 0 | 25M |
0 | 1 | 1 | |
1 | 0 | 0 | |
1 | 0 | 1 | —— |
1 | 1 | 0 | —— |
1 | 1 | 1 | —— |
Of course, besides setting the corresponding relationship according to table 1, other corresponding relationships between the switch states and the BIOS communication rates may also be set, where table 1 is only an example, and the number, the corresponding relationship, and the sequence of the coding switches are not limited in this embodiment.
Further, step S4 is to complete the power-on of all the power supplies of the integrated south bridge, so that when the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication rate in the rate register, only the power-on time of the power supply of the last integrated south bridge is actually required to be later than step S3, the power-on timing sequence of other power supplies is not limited, and the integrated south bridge starts to load the BIOS program as long as the power supply of the last integrated south bridge is completed. Specifically, the integrated south bridge reads the BIOS communication rate in the rate register at the default SPI rate, then switches the SPI rate to the BIOS communication rate, starts loading the BIOS program in the BIOS FLASH, and continues to use the BIOS communication rate in the subsequent SPI communication with the BIOS FLASH.
Further, since the BIOS version is not modified when the BIOS communication rate is modified in this embodiment, and the version number is not changed, but actually the BIOS communication rate has changed, in order to be different from the original BIOS version, an action of modifying the version number is further added in this embodiment, that is, the power-on of all power supplies of the integrated south bridge is completed, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication rate in the rate register, which includes:
and finishing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge modifies the version number of the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register, and starts the BIOS program.
It will be appreciated that the act of modifying the version number typically occurs when the BIOS program is loaded into the POST phase, and the integrated south bridge initiative asks the controller for the switch state or BIOS communication rate of the dial-up switch unit, and then adds its corresponding code as a suffix to the original version number. The operation of modifying the version number does not relate to the modification of the BIOS FLASH, so that the version number is restored to the original version number after the AC is powered off.
The embodiment of the application discloses a starting method of a BIOS program, which comprises the following steps: acquiring the switch state of a dial switch unit; determining the BIOS communication rate according to the switch state; updating the BIOS communication speed in a speed register of a BIOS FLASH; and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register. According to the embodiment of the application, the dial switch unit is used for setting the adjustment premise of the BIOS communication speed, different switch states correspond to different BIOS communication speeds, and then the BIOS communication speed is updated in the speed register of the BIOS FLASH, so that the problem that the whole BIOS program is completely covered and burnt in the BIOS FLASH is avoided, the BIOS communication speed is rapidly adjusted, and the method and the device are suitable for various scene switching and function testing.
Correspondingly, an embodiment of the present application further discloses a BIOS program boot system, as shown in fig. 3, including: control module 1, dial switch unit 2 and integrated south bridge 3, wherein, control module 1 is used for:
acquiring the switch state of the dial switch unit 2;
determining the BIOS communication rate according to the switch state;
updating the BIOS communication speed in a speed register of the BIOS FLASH 4;
and completing the power-on of all power supplies of the integrated south bridge 3, so that the integrated south bridge 3 starts the BIOS program in the BIOS FLASH 4 according to the BIOS communication speed in the speed register.
The control module 1 may be specifically selected as a CPLD (Complex Programmable Logic Device), and fig. 3 is an example of the control module 1 as the CPLD.
Optionally, the control module 1 may specifically include a CPLD 11 and a BMC 12(Baseboard Management Controller), as shown in fig. 4, where:
the CPLD 11 is used to: acquiring a switch state, determining a BIOS communication rate according to the switch state and sending the BIOS communication rate to the BMC 12;
the CPLD 11 is also used to: when receiving the speed updating signal, the power-on of all power supplies of the integrated south bridge 3 is completed, so that the integrated south bridge 3 starts the BIOS program in the BIOS FLASH 4 according to the BIOS communication speed in the speed register.
Furthermore, in consideration of the communication state of the BMC 12, the control module 1 further includes a channel switching unit 13, the stationary end of the channel switching unit 13 is connected to the BIOS FLASH 4, the first moving end of the channel switching unit 13 is connected to the BMC 12, and the second moving end of the channel switching unit 13 is connected to the integrated south bridge 3;
at this time, the CPLD 11 is also used to:
after the BIOS communication rate is sent to the BMC 12, the control channel switching unit 13 switches on the BMC 12 and the BIOS FLASH 4;
when receiving the rate update signal, the control channel switching unit 13 turns on the integrated south bridge 3 and the BIOS FLASH 4.
Further, the integrated south bridge 3 is configured to:
and modifying the version number of the BIOS program in the BIOS FLASH 4 according to the BIOS communication rate in the rate register, and starting the BIOS program.
According to the embodiment of the application, the dial switch unit is used for setting the adjustment premise of the BIOS communication speed, different switch states correspond to different BIOS communication speeds, and then the BIOS communication speed is updated in the speed register of the BIOS FLASH, so that the problem that the whole BIOS program is completely covered and burnt in the BIOS FLASH is avoided, the BIOS communication speed is rapidly adjusted, and the method and the device are suitable for various scene switching and function testing.
Further, embodiments of the present application also disclose a readable storage medium, where the readable storage medium includes Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable hard disk, CD-ROM, or any other form of storage medium known in the art. The readable storage medium has stored therein a computer program which, when executed by a processor, performs the steps of:
acquiring the switch state of a dial switch unit;
determining the BIOS communication rate according to the switch state;
updating the BIOS communication speed in a speed register of a BIOS FLASH;
and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register.
According to the embodiment of the application, the dial switch unit is used for setting the adjustment premise of the BIOS communication speed, different switch states correspond to different BIOS communication speeds, and then the BIOS communication speed is updated in the speed register of the BIOS FLASH, so that the problem that the whole BIOS program is completely covered and burnt in the BIOS FLASH is avoided, the BIOS communication speed is rapidly adjusted, and the method and the device are suitable for various scene switching and function testing.
In some specific embodiments, the switch states of the dial switch unit include: a default switch state corresponding to the default rate; one or more speed-regulating switch states in one-to-one correspondence with one or more preset rates.
In some specific embodiments, the dial switch unit includes three dial switches, and different switch states of the three dial switches respectively correspond to the default switch state or the speed regulation switch state.
In some specific embodiments, when executed by a processor, the computer sub-program stored in the readable storage medium may specifically implement the following steps:
and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge modifies the version number of the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register, and starting the BIOS program.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above detailed description is provided for the startup method, system and related components of the BIOS program provided by the present invention, and a specific example is applied in the present disclosure to explain the principle and the implementation of the present invention, and the description of the above embodiment is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A method for starting a BIOS program, comprising:
acquiring the switch state of a dial switch unit;
determining the BIOS communication rate according to the switch state;
updating the BIOS communication speed in a speed register of a BIOS FLASH;
and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register.
2. The startup method of claim 1,
the switch state of the dial switch unit comprises: a default switch state corresponding to the default rate; one or more speed-regulating switch states in one-to-one correspondence with one or more preset rates.
3. The starting method according to claim 2, wherein the dial switch unit comprises three dial switches, and different switch states of the three dial switches respectively correspond to the default switch state or the speed regulation switch state.
4. The starting method according to any one of claims 1 to 3, wherein the process of completing the power-on of all power supplies of the integrated south bridge so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register includes:
and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge modifies the version number of the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register, and starting the BIOS program.
5. A BIOS program boot system, comprising: control module, dial switch unit and integrated south bridge, wherein, control module is used for:
acquiring the switch state of the dial switch unit;
determining the BIOS communication rate according to the switch state;
updating the BIOS communication speed in a speed register of a BIOS FLASH;
and completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register.
6. The starting system according to claim 5, characterized in that said control module is embodied as a CPLD.
7. The starting system according to claim 5, characterized in that said control module comprises in particular a CPLD and a BMC, wherein:
the CPLD is used for: acquiring the switch state, determining the BIOS communication rate according to the switch state and sending the BIOS communication rate to the BMC;
the BMC is configured to: updating the BIOS communication rate in the rate register, and sending a rate updating signal to the CPLD;
the CPLD is further configured to: and when the speed updating signal is received, completing the electrification of all power supplies of the integrated south bridge, so that the integrated south bridge starts the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register.
8. The boot system of claim 7, wherein the control module further comprises a channel switch unit, a fixed end of the channel switch unit is connected to the BIOS FLASH, a first moving end of the channel switch unit is connected to the BMC, and a second moving end of the channel switch unit is connected to the integrated south bridge;
the CPLD is further configured to:
after the BIOS communication rate is sent to the BMC, the channel switching unit is controlled to conduct the BMC and the BIOS FLASH;
and when the speed updating signal is received, controlling the channel switching unit to conduct the integrated south bridge and the BIOS FLASH.
9. The boot system of any one of claims 5 to 8, wherein the integrated south bridge is configured to:
and modifying the version number of the BIOS program in the BIOS FLASH according to the BIOS communication speed in the speed register, and starting the BIOS program.
10. A readable storage medium, having stored thereon a computer program which, when executed by a processor, carries out the steps of the method for booting the BIOS program according to any one of claims 1 to 4.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110808065.9A CN113703850B (en) | 2021-07-16 | 2021-07-16 | BIOS program starting method, system and related components |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110808065.9A CN113703850B (en) | 2021-07-16 | 2021-07-16 | BIOS program starting method, system and related components |
Publications (2)
Publication Number | Publication Date |
---|---|
CN113703850A true CN113703850A (en) | 2021-11-26 |
CN113703850B CN113703850B (en) | 2023-08-04 |
Family
ID=78648746
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110808065.9A Active CN113703850B (en) | 2021-07-16 | 2021-07-16 | BIOS program starting method, system and related components |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN113703850B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114020343A (en) * | 2021-12-27 | 2022-02-08 | 苏州浪潮智能科技有限公司 | Driving capability adjusting method, device and equipment and readable storage medium |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111488233A (en) * | 2020-04-02 | 2020-08-04 | 苏州浪潮智能科技有限公司 | Method and system for processing bandwidth loss problem of PCIe device |
-
2021
- 2021-07-16 CN CN202110808065.9A patent/CN113703850B/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111488233A (en) * | 2020-04-02 | 2020-08-04 | 苏州浪潮智能科技有限公司 | Method and system for processing bandwidth loss problem of PCIe device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114020343A (en) * | 2021-12-27 | 2022-02-08 | 苏州浪潮智能科技有限公司 | Driving capability adjusting method, device and equipment and readable storage medium |
Also Published As
Publication number | Publication date |
---|---|
CN113703850B (en) | 2023-08-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5269022A (en) | Method and apparatus for booting a computer system by restoring the main memory from a backup memory | |
US6434696B1 (en) | Method for quickly booting a computer system | |
US7631174B2 (en) | Method of updating firmware in computer server systems | |
CN105786421B (en) | Server display method and device | |
JP2016535329A (en) | Selective power management for pre-boot firmware updates | |
US7822964B2 (en) | Booting apparatus for booting a computer and method therefor and computer with a booting apparatus | |
US20110055540A1 (en) | Pre-Boot Loader for Reducing System Boot Time | |
CN109408122B (en) | Equipment starting method, electronic equipment and computer storage medium | |
US20070005949A1 (en) | Method for Booting a Computer System | |
CN109413497B (en) | Intelligent television and system starting method thereof | |
CN110825419B (en) | Firmware refreshing method and device, electronic equipment and storage medium | |
CN108874459B (en) | Rapid starting method and device based on virtualization technology | |
TWI783590B (en) | Chip verification system and verification method thereof | |
CN111475215A (en) | Server starting method, device and related equipment | |
CN114661368B (en) | Chip and starting method thereof | |
CN113703850A (en) | BIOS program starting method, system and related components | |
US9014825B2 (en) | System and method for sequentially distributing power among one or more modules | |
CN113867807A (en) | Method, device, equipment and storage medium for shortening power-on time of server | |
CN107911816B (en) | Starting method for multi-mode IoT device, multi-mode IoT device and storage medium | |
CN116088945A (en) | System firmware starting method, device, equipment and computer storage medium | |
CN115129345A (en) | Firmware upgrading method, device, equipment and storage medium | |
JP3562973B2 (en) | Timer control method | |
CN110471704B (en) | Server and server startup initialization method | |
EP4250105A1 (en) | Communication method between virtual machines using mailboxes, system-on chip performing communication method, and in-vehicle infotainment system including same | |
US20230305878A1 (en) | Communication method between virtual machines using mailboxes, system-on-chip performing the communication method, and in-vehicle infotainment system including same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |