CN114661368B - Chip and starting method thereof - Google Patents
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- CN114661368B CN114661368B CN202210544338.8A CN202210544338A CN114661368B CN 114661368 B CN114661368 B CN 114661368B CN 202210544338 A CN202210544338 A CN 202210544338A CN 114661368 B CN114661368 B CN 114661368B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4403—Processor initialisation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4418—Suspend and resume; Hibernate and awake
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention discloses a chip and a starting method thereof, wherein the chip comprises: the device comprises a primary starting module, a secondary starting module, an erasable memory and a random access memory, wherein the primary starting module is connected with the secondary starting module, and the erasable memory is used for storing a starting firmware of the secondary starting module and a starting firmware of a chip; when the starting is carried out, the first-stage starting module is used for writing the starting firmware of the second-stage starting module and the chip into the random access memory and awakening the second-stage starting module; the secondary starting module completes initialization based on the corresponding starting firmware, and then completes initialization of the chip based on the starting firmware of the chip. The primary starting module has higher read-write speed, and can quickly read the starting firmware of the chip and write the starting firmware into the random read memory when the chip is started, so that the starting speed of the chip is improved; the secondary starting module has programming capability, and corresponding parameter modification can be carried out based on the secondary starting module when the chip is updated, so that the flexibility of parameter configuration during the operation of the chip is improved.
Description
Technical Field
The invention relates to the field of chips, in particular to a chip and a starting method thereof.
Background
When designing a chip circuit, the startup of the chip is a very important ring, and the chip startup includes powering on the chip circuit, loading basic firmware required for the chip startup, and the like.
In the current chip design, most of the starting modes are to start the chip by using a one-time memory and an erasable memory, wherein the one-time memory firstly verifies the validity of the starting firmware in the erasable memory and then jumps to the erasable memory for operation.
Disclosure of Invention
The main purpose of the present invention is to provide a chip and a method for starting the same, which are intended to solve the problems mentioned in the background art.
In order to achieve the above object, the present invention provides a chip, including a primary boot module, a secondary boot module, an erasable memory and a random access memory, wherein the primary boot module is connected to the secondary boot module, and the erasable memory is used for storing a boot firmware of the secondary boot module and a boot firmware of the chip;
when the chip is powered on, the primary starting module is used for reading the starting firmware of the secondary starting module and the starting firmware of the chip from the erasable memory, writing the starting firmware of the secondary starting module and the starting firmware of the chip into the random access memory, and awakening the secondary starting module;
the secondary starting module responds to a received awakening instruction of the primary starting module and completes initialization of the secondary starting module based on corresponding starting firmware in the random access memory;
and the secondary starting module is also used for finishing the initialization of the chip based on the starting firmware of the chip in the random access memory after finishing the initialization.
In this embodiment of the application, the boot firmware of the secondary boot module and the boot firmware of the chip both include descriptors, and the primary boot module is further configured to read the boot firmware of the secondary boot module and the boot firmware of the chip from the erasable memory based on the descriptors.
In the embodiment of the application, the system further comprises a bus module and a multiplexer, wherein the primary starting module and the secondary starting module are both connected with the bus module through the multiplexer, and the erasable memory and the random access memory are both connected with the bus module;
after the primary starting module writes the starting firmware of the secondary starting module and the starting firmware of the chip into the random access memory and wakes up the secondary starting module, the primary starting module is further used for sending a starting selection signal to the multiplexer so that the multiplexer transfers the control right of the chip to the secondary starting module based on the starting selection signal.
In this embodiment of the present application, the secondary boot module is preset with an instruction set, and when the parameters of the chip are updated, the secondary boot module is further configured to perform corresponding parameter configuration on the boot firmware of the chip based on the instruction set.
In this embodiment of the present application, the instruction set is preset with a restart instruction, and when the core fails, the secondary starting module is further configured to send the restart instruction to the primary starting module.
In the embodiment of the application, when the chip mounts the slave device, the slave device is controlled and accessed based on the secondary starting module.
In the embodiment of the present application, the primary starting module is a DMA controller, and the secondary starting module is a microcontroller.
The application also provides a chip starting method, which comprises the following steps:
responding to the power-on of the chip, and awakening a preset primary starting module;
reading a preset starting firmware of a secondary starting module and a starting firmware of the chip from a preset erasable memory based on the primary starting module, and writing the starting firmware of the secondary starting module and the starting firmware of the chip into a preset random access memory, wherein the starting firmware of the secondary starting module and the starting firmware of the chip are stored in the erasable memory in advance;
waking up the secondary boot module, and completing initialization based on boot firmware of the secondary boot module in the random access memory;
and starting the chip based on the starting firmware of the chip in the random access memory by using the initialized secondary starting module.
In the embodiment of the present application, the boot firmware of the secondary boot module and the boot firmware of the chip both include descriptors, and the primary boot module reads the boot firmware of the secondary boot module and the boot firmware of the chip from the erasable memory based on the descriptors.
In this embodiment of the application, after the primary boot module writes the boot firmware of the secondary boot module and the boot firmware of the chip into the random access memory, and wakes up the secondary boot module, the method further includes:
sending a starting selection signal to a preset multiplexer based on the primary starting module;
transferring the control right of the bus module to the secondary starting module based on the starting selection signal by using the multiplexer;
and adjusting the primary starting module into a sleep mode.
In the embodiment of the present application, the secondary boot module is preset with an instruction set, and in the running state of the chip, when the running parameters of the chip are updated, the boot firmware of the chip is configured with corresponding parameters based on the instruction set.
In the embodiment of the application, a restart instruction is preset in the instruction set, and in the running state of the chip, when the chip runs in a fault, the restart instruction is sent to the primary starting module based on the instruction set.
In the embodiment of the application, in response to receiving a slave device mounting request, the slave device is controlled and accessed based on the secondary starting module.
According to the technical scheme provided by the invention, the erasable memory is arranged, the starting firmware of the chip can be stored in the erasable memory in advance, the primary starting module with higher reading and writing speed is arranged, when the chip is electrically started, the starting firmware of the chip can be quickly read from the erasable memory and is quickly stored in the random access memory, and then the initialization of the chip is completed by the secondary starting module based on the starting firmware of the chip, and the starting speed of the chip can be improved because the reading and writing speed of the primary starting module is higher; in addition, when the chip is updated, the parameters are changed and the operation is wrong, corresponding parameter modification or reset starting can be carried out based on the self programming capability of the secondary starting module, so that the flexibility of parameter configuration during the operation of the chip is improved, the configuration restarting frequency of the chip is reduced, and the resource of a main processor of the chip is not occupied.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a block diagram of an embodiment of a chip of the present invention;
FIG. 2 is a diagram of the slave device at the slave end of the chip of the present invention;
FIG. 3 is a flowchart illustrating a chip start-up method according to an embodiment of the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The principles and spirit of the present invention will be described with reference to a number of exemplary embodiments. It is understood that these embodiments are given solely for the purpose of enabling those skilled in the art to better understand and to practice the invention, and are not intended to limit the scope of the invention in any way. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As will be appreciated by one skilled in the art, embodiments of the present invention may be embodied as an apparatus, device, method, or computer program product. Thus, the present application may be embodied in the form of: entirely hardware, entirely software (including firmware, resident software, micro-code, etc.), or a combination of hardware and software.
According to the embodiment of the invention, a chip and a starting method thereof are provided.
Exemplary devices
A chip according to an exemplary embodiment of the present application is described with reference to fig. 1, and includes:
the starting device comprises a primary starting module, a secondary starting module, an erasable memory and a random access memory, wherein the primary starting module is connected with the secondary starting module, and the erasable memory is used for storing starting firmware of the secondary starting module and starting firmware of the chip;
when the chip is powered on, the primary starting module is used for reading the starting firmware of the secondary starting module and the starting firmware of the chip from the erasable memory, writing the starting firmware of the secondary starting module and the starting firmware of the chip into the random access memory, and awakening the secondary starting module;
the secondary starting module responds to a received awakening instruction of the primary starting module and completes initialization of the secondary starting module based on corresponding starting firmware in the random access memory;
and the secondary starting module is also used for finishing the initialization of the chip based on the starting firmware of the chip in the random access memory after finishing the initialization.
In this embodiment of the application, the primary boot module has a data read/write function, for example, may be a DMA controller, the secondary boot module has a programming function, for example, some small microcontrollers such as MCU and CPU, the erasable memory may be an external storage device with an erasable memory function such as flash memory, SD card, and EEPROM, and the random access memory may be a RAM or other storage devices supporting a random access memory read/write function.
Referring to fig. 1, in the embodiment of the present application, after a chip is powered on, a start signal is sent to the chip through a start interface of a primary start module, at this time, the primary start module is awakened, and the awakened primary start module can read start firmware of a secondary start module and start firmware of the chip, which are pre-stored in an erasable memory, and store the start firmware of the secondary start module and the start firmware of the chip in a random access memory. In the embodiment of the application, the primary boot module, the erasable memory and the random access memory can be set in a direct memory access mode, the address of the erasable memory is set as a source address, the address of the random access memory is set as a destination address, and the boot firmware of the secondary boot module and the boot firmware of the chip can be quickly stored in the random access memory through the primary boot module. The first-stage starting module quickly stores the starting firmware of the second-stage starting module and the starting firmware of the chip into the random access memory, and then immediately sends a wake-up instruction to the second-stage starting module, the second-stage starting module starts to work after receiving the wake-up instruction, the second-stage starting module can be initialized based on the corresponding starting firmware in the random access memory, and after the initialization, the second-stage starting module completes the writing of the starting firmware of the chip, so that the initialization of a chip circuit is completed, and the starting of the chip is completed.
In the embodiment of the application, through setting up one-level start module and second grade start module, wherein one-level start module has higher read-write speed, can be with the start-up firmware of second grade start module and the start-up firmware of chip from quick reading in erasable memory and store random access memory in, then second grade start module just can start the chip after initiating to the start-up speed of chip has been improved.
In an embodiment of the present application, the boot firmware of the secondary boot module and the boot firmware of the chip both include descriptors, and the primary boot module is further configured to read the boot firmware of the secondary boot module and the boot firmware of the chip from the erasable memory based on the descriptors. The starting firmware of the secondary starting module and the starting firmware of the chip are stored in the erasable memory in advance, descriptors can be set for the starting firmware of the secondary starting module and the starting firmware of the chip in advance before storage, and when the primary starting module reads the descriptors, the descriptors can be read and written based on the starting firmware of the secondary starting module and the respective descriptors of the starting firmware of the chip, so that the accuracy of reading and writing the starting firmware of the secondary starting module and the starting firmware of the chip by the primary starting module can be ensured.
As shown in fig. 1, in the embodiment of the present application, the chip is further provided with a bus module and a multiplexer, the primary boot module and the secondary boot module are both connected to the bus module through the multiplexer, and the erasable memory and the random access memory are both connected to the bus module; after the primary starting module writes the starting firmware of the secondary starting module and the starting firmware of the chip into the random access memory and wakes up the secondary starting module, the primary starting module is further used for sending a starting selection signal to the multiplexer so that the multiplexer transfers the control right of the chip to the secondary starting module based on the starting selection signal. Wherein, can preset and store the start-up firmware of the second grade start-up module and start-up firmware of the chip to the random access memory at the first grade start-up module after, send and start the selective signal to the multi-channel selector, and set up the multi-channel selector as: after receiving a starting selection signal of the primary starting module, only outputting a control instruction sent by the secondary starting module, thereby switching the control right to the secondary starting module at a host end; at the moment, the primary starting module can be made to sleep to stop data reading and writing until the chip is restarted, and then a wake-up instruction is sent to the primary starting module through the starting interface of the primary starting module, so that the power consumption of the chip can be reduced to a certain extent. In another embodiment, the primary boot module may further send a wake-up instruction to the secondary boot module through the bus module, and the embodiment of the present application is not limited to whether the primary boot module directly wakes up the secondary boot module or wakes up the secondary boot module through the bus module.
In this embodiment of the present application, the secondary boot module is preset with an instruction set, and when the parameters of the chip are updated, the secondary boot module is further configured to perform corresponding parameter configuration on the boot firmware of the chip based on the instruction set. As shown in fig. 1 and fig. 2, the secondary starting module has a programming function, such as some small-sized microcontrollers, e.g., MCU, CPU, etc. After the chip is successfully started, the primary starting module enters a dormant state, the secondary starting module is still in a running state, and under normal conditions, the slave end also carries a control register and a state register, so that the secondary starting module which is still in the running state after the chip is started can monitor the running state of the chip through the state register and modify parameters of the chip through the control register.
For example, in an embodiment, when an error occurs in a chip, the secondary starting module may timely learn that the chip is in an error state at this time through the status register, and then the secondary starting module may timely process the chip according to a preset error type. For example, a reset instruction can be preset in the instruction set, and when the secondary processing module judges that the error type needs to be reset at the moment, the secondary starting module sends the reset instruction to the primary starting module to perform timely reset, so that the chip is prevented from stopping working for a long time.
For another example, when the chip parameter is updated, the value in the control register originally matched with the chip before updating needs to be modified correspondingly, and at this time, the value in the control register can be directly modified correspondingly through the secondary starting module so as to be matched with the updated chip.
In another embodiment, when the chip needs to update the key parameters of the chip in the operation process, the parameters of the burned chip firmware can be directly changed through the secondary starting module without modifying the starting firmware of the chip in the erasable memory and then burning again, so that the configuration is more flexible and convenient, the chip does not need to be changed and then stored again in the erasable memory, and a main processor or a coprocessor in a chip circuit is not occupied in the configuration process.
In another embodiment, when the parameters of the chip are updated, the values in the control register matched with the parameters need to be modified correspondingly, and at this time, the corresponding values in the control register can be changed through the secondary starting module based on the instructions in the preset instruction set, so that the operation of the chip circuit is changed to adapt to the updated parameters of the chip.
In the embodiment of the application, by setting the secondary starting module, the work with smaller load such as chip error, chip update, parameter change and the like can be directly carried out through the secondary processing module. Compared with the existing main processor or coprocessor of the chip, in the embodiment of the application, the main processor or coprocessor in a chip circuit is not required to be occupied, the operation can be completed only by depending on the instruction set preset by the secondary starting module, and the main operation of the main processor and the coprocessor of the chip can be ensured not to be interrupted and to be in an efficient working state all the time. And the work with smaller load is completed by the secondary starting module, so that the chip configuration is more flexible, the load of the chip during operation is reasonably distributed, unnecessary idle of the secondary starting module is reduced, and the utilization rate of the secondary starting module is improved.
As shown in fig. 1 and 2, in the embodiment of the present application, more slave devices may be mounted on the slave side of the chip, and when the chip mounts a slave device, the slave device is controlled and accessed based on the secondary boot module. As shown in fig. 2, the slave device may be a memory unit, a GPIO device, a serial port device, a timer device, a Watchdog device, or the like, and when the slave device is mounted, the slave device may be controlled and accessed through the secondary boot module. For example, the GPIO is mounted, and the secondary starting module controls access to the GPIO, so that the running state of the chip can be output; for another example, serial ports are mounted, and are controlled and accessed through a secondary starting module, so that some serial port printing information can be output; for another example, the watchdog is mounted and controlled and accessed through the secondary starting module, so that the chip can be prevented from being stuck when being started; for another example, the timer is mounted, and the starting operation time of the chip can be represented by controlling and accessing through the secondary starting module.
In the embodiment of the application, the slave end can contain various devices, and besides the corresponding storage device for storing the key data, the secondary starting module has a programming control function, so that the chip starting device has stronger control capability than the traditional scheme, not only has a data carrying function, but also supports flexible mounting of other slave devices at the slave end, and controls and accesses the slave devices through the secondary starting module. According to the embodiment of the application, the slave equipment can be flexibly expanded, when the slave equipment is mounted at the slave end, the access is controlled through the secondary starting module, the starting process and the running state of the chip can be monitored in real time, and a main processor and a coprocessor of the chip cannot be occupied.
In the chip in the embodiment of the application, the primary starting module with higher read-write speed is arranged, so that when the chip is powered on and started, the primary starting module can quickly read the pre-stored starting firmware of the chip from the erasable memory and quickly write the pre-stored starting firmware into the random read memory, so that the secondary starting module can finish the initialization work of the chip based on the starting firmware of the chip, and the starting speed of the chip is improved; in addition, when the chip is updated, the parameters are changed and the operation is wrong, corresponding parameter modification or reset starting can be carried out based on the self programming capability of the secondary starting module, so that the flexibility of parameter configuration during the operation of the chip is improved, the configuration restarting frequency of the chip is reduced, and the resource of a main processor of the chip is not occupied.
Exemplary method
Referring to fig. 3, the present exemplary embodiment provides a chip starting method, including the following steps:
step S100: and awakening a preset primary starting module in response to the power-on of the chip.
Step S200: the method comprises the steps of reading a preset starting firmware of a secondary starting module and a starting firmware of a chip from a preset erasable memory based on a primary starting module, and writing the starting firmware of the secondary starting module and the starting firmware of the chip into a preset random access memory, wherein the starting firmware of the secondary starting module and the starting firmware of the chip are stored in the erasable memory in advance.
Step S300: waking up the secondary starting module, and finishing initialization based on the starting firmware of the secondary starting module in the random access memory;
step S400: and starting the chip based on the starting firmware of the chip in the random access memory by using the initialized secondary starting module.
The chip starting method in the present application may be applied to a chip in an exemplary apparatus, and the specific implementation methods of steps S100 to S400 may refer to various embodiments of the exemplary apparatus, which are not described herein again.
In the embodiment of the present application, the boot firmware of the secondary boot module and the boot firmware of the chip both include descriptors, and the primary boot module reads the boot firmware of the secondary boot module and the boot firmware of the chip from the erasable memory based on the descriptors.
In this embodiment of the application, after the primary boot module writes the boot firmware of the secondary boot module and the boot firmware of the chip into the random access memory, and wakes up the secondary boot module, the method further includes:
sending a starting selection signal to a preset multiplexer based on the primary starting module;
transferring the control right of the bus module to the secondary starting module based on the starting selection signal by using the multiplexer;
and adjusting the primary starting module into a sleep mode.
In the embodiment of the present application, the secondary boot module is preset with an instruction set, and in the running state of the chip, when the running parameters of the chip are updated, the boot firmware of the chip is configured with corresponding parameters based on the instruction set.
In the embodiment of the application, a restart instruction is preset in the instruction set, and in the running state of the chip, when the chip runs in a fault, the restart instruction is sent to the primary starting module based on the instruction set.
In the embodiment of the application, in response to receiving a slave device mounting request, the slave device is controlled and accessed based on the secondary starting module.
According to the chip starting method in the embodiment of the application, the primary starting module with higher read-write speed is arranged, so that when the chip is electrically started, the primary starting module can quickly read the pre-stored starting firmware of the chip from the erasable memory and quickly write the pre-stored starting firmware into the random read memory, so that the secondary starting module can complete the initialization work of the chip based on the starting firmware of the chip, and the starting speed of the chip is improved; in addition, when the chip is updated, the parameters are changed and the operation is wrong, corresponding parameter modification or reset starting can be carried out based on the programming capability of the secondary starting module, so that the flexibility of parameter configuration during the operation of the chip is improved, the configuration restarting frequency of the chip is reduced, and the resource of a main processor of the chip is not occupied.
Moreover, while the operations of the method of the invention are depicted in the drawings in a particular order, this does not require or imply that the operations must be performed in this particular order, or that all of the illustrated operations must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions.
While the spirit and principles of the invention have been described with reference to several particular embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, nor is the division of aspects, which is for convenience only as the features in such aspects may not be combined to benefit. The invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and all modifications and equivalents of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A chip is characterized by comprising a primary starting module, a secondary starting module, an erasable memory and a random access memory, wherein the primary starting module is connected with the secondary starting module, and the erasable memory is used for storing a starting firmware of the secondary starting module and a starting firmware of the chip;
when the chip is powered on, the primary starting module is used for reading the starting firmware of the secondary starting module and the starting firmware of the chip from the erasable memory, writing the starting firmware of the secondary starting module and the starting firmware of the chip into the random access memory, and awakening the secondary starting module;
the secondary starting module responds to a received awakening instruction of the primary starting module and completes initialization of the secondary starting module based on corresponding starting firmware in the random access memory;
after the initialization is finished, the secondary starting module is also used for finishing the initialization of the chip based on the starting firmware of the chip in the random access memory;
the first-stage starting module is a DMA controller, the second-stage starting module is a microcontroller, an instruction set is preset in the second-stage starting module, and when the parameters of the chip are updated, the second-stage starting module is further used for carrying out corresponding parameter configuration on the starting firmware of the chip based on the instruction set;
the secondary starting module is also used for monitoring the running state of the chip based on a state register at the slave end.
2. The chip of claim 1, wherein the boot firmware of the secondary boot-up module and the boot firmware of the chip each include a descriptor, and wherein the primary boot-up module is further configured to read the boot firmware of the secondary boot-up module and the boot firmware of the chip from the erasable memory based on the descriptor.
3. The chip of claim 1, further comprising a bus module and a multiplexer, wherein the primary boot module and the secondary boot module are both connected to the bus module through the multiplexer, and wherein the erasable memory and the random access memory are both connected to the bus module;
after the primary starting module writes the starting firmware of the secondary starting module and the starting firmware of the chip into the random access memory and wakes up the secondary starting module, the primary starting module is further used for sending a starting selection signal to the multiplexer so that the multiplexer transfers the control right of the chip to the secondary starting module based on the starting selection signal.
4. The chip of claim 1, wherein the instruction set is preset with a restart instruction, and when the chip fails, the secondary boot module is further configured to send a restart instruction to the primary boot module.
5. The chip of claim 1, wherein when the chip mounts a slave device, the slave device is controlled and accessed based on the secondary boot module.
6. A chip start-up method, comprising:
responding to the power-on of the chip, and awakening a preset primary starting module;
reading a preset starting firmware of a secondary starting module and a starting firmware of the chip from a preset erasable memory based on the primary starting module, and writing the starting firmware of the secondary starting module and the starting firmware of the chip into a preset random access memory, wherein the primary starting module is a DMA (direct memory access) controller, the secondary starting module is a microcontroller, and the starting firmware of the secondary starting module and the starting firmware of the chip are stored in the erasable memory in advance;
waking up the secondary boot module, and completing initialization based on boot firmware of the secondary boot module in the random access memory;
starting the chip based on the starting firmware of the chip in the random access memory by using the initialized secondary starting module;
monitoring the running state of a chip based on the secondary starting module and a state register at the slave end;
and the secondary starting module is preset with an instruction set, and when the running parameters of the chip are updated in the running state of the chip, corresponding parameter configuration is carried out on the starting firmware of the chip based on the instruction set.
7. The chip starting method according to claim 6, wherein the boot firmware of the secondary boot module and the boot firmware of the chip each include a descriptor, and the primary boot module reads the boot firmware of the secondary boot module and the boot firmware of the chip from the erasable memory based on the descriptor.
8. The chip starting method according to claim 6, wherein after the primary starting module writes the starting firmware of the secondary starting module and the starting firmware of the chip into the random access memory and wakes up the secondary starting module, the method further comprises:
sending a starting selection signal to a preset multiplexer based on the primary starting module;
transferring the control right of the bus module to the secondary starting module based on the starting selection signal by using the multiplexer;
and adjusting the primary starting module into a sleep mode.
9. The chip starting method according to claim 6, wherein a restart instruction is preset in the instruction set, and in the chip operation state, when the chip fails to operate, the restart instruction is sent to the primary starting module based on the instruction set.
10. The chip start-up method of claim 9, wherein in response to receiving a slave device mount request, controlling and accessing the slave device based on the secondary boot module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210544338.8A CN114661368B (en) | 2022-05-19 | 2022-05-19 | Chip and starting method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210544338.8A CN114661368B (en) | 2022-05-19 | 2022-05-19 | Chip and starting method thereof |
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| Publication Number | Publication Date |
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| CN114661368A CN114661368A (en) | 2022-06-24 |
| CN114661368B true CN114661368B (en) | 2022-09-06 |
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| CN115114200B (en) * | 2022-06-29 | 2023-11-17 | 海光信息技术股份有限公司 | Multi-chip system and starting method based on same |
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