CN108897576B - Method for rapidly starting BOOT based on ARM chip - Google Patents

Abstract

The invention discloses a method for quickly starting BOOT based on an ARM chip, which comprises an embedded system consisting of a chip based on an ARM core and NAND FLASH, and a program for quickly starting BLOCK0 of NAND. The method for quickly starting the BOOT is mainly characterized in that after a BOOT program loads part of BLOCK0 to an RAM for running, a small program executed by the BOOT firstly automatically loads the BOOT program to the RAM, the integrity of the BOOT program is guaranteed, and therefore the BOOT is started. Because the BOOT program is smaller than one BLOCK of NAND, the whole BOOT process only occupies the BLOCK0, and only one BOOT is needed to realize self-copying and BOOT, thereby realizing the rapid BOOT of the ARM chip.

Description

Method for rapidly starting BOOT based on ARM chip

Technical Field

The invention relates to the technical field of computers, in particular to a method for quickly starting BOOT based on an ARM chip.

Background

An Embedded Operating System (EOS) refers to an Operating System for an Embedded System. When the embedded operating system runs, a BOOT program in a ROM of a chip is generally started first, a BOOT program is loaded from a NAND and started, and then the BOOT program jumps to Kernel to run a main program.

The BOOT program is usually stored in NAND FLASH in the first several BLOCKs. Different BOOT programs occupy different sizes. In NAND processes, only the first block is typically the best and the worst process. If the BOOT occupies two or more BLOCKs, if only one BLOCK is broken, the whole BOOT program will fail to load, and the BOOT program will not be started. In addition, in order to ensure that the BOOT program can be loaded, burning backup is usually performed, and the BOOT program is copied to different BLOCKs.

Often, the BOOT program exceeds the size of the program loaded from NAND to RAM specified by the BOOT program, and it is common practice to make a smaller BOOT program (BOOT stage 1), and the stage1 program is used to load and start the BOOT stage2 program, i.e., the main BOOT program, so as to load the kernel BOOT system. Such a method not only takes up more BLOCK, but also requires the maintenance of multiple BOOT stage programs. The starting speed and stability are to be improved.

Therefore, in view of the current situation, it is urgently needed to develop a method for quickly starting BOOT based on an ARM chip to overcome the defects in the current practical application.

Disclosure of Invention

The invention aims to provide a method for quickly starting BOOT based on an ARM chip, so as to solve the problems in the background art.

In order to achieve the purpose, the invention provides the following technical scheme:

the invention aims to design a method for quickly starting BOOT of a basic ARM chip in an embedded system, and the method also has certain reliability and feasibility.

The technical scheme of the invention is as follows: an embedded hardware system of a basic ARM chip comprises a CPU and NAND FLASH of a basic ARM core and a method for realizing the quick BOOT of BOOT.

The normal starting process of the system is as follows:

step 1, electrifying a system, and executing a boot program in a ROM of a CPU;

step 2, the bootstrap program copies the program segment with the size specified by the BLOCK0 in NAND FLASH to the RAM of the CPU for execution;

step 3, running the copied BOOT program in the RAM, loading Kernel and starting the main program;

often the BOOT program will exceed the size of the BOOT-specific copy in ROM, and a general purpose BOOT, such as u-BOOT, will have firmware sizes that exceed BLOCK0, requiring multiple BLOCKs to host the BOOT program. Therefore, the BOOT program needs to be divided into a stage1 program and a stage2 program. Typically, stage1 and stage2 are two distinct program files. The BOOT program burning process comprises the following steps:

step 21, burning the firmware of stage1 into NAND BLOCK0, as shown in FIG. 1;

step 22, burning stage2 into BLOCK1 and the required BLOCKs later, as shown in fig. 1;

step 23, burning stage2 into the spare BLOCK, as shown in fig. 1;

BLOCK0 is the best guarantee and the least likely to be bad in NAND processes. Therefore, the stage1 needs to be burned into the BLOCK0, and then the boot program in the ROM of the CPU is used to boot the start-up, and the stage1 program is copied to the RAM to run. Then after stage1 is run, stage2 is found available from NAND and stage2 is copied to RAM run. stage2 is the main BOOT program, loads the kernel, and runs the system.

In this way, the general method not only occupies more BLOCK memory space of NAND, but also starts stage1 by the boot program and then starts stage2 by stage1 at the time of starting. The method comprises the following specific steps:

step 41, powering on the system, and starting a boot program in a ROM of the CPU;

step 42, the bootstrap program copies the NAND BLOCK0 program of stage1 to RAM according to the specified size for running, as shown in FIG. 1;

step 43, the stage1 program copies the available stage2 program in NAND to RAM, as shown in FIG. 3;

step 44, the program of stage1 jumps to the program entrance of stage2, and the program of stage2 is operated, as shown in fig. 4;

step 45, loading Kernel normally by the stage2 program, and running the main program.

To increase boot speed and take full advantage of the features of BLOCK0, stage1 and stage2 may be combined into one program. Thus, the BOOT program can be burned only into BLOCK 0. Because the BOOT program only loads the size specified by BLOCK0 when loading the BOOT program, the BOOT program cannot be completely loaded, so that it is necessary to ensure that the part of the pre-loaded BOOT program can be executed, and the rest of the BOOT program can be copied into the RAM by itself, thereby ensuring the integrity of the BOOT program in the RAM. The method comprises the following specific steps:

step 51, electrifying the system, and starting a boot program in a ROM of the CPU;

step 52, the BOOT program copies the program segment of the BOOT program which is executed in the RAM first from the BLOCK0 to the RAM;

and step 53, starting and running a part of BOOT programs which are copied into the RAM, and copying the rest of BOOT programs from BLOCK0 into the RAM.

The RAM has a complete BOOT program, and the system can be started in sequence. In this way, the BOOT program only needs to be stored in BLOCK0, and the advantages of BLOCK0 can be fully utilized. And after the BOOT program is copied to the SRAM, the rest of the BOOT program can be loaded from the BLOCK0, thereby completing the BOOT work. Compared with the general BOOT program, the speed and the stability are improved to a certain extent.

Compared with the prior art, the invention has the beneficial effects that: the method for quickly starting the BOOT based on the ARM chip mainly loads a part of BLOCK0 into an RAM (random access memory) for running by a bootstrap program, and a small segment of program executed by the BOOT firstly automatically loads the BOOT program into the RAM, so that the integrity of the BOOT program is ensured, and the BOOT is started. Because the BOOT program is smaller than one BLOCK of NAND, the whole BOOT process only occupies the BLOCK0, and only one BOOT is needed to realize self-copying and BOOT, thereby realizing the rapid BOOT of the ARM chip.

Drawings

FIG. 1 is a block diagram of a location of a BOOT program burn NAND FLASH in accordance with the present invention.

FIG. 2 is a block diagram of Stage1 and RAM location of a conventional BOOT program according to the present invention.

FIG. 3 is a block diagram of Stage2 and RAM location of a conventional BOOT program according to the present invention.

FIG. 4 is a schematic block diagram of Stage1 jump Stage2 of the BOOT program of the present invention.

FIG. 5 is a block diagram of the location where the BOOT program of the present invention is burned into NAND FLASH.

FIG. 6 is a block diagram of the location where the BOOT program of the present invention is copied to RAM.

FIG. 7 is a block diagram of the location where the BOOT program of the present invention is burned into NAND FLASH.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1 to 7, in the embodiment of the present invention, a method for quickly starting BOOT based on an ARM chip is implemented by using a CPU as an S3C2416 (ARM 926EJ is used as an inner core), and NAND FLASH as a frame of an embedded system hardware device as K9F1G08U0B, wherein an SRAM and a ROM are disposed inside the S3C 2416. K9F1G08U0B is a BLOCK having 1024 BLOCKs, each BLOCK being 128K in size.

And then writing a BOOT program according to the starting configuration and parameters of the CPU. The BOOT program is composed of a plurality of c files and an assembler. At compile time, the program designated to be responsible for copying data from BLOCK0 is placed in front of the BOOT program so that the BOOT program can first copy this piece of program to SRAM running. Furthermore, the BOOT program can be controlled to about 60K.

When the system is powered on, the CPU will first start the boot program from ROM, and the boot program will copy 4K data from BLOCK0 to SRAM for execution. Therefore, when configuring and compiling the BOOT program, the 4K program segments copied firstly are ensured to be normally executed in the SRAM. The primary function after normal execution is to copy the remaining BOOT program from BLOCK0 to SRAM.

The specific steps for realizing the function are as follows:

step 1, as shown in fig. 5, a BOOT program is burned into BLOCK0 of NAND FLASH;

step 2, the system is electrified again, and a bootstrap program in the ROM is operated;

step 3, as in fig. 6, the boot program copies 4K program segments from BLOCK0 to SRAM for running;

step 4, as shown in fig. 7, copying the remaining 56K to the SRAM after the BOOT program segment executed in the SRAM is completed;

and 5, the copied BOOT program can normally start the system in the SRAM.

By using the starting mode, more NAND can be adapted, the program of BOOT is controlled to be about 60K or less, and the method can also be adapted to the condition that the size of the BLOCK is 64K, namely, the method can be applied as long as the size of the BLOCK exceeds 64K. If a normal BOOT program is used, an appropriate NAND is selected according to sizes of stage1 and stage2 of the BOOT, different NAND sizes are different in BLOCK size, the BLOCK occupied by the BOOT program is not determined, and the compatibility cannot be well guaranteed. By using the technology of the invention, the BOOT program is copied into the SRAM in two parts in sequence to run, seamless connection is realized, the operation that the stage1 jumps to the stage2 is not needed, the program is smaller, only the BLOCK0 is occupied, the copying speed is faster than that of the common BOOT program, the important point is that the advantages of the BLOCK0 are fully utilized, and the BLOCK0 is the worst in the whole NAND. If a normal BOOT program is used, the BLOCK1 and the following BLOCKs are occupied, and as long as one BLOCK is damaged, the BOOT program cannot be executed normally, the BOOT needs to be burned into the NAND again, and the bad BLOCKs need to be processed, so that certain requirements on the processing of the BOOT are met, and meanwhile, the complexity of the BOOT program is increased, and the starting time is increased.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

The above is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, it is possible to make several variations and modifications without departing from the concept of the present invention, and these should be considered as the protection scope of the present invention, which will not affect the effect of the implementation of the present invention and the utility of the patent.

Claims (1)

1. A method for rapidly starting BOOT based on ARM chip is characterized in that the method comprises the following burning and starting steps:

step 1, compiling a BOOT program, and compiling a program segment configuration with the BOOT program copied from BLOCK0 to the forefront of a program file;

step 2, burning the BOOT program into NAND BLOCK 0;

step 3, the system is electrified again, and a boot program in the ROM of the CPU is operated;

step 4, the bootstrap program copies the program segment with the specified size of BLOCK0 to RAM for running;

step 5, copying the rest BOOT program to the RAM from the BOOT program segment executed in the RAM first, and ensuring the integrity of the BOOT program in the RAM;

step 6, after the BOOT program of BLOCK0 is completely copied into the RAM, the system can be normally operated;

in step 2, the burning step of burning the BOOT program into the NAND BLOCK0 is as follows:

step 21, burning the firmware of stage1 into the BLOCK0 of NAND;

step 22, burning stage2 into BLOCK1 and the required BLOCK later;

step 23, burning stage2 into spare BLOCK;

in step 4, the specific steps of the boot program copying the program segment with the specified size of BLOCK0 to the RAM for running are as follows:

step 41, powering on the system, and starting a boot program in a ROM of the CPU;

step 42, the bootstrap program copies the stage1 program of NAND BLOCK0 to RAM according to the designated size for running;

step 43, the stage1 program copies the available stage2 program in the NAND to the RAM;

step 44, the program of the stage1 jumps to the program entrance of the stage2, and the stage2 program is operated;

step 45, loading Kernel normally by the stage2 program, and running the main program;

in step 5, the specific steps of copying the remaining BOOT program to the RAM by the BOOT program segment executed in the RAM first are as follows:

step 51, electrifying the system, and starting a boot program in a ROM of the CPU;

step 52, the BOOT program copies the program segment of the BOOT program which is executed in the RAM first from the BLOCK0 to the RAM;

and step 53, starting and running a part of BOOT programs which are copied into the RAM, and copying the rest of BOOT programs from BLOCK0 into the RAM.

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