CN113990981B - Single crystal suede smooth and round treatment process - Google Patents
Single crystal suede smooth and round treatment process Download PDFInfo
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- CN113990981B CN113990981B CN202111209827.XA CN202111209827A CN113990981B CN 113990981 B CN113990981 B CN 113990981B CN 202111209827 A CN202111209827 A CN 202111209827A CN 113990981 B CN113990981 B CN 113990981B
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- silicon wafer
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- deionized water
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- 238000000034 method Methods 0.000 title claims abstract description 17
- 239000013078 crystal Substances 0.000 title abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 47
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 47
- 239000010703 silicon Substances 0.000 claims abstract description 47
- 238000004140 cleaning Methods 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 16
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 13
- 239000008367 deionised water Substances 0.000 claims abstract description 12
- 229910021641 deionized water Inorganic materials 0.000 claims abstract description 12
- 239000000243 solution Substances 0.000 claims abstract description 12
- 238000005406 washing Methods 0.000 claims abstract description 12
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 8
- 239000012670 alkaline solution Substances 0.000 claims abstract description 7
- 239000011259 mixed solution Substances 0.000 claims abstract description 5
- 238000001035 drying Methods 0.000 claims abstract description 4
- 238000002791 soaking Methods 0.000 claims 1
- 239000007788 liquid Substances 0.000 abstract description 7
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 239000002699 waste material Substances 0.000 abstract description 7
- 230000007613 environmental effect Effects 0.000 abstract description 3
- 239000003929 acidic solution Substances 0.000 abstract description 2
- 238000002161 passivation Methods 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 2
- 239000012459 cleaning agent Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000013329 compounding Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002351 wastewater Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B08—CLEANING
- B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
- B08B3/00—Cleaning by methods involving the use or presence of liquid or steam
- B08B3/04—Cleaning involving contact with liquid
- B08B3/08—Cleaning involving contact with liquid the liquid having chemical or dissolving effect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a smooth and round treatment process of a single crystal suede, which comprises the following steps: s1, carrying out micro-etching on a sharp pyramid structure on the surface of a silicon wafer after texturing by using an alkaline solution to obtain a round and smooth textured structure; s2, washing the silicon wafer by using normal-temperature deionized water; s3, using KOH and H 2 O 2 Cleaning the silicon wafer by using the mixed solution; s4, washing the silicon wafer by using normal-temperature deionized water; s5, cleaning the HF solution to remove an oxide layer on the surface of the silicon wafer, so that the silicon wafer is easy to dehydrate; s6, washing the silicon wafer by using deionized water; and S7, dehydrating and drying the silicon wafer. According to the invention, KOH and other alkaline solutions are adopted to replace the traditional acidic solution for smooth and round treatment of the texture surface on the surface of the monocrystalline silicon piece, so that the generation of N-containing and F-containing waste liquid is remarkably reduced, the process environmental protection property is improved, the additional equipment investment is avoided, and the production cost of the battery piece is favorably reduced.
Description
Technical Field
The invention relates to the technical field of solar cell preparation, in particular to a single crystal suede smooth and round treatment process.
Background
At present, the key point of large-scale development and utilization of solar photovoltaic power generation lies in improving the photoelectric conversion efficiency of solar cells and reducing the production cost of the solar cells. The silicon-based Heterojunction (HIT) solar cell is a new third-generation high-efficiency solar cell technology, combines the advantages of the first-generation monocrystalline silicon and the second-generation silicon film, has a series of advantages of high conversion efficiency, low temperature coefficient and the like, has great development potential and wide application prospect, and is expected to lead the development direction of the whole silicon-based solar cell.
The preparation of the passivation layer is the most critical process step in the manufacturing process of the silicon-based heterojunction solar cell, and the high-quality passivation layer can effectively inhibit the compounding of current carriers on the silicon surface and prolong the minority carrier lifetime, so that the photoelectric conversion efficiency of the cell is improved. However, compared with the silicon nitride passivation layer with the thickness of about 80nm involved in the traditional crystalline silicon cell, the amorphous silicon passivation layer of the silicon-based heterojunction solar cell is extremely thin, and is only 5-10nm, so that the deposition of the amorphous silicon passivation layer has an extremely high requirement on the surface morphology of the silicon wafer.
In the prior art of manufacturing an HIT solar cell, in order to obtain a good antireflection effect on the surface of a silicon wafer, texturing processing on the surface of the silicon wafer is firstly performed through a cleaning texturing process, and a pyramid textured structure with a light absorption effect is etched on the surface of the silicon wafer. However, the peak of the structure is sharp, and the structure is easy to cause plasma discharge and other adverse factors in the amorphous silicon deposition process, so that the amorphous silicon film deposition is very uneven, the film quality is seriously influenced, and finally the battery conversion efficiency is reduced.
In the prior art, a monocrystalline silicon piece after being cleaned and textured is generally soaked in HNO 3 And in the mixed solution of HF, under the etching of certain temperature and time, the suede becomes smooth and round. However, the method can generate a large amount of waste liquid containing F and N, and the waste liquid can reach the discharge standard after being treated by a series of waste water and diluted by a large amount of water, thereby increasing the production cost of the battery piece virtually. To avoid the generation of N-containing waste liquid, ozone is used to replace HNO 3 Firstly, carrying out oxidation treatment on the surface of the silicon wafer, and then adopting an HF solution to etch the surface of the silicon wafer. However, the method still needs to treat the generated F-containing waste liquid and needs to be additionally provided with a high ozone machine, so that the equipment investment is increased.
Disclosure of Invention
In order to solve the technical problem, the invention provides a single crystal suede smooth and round treatment process, which comprises the following steps:
s1, carrying out micro-etching on a sharp pyramid structure on the surface of a silicon wafer after texturing by using an alkaline solution to obtain a round and smooth textured structure;
s2, washing the silicon wafer by using normal-temperature deionized water;
s3, using KOH and H 2 O 2 Cleaning the silicon wafer by using the mixed solution;
s4, washing the silicon wafer by using normal-temperature deionized water;
s5, cleaning the HF solution to remove an oxide layer on the surface of the silicon wafer, so that the silicon wafer is easy to dehydrate;
s6, washing the silicon wafer by using deionized water;
and S7, dehydrating and drying the silicon wafer.
In the step S1, the monocrystalline silicon piece after the texture etching is soaked in a KOH solution with the mass fraction of 0.05-0.5 percent to carry out micro-etching on the sharp pyramid structure on the surface of the silicon piece, wherein the etching temperature is 25-35 ℃, and the etching time is 30-120S.
In steps S2, S4 and S6, the cleaning time is 60-120S.
Wherein in the step S3, the mass fraction of KOH is 0.5-1.2%, and H 2 O 2 The mass fraction of the cleaning agent is 3-10%, and the cleaning time is 110-180s.
In the step S5, the volume fraction of the HF solution is 2-6%, and the cleaning time is 90-180S.
By adopting the technical scheme, the invention adopts alkaline solutions such as KOH and the like to replace the traditional acid solution to carry out smooth rounding treatment on the surface suede of the monocrystalline silicon piece, thereby remarkably reducing the generation of waste liquid containing N and F, improving the environmental protection property of the process, avoiding the investment of additional equipment and being beneficial to reducing the production cost of the battery piece.
Detailed Description
The single crystal suede smooth and round treatment process provided by the embodiment comprises the following steps:
s1, carrying out micro-etching on a sharp pyramid structure on the surface of a silicon wafer after texturing by using an alkaline solution to obtain a round and smooth textured structure; specifically, the monocrystalline silicon piece after the texture etching is soaked in a KOH solution with the mass fraction of 0.05-0.5 percent to carry out micro-etching on the sharp pyramid structure on the surface of the silicon piece, wherein the etching temperature is 25-35 ℃, and the etching time is 30-120s;
s2, washing the silicon wafer for 60-120s by using normal-temperature deionized water;
s3, using KOH and H 2 O 2 Cleaning the silicon wafer by using the mixed solution; wherein, the mass fraction of KOH is 0.5 percent to 1.2 percent, and H 2 O 2 The mass fraction of the cleaning agent is 3-10%, and the cleaning time is 110-180s;
s4, washing the silicon wafer for 60-120s by using normal-temperature deionized water;
s5, cleaning the HF solution to remove an oxide layer on the surface of the silicon wafer, so that the silicon wafer is easy to dehydrate; wherein the volume fraction of the HF solution is 2-6%, and the cleaning time is 90-180s;
s6, washing the silicon wafer for 60-120s by using deionized water;
and S7, dehydrating and drying the silicon wafer.
According to the invention, KOH and other alkaline solutions are adopted to replace the traditional acidic solution for smooth and round treatment of the texture surface on the surface of the monocrystalline silicon piece, so that the generation of N-containing and F-containing waste liquid is remarkably reduced, the process environmental protection property is improved, the additional equipment investment is avoided, and the production cost of the battery piece is favorably reduced.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to the above-described embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (4)
1. A smooth and round treatment process for a monocrystal suede is characterized by comprising the following steps:
s1, carrying out micro-etching on a sharp pyramid structure on the surface of a silicon wafer after texturing by using an alkaline solution to obtain a round and smooth textured structure, specifically, soaking a textured monocrystalline silicon wafer in a KOH solution with the mass fraction of 0.05-0.5% to carry out micro-etching on the sharp pyramid structure on the surface of the silicon wafer, wherein the etching temperature is 25-35 ℃, and the etching time is 30-120s;
s2, washing the silicon wafer by using normal-temperature deionized water;
s3, using KOH and H 2 O 2 Cleaning the silicon wafer by using the mixed solution;
s4, washing the silicon wafer by using normal-temperature deionized water;
s5, cleaning the HF solution to remove an oxide layer on the surface of the silicon wafer, so that the silicon wafer is easy to dehydrate;
s6, washing the silicon wafer by using deionized water;
and S7, dehydrating and drying the silicon wafer.
2. The process of claim 1, wherein the cleaning time in steps S2, S4 and S6 is 60-120S.
3. The process of claim 1, wherein in step S3, the KOH content is 0.5-1.2% and H is added 2 O 2 Has a mass fraction of3% -10%, and the cleaning time is 110-180s.
4. The process of claim 1, wherein in step S5, the volume fraction of the HF solution is 2% to 6%, and the cleaning time is 90 to 180S.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111209827.XA CN113990981B (en) | 2021-10-18 | 2021-10-18 | Single crystal suede smooth and round treatment process |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111209827.XA CN113990981B (en) | 2021-10-18 | 2021-10-18 | Single crystal suede smooth and round treatment process |
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| Publication Number | Publication Date |
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| CN113990981A CN113990981A (en) | 2022-01-28 |
| CN113990981B true CN113990981B (en) | 2022-10-28 |
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| CN114975650A (en) * | 2022-03-16 | 2022-08-30 | 江苏日托光伏科技股份有限公司 | Monocrystalline silicon pyramid and preparation method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102938431A (en) * | 2012-10-19 | 2013-02-20 | 上海中智光纤通讯有限公司 | Silicon wafer cleaning flocking method of solar battery |
| EP3139416A1 (en) * | 2015-09-07 | 2017-03-08 | IMEC vzw | Texturing monocrystalline silicon substrates |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102938431A (en) * | 2012-10-19 | 2013-02-20 | 上海中智光纤通讯有限公司 | Silicon wafer cleaning flocking method of solar battery |
| EP3139416A1 (en) * | 2015-09-07 | 2017-03-08 | IMEC vzw | Texturing monocrystalline silicon substrates |
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| CN113990981A (en) | 2022-01-28 |
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