CN113905533A - PCB lead residue processing method and printed circuit board - Google Patents
PCB lead residue processing method and printed circuit board Download PDFInfo
- Publication number
- CN113905533A CN113905533A CN202111006651.8A CN202111006651A CN113905533A CN 113905533 A CN113905533 A CN 113905533A CN 202111006651 A CN202111006651 A CN 202111006651A CN 113905533 A CN113905533 A CN 113905533A
- Authority
- CN
- China
- Prior art keywords
- lead
- gold
- dry film
- pcb
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 10
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 33
- 229910052737 gold Inorganic materials 0.000 claims abstract description 30
- 239000010931 gold Substances 0.000 claims abstract description 30
- 238000005530 etching Methods 0.000 claims abstract description 24
- 239000002253 acid Substances 0.000 claims abstract description 19
- 238000009713 electroplating Methods 0.000 claims abstract description 19
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 14
- 238000003384 imaging method Methods 0.000 claims abstract description 14
- 239000007788 liquid Substances 0.000 claims abstract description 13
- 239000003814 drug Substances 0.000 claims abstract description 12
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910052802 copper Inorganic materials 0.000 claims abstract description 6
- 239000010949 copper Substances 0.000 claims abstract description 6
- 238000007689 inspection Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 19
- 230000002378 acidificating effect Effects 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 17
- 230000008595 infiltration Effects 0.000 description 6
- 238000001764 infiltration Methods 0.000 description 6
- 238000007747 plating Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 2
- 239000003929 acidic solution Substances 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 210000003205 muscle Anatomy 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/067—Etchants
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
The invention discloses a PCB lead residue processing method and a printed circuit board, wherein the PCB lead residue processing method comprises the following steps: and (3) outer layer inspection: completing the circuit design of the lead; first external light imaging: covering a first dry film around the pattern of the lead; electroplating gold flash: electroplating nickel and gold on the lead; alkaline etching: the first dry film is removed by alkaline liquid medicine; and (3) second external light imaging: covering a second dry film on the lead; acid etching: and the gold-infiltrated part of the lead and the base copper are etched together, so that the gold-infiltrated lead residue on the printed circuit board is removed, the condition that the product is scrapped to influence the delivery period of product production is avoided, and the production cost is reduced.
Description
Technical Field
The invention relates to the technical field of printed circuit board manufacturing, in particular to a PCB lead residue processing method and a printed circuit board.
Background
The printed circuit board is used as a basic component of electronic equipment, is a transmission carrier of current and signals, plays a role in the electronic equipment, and therefore puts higher demands on the quality of the printed circuit board.
In the prior art, when the printed circuit board is manufactured by adopting a dry film cover wire method, a circuit in the circuit board has a height difference, so that a film is provided with a gap, a wire is subjected to gold infiltration in the process of plating flash gold on the wire, and when the wire is etched, the gold-infiltrated wire cannot be etched by alkaline etching liquid, so that the gold-infiltrated wire is left on the printed circuit board.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides a PCB lead residue processing method and a printed circuit board, which can remove the gold-infiltrated lead residue on the printed circuit board, avoid the product abandonment to influence the delivery time of product production and reduce the production cost.
According to a first aspect of the present invention, there is provided a method for processing PCB conductive wire residue, comprising the steps of:
and (3) outer layer inspection: completing the circuit design of the lead;
first external light imaging: covering a first dry film around the pattern of the lead;
electroplating gold flash: electroplating nickel and gold on the lead;
alkaline etching: the first dry film is removed by alkaline liquid medicine;
and (3) second external light imaging: covering a second dry film on the lead;
acid etching: the gold-infiltrated portion of the wire is etched away along with the base copper.
The method for processing the PCB lead residues according to the embodiment of the first aspect of the invention has at least the following beneficial effects: the gold flash plating layer can be etched by utilizing acid etching, so that the gold-infiltrated part of the lead can be etched by utilizing acid etching, the residual gold-infiltrated lead can be removed, the condition that the product is scrapped to influence the delivery time of product production is avoided, and the production cost is reduced.
According to some embodiments of the invention, the second external light imaging further comprises: two sides of the wire are respectively windowed, and the width of the windowed is 5 mil.
According to some embodiments of the invention, the second external light imaging further comprises: the thickness of the second dry film is 1.5 mil.
According to some embodiments of the invention, the acid etching further comprises: and removing the second dry film through acidic liquid medicine.
According to some embodiments of the invention, the electroplating flash gold further comprises: and electroplating nickel and gold on the PAD PAD.
According to a second aspect of the present invention, there is provided a printed circuit board manufactured by a method of treating PCB conductor residue.
The printed circuit board according to the embodiment of the second aspect of the invention has at least the following advantages: the problem that the gold is infiltrated by the lead in the manufacturing process of the printed circuit board by adopting a dry film cover lead method can be effectively solved, the gold-infiltrated lead residue on the printed circuit board is removed, the condition that the product is scrapped to influence the delivery time of product production is avoided, and the production cost is reduced.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The invention is further described with reference to the following figures and examples, in which:
FIG. 1 is a flowchart illustrating steps of a method for processing PCB trace residue according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality is one or more, the meaning of a plurality is two or more, and the above, below, exceeding, etc. are understood as excluding the present numbers, and the above, below, within, etc. are understood as including the present numbers. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
In the description of the present invention, reference to the description of the terms "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The embodiment of the first aspect of the invention provides a method for processing PCB lead residues.
Referring to fig. 1, the protection method according to the embodiment of the present invention includes, but is not limited to, step S100, step S200, step S300, step S400, step S500, and step S600.
Step S100, outer layer inspection: completing the circuit design of the lead;
step S200, first external light imaging: covering a first dry film around the pattern of the lead;
step S300, electroplating gold flash: electroplating nickel and gold on the lead;
step S400, alkaline etching: removing the first dry film by using alkaline liquid medicine;
step S500, second external light imaging: covering a second dry film on the lead;
step S600, acid etching: the gold-infiltrated portion of the wire is etched away along with the base copper.
The outer layer inspection is to ensure that the circuit of the lead does not have short circuit or open circuit by inspecting the lead circuit on the PCB in advance, thereby completing the circuit design of the lead; the first external light imaging is to cover a layer of first dry film around the pattern of the lead according to the circuit design pattern of the lead; the electroplating flash gold is to electroplate a layer of nickel and gold on the circuit design pattern of the lead; alkaline etching, since the first dry film is an electroplating-resistant film, the first dry film needs to be removed with an alkaline aqueous solution; the second external light imaging is to cover a second dry film on the wire circuit design graph after electroplating and gold flashing; acid etching, the wire can have the infiltration gold in electroplating gold flash process, and the infiltration gold part of wire can be through acid liquid medicine etching, and the base copper is also thin gold, and thin gold also can be through acid liquid medicine etching. Through modifying the etching flow in the PCB dry film cover wire method, the plating flash gold plating layer can be etched away by utilizing acid etching, so that the gold-infiltrated part of the wire can be etched away by the acid etching, further the gold-infiltrated wire residue can be removed, the condition that the product is scrapped to influence the delivery time of the product production is avoided, and the production cost is reduced.
It should be noted that, in some embodiments, the step S500 further includes windowing two sides of the conducting wire, where the width of the window is 5 mils, and the thickness of the second dry film is 1.5 mils.
Do the etching wire figure, the second dry film pastes on the circuit figure of wire, and the thickness of second dry film is 1.5mil, and 5mil of windowing respectively on the both sides of wire position realize avoiding the acid etching time excessively with the wire figure etching, can ensure to etch effective figure to can remain the removal with the wire at the infiltration gold wire of electroplating sudden strain of a muscle gold in-process.
In some embodiments, step S600 further comprises removing the second dry film by an acidic solution.
The second dry film can be etched by acid-resistant liquid medicine, and it can be understood that the acid-resistant liquid medicine only etches the gold-infiltrated part of the lead and the base copper of the PCB in the acid etching process, and the acid-resistant liquid medicine can remove the legs of the second dry film and can not etch away the gold-plated lead pattern covered by the second dry film. It should be noted that, electroplating gold flash also includes electroplating nickel gold on the PAD, the PAD and the wire constitute the circuit pattern design of wire, the second dry film also covers on the PAD, the portion of oozing gold on the PAD can also be etched away through acid liquid medicine, the realization is removed and is oozed gold wire and remain and ooze gold PAD and remain, avoid the product to scrap and influence the delivery deadline of product production, reduction in production cost.
The embodiment of the second aspect of the present invention further provides a printed circuit board, and the printed circuit board is manufactured by using the method for processing the PCB conductive wire residue, wherein the method for processing the PCB conductive wire residue is described in detail in the above embodiments, and is not described herein again.
In a second aspect, embodiments of the present invention provide a printed circuit board.
In some embodiments, the printed circuit board is manufactured by adopting a PCB lead residue processing method, so that the problem of lead gold infiltration in the manufacturing process of the printed circuit board adopting a dry film cover lead method can be effectively solved, the gold infiltration lead residue on the printed circuit board can be removed, the product scrapping is avoided, the product production delivery period is not influenced, and the production cost is reduced.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention. Furthermore, the embodiments of the present invention and the features of the embodiments may be combined with each other without conflict.
Claims (6)
1. A method for processing PCB lead residue is characterized by comprising the following steps:
and (3) outer layer inspection: completing the circuit design of the lead;
first external light imaging: covering a first dry film around the pattern of the lead;
electroplating gold flash: electroplating nickel and gold on the lead;
alkaline etching: the first dry film is removed by alkaline liquid medicine;
and (3) second external light imaging: covering a second dry film on the lead;
acid etching: the gold-infiltrated portion of the wire is etched away along with the base copper.
2. The PCB wire residue processing method of claim 1, wherein the second external light imaging further comprises: two sides of the wire are respectively windowed, and the width of the windowed is 5 mil.
3. The PCB wire residue processing method of claim 2, wherein the second external light imaging further comprises: the thickness of the second dry film is 1.5 mil.
4. The method of claim 1, wherein the acid etching further comprises: and removing the second dry film through acidic liquid medicine.
5. The method for processing the PCB lead residue according to claim 1, wherein the electroplating flash gold further comprises: and electroplating nickel and gold on the PAD PAD.
6. A printed circuit board comprising the PCB lead residue processing method of any one of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111006651.8A CN113905533A (en) | 2021-08-30 | 2021-08-30 | PCB lead residue processing method and printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111006651.8A CN113905533A (en) | 2021-08-30 | 2021-08-30 | PCB lead residue processing method and printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113905533A true CN113905533A (en) | 2022-01-07 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111006651.8A Pending CN113905533A (en) | 2021-08-30 | 2021-08-30 | PCB lead residue processing method and printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113905533A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103179795A (en) * | 2013-04-23 | 2013-06-26 | 无锡江南计算技术研究所 | Making method of outer layer patterns of local gold-plating printed plate |
| CN105960113A (en) * | 2016-05-27 | 2016-09-21 | 东莞联桥电子有限公司 | Golden finger plate processing technology |
| CN111315148A (en) * | 2020-02-27 | 2020-06-19 | 惠州中京电子科技有限公司 | Rework method for gold plating plate or gold plating plate lead metal infiltration short circuit |
| CN112384005A (en) * | 2020-11-03 | 2021-02-19 | 珠海杰赛科技有限公司 | Wire etching method for full-plate gold-plated printed circuit board |
-
2021
- 2021-08-30 CN CN202111006651.8A patent/CN113905533A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103179795A (en) * | 2013-04-23 | 2013-06-26 | 无锡江南计算技术研究所 | Making method of outer layer patterns of local gold-plating printed plate |
| CN105960113A (en) * | 2016-05-27 | 2016-09-21 | 东莞联桥电子有限公司 | Golden finger plate processing technology |
| CN111315148A (en) * | 2020-02-27 | 2020-06-19 | 惠州中京电子科技有限公司 | Rework method for gold plating plate or gold plating plate lead metal infiltration short circuit |
| CN112384005A (en) * | 2020-11-03 | 2021-02-19 | 珠海杰赛科技有限公司 | Wire etching method for full-plate gold-plated printed circuit board |
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| PB01 | Publication | ||
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| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20220107 |