CN113851542B - Super junction MOSFET with soft reverse recovery characteristic - Google Patents
Super junction MOSFET with soft reverse recovery characteristic Download PDFInfo
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- CN113851542B CN113851542B CN202111123112.2A CN202111123112A CN113851542B CN 113851542 B CN113851542 B CN 113851542B CN 202111123112 A CN202111123112 A CN 202111123112A CN 113851542 B CN113851542 B CN 113851542B
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- 238000011084 recovery Methods 0.000 title claims abstract description 31
- 239000002184 metal Substances 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000000605 extraction Methods 0.000 abstract description 2
- 239000000969 carrier Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000001727 in vivo Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
Abstract
The invention belongs to the technical field of power semiconductors, and particularly relates to a super-junction MOSFET with soft reverse recovery characteristic. The device of the invention introduces the high-concentration P-type buffer layer in the super junction structure of the voltage-resistant region, and the introduced P-type buffer layer prolongs the length of the drift region of the body diode, so that the carrier distribution in the drift region is closer to the drain electrode, which slows down the extraction of the carrier in the drift region, and meanwhile, the high-doped P-type buffer layer is not completely consumed when the device is voltage-resistant, thus the carrier in the high-doped P-type buffer layer can be slowly extracted when the device is in reverse conduction, the reduction rate di/dt of reverse recovery current is reduced, and the reverse recovery characteristic is improved. The super-junction MOSFET with the soft reverse recovery characteristic has the beneficial effects that di/dt and dv/dt during reverse recovery are optimized, so that the reverse recovery characteristic of the super-junction MOSFET is improved.
Description
Technical Field
The invention belongs to the technical field of power semiconductors, and particularly relates to a super junction MOSFET (Metal-Oxide-semiconductor field effect transistor, metal-Oxide-Semiconductor Field-Effect Transistor, simply referred to as MOSFET) with soft reverse recovery characteristics.
Background
When the super-junction MOSFET is applied to driving motor application circuits such as full bridges, the body diode of the super-junction MOSFET plays a role of freewheeling. When the body diode is turned on, a large number of hole carriers are stored in the drift region. In the process of switching the body diode from the conducting state to the voltage-withstanding state, carriers stored in the body are required to be discharged, and a large reverse current is formed. Since the drift region of the superjunction MOSFET is completely depleted at a lower voltage, carriers in the drift region are discharged, so di/dt and dv/dt of the superjunction MOSFET body diode during reverse recovery are extremely large, and the reverse recovery characteristic is hard. High di/dt and high dv/dt can lead to severe electromagnetic interference noise, plus the effect of parasitic inductance in the system, and high di/dt can lead to high voltage overshoot, which can adversely affect the application system.
Disclosure of Invention
The present invention has been made in view of the above problems, and an object of the present invention is to provide a superjunction MOSFET having soft reverse recovery characteristics.
The technical scheme of the invention is as follows: the super-junction MOSFET with the soft reverse recovery characteristic comprises a half cell, a first half cell and a second half cell, wherein the half cell comprises a drain electrode structure, a voltage-resistant layer structure, a source electrode structure and a grid electrode structure, the voltage-resistant layer structure is positioned on the drain electrode structure, and the source electrode structure and the grid electrode structure are positioned on the voltage-resistant layer structure;
the drain structure comprises drain metal 1 and an N+ drain region 2; the N+ drain region 2 is positioned on the upper surface of the drain metal 1; the drain metal 1 leading-out end is a drain;
the voltage-resistant layer structure comprises an N-type drift region 6, a P-type drift region 5, a P-type buffer layer 3 and an N-type buffer layer 4; the N-type drift region 6 and the P-type drift region 5 are arranged in parallel to form a super junction structure, wherein the P-type drift region 5 is positioned on the upper surface of the P-type buffer layer 3, and the N-type drift region 6 is positioned on the upper surface of the N-type buffer layer 4; the P-type buffer layer 3 is embedded into an upper layer arranged on one side of the N+ drain region 2, namely the lower surface and the side surface of the P-type buffer layer 3 are in contact with the N+ drain region 2; the N-type buffer layer 4 is positioned on the upper surface of the other side of the N+ drain region 2, and the side surface of the N-type buffer layer 4 is contacted with the side surface of the P-type drift region 5;
the source electrode structure comprises a P-type well region 7, an N+ source region 8, a P+ short circuit region 9 and source electrode metal 10; the P-type well region 7 is positioned on the upper surface of the P-type drift region 5, the P-type well region 7 extends into the upper layer of the N-type drift region 6 along the transverse direction of the device, the N+ source region 8 and the P+ short circuit region 9 are arranged on the upper layer of the P-type well region 7 in parallel, and the N+ source region 8 is positioned on one side close to the N-type drift region 6; the source metal 10 is positioned on the upper surfaces of the P+ short circuit region 9 and part of the N+ source region 8, and the leading-out end of the source metal 10 is a source;
the grid structure is a planar grid, and the planar grid is composed of an insulating medium 11 and a conductive material 12 positioned on the insulating medium 11; the insulating medium 11 is positioned on the upper surfaces of the N-type drift region 6, the P-type well region 7 and part of the N+ source region 8; the leading-out end of the conductive material 12 is a grid;
the P-type buffer layer 3 has a concentration equal to or higher than that of the P-type drift region 5, and the N-type buffer layer 4 has a concentration higher than that of the N-type drift region 6.
The super-junction MOSFET with the soft reverse recovery characteristic has the beneficial effects that di/dt and dv/dt during reverse recovery are optimized, so that the reverse recovery characteristic of the super-junction MOSFET is improved.
Drawings
FIG. 1 is a schematic diagram of a superjunction MOSFET of the present invention;
FIG. 2 is a schematic diagram of a conventional superjunction MOSFET;
FIG. 3 is a graph of current-voltage variation during reverse recovery of a conventional superjunction MOSFET;
FIG. 4 is a graph of current-voltage variation during reverse recovery of the superjunction MOSFET of the present invention;
FIG. 5 is a comparison of hole and electron distribution in a P-type drift region when a super-junction MOSFET of the present invention is turned on in reverse with a conventional super-junction MOSFET;
FIG. 6 is a comparison of hole and electron distribution in an N-type drift region when a superjunction MOSFET of the present invention is turned on in reverse with a conventional superjunction MOSFET;
FIG. 7 is a trade-off of softness factor (S) and withstand voltage (BV) versus doping concentration of P-type buffer layer 3 for a super-junction MOSFET of the present invention and a conventional super-junction MOSFET;
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings
As shown in fig. 1, the super junction MOSFET with soft reverse recovery characteristics of the present invention is shown. Fig. 2 is a conventional superjunction MOSFET. The super-junction MOSFET and the conventional super-junction MOSFET are internally provided with a body diode, the anode of the super-junction MOSFET and the conventional super-junction MOSFET are composed of a P+ short circuit region 9/a P-type well region 7, the cathode of the super-junction MOSFET and an N+ drain region 2, the drift region of the conventional MOSFET body diode is composed of a P-type drift region 5 and an N-type drift region 6, and the drift region of the super-junction MOSFET is composed of the P-type drift region 5, the N-type drift region 6, the P-type buffer layer 3 and the N-type buffer layer 4. The P-type buffer layer 3 introduced in the structure of the present invention lengthens the drift region of the body diode.
The working principle is as follows:
when the device is conducted reversely, the grid and the source of the device are connected with high potential, and the drain of the device is grounded. The source injects holes into the drift region and the N + drain injects electrons into the drift region. Compared with a conventional super-junction MOSFET body diode, on one hand, the length of a drift region of the body diode is prolonged by the P-type buffer layer 3 introduced by the device, so that the carrier distribution in the drift region is closer to a drain electrode, extraction of the carrier in the drift region is slowed down, on the other hand, the highly doped P-type buffer layer 3 is not completely depleted when the device is voltage-resistant, and therefore the carrier in the highly doped P-type buffer layer can be slowly extracted when the device is in reverse conduction, the reduction rate di/dt of reverse recovery current is reduced, and the reverse recovery characteristic is improved.
When the device is voltage-resistant, the drift region of the device is voltage-resistant, and the highly doped N-type buffer layer 6 can shield the high electric field of the P-type drift region 5/N-type drift region 6 from expanding to the highly doped P-type buffer layer, so that the voltage resistance of the device is ensured.
The performance of the device of the present invention was verified by means of two-dimensional semiconductor device simulation software MEDICI simulation. Fig. 3 and 4 are graphs of current-voltage variations during reverse recovery of a conventional superjunction MOSFET and a superjunction MOSFET of the present invention, respectively. It can be seen from fig. 3 that the current voltage di/dt and dv/dt are extremely large and the waveform oscillation is extremely serious in the reverse recovery process of the conventional super junction MOSFET. Whereas the reverse recovery waveform of the device of the present invention in fig. 4, di/dt and dv/dt are significantly reduced, the oscillation of the waveform is almost completely eliminated, and the softness of the reverse recovery is improved.
Fig. 5 and 6 are graphs showing the in vivo hole carrier distribution of the superjunction MOSFET of the present invention when turned on in reverse direction, compared to conventional superjunction MOSFETs. The introduction of the P-type buffer layer 3 improves the distribution of hole carriers in the device, thereby slowing down the discharge of holes in the reverse recovery process and improving the reverse recovery characteristic of the device.
Fig. 7 shows the effect of the doping concentration of the P-type buffer layer 3 on the reverse recovery softness factor (S) and the withstand voltage (BV). The smaller the 1/S, the softer the device reverse recovery characteristics, and the smaller the di/dt and dv/dt, the better the device reverse recovery characteristics. The 1/S of the device of the present invention gradually decreases as the doping concentration of the P-type buffer layer 3 increases from the figure, and the withstand voltage of the device can be maintained at a higher value under the condition of larger variation of the doping concentration of the P-type buffer layer 3.
Claims (1)
1. The super-junction MOSFET with the soft reverse recovery characteristic comprises a half cell, a first half cell and a second half cell, wherein the half cell comprises a drain electrode structure, a voltage-resistant layer structure, a source electrode structure and a grid electrode structure, the voltage-resistant layer structure is positioned on the drain electrode structure, and the source electrode structure and the grid electrode structure are positioned on the voltage-resistant layer structure;
the drain structure comprises a drain metal (1) and an N+ drain region (2); the N+ drain region (2) is positioned on the upper surface of the drain metal (1); the leading-out end of the drain electrode metal (1) is a drain electrode;
the voltage-resistant layer structure comprises an N-type drift region (6), a P-type drift region (5), a P-type buffer layer (3) and an N-type buffer layer (4); the N-type drift region (6) and the P-type drift region (5) are arranged in parallel to form a super junction structure, wherein the P-type drift region (5) is positioned on the upper surface of the P-type buffer layer (3), and the N-type drift region (6) is positioned on the upper surface of the N-type buffer layer (4); the P-type buffer layer (3) is embedded into an upper layer arranged at one side of the N+ drain region (2), namely the lower surface and the side surface of the P-type buffer layer (3) are contacted with the N+ drain region (2); the N-type buffer layer (4) is positioned on the upper surface of the other side of the N+ drain region (2), and the side surface of the N-type buffer layer (4) is contacted with the side surface of the P-type drift region (5);
the source electrode structure comprises a P-type well region (7), an N+ source region (8), a P+ short circuit region (9) and source electrode metal (10); the P-type well region (7) is positioned on the upper surface of the P-type drift region (5), the P-type well region (7) extends into the upper layer of the N-type drift region (6) along the transverse direction of the device, the N+ source region (8) and the P+ short circuit region (9) are arranged on the upper layer of the P-type well region (7) in parallel, and the N+ source region (8) is positioned on one side close to the N-type drift region (6); the source metal (10) is positioned on the upper surfaces of the P+ short circuit region (9) and part of the N+ source region (8), and the leading-out end of the source metal (10) is a source;
the grid structure is a planar grid, and the planar grid is composed of an insulating medium (11) and a conductive material (12) positioned on the insulating medium (11); the insulating medium (11) is positioned on the upper surfaces of the N-type drift region (6), the P-type well region (7) and part of the N+ source region (8); the leading-out end of the conductive material (12) is a grid electrode;
the concentration of the P-type buffer layer (3) is larger than or equal to that of the P-type drift region (5), and the concentration of the N-type buffer layer (4) is larger than that of the N-type drift region (6).
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111123112.2A CN113851542B (en) | 2021-09-24 | 2021-09-24 | Super junction MOSFET with soft reverse recovery characteristic |
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| CN202111123112.2A CN113851542B (en) | 2021-09-24 | 2021-09-24 | Super junction MOSFET with soft reverse recovery characteristic |
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| CN113851542B true CN113851542B (en) | 2024-04-12 |
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| CN116153966B (en) * | 2023-02-09 | 2023-12-12 | 上海功成半导体科技有限公司 | Super-junction MOS device structure and preparation method thereof |
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|---|---|---|---|---|
| JP2001102577A (en) * | 1999-09-30 | 2001-04-13 | Toshiba Corp | Semiconductor device |
| CN106847919A (en) * | 2016-12-26 | 2017-06-13 | 中国科学院微电子研究所 | A kind of high pressure hyperconjugation VDMOS |
| CN108231903A (en) * | 2018-01-24 | 2018-06-29 | 重庆大学 | A kind of soft superjunction power MOSFET for restoring body diode of band |
| CN108493247A (en) * | 2018-02-28 | 2018-09-04 | 南京邮电大学 | A kind of SJ-VDMOS devices and manufacturing method with P post region and N columns area Doping |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016110953A1 (en) * | 2015-01-07 | 2016-07-14 | 三菱電機株式会社 | Silicon carbide semiconductor device and manufacturing method therefor |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001102577A (en) * | 1999-09-30 | 2001-04-13 | Toshiba Corp | Semiconductor device |
| CN106847919A (en) * | 2016-12-26 | 2017-06-13 | 中国科学院微电子研究所 | A kind of high pressure hyperconjugation VDMOS |
| CN108231903A (en) * | 2018-01-24 | 2018-06-29 | 重庆大学 | A kind of soft superjunction power MOSFET for restoring body diode of band |
| CN108493247A (en) * | 2018-02-28 | 2018-09-04 | 南京邮电大学 | A kind of SJ-VDMOS devices and manufacturing method with P post region and N columns area Doping |
Non-Patent Citations (2)
| Title |
|---|
| A New Super-Junction VDMOS Realizing Fast Reverse Recovery;Bo Yi et al;《IEEE》;20150612;第122-125页 * |
| A SIMulation Study of a Novel Superjunction MOSFET Embedded With an Ultrasoft Reverse-Recovery Body Diode;Zhi Lin et al;《IEEE TRANSACTIONS ON ELECTRON DEVICES》;20190531;第第66卷卷(第第5期期);第2333-2338页 * |
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