CN113734926A - Dormancy awakening device of elevator system - Google Patents
Dormancy awakening device of elevator system Download PDFInfo
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- CN113734926A CN113734926A CN202110835939.XA CN202110835939A CN113734926A CN 113734926 A CN113734926 A CN 113734926A CN 202110835939 A CN202110835939 A CN 202110835939A CN 113734926 A CN113734926 A CN 113734926A
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- 230000005059 dormancy Effects 0.000 title claims abstract description 12
- 238000012545 processing Methods 0.000 claims abstract description 28
- 238000005070 sampling Methods 0.000 claims abstract description 25
- 239000003990 capacitor Substances 0.000 claims description 79
- 230000005669 field effect Effects 0.000 claims description 44
- 230000007958 sleep Effects 0.000 claims description 10
- 230000000694 effects Effects 0.000 abstract description 12
- 238000004458 analytical method Methods 0.000 abstract description 6
- 230000008054 signal transmission Effects 0.000 abstract description 6
- 238000001914 filtration Methods 0.000 description 11
- 238000012544 monitoring process Methods 0.000 description 7
- 230000001276 controlling effect Effects 0.000 description 6
- 230000002457 bidirectional effect Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000003321 amplification Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 230000001629 suppression Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000004134 energy conservation Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000012216 screening Methods 0.000 description 2
- 230000000087 stabilizing effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B66—HOISTING; LIFTING; HAULING
- B66B—ELEVATORS; ESCALATORS OR MOVING WALKWAYS
- B66B5/00—Applications of checking, fault-correcting, or safety devices in elevators
- B66B5/0006—Monitoring devices or performance analysers
- B66B5/0018—Devices monitoring the operating condition of the elevator system
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
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Abstract
The application relates to a dormancy awakening device of an elevator system, which comprises a signal sampling circuit, a signal processing circuit and a signal output control circuit. The signal sampling circuit amplifies the input electric signal through the triode amplifier and filters the high-frequency voltage signal, so that the accuracy of signal transmission is guaranteed. The signal processing circuit adopts accurate feedback linearization control processing to restrain harmonic waves, prevents interference signals from influencing the next processing and judgment, and can realize accurate signal analysis and achieve the circuit protection control effect. And the signal output control circuit amplifies the signals by using the amplifier, outputs an analysis result signal of the state of the elevator system and controls the state result of the elevator dormancy or awakening.
Description
Technical Field
The application relates to the field of elevator systems and electronic circuits, in particular to a dormancy awakening device of an elevator system.
Background
With the leading position of high-rise buildings in life, the use of elevators is more and more extensive, and great market demands determine that customers have more expectations on product quality and functions. First, elevator control technology tends to be intelligent. The comfort level is better when the elevator is taken; problems which are easy to occur in operation can be monitored and alarmed in real time, and the method has certain adaptivity to the problems; the state monitoring of the running elevator can be realized at any time; the operation efficiency is further improved, and the waiting time of passengers and the number of idle elevators are reduced; not only needs to be safely served, but also can identify visitors and the like. At present, the elevator system widely applied in China uses a PLC (programmable logic controller) or an 8-bit or 16-bit WeChat CPU (Central processing Unit) as a control core, and the controller is enough to meet the general transportation requirement, but cannot further realize complex intelligent control. Aiming at the MPK400 series products developed by countries with better handling of the situation, such as Kollmorgen Germany, the whole elevator control system is thoroughly divided into modules, wherein the elevator control system comprises an operation control module, a monitoring module, a group control scheduling module and a remote operation module, and is provided with a character-shaped man-machine interaction interface, so that the elevator control system has good real-time monitoring and fault diagnosis functions. The design of a highly intelligent elevator has a long way to go, and the design designs a dormancy awakening device of an elevator system aiming at one direction of prolonging the service life of the elevator in order to achieve high efficiency, energy conservation and energy conservation. The test shows that the elevator has a good logic control function, which provides a good basic idea for the future research on advanced intelligent control elevators.
As shown in fig. 1, the related double sampling circuit in the prior art has three clock control switches, which is beneficial to the device to realize at least three state switching, and has high flexibility, strong embeddability, but high sampling error, easy clutter interference, and poor stability.
As shown in fig. 2, the LC series resonance harmonic suppression circuit in the prior art has two LC resonant circuits in total, and can effectively filter out higher harmonics, but has a poor filtering capability for lower harmonics.
Disclosure of Invention
Problem (A)
1. In the prior art, the information sampling error is high and the stability is poor.
2. In the prior art, the harmonic suppression capability is poor, and the protection function is lacked.
(II) technical scheme
In order to solve the technical problem, the application provides a dormancy awakening device of an elevator system, which comprises a signal sampling circuit, a signal processing circuit and a signal output control circuit.
The signal sampling circuit samples and processes a sleep wake-up signal of an elevator system through the sampling circuit, the signal sampling circuit firstly inputs the signal into the circuit through a capacitor C4 and a resistor R11 to achieve the effect of stabilizing the input signal of the circuit, the input signal is coupled through a capacitor C4, an input positive signal is pulled up through a resistor R6 to keep a high level of the positive input signal, the signal flows through a base electrode of a triode Q6 and a base electrode of a triode Q1 to amplify the sampled signal, a negative input signal is pulled down through a resistor R1, filtering processing is performed through a capacitor C6, the signal is compared through a triode Q2 and a triode Q8, the capacitor C3 and a capacitor C6 filter a high-frequency voltage signal to play a role of filtering interference signals, a diode D1 and a diode D5 ensure the stability of the signal, the signal is output through an inductor L1, so that the accuracy and the high efficiency of the signal transmission are ensured, the signals are subjected to secondary screening filtering through the capacitor C2 and the capacitor C8, and the identified sampling signals with the performance of slight degree difference are further improved through the diode D2, the diode D3, the resistor R5 and the resistor R16, so that the accuracy of signal transmission is ensured.
The signal processing circuit is mainly used for processing the sampled wake-up signal, the sampled signal flows through a current mirror circuit consisting of MOSFETs to adjust the voltage and the current of the circuit to reach a stable state, the signal flows into symmetrical circuits consisting of depletion type field effect transistors Q3 and Q4 and enhancement type field effect transistors Q5 and Q7 to be processed, the effect of suppressing harmonic waves can be achieved, the processing capacity of the sleep wake-up signal is high, the response is quick, and the circuit protection control effect is achieved through a resistor R12, a resistor R17, a diode D4 and a diode D6. Reliable and accurate signals are screened out through a resistance-capacitance coupling and filtering circuit consisting of a resistor R3, a resistor R8, a resistor R4, a resistor R9, a capacitor C5 and a capacitor C7, a resistor R13 and a resistor R18 play a role in circuit protection and control, and the signals are output through a depletion type field effect transistor Q4 through a current-limiting resistor R10. The part screens the signals, can respond to the awakening signals after dormancy in real time, and prevents the false triggering signals from influencing the normal awakening signals.
The signal output control circuit can identify the signal processed by the previous stage, then control the output, amplify the signal through the amplifier, output the analysis result signal of the elevator system state, output the signal for controlling the elevator to sleep or wake up, the signal flows through the operational amplifier U1 and the amplifier U3 to respectively carry out the in-phase input comparison and the reverse phase input comparison, the resistor R20 pulls the signal up to high level to ensure the signal input capability, the capacitor C12 couples the alternating current signal, the capacitor C11 and the capacitor C13 carry out the filtering processing, the amplifier U2 amplifies the compared signal to ensure the circuit output capability and reduce the circuit loss, the amplified signal is stably output through the resistor R25 and fed back to the previous stage input processing operational amplifier for signal adjustment, the output power of the signal is improved through 4 power field effect transistors Q9, Q10, Q14 and Q15, the signal is input to the base electrode of the triode Q13, and is input to the triode Q11, the triode Q12, the triode Q16 and the triode Q17 through the collector and the emitter for current compensation amplification, so that the fluctuation of power output is effectively reduced, an analysis result signal of the state of the elevator system is finally obtained, and a state result of controlling the elevator to be dormant or awakened can be reliably and safely output.
The elevator running state input signals and various sensor signals are monitored, and are processed by the sampling circuit, the processing circuit and the output control circuit, so that the purposes of accurately monitoring and analyzing the elevator running state and finally outputting and controlling an elevator running signal result are achieved, and an elevator system is enabled to run more intelligently, efficiently, energy-saving and stably.
(III) advantageous effects
The utility model provides a dormancy awakening device of elevator system, at first, adopt the signal amplification collection method, carry out signal sampling through triode amplifier, can avoid the adverse effect that high common mode voltage brought, the accumulative total error that effectively reduces the signal source has guaranteed the accuracy and the stability of real-time supervision state at the collection end, prevents to cause the anomaly of output result because of the sampling signal error. Secondly, the harmonic waves are suppressed by adopting accurate feedback linearization control processing, the accuracy of signal transmission is better improved, the circuit protection control effect is achieved, and the working efficiency of processing steps in dormancy awakening monitoring is improved.
Drawings
Fig. 1 shows a correlated double sampling circuit of the prior art.
Fig. 2 is a prior art LC series resonance harmonic suppression circuit.
Fig. 3 is a schematic diagram of a signal sampling circuit according to the present application.
Fig. 4 is a schematic diagram of a signal processing circuit according to the present application.
Fig. 5 is a schematic diagram of a signal output control circuit according to the present application.
Reference numerals
Detailed Description
The present invention will be further described with reference to the following examples.
As shown in fig. 3, 4, and 5, the sleep wake-up device of an elevator system according to the present application includes a signal sampling circuit, a signal processing circuit, and a signal output control circuit.
The signal sampling circuit samples and processes a sleep wake-up signal of an elevator system through the sampling circuit, the signal sampling circuit firstly inputs the signal into the circuit through a capacitor C4 and a resistor R11 to achieve the effect of stabilizing the input signal of the circuit, the input signal is coupled through a capacitor C4, an input positive signal is pulled up through a resistor R6 to keep a high level of the positive input signal, the signal flows through a base electrode of a triode Q6 and a base electrode of a triode Q1 to amplify the sampled signal, a negative input signal is pulled down through a resistor R1, filtering processing is performed through a capacitor C6, the signal is compared through a triode Q2 and a triode Q8, the capacitor C3 and a capacitor C6 filter a high-frequency voltage signal to play a role of filtering interference signals, a diode D1 and a diode D5 ensure the stability of the signal, the signal is output through an inductor L1, so that the accuracy and the high efficiency of the signal transmission are ensured, the signals are subjected to secondary screening filtering through the capacitor C2 and the capacitor C8, and the identified sampling signals with the performance of slight degree difference are further improved through the diode D2, the diode D3, the resistor R5 and the resistor R16, so that the accuracy of signal transmission is ensured.
Specifically, the signal sampling circuit includes an input port IN-, an input port IN +, an output port Va, 4 diodes D1, D2, D3 and D5 respectively, 4 triodes Q1, Q2, Q6 and Q8 respectively, an inductor L1, 5 capacitors C2, C3, C4, C6 and C8 respectively, 9 resistors R1, R2, R5, R6, R7, R11, R14, R15 and R16 respectively, wherein the input port IN + is connected to one end of a resistor R6 and the anode of a capacitor C4 respectively, the other end of the resistor R6 is connected to a high level VCC, the cathode of the capacitor C6 is connected to the base of the triode Q6 and the base of the triode Q6 respectively, the input port IN-IN is connected to one end of the resistor R6, one end of the emitter of the resistor R6, the other end of the Q6, the other end of the resistor R6 is connected to the base of the triode Q6, and the collector of the resistor R6 are connected to the collector of the triode Q6, the other end is grounded, one end of a capacitor C6 is connected with the base of a triode Q8, the other end is grounded, the collector of a triode Q1 is grounded, the collector of the triode Q6 is connected with a high-level VCC, one end of a resistor R1 is connected with the high-level VCC, the other end is connected with the emitter of a triode Q1, one end of a resistor R7 is connected with the emitter of the triode Q1, the other end is connected with the base of the triode Q2, one end of a capacitor C3 is connected with the high-level VCC, the other end is connected with the base of the triode Q2, one end of a resistor R2 is connected with the high-level VCC, the other end is connected with the collector of the triode Q2, the emitter of the triode Q2 is connected with the emitter of the triode Q8, the anode of a diode D1 is connected with the high-level VCC, the cathode is respectively connected with the emitter of the triode Q2, one end of an inductor L1 and one end of a capacitor C2, the other end of an inductor L1 is connected with the anode of a diode D2, the other end of the capacitor C2 is connected with a high-level VCC, one end of the resistor R5 is connected with the high-level VCC, the other end of the resistor R5 is connected with the negative electrode of the diode D2, one end of the resistor R6 is connected with the positive electrode of the diode D3, the other end of the resistor R6 is grounded, the negative electrode of the diode D3 is connected with the positive electrode of the diode D2, one end of the capacitor C8 is connected with the negative electrode of the diode D5, the other end of the capacitor C8 is grounded, the positive electrode of the diode D5 is connected with the collector of the triode Q8, and the output port is connected with the positive electrode of the diode D2.
The signal processing circuit is mainly used for processing the sampled wake-up signal, the sampled signal flows through a current mirror circuit consisting of MOSFETs to adjust the voltage and the current of the circuit to reach a stable state, the signal flows into symmetrical circuits consisting of depletion type field effect transistors Q3 and Q4 and enhancement type field effect transistors Q5 and Q7 to be processed, the effect of suppressing harmonic waves can be achieved, the processing capacity of the sleep wake-up signal is high, the response is quick, and the circuit protection control effect is achieved through a resistor R12, a resistor R17, a diode D4 and a diode D6. Reliable and accurate signals are screened out through a resistance-capacitance coupling and filtering circuit consisting of a resistor R3, a resistor R8, a resistor R4, a resistor R9, a capacitor C5 and a capacitor C7, a resistor R13 and a resistor R18 play a role in circuit protection and control, and the signals are output through a depletion type field effect transistor Q4 through a current-limiting resistor R10. The part screens the signals, can respond to the awakening signals after dormancy in real time, and prevents the false triggering signals from influencing the normal awakening signals.
Specifically, the signal processing circuit includes an input port Va, an output port Vb, 2 depletion type field effect transistors Q3 and Q4, 2 enhancement type field effect transistors Q7 and Q5, 2 diodes D4 and D6, 3 capacitors C1, 9 resistors R1, and R1, wherein the input port Va is connected to the gate of the depletion type field effect transistor Q1, the drain terminal of the depletion type field effect transistor Q1 is connected to a high level VCC, the substrate terminal is connected to the gate of the enhancement type field effect transistor Q1, one terminal of the resistor R1 is connected to the source terminal of the depletion type field effect transistor Q1, the other terminal of the resistor R1 is connected to one terminal of the resistor R1, the other terminal of the resistor R1 is connected to ground, one terminal of the resistor R1 is connected to the drain terminal of the field effect transistor Q1, and one terminal of the capacitor R1 is connected to one terminal of the resistor R1, the other end of the resistor R3 is connected with a high-level VCC, the other end of the capacitor C1 is respectively connected with one end of a resistor R4 and one end of a resistor R9, the other end of the resistor R4 is connected with the high-level VCC, the other end of the resistor R9 is connected with the source end of an enhancement-mode FET Q5, the cathode of a diode D4 is connected with the source end of the enhancement-mode FET Q7, one end of a capacitor C7 is connected with the anode of the diode D4, the other end of the capacitor C5 is respectively connected with one end of a capacitor C5 and the cathode of the diode D6, the other end of the capacitor C5 is connected with the drain end of the enhancement-mode FET Q5, the anode of the diode D6 is grounded, one end of a resistor R13 is connected with the source end of the depletion-mode FET Q4, the other end of the resistor R18 is connected with the other end of the resistor R18, the gate of the enhancement-mode FET Q5 is connected with the substrate end of the depletion-mode FET Q4, one end of the resistor R10 is connected with the gate of the depletion-mode FET Q4, and the other end is connected to the output port Vb.
The signal output control circuit can identify the signal processed by the previous stage, then control the output, amplify the signal through the amplifier, output the analysis result signal of the elevator system state, output the signal for controlling the elevator to sleep or wake up, the signal flows through the operational amplifier U1 and the amplifier U3 to respectively carry out the in-phase input comparison and the reverse phase input comparison, the resistor R20 pulls the signal up to high level to ensure the signal input capability, the capacitor C12 couples the alternating current signal, the capacitor C11 and the capacitor C13 carry out the filtering processing, the amplifier U2 amplifies the compared signal to ensure the circuit output capability and reduce the circuit loss, the amplified signal is stably output through the resistor R25 and fed back to the previous stage input processing operational amplifier for signal adjustment, the output power of the signal is improved through 4 power field effect transistors Q9, Q10, Q14 and Q15, the signal is input to the base electrode of the triode Q13, and is input to the triode Q11, the triode Q12, the triode Q16 and the triode Q17 through the collector and the emitter for current compensation amplification, so that the fluctuation of power output is effectively reduced, an analysis result signal of the state of the elevator system is finally obtained, and a state result of controlling the elevator to be dormant or awakened can be reliably and safely output.
Specifically, the signal output control circuit comprises an input port Vb, an output port Vout, a bidirectional clamping diode D7, a diode D8, 3 amplifiers U1, U2 and U3, 4 power field effect transistors respectively being Q9, Q10, Q14 and Q14, 5 triodes respectively being Q14, Q14 and Q14, 7 capacitors respectively being C14, C14 and C14, 14 resistors respectively being R14, VCC, R14 and R14, a high-level resistor R14 connected with the input port Vb, one end of the resistor R14, one end of the capacitor C14, one end of the VCC, one end of the resistor R14 and the other end of the resistor R14 connected with the resistor R14, and a high-level resistor R14 connected with the other end of the resistor R14, and a resistor R14 connected with the other end of the resistor 14, and a high-level connected with the resistor R365, the resistor R14 connected with the other end of the resistor R14, the resistor of the resistor 14, the resistor R14, the resistor 14 connected with the resistor of the resistor 14, the resistor of the resistor 14, the resistor of the resistor, the resistor, the other end of a capacitor C12 is connected with one end of a resistor R26, the other end of a resistor R26 is respectively connected with one end of a capacitor C13 and a No. 2 interface of an amplifier U3, the other end of a capacitor C13 is respectively connected with one end of a capacitor C11, a No. 5 interface of an amplifier U1 and a No. 3 interface of an amplifier U3, the other end of a capacitor C11 is connected with a No. 1 interface of an amplifier U1, a No. 3 interface of an amplifier U1 is connected with a high-level VCC, a No. 2 interface of an amplifier U1 is connected with a No. 4 interface of an amplifier U1, a No. 5 interface of an amplifier U3 is grounded, a No. 1 interface of an amplifier U3 is connected with a No. 4 interface of an amplifier U829, one end of a resistor R21 is connected with a No. 4 interface of an amplifier U1, the other end of a capacitor C9, one end of a resistor R22 and a No. 2 interface of an amplifier U2 are respectively, the other end of a capacitor C6867 is connected with a high-level VCC, and the other end of a resistor R22 is connected with a No. 4 interface of an amplifier U2, one end of a resistor R30 is connected with the interface No. 4 of the amplifier U3, the other end of the resistor R31 is connected with the interface No. 1 of the amplifier U2, one end of a resistor R31 and one end of a capacitor C15 respectively, the other end of the resistor R31 is connected with the interface No. 5 of the amplifier U2, the other end of the capacitor C15 is connected with the interface No. 5 of the amplifier U2, the interface No. 5 of the amplifier U2 is grounded, the interface No. 3 of the amplifier U2 is connected with a high-level VCC, one end of a resistor R25 is connected with the interface No. 4 of the amplifier U2, the other end of the resistor R25 is connected with one end of a capacitor C10 and one end of a capacitor C14 respectively, the other end of a capacitor C14 is grounded, the other end of the capacitor C10 is connected with the base of a triode Q13, the emitter of a triode Q11, the collector of the triode Q16, the gate of a power field effect transistor Q9 and the gate of a power effect transistor Q10 respectively, the drain of the power effect transistor Q9 is connected with a high-level VCC 10, an emitter of a triode Q11 is connected with a high-level VCC, a drain terminal of a power field effect transistor Q9 is connected with a source terminal of a power field effect transistor Q14, a source terminal of the power field effect transistor Q10 is respectively connected with a gate of a power field effect transistor Q14, a gate of a power field effect transistor Q15 and a drain terminal of a power field effect transistor Q15, one end of a bidirectional clamping diode D7 is connected with the gate of the power field effect transistor Q14, the other end of the bidirectional clamping diode D7 is grounded, one end of a resistor R32 is connected with the drain terminal of the power field effect transistor Q14, the other end of the bidirectional clamping diode R32 is grounded, an anode of a diode D8 is connected with the source terminal of the power field effect transistor Q15, a cathode of a diode D8 is grounded, one end of a resistor R27 is grounded, the other end of the resistors R8 and an emitter of the triode Q16, emitters of the triode Q16 are respectively connected with an emitter of a triode Q13, a base of a triode Q17 and one end of a resistor R28, the other end of the resistor R28 is grounded, the collector of the triode Q13 is connected with the base of the triode Q11 and the base of the triode Q12 respectively, the collector of the triode Q17 is connected with the collector of the triode Q12, one end of the resistor R29 is connected with the emitter of the triode Q17, the other end of the resistor R29 is grounded, the emitter of the triode Q11 is connected with the high-level VCC, the emitter of the triode Q12 is connected with the high-level VCC, and the output port Vout is connected with the collector of the triode Q17.
Therefore, the elevator running state monitoring device achieves the purposes of accurately monitoring and analyzing the elevator running state and finally outputting and controlling the elevator running signal result by monitoring the elevator running state input signal and various sensor signals and processing the signals through the sampling circuit, the processing circuit and the output control circuit, so that an elevator system can run more intelligently, efficiently, energy-saving and stably.
While one embodiment of the present invention has been described in detail, the description is only a preferred embodiment of the present invention and should not be taken as limiting the scope of the invention. All equivalent changes and modifications made within the scope of the present invention shall fall within the scope of the present invention.
Claims (4)
1. The utility model provides an elevator system's dormancy awakening device, includes signal sampling circuit, signal processing circuit, the signal output control circuit who connects gradually, its characterized in that: the signal sampling circuit comprises an input port IN-, an input port IN +, 4 triodes Q1, Q2, Q6 and Q8 respectively, 3 capacitors C3, C4 and C6 respectively, 7 resistors R1, R2, R6 and R6 respectively, wherein the input port IN + is connected with one end of the resistor R6 and the anode of the capacitor C6 respectively, the other end of the resistor R6 is connected with a high level VCC, the cathode of the capacitor C6 is connected with the base of the triode Q6 and the base of the triode Q6 respectively, the input port IN-is connected with one end of the resistor R6, one end of the resistor R6 and the emitter of the triode Q6 respectively, the other end of the resistor R6 is grounded, the other end of the resistor R6 is connected with the base of the triode Q6, one end of the resistor R6 is connected with the base of the triode Q6, the collector of the capacitor C6 is connected with the base of the triode Q6, the other end is grounded, the collector of the triode Q1 is grounded, the collector of the triode Q6 is connected with a high level VCC, one end of the resistor R1 is connected with the high level VCC, the other end is connected with the emitter of the triode Q1, one end of the resistor R7 is connected with the emitter of the triode Q1, the other end is connected with the base of the triode Q2, one end of the capacitor C3 is connected with the high level VCC, the other end is connected with the base of the triode Q2, one end of the resistor R2 is connected with the high level VCC, the other end is connected with the collector of the triode Q2, and the emitter of the triode Q2 is connected with the emitter of the triode Q8.
2. The sleep wake-up device of an elevator system according to claim 1, characterized in that: the signal sampling circuit comprises an output port Va, 4 diodes D1, D2, D3 and D5, 2 triodes Q2 and Q8, an inductor L1, 2 capacitors C2, c8, 2 resistors R5 and R16, wherein the anode of the diode D1 is connected to the high level VCC, the cathode of the diode is connected to the emitter of the transistor Q2, one end of the inductor L1 and one end of the capacitor C2, the other end of the inductor L1 is connected to the anode of the diode D2, the other end of the capacitor C2 is connected to the high level VCC, one end of the resistor R5 is connected to the high level VCC, the other end of the resistor R16 is connected to the cathode of the diode D2, one end of the resistor R16 is connected to the anode of the diode D3, the other end of the resistor R16 is grounded, the cathode of the diode D3 is connected to the anode of the diode D2, one end of the capacitor C8 is connected to the cathode of the diode D5, the other end of the capacitor is grounded, the anode of the diode D5 is connected to the collector of the transistor Q8, and the output port Va is connected to the anode of the diode D2.
3. The sleep wake-up device of an elevator system according to claim 1, characterized in that: the signal processing circuit comprises 7 resistors R8, R3, R4, R9, R18, R13 and R10, an output port Vb, 3 capacitors C1, C5 and C7, enhancement type field effect transistors Q5 and Q7 and a depletion type field effect transistor Q4, one end of the resistor R8 is connected with the drain electrode of the field effect transistor Q7, the other end of the resistor R8 is respectively connected with one end of the resistor R3 and one end of the capacitor C1, the other end of the resistor R3 is connected with a high level VCC, the other end of the capacitor C1 is respectively connected with one end of the resistor R4 and one end of the resistor R9, the other end of the resistor R4 is connected with the high level VCC, the other end of the resistor R9 is connected with the source end of the enhancement type field effect transistor Q5, the cathode of the diode D4 is connected with the source end of the enhancement type field effect transistor Q7, one end of the capacitor C7 is connected with the anode of the diode D4, the other end of the capacitor C5 and the cathode of the diode D6, the other end of the capacitor C5 is connected with the drain terminal of the enhancement mode field effect transistor Q5, the anode of the diode D6 is grounded, one end of the resistor R13 is connected with the source terminal of the depletion mode field effect transistor Q4, the other end of the resistor R3538 is connected with one end of the resistor R18, the other end of the resistor R18 is grounded, the drain terminal of the depletion mode field effect transistor Q4 is connected with the high-level VCC, one end R of the resistor R10 is connected with the gate of the depletion mode field effect transistor Q4, and the other end of the resistor R10 is connected with the output port Vb.
4. The sleep wake-up device of an elevator system according to claim 1, characterized in that: the signal output control circuit comprises an input port Vb, an output port Vout, 3 amplifiers U1, U2 and U3, 4 power field effect transistors Q9, Q10, Q14 and Q15 respectively, 5 triodes Q11, Q12, Q13, Q16 and Q17 respectively, 5 capacitors C11, C12, C13 and C15 respectively, and 9 resistors R19, R20, R21, R22, R23, R24, R26, R30 and R30 respectively, wherein the input port Vb in the signal output control circuit is connected with one end of the resistor R30, one end of the capacitor C30 and one end of the resistor R30 respectively, the other end of the resistor R30 is connected with a high-level VCC of the amplifier U7371, the other end of the resistor R30 is connected with a resistor R30, and an interface of the resistor R30 of the other end of the resistor R30 and an interface of the No. 30 of the resistor R30, the other end of the resistor R26 is connected with one end of a capacitor C13 and a No. 2 interface of an amplifier U3, the other end of the capacitor C13 is connected with one end of a capacitor C11, a No. 5 interface of an amplifier U1 and a No. 3 interface of an amplifier U3, the other end of the capacitor C11 is connected with a No. 1 interface of the amplifier U1, a No. 3 interface of an amplifier U1 is connected with a high-level VCC, a No. 2 interface of the amplifier U1 is connected with a No. 4 interface of an amplifier U1, a No. 5 interface of the amplifier U3 is grounded, a No. 1 interface of the amplifier U3 is connected with a No. 4 interface of the amplifier U3, one end of the resistor R21 is connected with a No. 4 interface of the amplifier U1, the other end of the resistor R22 and a No. 2 interface of the amplifier U2, the other end of the resistor R22 is connected with a No. 4 interface of the amplifier U2, one end of the resistor R30 is connected with a No. 4 interface of the amplifier U3, and the other end of the amplifier U2 is connected with a No. 1 interface of the amplifier U2, One end of a resistor R31 and one end of a capacitor C15 are connected, the other end of a resistor R31 is connected with an interface 5 of an amplifier U2, the other end of a capacitor C15 is connected with an interface 5 of an amplifier U2, an interface 5 of an amplifier U2 is grounded, an interface 3 of an amplifier U2 is connected with a high-level VCC, a source end of a power field effect transistor Q9 is connected with the high-level VCC, a drain end of a power field effect transistor Q10 is connected with the high-level VCC, an emitter of a triode Q11 is connected with the high-level VCC, a drain end of a power field effect transistor Q9 is connected with a source end of the power field effect transistor Q14, a source end of a power field effect transistor Q10 is connected with a gate of the power field effect transistor Q14, a gate of the power field effect transistor Q15 and a drain end of the power field effect transistor Q15, a base of a triode Q16 is connected with an emitter of a triode Q13 and a base of a triode Q17, and a collector of a triode Q13 is connected with a collector of a triode Q11, The base of the triode Q12 is connected, the collector of the triode Q17 is connected with the collector of the triode Q12, the emitter of the triode Q12 is connected with the high-level VCC, and the output port Vout is connected with the collector of the triode Q17.
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