CN203632636U - Anti-interference photoelectric switch circuit - Google Patents
Anti-interference photoelectric switch circuit Download PDFInfo
- Publication number
- CN203632636U CN203632636U CN201320693783.7U CN201320693783U CN203632636U CN 203632636 U CN203632636 U CN 203632636U CN 201320693783 U CN201320693783 U CN 201320693783U CN 203632636 U CN203632636 U CN 203632636U
- Authority
- CN
- China
- Prior art keywords
- circuit
- triode
- resistance
- output
- connects
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
Links
Images
Landscapes
- Amplifiers (AREA)
Abstract
The utility model discloses an anti-interference photoelectric switch circuit which comprises a square wave generating circuit, an infrared emitting circuit, an infrared receiving and processing circuit, a logic judging circuit, a state output circuit, and a power supply circuit which supplies electricity for each circuit. The infrared receiving and processing circuit comprises a photoelectric conversion circuit used for converting a received optical signal into an electric signal, an amplifying circuit used for carrying out amplifying processing on the electric signal, a blocking capacitor used for carrying out blocking processing on the signal outputted by the amplifying circuit, a first comparison circuit used for comparing the signal which is subjected to blocking processing with first reference voltage and outputting a first square wave, and a modulation circuit used for processing the first square wave and outputting second square wave, wherein each period in the second square wave has a preset low level time. According to the anti-interference photoelectric switch circuit, an analog circuit is applied to eliminate the interference of outside stray light, and the anti-interference photoelectric switch circuit has the functions of false reflection prevention, overload protection and sink current protection.
Description
Technical field
The utility model relates to optoelectronic switch field, is specifically related to a kind of jamproof photoswitch circuit.
Background technology
Optoelectronic switch (photoelectric sensor) is the abbreviation of photoelectricity approach switch, and it is to utilize detected material to the blocking or reflect of light beam, and by synchronization loop gating circuit, thereby detects having or not of object.Object is not limited to metal, and the object of all energy reflection rays all can be detected.
Optoelectronic switch is converted to input current light signal and penetrates on reflector, and receiver is again according to the strong and weak of the light that receives or have or not target object is surveyed.The normal optoelectronic switch smoke alarm that uses in safety-protection system, in industry often with the count times of exercise of mechanical arm of optoelectronic switch.
In prior art, the normal infrared ray that adopts chip to receive receiver is processed and is exported, for example, Granted publication number is that the utility model of CN201952076U discloses a kind of photoswitch circuit, be included as the power supply regulator circuit of whole circuit supply, launch ultrared square wave concussion infrared transmitting circuit, the infrared signal of transmitting is delivered to ultrared receiving circuit, infrared radiation receiving circuit produces high low logic level according to infrared signal and is input to logic control circuit, logical circuit carries out the signal receiving logical operation processing and processing signals is outputed to output circuit.
In order to extend the useful life of optoelectronic switch, eliminate the interference of veiling glare, application publication number be CN102983849A disclosure of the invention a kind of correlation Photoelectric infrared switch, the occasion detecting for rim detection and the end-of-travel position of long-term work, as flat bed detection and localization of elevator motion etc., adopt multiple voltage stabilizing and protective circuit, drive infrared transmission module by square-wave generator output signal, coupling obtains signal to controlling output circuit through dynamic communication to receive signal, has very strong antijamming capability; In the time there is no shelter, adopt normal square-wave signal to drive infrared transmission module, exceed after certain hour when infrared light is blocked, enter park mode by Single-chip Controlling, infrared transmitting tube enters circular gap operating state (as stopping 100ms, transmitting 4ms); When light does not block, return to normal; In the time that plate washer shuts out the light for a long time, can greatly improve the transmitting tube life-span.
Utilize the infrared light that chip receives receiver to process, the composition of circuit is relatively simple, poor but the stability using based on chip is compared the circuit of pure hardware, therefore, in the occasion higher to reliability requirement, adopt the stability of chip not meet the demands.
Utility model content
The utility model provides a kind of jamproof photoswitch circuit, and the interference of the extraneous veiling glare of application simulation circuit for eliminating has anti-error reflection, overload protection and fills with the functions such as current protection.
A kind of jamproof photoswitch circuit, comprise the square wave circuit for generating, infrared transmitting circuit, infrared receiving processing circuit, logic judging circuit and the State-output circuit that connect successively, and be the power circuit of each circuit supply, described infrared receiving processing circuit comprises:
Photoelectric switching circuit, for being converted to the signal of telecommunication by the light signal receiving;
Amplifying circuit, for amplifying processing to the described signal of telecommunication;
Capacitance, for carrying out every straight processing the signal of amplifying circuit output;
The first comparison circuit, for will be every straight signal after treatment compared with the first reference voltage and export the first square wave;
Modulation circuit, for the second square wave is processed and exported to described the first square wave, in this second square wave, each cycle has default low level time;
Described logic judging circuit comprises:
Inverter, the output of inverter is connected with State-output circuit as the output of logic judging circuit;
PNP triode, emitter connects power circuit, and collector electrode connects the input of inverter, and base stage connects the output of modulation circuit;
On draw electric capacity, be connected between the base stage and power circuit of PNP triode, for regulate the base voltage of controlling PNP triode according to second party wave frequency.
The effect of power circuit is that the 12V-24V voltage of input is converted into stable 5V voltage for the normal steady operation of remainder circuit.
As preferably, described modulation circuit comprises:
Charge-discharge circuit, for carrying out waveform modulated to the first square wave;
The second comparison circuit, for by the signal of charge-discharge circuit output compared with the second reference voltage and export described the second square wave.
As preferably, described infrared transmitting circuit comprises:
Infrared transmitting tube;
Switching tube, for conducting infrared transmitting tube and power circuit, this switching tube is controlled by the output signal of described square wave circuit for generating;
Diverting switch, in parallel with described infrared transmitting tube, and this diverting switch is controlled by the output signal of described logic judging circuit.
Described infrared receiving processing circuit is realized by pure hardware, and reliability is higher, has the effect that stronger anti-exterior light is disturbed, and the concrete annexation of infrared receiving processing circuit is preferably as follows:
Described photoelectric switching circuit comprises infrared receiving tube D1, and the negative pole of infrared receiving tube D1 connects power circuit through resistance R 4, and the positive pole of infrared transmitting tube D1 is successively through resistance R 2 and resistance R 5 ground connection.
Described amplifying circuit adopts differential amplifier U2, the positive input of differential amplifier U2 is connected between resistance R 2 and infrared receiving tube D1 by resistance R 8, the negative input of differential amplifier U2 is connected between resistance R 2 and resistance R 5 by resistance R 9, the output of differential amplifier U2 is connected with one end of capacitance, and the other end of capacitance accesses the first comparison circuit.
The first comparison circuit comprises comparator U4A, the positive input of capacitance access comparator U4A, and the negative input of comparator U4A accesses the first reference voltage, the output access charge-discharge circuit of comparator U4A.
Charge-discharge circuit comprises capacitor C 10, the output of one end access comparator U4A of capacitor C 10, another termination second comparison circuit of capacitor C 10, one end that capacitor C 10 is connected with the second comparison circuit is as the output of charge-discharge circuit, the output of this charge-discharge circuit also accesses power circuit by resistance R 24 and the resistance R 25 of serial connection, between the output of charge-discharge circuit and power circuit, be also provided with diode Q6, the positive pole of diode Q6 connects the output of charge-discharge circuit, and the negative pole of diode Q6 connects power circuit.
The second comparison circuit comprises comparator U4B, the positive input of the output termination comparator U4B of charge-discharge circuit, the negative input of comparator U4B accesses the second reference voltage, and the output of comparator U4B accesses the base stage of the PNP triode in described logic judging circuit.
Described logic judging circuit comprise PNP triode Q12, on draw capacitor C 20 and inverter U1E;
The emitter of PNP triode Q12 connects power circuit by resistance R 40, and collector electrode is by resistance R 38 ground connection, and resistance R 38 is parallel with capacitor C 18, and base stage is connected with the output of comparator U4B with resistance R 35 by the resistance R 47 of serial connection successively;
On draw one end of capacitor C 20 to connect power circuit by resistance R 40, above draw the other end of capacitor C 20 to be connected between resistance R 47 and resistance R 35;
The input of inverter U1E connects the collector electrode of PNP triode Q12, and the output of inverter U1E is connected with State-output circuit.
Described State-output circuit comprises low level output circuit and high level output circuit, the input of low level output circuit and high level output circuit all connects the output of inverter U1E, and low level output circuit and high level output circuit have common output;
Low level output circuit comprises triode Q7, triode Q8, triode Q9, triode Q11 and bidirectional diode Q5;
The emitter of triode Q7 connects power circuit, and the base stage of triode Q7 connects the output of inverter U1E, the collector electrode of the collector connecting transistor Q8 of triode Q7;
The emitter of triode Q8 is by resistance R 29 ground connection, and the base stage of triode Q8 connects the output of square wave circuit for generating by resistance R 26;
The collector electrode of triode Q7 also connects the base stage of triode Q11 by resistance R 32 and the capacitor C 15 of serial connection successively, the grounded emitter of triode Q11, and the base stage of triode Q11 is also by resistance R 33 ground connection;
The collector electrode of triode Q7 also connects the collector electrode of triode Q11 successively by resistance R 21, resistance R 20, resistance R 22, the bidirectional diode Q5 of serial connection, the collector electrode of triode Q11 is as the output of low level output circuit;
Between the base stage access resistance R 20 and resistance R 22 of triode Q9, between the emitter access resistance R 21 and resistance R 20 of triode Q9, the base stage of the collector connecting transistor Q11 of triode Q9;
Between the base stage of the emitter of triode Q8 and triode Q11, be connected to capacitor C 13;
High level output circuit comprises triode Q14, triode Q13, triode Q17, triode Q18 and bidirectional diode Q5;
The grounded emitter of triode Q14, the base stage of triode Q14 connects the output of inverter U1E, the emitter of the collector connecting transistor Q13 of triode Q14;
The collector electrode of triode Q13 connects power circuit by resistance R 44, and the base stage of triode Q13 connects the output of square wave circuit for generating by capacitor C 17;
The collector electrode of triode Q14 also connects the base stage of triode Q18 by resistance R 49 and the capacitor C 23 of serial connection successively, and the emitter of triode Q18 connects power circuit, and the base stage of triode Q18 is also by resistance R 50 ground connection;
The collector electrode of triode Q14 also connects the collector electrode of triode Q18 successively by resistance R 43, resistance R 41, resistance R 42, the bidirectional diode Q5 of serial connection, the collector electrode of triode Q18 is as the output of low level output circuit;
Between the base stage access resistance R 41 and resistance R 42 of triode Q17, between the emitter access resistance R 43 and resistance R 41 of triode Q17, the base stage of the collector connecting transistor Q18 of triode Q17;
Between the base stage of the collector electrode of triode Q13 and triode Q18, be connected to capacitor C 21.
The jamproof photoswitch circuit of the utility model, reliability is high, can get rid of the interference of veiling glare, avoids the generation of mistake reflection, has overload protection simultaneously and fills with the function of current protection.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the jamproof photoswitch circuit of the utility model;
Fig. 2 is the circuit diagram of the jamproof photoswitch circuit of the utility model;
Fig. 3 is the oscillogram of each point in the infrared receiving processing circuit of the utility model.
Embodiment
Below in conjunction with accompanying drawing, the jamproof photoswitch circuit of the utility model is described in detail.
As shown in Figure 1, a kind of jamproof photoswitch circuit, comprises the square wave circuit for generating, infrared transmitting circuit, infrared receiving processing circuit, logic judging circuit and the State-output circuit that connect successively, and is the power circuit of each circuit supply.
As shown in A frame in Fig. 2; the voltage of the input (Brown) of power circuit is by moment twin zener dioder D3 protection; capacitor C 11, capacitor C 12 play filter action; after current-limiting resistance R30, current-limiting resistance R31, input voltage stabilizing chip Q10(78L05 for anti-reverse diode D4); the exportable 12V-24V direct current (Vin) without transformation in diode D4 negative pole place, voltage stabilizing chip Q10 output 5V direct current (VCC).
Current-limiting resistance R30 and current-limiting resistance R31 can guarantee that the total current of inputting voltage stabilizing chip Q10 is no more than the receptible maximum current of voltage stabilizing chip Q10 on the one hand, also can produce on the other hand the input terminal voltage that certain pressure drop makes voltage stabilizing chip Q10 and be difficult for exceeding its limiting value (30V).
The input of voltage stabilizing chip Q10 and the two ends of output are respectively by capacitor C 14 and capacitor C 16 ground connection, and the output of voltage stabilizing chip Q10 is also by electrochemical capacitor E2 ground connection, to stablize output.
Square wave circuit for generating is by capacitor C 3, capacitor C 4, resistance R 6, resistance R 7, resistance R 10, and diode Q1, not gate U1A, not gate U1B, not gate U1C, not gate U1D form oscillating circuit, and generation frequency is 4kHz, the square-wave signal that duty ratio is 1.8%.
As shown in B frame in Fig. 2, infrared transmitting circuit comprises infrared transmitting tube D2, switching tube (comprising triode Q2 and triode Q4) and diverting switch triode Q3;
The base stage of triode Q2 and triode Q4 interconnects, and the base stage of triode Q2 and triode Q4 is all connected with the output of square wave circuit for generating, and the collector electrode of triode Q2 and triode Q4 connects power circuit;
The emitter of triode Q2 connects the positive pole of infrared transmitting tube D2, the minus earth of infrared transmitting tube D2 through resistance R 11;
The emitter of triode Q4 connects the collector electrode of triode Q3 through resistance R 14, the emitter of triode Q3 is through resistance R 15 ground connection, and the base stage of triode Q3 connects the output of logic judging circuit through resistance R 16.
For the collector electrode that makes triode Q2 and triode Q4 receives stable operating voltage, power circuit (Vin) is by resistance R in parallel 1, resistance R 3 accesses the collector electrode of triode Q2 and triode Q4, and collector electrode place of triode Q2 and triode Q4 is also by electrochemical capacitor E1 ground connection in addition.
Triode Q2, triode Q3 and triode Q4 are NPN type triode.
The square-wave signal of square wave circuit for generating output drives triode Q2, it is 4kHz that triode Q4 makes infrared transmitting tube D2 tranmitting frequency, the burst pulse infrared light that luminous intensity is stronger, simultaneously by infrared reception signal feedback to triode Q3, in the time that infrared light path is blocked, the output signal of logic judging circuit is that high level makes triode Q3 conducting, due to the shunting action of resistance R 14 and resistance R 15, the electric current of infrared transmitting tube D2 reduces, infrared light remitted its fury, can prevent so on the one hand because emissive porwer causes excessively by force mistake reflection, infrared light path still unimpeded and produce misoperation, also can extend on the other hand the useful life of infrared transmitting tube D2.
As shown in C frame in Fig. 2, infrared receiving processing circuit comprises photoelectric switching circuit, amplifying circuit, capacitance C6, the first comparison circuit and modulation circuit (comprising charge-discharge circuit and the second comparison circuit), and concrete annexation is as described below.
Photoelectric switching circuit comprises infrared receiving tube D1, and the negative pole of infrared receiving tube D1 connects power circuit (VCC) through resistance R 4, and the positive pole of infrared transmitting tube D1 is successively through resistance R 2 and resistance R 5 ground connection; Between resistance R 4 and infrared receiving tube D1, by capacitor C 1 ground connection, play the effect of voltage stabilizing and filtering.
Amplifying circuit adopts differential amplifier U2, the positive input of differential amplifier U2 is connected between resistance R 2 and infrared receiving tube D1 by resistance R 8, the negative input of differential amplifier U2 is connected between resistance R 2 and resistance R 5 by resistance R 9, between the positive input of differential amplifier U2 and negative input, be connected with capacitor C 2, between the output of differential amplifier U2 and positive input, be connected to resistance R 13, the supply pin of differential amplifier U2 is by capacitor C 5 ground connection, the positive input of differential amplifier U2 is by resistance R 12 ground connection, the waveform of the output of differential amplifier U2 is as shown in curve a in Fig. 3.
Capacitance C6 is connected with the output of differential amplifier U2, and the other end of capacitance C6 accesses the first comparison circuit, and this one end of access the first comparison circuit is also by resistance R 17 ground connection, and the waveform after capacitance C6 is as shown in curve c in Fig. 3.
The first comparison circuit comprises comparator U4A, the positive input of capacitance C6 access comparator U4A, the negative input of comparator U4A accesses the waveform of the first reference voltage (magnitude of voltage is 1V) the first reference voltage as shown in Fig. 3 cathetus b), between the positive input of comparator U4A and negative input, be connected with capacitor C 7, the output access charge-discharge circuit of comparator U4A, the waveform of the output of comparator U4A is as shown in curve d in Fig. 3.
In order to export the first reference voltage, between power circuit and ground, be serially connected with resistance R 18 and resistance R 19, the negative input of comparator U4A is connected between resistance R 18 and resistance R 19, the supply pin of comparator U4A is by capacitor C 8 ground connection, the output of comparator U4A accesses power circuit by resistance R 23, and the output of comparator U4A is also by capacitor C 9 ground connection.
Charge-discharge circuit comprises capacitor C 10, the output of one end access comparator U4A of capacitor C 10, another termination second comparison circuit of capacitor C 10, one end that capacitor C 10 is connected with the second comparison circuit is as the output of charge-discharge circuit, the output of this charge-discharge circuit also accesses power circuit by resistance R 24 and the resistance R 25 of serial connection, between the output of charge-discharge circuit and power circuit, be also provided with diode Q6, the positive pole of diode Q6 connects the output of charge-discharge circuit, and the negative pole of diode Q6 connects power circuit.
The second comparison circuit comprises comparator U4B, the positive input (waveform of the output of charge-discharge circuit is as shown in curve f in Fig. 3) of the output termination comparator U4B of charge-discharge circuit, the negative input of comparator U4B accesses the waveform of the second reference voltage (magnitude of voltage is 3V) the second reference voltage as shown in Fig. 3 cathetus e), in the output access logic judging circuit of comparator U4B (waveform of the output of comparator U4B is as shown in curve g in Fig. 3).
In order to export the second reference voltage, between power circuit and ground, be serially connected with resistance R 27 and resistance R 28, the negative input of comparator U4A is connected between resistance R 27 and resistance R 28, and the output of comparator U4B accesses power circuit by resistance R 34.
Infrared receiving tube D1 receives after the light signal that infrared transmitting tube D2 sends, resistance R 2(sampling resistor) two ends produce a voltage signal for millivolt level, this signal amplifies through differential amplifier U2, remove the flip-flop in signal by capacitance C6 again, avoid the interference (infrared receiving tube D2 receive lasting light irradiate generation direct current signal) of lasting light to circuit in daily life.
In order to improve the precision of signal, reduce the interference of noise as far as possible, the signal of capacitance C6 output is input to 3 pin of comparator U4A, and after comparing with the reference signal (the first reference voltage) of 2 pin of comparator U4A, 1 pin at comparator U4A is exported the first square wave, after the charge-discharge circuit that the first square wave consists of capacitor C 10 and resistance R 24, resistance R 25, diode Q6, waveform changes, as shown in Figure 3, waveform before charging and discharging is as shown in curve d, and the waveform after charging and discharging is as shown in curve f.
As shown in Figure 3, in charge-discharge circuit, in the time of the first square wave output low level, capacitor C 10 is charged, charge-discharge circuit output voltage raises gradually, in the time of the first square wave output high level, the voltage of capacitor C 10 rises to the voltage higher than power circuit (VCC), now discharge by diode Q6, charge-discharge circuit output voltage reduces gradually, in the time that the next low level of the first square wave arrives, charge-discharge circuit output voltage drops to again minimum, the output waveform of charge-discharge circuit changes thus, be input to again 5 pin of comparator U4B, and compare the second fixing square wave of output low level time with the reference signal (the second reference voltage) of 6 pin, this second square wave is as the output of whole modulation circuit, to logic judging circuit processing.
Known by above process, 1nF by adjusting capacitor C 10(capacity), the second reference voltage and resistance R 24(resistance 100k Ω), resistance R 25(resistance 0 Ω) relation, after can determining capacitor C 10 electric discharges, recharge to the time of the second reference voltage, low level time in this time in i.e. each cycle of the second square wave, generally, can after determining, capacitor C 10, the second reference voltage obtain the charging interval of expection by the parameter of adjusting resistance R24, resistance R 25.
In the time that the first square wave frequency reduces, because the charge characteristic of adjusting capacitor C 10 does not change, fix so recharge after capacitor C 10 electric discharge to the time of the second reference voltage, low level time-preserving in each cycle of such the second square wave, and high level time can extend, logic judging circuit afterwards also utilizes this characteristic to make different responses to the second square wave of different frequency just.
As shown in D frame in Fig. 2, logic judging circuit comprise inverter U1E, PNP triode Q12 and on draw capacitor C 20, concrete annexation is as follows:
The emitter of PNP triode Q12 connects power circuit by resistance R 40, collector electrode is by resistance R 38 ground connection, and resistance R 38 is parallel with capacitor C 18, base stage is connected with the output of comparator U4B with resistance R 35 by the resistance R 47 of serial connection successively, and the emitter of PNP triode Q12 is also by capacitor C 19 ground connection;
On draw one end of capacitor C 20 to connect power circuit by resistance R 40, on draw the other end of capacitor C 20 to be connected to (resistance R 47 is connected with the base stage of PNP triode Q12) resistance R 47 between resistance R 47 and resistance R 35 to be parallel with diode Q16, the positive pole of diode Q16 connects the base stage of PNP triode Q12, the negative pole of diode Q16 connects and draws capacitor C 20, above draws capacitor C 20 to be parallel with resistance R 45;
The input of inverter U1E connects the collector electrode of PNP triode Q12, and the output (as the output of logic judging circuit) of inverter U1E is connected with State-output circuit.
For indicating operating status, between the output of power circuit and inverter U1E, be serially connected with diode D5 and resistance R 48, the positive pole of diode D5 connects power circuit, the negative pole connecting resistance R48 of diode D5, the negative pole of diode D5 also accesses between resistance R 47 and resistance R 35 by resistance R 46, and resistance R 46 is parallel with capacitor C 22.
In the time that the infrared light path between infrared transmitting tube D2 and infrared receiving tube D1 is not blocked, the fixing square wave of comparator U4B output 4kHz low level time of the second comparison circuit, make PNP triode Q12 conducting, inverter U1E10 pin is as the output output low level of logic judging circuit.
In the time that the infrared light path between infrared transmitting tube D2 and infrared receiving tube D1 is blocked, because capacitor C in charge-discharge circuit 10 is all the time in charging saturation condition, make 5 pin of comparator U4B be always high level, it is comparator U4B output high level, the PNP triode Q12 of logic judging circuit is in cut-off state, inverter U1E11 pin is low level, and inverter U1E10 pin is as the output output high level of logic judging circuit.
In the time that the infrared light path between infrared transmitting tube D2 and infrared receiving tube D1 is blocked, can make infrared receiving tube make response once affected by veiling glare, send rub-out signal, the signal producing due to the corresponding infrared receiving tube of the most of light in life is low frequency, for fear of being subject to light disturbance, on draw capacitor C 20 capacitances large (capacity of C20 is 100nF), because the low level time of modulation circuit output signal is fixing, PNP triode Q12 base voltage can change with the second party wave frequency of modulation circuit output:
In the time that the infrared light path between infrared transmitting tube D2 and infrared receiving tube D1 is not blocked, the second square wave frequency be 4kHz and in each cycle low level time fix, the second square wave frequency is higher, mean in each cycle that the time of high level is shorter, the energy of the second square wave reduces as a whole, the time of drawing capacitor C 20 to be discharged in each cycle is constant, charging interval shortens, in conjunction with the buffering of above drawing capacitor C 20 to voltage and absorption, make PNP triode Q12 base voltage lower, PNP triode Q12 is held open;
Otherwise, when the second square wave frequency reduces, for example receive the veiling glare of 2kHz, in now each cycle of the second square wave, the time of high level increases, the time of drawing capacitor C 20 to be discharged in each cycle is constant, and the charging interval increases, and PNP triode Q12 base voltage is improved, PNP triode Q12 cut-off, can avoid logic judging circuit mistaking signal like this.
The present embodiment circuit design is when frequency not conducting of PNP triode Q12 during lower than 2kHz, and the signal producing due to the corresponding infrared receiving tubes of the most of light in life is low frequency, so such design has effectively avoided exterior light to disturb the situation that produces misoperation.
Diode D5 is infrared accepting state indicator light, and the bright expression infrared receiving tube of diode D5 receives infrared signal; Diode D5 goes out and represents that infrared receiving tube does not receive infrared signal.
As shown in E frame in Fig. 2, State-output circuit comprises low level output circuit and high level output circuit, the input of low level output circuit and high level output circuit all connects the output of inverter U1E, and low level output circuit and high level output circuit have common output;
Low level output circuit comprises triode Q7, triode Q8, triode Q9, triode Q11 and bidirectional diode Q5;
The emitter of triode Q7 connects power circuit, and the base stage of triode Q7 connects the output of inverter U1E, the collector electrode of the collector connecting transistor Q8 of triode Q7;
The emitter of triode Q8 is by resistance R 29 ground connection, and the base stage of triode Q8 connects the output of square wave circuit for generating by resistance R 26;
The collector electrode of triode Q7 also connects the base stage of triode Q11 by resistance R 32 and the capacitor C 15 of serial connection successively, the grounded emitter of triode Q11, and the base stage of triode Q11 is also by resistance R 33 ground connection;
The collector electrode of triode Q7 also connects the collector electrode of triode Q11 successively by resistance R 21, resistance R 20, resistance R 22, the bidirectional diode Q5 of serial connection, the collector electrode of triode Q11 is as the output of low level output circuit;
Between the base stage access resistance R 20 and resistance R 22 of triode Q9, between the emitter access resistance R 21 and resistance R 20 of triode Q9, the base stage of the collector connecting transistor Q11 of triode Q9;
Between the base stage of the emitter of triode Q8 and triode Q11, be connected to capacitor C 13.
The course of work of low level output circuit: when the output signal of logic judging circuit is low level, triode Q7 conducting, due to the coupling of capacitor C 15, make triode Q11 conducting, now State-output circuit is output as low level, electric current after triode Q7 conducting is by resistance R 21, resistance R 20, resistance R 22, diode Q5 and triode Q11 flow to GND, there is the pressure drop that is greater than 0.7V to make triode Q9 conducting in resistance R 20, thereby maintain the conducting state of triode Q11, the output of State-output circuit is low level always, the output signal control of triode Q8 recipient wave generation circuit, in on off state, capacitor C 15 is discharged, for moment triode Q11 conducting next time output low level is prepared.
In addition; this partial circuit also has the effect of the current protection of filling; pressure drop meeting between triode Q11 emitter and collector increases along with filling with the increase of electric current; in the time that filling current value reaches certain value; the conduction voltage drop that the pressure reduction that flows through resistance R 20 two ends can be less than triode Q9 turn-offs triode Q9; now triode Q11 just cannot stablize conducting and then output low level, has played the effect of filling with current protection.
In like manner; when the output signal of logic judging circuit is high level; high level output circuit is also the high level of stable output under the acting in conjunction of the output signal of the output signal of logic judging circuit and square wave circuit for generating, in the time that output current is greater than 200mA, can protect output low level.
High level output circuit theory and low level output circuit are basic identical, when work, the high level of logic judging circuit output improves triode Q14 base voltage after resistance R 36, make triode Q14 conducting, through resistance R 49, make triode Q18 conducting by the coupling of capacitor C 23, electric current is through bidirectional diode Q5, resistance R 42, resistance R 41, resistance R 43, triode Q14, resistance R 39 conductings, the pressure drop at resistance R 41 two ends makes triode Q17 conducting, has maintained the conducting of triode Q18.
The signal of square wave circuit for generating is coupled to the base stage of triode Q13 by capacitor C 17, the collector electrode of triode Q13 connects power circuit (Vin) by resistance R 44, contact resistance R37 between the base stage of triode Q13 and emitter, the emitter of triode Q13 connects the collector electrode of triode Q14, and triode Q13 makes capacitor C 23 electric discharge prepare for next cycle under the signal controlling of square wave circuit for generating.
In physical circuit, between the base stage of triode Q18 and emitter, be connected with resistance R 50, the base stage of triode Q18 is by the collector electrode of capacitor C 21 connecting triode Q13, voltage-stabiliser tube Q15 can play pressure stabilization function, series diode D6 and diode D7 between power circuit (Vin) and ground, the collector electrode of triode Q18 is connected between diode D6 and diode D7 the i.e. output as high level output circuit, between diode D6 and diode D7, also by diode D8 ground connection, plays a protective role; The junction of high level output circuit and power circuit is also by capacitor C 25 ground connection, and the output of high level output circuit is by capacitor C 24 ground connection.
Claims (10)
1. a jamproof photoswitch circuit, comprises the square wave circuit for generating, infrared transmitting circuit, infrared receiving processing circuit, logic judging circuit and the State-output circuit that connect successively, and is the power circuit of each circuit supply, it is characterized in that,
Described infrared receiving processing circuit comprises:
Photoelectric switching circuit, for being converted to the signal of telecommunication by the light signal receiving;
Amplifying circuit, for amplifying processing to the described signal of telecommunication;
Capacitance, for carrying out every straight processing the signal of amplifying circuit output;
The first comparison circuit, for will be every straight signal after treatment compared with the first reference voltage and export the first square wave;
Modulation circuit, for the second square wave is processed and exported to described the first square wave, in this second square wave, each cycle has default low level time;
Described logic judging circuit comprises:
Inverter, the output of inverter is connected with State-output circuit as the output of logic judging circuit;
PNP triode, emitter connects power circuit, and collector electrode connects the input of inverter, and base stage connects the output of modulation circuit;
On draw electric capacity, be connected between the base stage and power circuit of PNP triode, for regulate the base voltage of controlling PNP triode according to second party wave frequency.
2. jamproof photoswitch circuit as claimed in claim 1, is characterized in that,
Described modulation circuit comprises:
Charge-discharge circuit, for carrying out waveform modulated to the first square wave;
The second comparison circuit, for by the signal of charge-discharge circuit output compared with the second reference voltage and export described the second square wave.
3. jamproof photoswitch circuit as claimed in claim 1, is characterized in that, described infrared transmitting circuit comprises:
Infrared transmitting tube;
Switching tube, for conducting infrared transmitting tube and power circuit, this switching tube is controlled by the output signal of described square wave circuit for generating;
Diverting switch, in parallel with described infrared transmitting tube, and this diverting switch is controlled by the output signal of described logic judging circuit.
4. jamproof photoswitch circuit as claimed in claim 1, it is characterized in that, described photoelectric switching circuit comprises infrared receiving tube D1, and the negative pole of infrared receiving tube D1 connects power circuit through resistance R 4, and the positive pole of infrared transmitting tube D1 is successively through resistance R 2 and resistance R 5 ground connection.
5. jamproof photoswitch circuit as claimed in claim 4, it is characterized in that, described amplifying circuit adopts differential amplifier U2, the positive input of differential amplifier U2 is connected between resistance R 2 and infrared receiving tube D1 by resistance R 8, the negative input of differential amplifier U2 is connected between resistance R 2 and resistance R 5 by resistance R 9, the output of differential amplifier U2 is connected with one end of capacitance, and the other end of capacitance accesses the first comparison circuit.
6. jamproof photoswitch circuit as claimed in claim 5, it is characterized in that, the first comparison circuit comprises comparator U4A, the positive input of capacitance access comparator U4A, the negative input of comparator U4A accesses the first reference voltage, the output access charge-discharge circuit of comparator U4A.
7. jamproof photoswitch circuit as claimed in claim 6, it is characterized in that, charge-discharge circuit comprises capacitor C 10, the output of one end access comparator U4A of capacitor C 10, another termination second comparison circuit of capacitor C 10, one end that capacitor C 10 is connected with the second comparison circuit is as the output of charge-discharge circuit, the output of this charge-discharge circuit also accesses power circuit by resistance R 24 and the resistance R 25 of serial connection, between the output of charge-discharge circuit and power circuit, be also provided with diode Q6, the positive pole of diode Q6 connects the output of charge-discharge circuit, the negative pole of diode Q6 connects power circuit.
8. jamproof photoswitch circuit as claimed in claim 7, it is characterized in that, the second comparison circuit comprises comparator U4B, the positive input of the output termination comparator U4B of charge-discharge circuit, the negative input of comparator U4B accesses the second reference voltage, and the output of comparator U4B accesses the base stage of the PNP triode in described logic judging circuit.
9. jamproof photoswitch circuit as claimed in claim 8, is characterized in that, described logic judging circuit comprise PNP triode Q12, on draw capacitor C 20 and inverter U1E;
The emitter of PNP triode Q12 connects power circuit by resistance R 40, and collector electrode is by resistance R 38 ground connection, and resistance R 38 is parallel with capacitor C 18, and base stage is connected with the output of comparator U4B with resistance R 35 by the resistance R 47 of serial connection successively;
On draw one end of capacitor C 20 to connect power circuit by resistance R 40, above draw the other end of capacitor C 20 to be connected between resistance R 47 and resistance R 35;
The input of inverter U1E connects the collector electrode of PNP triode Q12, and the output of inverter U1E is connected with State-output circuit.
10. jamproof photoswitch circuit as claimed in claim 9, it is characterized in that, described State-output circuit comprises low level output circuit and high level output circuit, the input of low level output circuit and high level output circuit all connects the output of inverter U1E, and low level output circuit and high level output circuit have common output;
Low level output circuit comprises triode Q7, triode Q8, triode Q9, triode Q11 and bidirectional diode Q5;
The emitter of triode Q7 connects power circuit, and the base stage of triode Q7 connects the output of inverter U1E, the collector electrode of the collector connecting transistor Q8 of triode Q7;
The emitter of triode Q8 is by resistance R 29 ground connection, and the base stage of triode Q8 connects the output of square wave circuit for generating by resistance R 26;
The collector electrode of triode Q7 also connects the base stage of triode Q11 by resistance R 32 and the capacitor C 15 of serial connection successively, the grounded emitter of triode Q11, and the base stage of triode Q11 is also by resistance R 33 ground connection;
The collector electrode of triode Q7 also connects the collector electrode of triode Q11 successively by resistance R 21, resistance R 20, resistance R 22, the bidirectional diode Q5 of serial connection, the collector electrode of triode Q11 is as the output of low level output circuit;
Between the base stage access resistance R 20 and resistance R 22 of triode Q9, between the emitter access resistance R 21 and resistance R 20 of triode Q9, the base stage of the collector connecting transistor Q11 of triode Q9;
Between the base stage of the emitter of triode Q8 and triode Q11, be connected to capacitor C 13;
High level output circuit comprises triode Q14, triode Q13, triode Q17, triode Q18 and bidirectional diode Q5;
The grounded emitter of triode Q14, the base stage of triode Q14 connects the output of inverter U1E, the emitter of the collector connecting transistor Q13 of triode Q14;
The collector electrode of triode Q13 connects power circuit by resistance R 44, and the base stage of triode Q13 connects the output of square wave circuit for generating by capacitor C 17;
The collector electrode of triode Q14 also connects the base stage of triode Q18 by resistance R 49 and the capacitor C 23 of serial connection successively, and the emitter of triode Q18 connects power circuit, and the base stage of triode Q18 is also by resistance R 50 ground connection;
The collector electrode of triode Q14 also connects the collector electrode of triode Q18 successively by resistance R 43, resistance R 41, resistance R 42, the bidirectional diode Q5 of serial connection, the collector electrode of triode Q18 is as the output of low level output circuit;
Between the base stage access resistance R 41 and resistance R 42 of triode Q17, between the emitter access resistance R 43 and resistance R 41 of triode Q17, the base stage of the collector connecting transistor Q18 of triode Q17;
Between the base stage of the collector electrode of triode Q13 and triode Q18, be connected to capacitor C 21.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320693783.7U CN203632636U (en) | 2013-11-05 | 2013-11-05 | Anti-interference photoelectric switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320693783.7U CN203632636U (en) | 2013-11-05 | 2013-11-05 | Anti-interference photoelectric switch circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203632636U true CN203632636U (en) | 2014-06-04 |
Family
ID=50819071
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320693783.7U Withdrawn - After Issue CN203632636U (en) | 2013-11-05 | 2013-11-05 | Anti-interference photoelectric switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203632636U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103684385A (en) * | 2013-11-05 | 2014-03-26 | 杭州优迈科技有限公司 | Anti-interference photoelectric switch circuit |
| CN110779187A (en) * | 2019-11-04 | 2020-02-11 | 广东美的暖通设备有限公司 | Signal transmitting device, signal receiving device, communication device and air conditioner |
| CN113734926A (en) * | 2021-07-23 | 2021-12-03 | 西尼机电（杭州）有限公司 | Dormancy awakening device of elevator system |
| CN117977516A (en) * | 2024-01-18 | 2024-05-03 | 长春众鼎科技有限公司 | External infrared receiver interface protection circuit for automobile |
-
2013
- 2013-11-05 CN CN201320693783.7U patent/CN203632636U/en not_active Withdrawn - After Issue
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103684385A (en) * | 2013-11-05 | 2014-03-26 | 杭州优迈科技有限公司 | Anti-interference photoelectric switch circuit |
| CN103684385B (en) * | 2013-11-05 | 2016-06-22 | 杭州优迈科技有限公司 | A kind of jamproof photoswitch circuit |
| CN110779187A (en) * | 2019-11-04 | 2020-02-11 | 广东美的暖通设备有限公司 | Signal transmitting device, signal receiving device, communication device and air conditioner |
| CN113734926A (en) * | 2021-07-23 | 2021-12-03 | 西尼机电（杭州）有限公司 | Dormancy awakening device of elevator system |
| CN113734926B (en) * | 2021-07-23 | 2023-01-06 | 西尼机电（杭州）有限公司 | Dormancy awakening device of elevator system |
| CN117977516A (en) * | 2024-01-18 | 2024-05-03 | 长春众鼎科技有限公司 | External infrared receiver interface protection circuit for automobile |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103684385A (en) | Anti-interference photoelectric switch circuit | |
| CN203745649U (en) | SCM-controlled infrared detection circuit | |
| CN203632636U (en) | Anti-interference photoelectric switch circuit | |
| CN207069553U (en) | A kind of control circuit for realizing hardware watchdog and automatic time delay break-make Electricity Functional | |
| CN101713971B (en) | Control system for detecting safety areas by combining infra-red technology and ultrasonic technology | |
| CN104320200A (en) | Circuit, optical module and method for protecting APD receiver | |
| CN107294058A (en) | A kind of overvoltage undervoltage detection circuit applied to solar energy power accumulating power supply | |
| CN207677732U (en) | A kind of fiber optic communication early warning system | |
| CN104751919A (en) | Rod position display system for nuclear power control rod and anti-jamming display method for nuclear power control rod | |
| CN201294490Y (en) | Device for collecting and processing photoelectric coupling signal | |
| CN103368640B (en) | Expansion optical module digital diagnostic monitoring improved system | |
| CN105241796A (en) | Dust detection apparatus | |
| CN207198328U (en) | A kind of infrared distance sensing device | |
| CN106253903B (en) | Digital quantity acquiring circuit | |
| CN205120534U (en) | Dust detection device | |
| CN207396767U (en) | Infrared tube detection device and system | |
| CN107450105A (en) | Infrared tube detection means and system | |
| CN203313191U (en) | Burst receiving detection circuit of gigabit-capable PON (passive optical network) | |
| CN109669187A (en) | A kind of semiconductor pulse laser range finder with adaptation function | |
| CN202121563U (en) | Hard light remote switch system without demodulator circuit or amplifying circuit | |
| CN112857566A (en) | Anti-sunlight infrared photoelectric detection circuit | |
| CN202615379U (en) | Watchdog resetting circuit | |
| CN207869085U (en) | A kind of optical coupling isolation circuit | |
| CN104639257A (en) | Anti-interference circuit applied to light receiver | |
| CN208337525U (en) | A kind of square-wave pulse output resonance matching unit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20140604 Effective date of abandoning: 20160622 |
|
| C25 | Abandonment of patent right or utility model to avoid double patenting |