CN201403049Y - Voltage regulator with minimal static current - Google Patents

Voltage regulator with minimal static current Download PDF

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Publication number
CN201403049Y
CN201403049Y CN2009200359517U CN200920035951U CN201403049Y CN 201403049 Y CN201403049 Y CN 201403049Y CN 2009200359517 U CN2009200359517 U CN 2009200359517U CN 200920035951 U CN200920035951 U CN 200920035951U CN 201403049 Y CN201403049 Y CN 201403049Y
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China
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voltage
output
circuit
resistance
cut
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Expired - Lifetime
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CN2009200359517U
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Chinese (zh)
Inventor
张怀东
黄胜明
章伟
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UNIQUETECHNOLOG Inc
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UNIQUETECHNOLOG Inc
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Abstract

The utility model relates to a voltage regulator with minimal static current, which is characterized in that the output end of a square-wave pulse generator is connected with the input ends of a reference voltage generation circuit and a voltage detection circuit; the square-wave control signals V s w outputted by the square-wave pulse generator control the static current values of the reference voltage generation circuit and the voltage detection circuit; the input end of a current detection circuit is connected with the output end of an error amplifying circuit to detect the output current value; the output ends of the reference voltage generation circuit, the voltage detection circuit and the current detection circuit are connected with the input end of the error amplifying circuit to respectively provide control signals V r e f, V f b and V c to control the static current value in the error amplifying circuit; and the output end of the error amplifying circuit and the input end ofthe voltage detection circuit are connected with a power output device. The utility model can largely reduces the waiting power consumption of the voltage regulator (reducing the static current to about 1microampere) and can greatly reduce the static current of the voltage regulator.

Description

A kind of voltage regulator with minimum quiescent current
Technical field
The utility model relates to a kind of voltage regulator with minimum quiescent current, belongs to electronic information technical field.
Background technology
Linear (low pressure reduction) and regulator are widely used in mobile phone, the power-supply system of portable electronics such as camera.Since requirements of saving energy, the power consumption of reduction voltage regulator itself, and promptly reducing quiescent current is one of main trend of such production development.In the practical application, portable electronics such as mobile phone, camera may be in standby or sleep state under the long period.The power consumption of voltage regulator itself (non-loaded or underload power consumption) becomes the principal element that influences battery life in the case.Traditional low difference voltage regulator generally comprises the bias current generator, bandgap reference source generator, several main parts such as differential amplifier and power output device and feedback resistance.The reduction of the quiescent current of voltage regulator (mainly being the differential amplifier consumed current) own can cause other degradation usually.For example low difference voltage regulator output voltage load transient and supply voltage are drawn up has very big relation than the bias current with its differential amplifier.If bias current is little, its response speed can be slow, causes the output voltage load transient can be very big, and supply voltage is drawn up more very poor than meeting.Equally, in the regulator, sleep state is revived the bias current that monitors comparator can not be too little.In addition, bandgap reference source and feedback resistance all will consume certain power consumption.Therefore, the non-loaded quiescent current of low difference voltage regulator is generally more than 20 microamperes, and the quiescent current of regulator when sleep state is generally more than 10 microamperes.
Summary of the invention
The purpose of this utility model is to overcome the deficiencies in the prior art, provides a kind of energy to reduce (quiescent current is reduced to about 1 microampere) to the wait power consumption of voltage regulator significantly and does not influence the voltage regulator with minimum quiescent current of other performance.
The technical scheme that provides according to the utility model, a kind of voltage regulator with minimum quiescent current, feature is: comprise reference voltage generating circuit, square-wave pulse generator, error amplifying circuit, voltage detecting circuit, current detection circuit and power output device; The output of square-wave pulse generator connects the input of reference voltage generating circuit and voltage detecting circuit, the size of quiescent current in the square wave control signal Vsw control reference voltage generating circuit of square-wave pulse generator output and the voltage detecting circuit; The input of current detection circuit connects the output of error amplifying circuit to detect the size of output current, the output of reference voltage generating circuit, voltage detecting circuit and current detection circuit is connected the input of error amplifying circuit, and control signal Vref, Vfb and Vc are provided respectively the size with quiescent current in the departure amplifying circuit; The output of error amplifying circuit is connected with the power output device with the input of voltage detecting circuit; The duty ratio of the pulse signal Vsw of described square-wave pulse generator output is less than 0.05.
Described reference voltage generating circuit comprises bandgap reference source, first voltage cut-out, second voltage cut-out, tertiary voltage control switch, the 3rd resistance, first electric capacity and second electric capacity; The bandgap reference source is connected to operating voltage by first voltage cut-out, by the second voltage cut-out ground connection; One end of tertiary voltage control switch connects the output of band gap reference source, and the other end connects the 3rd resistance and first electric capacity; One end ground connection of first electric capacity, the other end connects the 3rd resistance and tertiary voltage control switch; Second electric capacity, one end ground connection, the other end connects the output Vref of the 3rd resistance and reference voltage generating circuit; The control signal of described first voltage cut-out, second voltage cut-out and tertiary voltage control switch is the output signal Vsw of square-wave pulse generator.
Described voltage detecting circuit comprises the 4th voltage cut-out, the 5th voltage cut-out, the 3rd electric capacity, first resistance and second resistance; The 4th voltage cut-out, first resistance, second resistance, the 5th voltage cut-out connect successively, and the other end of described the 4th voltage cut-out connects the input voltage Vout of voltage detecting circuit, the other end ground connection of described the 5th voltage cut-out; One end of the 3rd electric capacity connects the input voltage Vout of voltage detecting circuit, and the other end connects the output voltage V fb of first resistance, second resistance and voltage detecting circuit; The control signal of described the 4th voltage cut-out and the 5th voltage cut-out is the output signal Vsw of square-wave pulse generator.
Described the 3rd resistance is active PMOS device, active nmos device, or the combination of active PMOS device and nmos device.
Described power device can be PMOS device or nmos device, and its grid connects the output of error amplifying circuit, and source electrode connects the input of voltage detecting circuit.
Described power device can be a bipolar device, and its base stage connects the output of error amplifying circuit, and emitter connects the input of voltage detecting circuit.
The utility model has the advantages that the square wave control signal Vsw that is produced by the square-wave pulse generator controls the size of the quiescent current of reference voltage generating circuit and voltage detecting circuit, detect the size of output current by current detection circuit, and return control signal Vc thus, the size of the quiescent current of this control signal Vc departure amplifier.By the method, can reduce the wait power consumption significantly, and can reduce the quiescent current of voltage regulator greatly.
Description of drawings
Fig. 1 is the utility model circuit frame principle figure.
Fig. 2 is the utility model reference voltage generating circuit figure.
Fig. 3 is the utility model voltage detecting circuit figure.
Embodiment
The utility model is described in further detail below in conjunction with drawings and Examples.
As shown in Figure 1: comprise reference voltage generating circuit 2, square-wave pulse generator 1, error amplifying circuit 3, voltage detecting circuit 4, current detection circuit 5 and power output device 7; The output of square-wave pulse generator 1 connects the input of reference voltage generating circuit 2 and voltage detecting circuit 4, the size of quiescent current in the square wave control signal Vsw control reference voltage generating circuit 2 of square-wave pulse generator 1 output and the voltage detecting circuit 4; The input of current detection circuit 5 connects the output of error amplifying circuit 3 to detect the size of output current, reference voltage generating circuit 2, voltage detecting circuit 4 and the output of current detection circuit 5 are connected the input of error amplifying circuit 3, and control signal Vref, Vfb and Vc are provided respectively the size with quiescent current in the departure amplifying circuit 3; The input of the output of error amplifying circuit 3 and voltage detecting circuit 4 is connected with power output device 7; The duty ratio of the pulse signal Vsw of described square-wave pulse generator 1 output is less than 0.05.
As shown in Figure 2: described reference voltage generating circuit 2 comprises bandgap reference source 8, the first voltage cut-out K1, the second voltage cut-out K2, tertiary voltage control switch K3, the 3rd resistance R _ f 2, the first capacitor C f1 and the second capacitor C f2; Bandgap reference source 8 is connected to operating voltage Vin by the first voltage cut-out K1, by the second voltage cut-out K2 ground connection; The end of tertiary voltage control switch K3 connects the output of band gap reference source 8, and the other end connects the 3rd resistance R _ f 2 and the first capacitor C f1; The end ground connection of the first capacitor C f1, the other end connect the 3rd resistance R _ f 2 and tertiary voltage control switch K3; The second capacitor C f2, one end ground connection, the other end connects the output Vref of the 3rd resistance R _ f 2 and reference voltage generating circuit 2; The control signal of the described first voltage cut-out K1, the second voltage cut-out K2 and tertiary voltage control switch K3 is the output signal Vsw of square-wave pulse generator 1.
As shown in Figure 3, described voltage detecting circuit 4 comprises the 4th voltage cut-out K4, the 5th voltage cut-out K5, the 3rd capacitor C fb, the first resistance R _ f b1 and the second resistance R _ f b2; The 4th voltage cut-out K4, the first resistance R _ f b1, the second resistance R _ f b2, the 5th voltage cut-out K5 connect successively, the other end of described the 4th voltage cut-out K4 connects the input voltage Vout of voltage detecting circuit 4, the other end ground connection of described the 5th voltage cut-out K5; The end of the 3rd capacitor C fb connects the input voltage Vout of voltage detecting circuit 4, and the other end connects the output voltage V fb of the first resistance R _ f b1, the second resistance R _ f b2 and voltage detecting circuit 4; The control signal of described the 4th voltage cut-out K4 and the 5th voltage cut-out K5 is the output signal Vsw of square-wave pulse generator 1.
Described the 3rd resistance R _ f 2 is active PMOS device, active nmos device, or the combination of active PMOS device and nmos device.
Described power device 7 can be PMOS device or nmos device, and PMOS device or nmos device grid connect the output of error amplifying circuit 3, and source electrode connects the input of voltage detecting circuit 4.
Described power device 7 can be a bipolar device, and the bipolar device base stage connects the output of error amplifying circuit 3, and emitter connects the input of voltage detecting circuit 4.
The pulse signal Vsw that the utility model square-wave pulse generator 1 produces come control connection bandgap reference source generator unit in the first voltage cut-out K1 of power supply and earth point and the second voltage cut-out K2, the filter tertiary voltage control switch K3 and connect feedback resistance to the 4th voltage cut-out K4 between output and the earth point and the 5th voltage cut-out K5.
The turn-on and turn-off time ratio of the pulse signal Vsw of described square-wave pulse generator output be duty ratio should less than 1/20 and frequency less than 100 hertz (for example conducting is 0.5ms, and the turn-off time is 10ms).
Like this, although bandgap reference source generator unit flows through several microamperes to ten microamperes electric current when the Vsw conducting, when Vsw turn-offed, the electric current of this element was zero.Therefore, the average current of this element is below 0.5 microampere.The conducting electric current of feedback resistance is 1 to 2 microampere when switch closure, and its average current is below 0.1 microampere.
Although any one all can play the effect that reduces average current in the first voltage cut-out K1 of power supply and earth point and the second voltage cut-out K2 to connect band gap reference source generator unit, but these two switches must be used simultaneously, otherwise reference source Vref has fluctuation.Equally, connect feedback resistance and also must use simultaneously, otherwise feedback voltage Vfb has than great fluctuation process to the 4th voltage cut-out K4 between output and the earth point and the 5th voltage cut-out K5.
Therefore, if the quiescent current of differential amplifier is reduced to below 0.5 microampere, the quiescent current of whole voltage regulator can be controlled in about 1 microampere again.
The utility model can be used as an independently integrated circuit, also can be used as the part of integrated circuit.
The utility model can be used in the regulator equally.

Claims (8)

1, a kind of voltage regulator with minimum quiescent current, comprise reference voltage generating circuit (2), square-wave pulse generator (1), error amplifying circuit (3), voltage detecting circuit (4), current detection circuit (5) and power output device (7), it is characterized in that: the output of square-wave pulse generator (1) connects the input of reference voltage generating circuit (2) and voltage detecting circuit (4), the size of quiescent current in the square wave control signal Vsw control reference voltage generating circuit (2) of square-wave pulse generator (1) output and the voltage detecting circuit (4); The input of current detection circuit (5) connects the output of error amplifying circuit (3) to detect the size of output current, reference voltage generating circuit (2), voltage detecting circuit (4) and the output of current detection circuit (5) are connected the input of error amplifying circuit (3), and control signal Vref, Vfb and Vc are provided respectively the size with quiescent current in the departure amplifying circuit (3); The input of the output of error amplifying circuit (3) and voltage detecting circuit (4) is connected with power output device (7).
2, a kind of voltage regulator with minimum quiescent current as claimed in claim 1 is characterized in that: described reference voltage generating circuit (2) comprises bandgap reference source (8), first voltage cut-out (K1), second voltage cut-out (K2), tertiary voltage control switch (K3), the 3rd resistance (Rf2), first electric capacity (Cf1) and second electric capacity (Cf2); Bandgap reference source (8) is connected to operating voltage (Vin) by first voltage cut-out (K1), by second voltage cut-out (K2) ground connection; One end of tertiary voltage control switch (K3) connects the output of band gap reference source (8), and the other end connects the 3rd resistance (Rf2) and first electric capacity (Cf1); One end ground connection of first electric capacity (Cf1), the other end connect the 3rd resistance (Rf2) and tertiary voltage control switch (K3); Second electric capacity (Cf2) end ground connection, the other end connects the output Vref of the 3rd resistance (Rf2) and reference voltage generating circuit (2); The control signal of described first voltage cut-out (K1), second voltage cut-out (K2) and tertiary voltage control switch (K3) is the output signal Vsw of square-wave pulse generator (1).
3, a kind of voltage regulator with minimum quiescent current as claimed in claim 1 is characterized in that: described voltage detecting circuit (4) comprises the 4th voltage cut-out (K4), the 5th voltage cut-out (K5), the 3rd electric capacity (Cfb), first resistance (Rfb1) and second resistance (Rfb2); The 4th voltage cut-out (K4), first resistance (Rfb1), second resistance (Rfb2), the 5th voltage cut-out (K5) connect successively, the other end of described the 4th voltage cut-out (K4) connects the input voltage Vout of voltage detecting circuit (4), the other end ground connection of described the 5th voltage cut-out (K5); One end of the 3rd electric capacity (Cfb) connects the input voltage Vout of voltage detecting circuit (4), and the other end connects the output voltage V fb of first resistance (Rfb1), second resistance (Rfb2) and voltage detecting circuit (4); The control signal of described the 4th voltage cut-out (K4) and the 5th voltage cut-out (K5) is the output signal Vsw of square-wave pulse generator (1).
4, a kind of voltage regulator with minimum quiescent current as claimed in claim 2 is characterized in that: described the 3rd resistance R _ f 2 is active PMOS device, active nmos device, or the combination of active PMOS device and nmos device.
5, a kind of voltage regulator with minimum quiescent current as claimed in claim 1, it is characterized in that: described power output device (7) is PMOS device or nmos device.
6, a kind of voltage regulator with minimum quiescent current as claimed in claim 5 is characterized in that: described PMOS device or nmos device grid connect the output of error amplifying circuit (3), and source electrode connects the input of voltage detecting circuit (4).
7, a kind of voltage regulator as claimed in claim 1 with minimum quiescent current, it is characterized in that: described power output device (7) is a bipolar device, the bipolar device base stage connects the output of error amplifying circuit (3), and emitter connects the input of voltage detecting circuit (4).
8, a kind of voltage regulator with minimum quiescent current as claimed in claim 1 is characterized in that: the duty ratio of the pulse signal Vsw of described square-wave pulse generator (1) output is less than 0.05.
CN2009200359517U 2009-03-03 2009-03-03 Voltage regulator with minimal static current Expired - Lifetime CN201403049Y (en)

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Application Number Priority Date Filing Date Title
CN2009200359517U CN201403049Y (en) 2009-03-03 2009-03-03 Voltage regulator with minimal static current

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Application Number Priority Date Filing Date Title
CN2009200359517U CN201403049Y (en) 2009-03-03 2009-03-03 Voltage regulator with minimal static current

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109725631A (en) * 2019-01-24 2019-05-07 西安盛博飞电子科技有限公司 A kind of quiescent current test device and vehicle

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109725631A (en) * 2019-01-24 2019-05-07 西安盛博飞电子科技有限公司 A kind of quiescent current test device and vehicle

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GR01 Patent grant
AV01 Patent right actively abandoned

Granted publication date: 20100210

Effective date of abandoning: 20090303