CN113702801A - Signal measurement method and device of chip and related assembly - Google Patents
Signal measurement method and device of chip and related assembly Download PDFInfo
- Publication number
- CN113702801A CN113702801A CN202110779554.6A CN202110779554A CN113702801A CN 113702801 A CN113702801 A CN 113702801A CN 202110779554 A CN202110779554 A CN 202110779554A CN 113702801 A CN113702801 A CN 113702801A
- Authority
- CN
- China
- Prior art keywords
- signal
- chip
- multiplexer
- tested
- identification information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000691 measurement method Methods 0.000 title claims abstract description 15
- 238000012360 testing method Methods 0.000 claims abstract description 49
- 238000000034 method Methods 0.000 claims abstract description 36
- 238000005259 measurement Methods 0.000 claims abstract description 23
- 238000004590 computer program Methods 0.000 claims description 11
- 230000005540 biological transmission Effects 0.000 claims description 6
- 230000008569 process Effects 0.000 abstract description 12
- 230000009286 beneficial effect Effects 0.000 abstract description 4
- 238000013461 design Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2889—Interfaces, e.g. between probe and tester
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31712—Input or output aspects
- G01R31/31713—Input or output interfaces for test, e.g. test pins, buffers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31722—Addressing or selecting of test units, e.g. transmission protocols for selecting test units
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318516—Test of programmable logic devices [PLDs]
Abstract
The application discloses signal measurement method of chip, chip are equipped with the multiplexer, and the output of multiplexer is connected with the test pin position of chip, and a plurality of inputs of multiplexer are used for a plurality of signals to be measured of one-to-one access chip, and this signal measurement method includes: distributing independent identification information for each signal to be detected; establishing a corresponding relation between each signal to be detected and an input end accessed to the signal to be detected; generating a selection instruction comprising identification information of the current signal to be tested so that the multiplexer outputs the current signal to be tested to the test pin according to the selection instruction and the corresponding relation; and measuring the current signal to be tested output by the test pin. The method and the device can reduce occupation of the test pins on the pins of the chip, do not need to compile codes again and update the chip in the signal measurement process, and are high in signal measurement efficiency. The application also discloses a signal measuring device of the chip, electronic equipment and a computer readable storage medium, which have the beneficial effects.
Description
Technical Field
The present disclosure relates to the field of chip testing, and more particularly, to a method and an apparatus for measuring a signal of a chip, and a related device.
Background
In the existing server, more and more CPLD (Complex Programmable Logic Device) chips are adopted, and the functions that need to be realized by the CPLD chips are increased, so that the requirement for the pin and the internal Logic capacity required by the CPLD chips is correspondingly increased. In order to meet the development requirement, a Ball Grid Array (BGA) Package (BGA) can be used to Package the CPLD chip, after the Package, because the pins of the CPLD chip are all located below the chip body, several testing pins are usually reserved for measuring signals, and a CPLD program developer designates and outputs the signals to be measured to the reserved testing pins by means of code modification, so that the CPLD program developer can observe whether the signal conditions are expected or not, and accelerate the modification of program problems.
In the prior art, a signal measurement scheme of a BGA-packaged CPLD chip needs to be implemented by code compilation, which is usually a one-to-one signal design, and assuming that a CPLD program developer needs to measure two sets of signals, namely, an a signal and a B signal, two codes need to be designed respectively, and each code is compiled to generate two burning files, namely, burning files of a signal a and a signal B, which are updated to the CPLD respectively. Specifically, when the signal a needs to be output to the test pin a of the CPLD, the burning file a needs to be updated, and when the signal B needs to be output to the test pin a, the burning file B needs to be updated. By adopting the mode in the prior art, the to-be-tested signal inside the CPLD chip and the testing pin position are in one-to-one correspondence, if a new signal inside the CPLD chip needs to be detected, the code needs to be recompiled and the CPLD needs to be updated, so that the measurement time is long, and the efficiency is low.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The present application is directed to a method and an apparatus for measuring a signal of a chip, an electronic device, and a computer-readable storage medium, which can reduce occupation of a test pin on a pin of the chip, and have high signal measurement efficiency without recompiling a code and updating the chip during the signal measurement process.
In order to solve the above technical problem, the present application provides a signal measurement method for a chip, the chip is provided with a multiplexer, an output end of the multiplexer is connected to a test pin of the chip, a plurality of input ends of the multiplexer are used for one-to-one access to a plurality of signals to be tested of the chip, and the signal measurement method includes:
distributing independent identification information for each signal to be detected;
establishing a corresponding relation between each signal to be detected and the input end accessed to the signal to be detected;
generating a selection instruction comprising the identification information of the current signal to be tested so that the multiplexer can output the current signal to be tested to the test pin according to the selection instruction and the corresponding relation;
and measuring the current signal to be tested output by the test pin.
Optionally, the identification information is identification information set based on an I2C transmission protocol.
Optionally, the process of generating the selection instruction including the identification information of the current signal to be tested includes:
and generating a selection instruction comprising the identification information of the current signal to be tested by the BMC.
Optionally, the signal measurement method further includes:
predetermining all the signals to be detected in the chip;
and designing the multiplexer according to the number of all the signals to be tested.
Optionally, the chip is a chip based on BGA package.
Optionally, the chip is a CPLD.
Optionally, the process of establishing a corresponding relationship between each signal to be detected and the input end accessing the signal to be detected includes:
and distributing identification information which is the same as the identification information of the signal to be detected accessed to each input end to establish the corresponding relation between each signal to be detected and the input end accessed to the signal to be detected.
For solving above-mentioned technical problem, this application still provides a signal measuring device of chip, and the chip is equipped with the multiplexer, the output of multiplexer with the test pin position of chip is connected, a plurality of inputs of multiplexer are used for the one-to-one to insert a plurality of signals to be measured of chip, and this signal measuring device includes:
the distribution module is used for distributing independent identification information for each signal to be detected;
the establishing module is used for establishing the corresponding relation between each signal to be detected and the input end accessed to the signal to be detected;
the selection module is used for generating a selection instruction comprising the identification information of the current signal to be tested so that the multiplexer can output the current signal to be tested to the test pin according to the selection instruction and the corresponding relation;
and the measuring module is used for measuring the current signal to be measured output by the testing pin.
In order to solve the above technical problem, the present application further provides an electronic device, including:
a memory for storing a computer program;
a processor for implementing the steps of the signal measurement method of the chip as described in any one of the above items when the computer program is executed.
In order to solve the above technical problem, the present application further provides a computer-readable storage medium, having a computer program stored thereon, where the computer program is executed by a processor to implement the steps of the signal measurement method of the chip according to any one of the above.
The application provides a signal measuring method of a chip, wherein a multiplexer is arranged in the chip, a plurality of input ends of the multiplexer are used for being accessed into a plurality of signals to be tested in the chip in a one-to-one correspondence mode, and an output end of the multiplexer is connected with a testing pin position of the chip. And distributing independent identification information for each signal to be measured in the chip, if the signal to be measured needs to be measured currently, generating a selection instruction corresponding to the identification information of the current signal to be measured, and selecting the signal to be measured corresponding to the selection instruction by the multiplexer to output to a test pin of the chip, so that the current signal to be measured can be measured. According to the method and the device, only one test pin is reserved on the chip, measurement of a plurality of signals to be tested can be achieved, occupation of the test pins on pins of the chip is reduced, when new signals to be tested need to be switched, a selection instruction corresponding to the new signals to be tested is generated, the multiplexer can independently select and output the signals to be tested to the test pins according to the selection instruction, codes do not need to be compiled again, the chip does not need to be updated, and signal measurement efficiency is high. The application also provides a signal measuring device of the chip, electronic equipment and a computer readable storage medium, and the signal measuring device, the electronic equipment and the computer readable storage medium have the same beneficial effects as the signal measuring method.
Drawings
In order to more clearly illustrate the embodiments of the present application, the drawings needed for the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
FIG. 1 is a flowchart illustrating a method for measuring a signal of a chip according to the present disclosure;
fig. 2 is a schematic structural diagram of a signal measurement apparatus of a chip provided in the present application.
Detailed Description
The core of the application is to provide a chip signal measurement method, a chip signal measurement device, an electronic device and a computer readable storage medium, which can reduce the occupation of test pins on pins of a chip, and in the signal measurement process, the code does not need to be compiled again and the chip does not need to be updated, so that the signal measurement efficiency is high.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a flowchart illustrating a method for measuring a signal of a chip according to the present application, in which the chip is provided with a multiplexer, an output terminal of the multiplexer is connected to a test pin of the chip, and a plurality of input terminals of the multiplexer are used for accessing a plurality of signals to be measured of the chip in a one-to-one correspondence manner, and the method for measuring a signal includes:
s101: distributing independent identification information for each signal to be detected;
s102: establishing a corresponding relation between each signal to be detected and an input end accessed to the signal to be detected;
specifically, this embodiment is at chip internal design multiplexer, with the input of the signal one-to-one access multiplexer that awaits measuring in the chip, the output of multiplexer is connected with the test pin position of chip, and the multiplexer can select input signal, realizes the purpose of multiple input single output, and based on this, adopt the scheme of this application, the chip can only set up a test pin position, reduces and occupies too much of the pin of chip.
Specifically, independent identification information is distributed to each signal to be tested, and then a one-to-one correspondence between each signal to be tested and an input end connected to the signal to be tested is established, so that a preset correspondence is determined according to a selection instruction, and the current signal to be tested of which input end needs to be led out to a test pin.
The chip may be a chip based on TQFP (Thin q tape Flat Package) or BGA Package, and specifically may be a CPLD chip based on BGA Package.
S103: generating a selection instruction comprising identification information of the current signal to be tested so that the multiplexer outputs the current signal to be tested to the test pin according to the selection instruction and the corresponding relation;
specifically, the user can select the current signal to be measured as required, generate the selection instruction including the identification information of the current signal to be measured, and send the selection instruction to the chip, the selection pin of multiplexer is input with the selection instruction by the chip, the multiplexer can independently select which input end signal to be measured need be output, namely the multiplexer can be according to the selection instruction that the selection pin received, independently select the signal source, when the signal to be measured needs to be changed, only need regenerate the selection instruction including the identification information of the new signal to be measured can, need not to compile the code again and update the chip, signal measurement efficiency is high.
S104: and measuring the current signal to be tested output by the test pin.
Specifically, the developer can measure the current signal to be tested of the test pin, judge whether the signal meets the expectation according to the measurement result, and accelerate the modification processing of the program problem.
In this embodiment, a multiplexer is disposed in the chip, a plurality of input terminals of the multiplexer are used for accessing a plurality of signals to be tested in the chip in a one-to-one correspondence manner, and an output terminal of the multiplexer is connected to the test pin of the chip. And distributing independent identification information for each signal to be measured in the chip, if the signal to be measured needs to be measured currently, generating a selection instruction corresponding to the identification information of the current signal to be measured, and selecting the signal to be measured corresponding to the selection instruction by the multiplexer to output to a test pin of the chip, so that the current signal to be measured can be measured. According to the method and the device, only one test pin is reserved on the chip, measurement of a plurality of signals to be tested can be achieved, occupation of the test pins on pins of the chip is reduced, when new signals to be tested need to be switched, a selection instruction corresponding to the new signals to be tested is generated, the multiplexer can independently select and output the signals to be tested to the test pins according to the selection instruction, codes do not need to be compiled again, the chip does not need to be updated, and signal measurement efficiency is high.
On the basis of the above-described embodiment:
as an alternative embodiment, the identification information is the identification information set based on the I2C transmission protocol.
Specifically, the identification information in the present application may be the identification information set based on the I2C transmission protocol, and since the data transmission of one I2C is eight bits, i.e., Bit7 to Bit0, the switching of up to 256 signals inside the chip can be achieved by using these 8 bits. Specifically, the signal to be measured 1 may be defined as 0x00, the signal to be measured 2 may be defined as 0x01 … …, and the signal to be measured 16 is 0x10, and so on, where 0x00, 0x01, … … 0xFF are identification information.
As an alternative embodiment, the process of generating the selection instruction including the identification information of the current signal to be tested includes:
and generating a selection instruction comprising the identification information of the current signal to be tested by the BMC.
Specifically, the operations of S101 to S103 may be completed by an existing BMC in the server design, and the BMC may be connected to the chip through the I2C bus, so as to save the hardware cost.
As an optional embodiment, the signal measurement method further includes:
predetermining all signals to be detected in a chip;
the multiplexer is designed according to the number of all the signals to be tested.
Specifically, the multiplexer may be designed according to the number of signals to be measured, and if two signals to be measured need to be measured, a 2-to-1 multiplexer may be designed.
As an optional embodiment, the process of establishing a corresponding relationship between each signal to be measured and the input terminal accessing the signal to be measured includes:
and distributing identification information which is the same as the identification information of the signal to be detected accessed to each input end to establish the corresponding relation between each signal to be detected and the input end accessed to the signal to be detected.
Specifically, the same identification information may be set for each input terminal of the multiplexer and the signal to be measured accessed thereto, and if the signal to be measured 1 is defined as 0x00, the input terminal for accessing the signal to be measured may also be defined as 0x00, so as to reduce the data processing amount, so that the multiplexer can rapidly switch the signal source, thereby improving the signal measurement efficiency.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a signal measurement device of a chip provided in the present application, the chip is provided with a multiplexer, an output end of the multiplexer is connected to a test pin of the chip, a plurality of input ends of the multiplexer are used for accessing a plurality of signals to be tested of the chip in a one-to-one correspondence manner, and the signal measurement device includes:
the distribution module 1 is used for distributing independent identification information for each signal to be measured;
the establishing module 2 is used for establishing the corresponding relation between each signal to be detected and the input end accessed to the signal to be detected;
the selection module 3 is used for generating a selection instruction comprising the identification information of the current signal to be tested so that the multiplexer can output the current signal to be tested to the test pin according to the selection instruction and the corresponding relation;
and the measuring module 4 is used for measuring the current signal to be measured output by the test pin.
In this embodiment, a multiplexer is disposed in the chip, a plurality of input terminals of the multiplexer are used for accessing a plurality of signals to be tested in the chip in a one-to-one correspondence manner, and an output terminal of the multiplexer is connected to the test pin of the chip. And distributing independent identification information for each signal to be measured in the chip, if the signal to be measured needs to be measured currently, generating a selection instruction corresponding to the identification information of the current signal to be measured, and selecting the signal to be measured corresponding to the selection instruction by the multiplexer to output to a test pin of the chip, so that the current signal to be measured can be measured. According to the method and the device, only one test pin is reserved on the chip, measurement of a plurality of signals to be tested can be achieved, occupation of the test pins on pins of the chip is reduced, when new signals to be tested need to be switched, a selection instruction corresponding to the new signals to be tested is generated, the multiplexer can independently select and output the signals to be tested to the test pins according to the selection instruction, codes do not need to be compiled again, the chip does not need to be updated, and signal measurement efficiency is high.
As an alternative embodiment, the identification information is the identification information set based on the I2C transmission protocol.
As an alternative embodiment, the process of generating the selection instruction including the identification information of the current signal to be tested includes:
and generating a selection instruction comprising the identification information of the current signal to be tested by the BMC.
As an alternative embodiment, the signal measuring apparatus further comprises:
and the design module is used for predetermining all signals to be tested in the chip and designing the multiplexer according to the number of all the signals to be tested.
As an alternative embodiment, the chip is a chip based on a BGA package.
As an alternative embodiment, the chip is a CPLD.
As an optional embodiment, the process of establishing a corresponding relationship between each signal to be measured and the input terminal accessing the signal to be measured includes:
and distributing identification information which is the same as the identification information of the signal to be detected accessed to each input end to establish the corresponding relation between each signal to be detected and the input end accessed to the signal to be detected.
In order to solve the above technical problem, the present application further provides an electronic device, including:
a memory for storing a computer program;
a processor for implementing the steps of the signal measurement method of the chip as described in any one of the above embodiments when executing the computer program.
For an introduction of an electronic device provided in the present application, please refer to the above embodiments, which are not described herein again.
The electronic equipment provided by the application has the same beneficial effects as the signal measuring method of the chip.
In order to solve the above technical problem, the present application further provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the signal measurement method of the chip as described in any one of the above embodiments.
For the introduction of a computer-readable storage medium provided in the present application, please refer to the above embodiments, which are not described herein again.
The computer-readable storage medium provided by the application has the same beneficial effects as the signal measuring method of the chip.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A signal measurement method of a chip is characterized in that the chip is provided with a multiplexer, the output end of the multiplexer is connected with a test pin of the chip, a plurality of input ends of the multiplexer are used for being accessed into a plurality of signals to be tested of the chip in a one-to-one correspondence mode, and the signal measurement method comprises the following steps:
distributing independent identification information for each signal to be detected;
establishing a corresponding relation between each signal to be detected and the input end accessed to the signal to be detected;
generating a selection instruction comprising the identification information of the current signal to be tested so that the multiplexer can output the current signal to be tested to the test pin according to the selection instruction and the corresponding relation;
and measuring the current signal to be tested output by the test pin.
2. The method of claim 1, wherein the identification information is an identification information set based on an I2C transmission protocol.
3. The method of claim 1, wherein the step of generating the selection command including the identification information of the current signal to be tested comprises:
and generating a selection instruction comprising the identification information of the current signal to be tested by the BMC.
4. The method of claim 1, further comprising:
predetermining all the signals to be detected in the chip;
and designing the multiplexer according to the number of all the signals to be tested.
5. The method of claim 1, wherein the chip is a BGA package based chip.
6. The method for measuring the signal of the chip according to claim 5, wherein the chip is a CPLD.
7. The method for measuring the signals of the chip according to any one of claims 1 to 6, wherein the step of establishing the corresponding relationship between each signal to be measured and the input terminal connected to the signal to be measured comprises:
and distributing identification information which is the same as the identification information of the signal to be detected accessed to each input end to establish the corresponding relation between each signal to be detected and the input end accessed to the signal to be detected.
8. The utility model provides a signal measuring device of chip, its characterized in that, the chip is equipped with the multiplexer, the output of multiplexer with the test pin position of chip is connected, a plurality of inputs of multiplexer are used for the one-to-one to insert a plurality of signals to be measured of chip, and this signal measuring device includes:
the distribution module is used for distributing independent identification information for each signal to be detected;
the establishing module is used for establishing the corresponding relation between each signal to be detected and the input end accessed to the signal to be detected;
the selection module is used for generating a selection instruction comprising the identification information of the current signal to be tested so that the multiplexer can output the current signal to be tested to the test pin according to the selection instruction and the corresponding relation;
and the measuring module is used for measuring the current signal to be measured output by the testing pin.
9. An electronic device, comprising:
a memory for storing a computer program;
processor for implementing the steps of the method for signal measurement of a chip according to any one of claims 1 to 7 when executing said computer program.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method for signal measurement of a chip according to any one of claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110779554.6A CN113702801A (en) | 2021-07-09 | 2021-07-09 | Signal measurement method and device of chip and related assembly |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110779554.6A CN113702801A (en) | 2021-07-09 | 2021-07-09 | Signal measurement method and device of chip and related assembly |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113702801A true CN113702801A (en) | 2021-11-26 |
Family
ID=78648404
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110779554.6A Pending CN113702801A (en) | 2021-07-09 | 2021-07-09 | Signal measurement method and device of chip and related assembly |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113702801A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117452190A (en) * | 2023-12-22 | 2024-01-26 | 合肥联宝信息技术有限公司 | Signal testing circuit, method and storage medium |
| CN117472816A (en) * | 2023-12-28 | 2024-01-30 | 联和存储科技(江苏)有限公司 | Configuration method of chip pins |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101063700A (en) * | 2007-05-29 | 2007-10-31 | 北京中星微电子有限公司 | Method and arrangement for implementing chip test |
| CN102970086A (en) * | 2012-11-26 | 2013-03-13 | 惠州Tcl移动通信有限公司 | Device, system and method for switching testing signal channel |
| CN111398786A (en) * | 2020-04-02 | 2020-07-10 | 上海燧原科技有限公司 | Switching control circuit, system-on-chip, chip test system and method |
| CN111766509A (en) * | 2020-09-02 | 2020-10-13 | 深圳芯邦科技股份有限公司 | Chip testing method and related equipment |
| CN111880076A (en) * | 2020-07-14 | 2020-11-03 | 苏州浪潮智能科技有限公司 | Signal test point detection method, system and related assembly |
| CN111968922A (en) * | 2019-05-20 | 2020-11-20 | 三星电子株式会社 | Wafer level method for testing semiconductor devices with internally generated test enable signals |
| CN112527653A (en) * | 2020-12-16 | 2021-03-19 | 江铃汽车股份有限公司 | Automobile combination instrument testing method and system |
| CN112858879A (en) * | 2021-01-11 | 2021-05-28 | 重庆金山医疗器械有限公司 | Chip signal test circuit and capsule type endoscope |
| CN112988495A (en) * | 2021-03-11 | 2021-06-18 | 广州安凯微电子股份有限公司 | Multifunctional test method, device and system for SOC chip multiplex pin |
-
2021
- 2021-07-09 CN CN202110779554.6A patent/CN113702801A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101063700A (en) * | 2007-05-29 | 2007-10-31 | 北京中星微电子有限公司 | Method and arrangement for implementing chip test |
| CN102970086A (en) * | 2012-11-26 | 2013-03-13 | 惠州Tcl移动通信有限公司 | Device, system and method for switching testing signal channel |
| CN111968922A (en) * | 2019-05-20 | 2020-11-20 | 三星电子株式会社 | Wafer level method for testing semiconductor devices with internally generated test enable signals |
| CN111398786A (en) * | 2020-04-02 | 2020-07-10 | 上海燧原科技有限公司 | Switching control circuit, system-on-chip, chip test system and method |
| CN111880076A (en) * | 2020-07-14 | 2020-11-03 | 苏州浪潮智能科技有限公司 | Signal test point detection method, system and related assembly |
| CN111766509A (en) * | 2020-09-02 | 2020-10-13 | 深圳芯邦科技股份有限公司 | Chip testing method and related equipment |
| CN112527653A (en) * | 2020-12-16 | 2021-03-19 | 江铃汽车股份有限公司 | Automobile combination instrument testing method and system |
| CN112858879A (en) * | 2021-01-11 | 2021-05-28 | 重庆金山医疗器械有限公司 | Chip signal test circuit and capsule type endoscope |
| CN112988495A (en) * | 2021-03-11 | 2021-06-18 | 广州安凯微电子股份有限公司 | Multifunctional test method, device and system for SOC chip multiplex pin |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117452190A (en) * | 2023-12-22 | 2024-01-26 | 合肥联宝信息技术有限公司 | Signal testing circuit, method and storage medium |
| CN117472816A (en) * | 2023-12-28 | 2024-01-30 | 联和存储科技(江苏)有限公司 | Configuration method of chip pins |
| CN117472816B (en) * | 2023-12-28 | 2024-04-02 | 联和存储科技(江苏)有限公司 | Configuration method of chip pins |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2021189322A1 (en) | Chip testing apparatus and chip testing method | |
| CN113702801A (en) | Signal measurement method and device of chip and related assembly | |
| CN109144036B (en) | Manipulator simulation test system and test method based on FPGA chip | |
| CN105185415A (en) | Method and device for testing EEPROM of I2C | |
| CN112597064B (en) | Method for simulating program, electronic device and storage medium | |
| CN112996020A (en) | Bluetooth-based automatic testing method and device and Bluetooth testing terminal | |
| CN113014339A (en) | Quality test method, device and equipment for PCIe external plug-in card receiving channel | |
| CN106776195B (en) | A kind of SOC chip adjustment method and equipment | |
| CN114548027A (en) | Method for tracking signal in verification system, electronic device and storage medium | |
| CN112069000A (en) | Test circuit for compatibility of main control chip and storage chip | |
| CN217606027U (en) | Universal chip verification system | |
| CN114076901B (en) | Automatic testing system and method for output ripples of power supply module | |
| CN215005730U (en) | Power chip's test system | |
| CN115563007A (en) | Wireless communication terminal test method and device and electronic equipment | |
| CN104598415A (en) | Universal serial bus (USB) test fixture | |
| CN114019357A (en) | Management method of test pin of logic processing module and related assembly | |
| CN210666782U (en) | System and device for verifying electric energy meter management chip | |
| CN113160875A (en) | Chip test system and test method | |
| CN113064833A (en) | Single chip microcomputer simulation method, system, device, equipment and storage medium | |
| CN112630625A (en) | System and method for testing power supply chip | |
| CN114064373B (en) | Test system, test method, test device and test equipment for USB platelet | |
| CN113820583B (en) | USB OTG test method | |
| CN112834964B (en) | Detection method, device and equipment for wiring line sequence of self-adaptive combiner | |
| CN219737587U (en) | Chip test board and equipment thereof | |
| KR102467416B1 (en) | Test system of testing different types of DUTs |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |