CN112858879A - Chip signal test circuit and capsule type endoscope - Google Patents
Chip signal test circuit and capsule type endoscope Download PDFInfo
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- CN112858879A CN112858879A CN202110032965.9A CN202110032965A CN112858879A CN 112858879 A CN112858879 A CN 112858879A CN 202110032965 A CN202110032965 A CN 202110032965A CN 112858879 A CN112858879 A CN 112858879A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
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Abstract
The invention discloses a chip signal test circuit which comprises a signal gating circuit and a control circuit used for controlling the signal gating circuit. The signal gating circuit is arranged on a test chip in the capsule type endoscope, the input end of the signal gating circuit is connected with a plurality of test signal lines on the test chip one by one, and the signal gating circuit is provided with a single output end. When the control circuit receives a test instruction of a target test signal, the control signal gating circuit communicates a test signal line corresponding to the target test signal to the single output end of the control signal gating circuit so as to detect the target test signal. Therefore, according to the signal test requirement, the corresponding test signal can be selected from the plurality of test signals in a signal gating mode to be output and tested, so that the number of the pins for off-chip testing is saved as much as possible, and the system design and the hardware layout of the capsule endoscope are facilitated. The invention also discloses a capsule type endoscope which has the same beneficial effect with the chip signal testing circuit.
Description
Technical Field
The invention relates to the field of signal detection, in particular to a chip signal testing circuit and a capsule type endoscope.
Background
The capsule endoscope includes an image sensor and a radio frequency transceiver. At present, in order to detect the working performance of the capsule type endoscope, the grabbing test of key signals inside two chips, namely an image sensor and a radio frequency transceiver, is generally required. In the prior art, the technical means for testing the internal signal of the chip generally includes: the signal that will test inside the chip is connected to the chip outside through the way of walking the line and tests, and specific signal test principle is shown as figure 1, is about to draw out the signal that the chip inside needs the test through the chip pin one by one, if will test the 5 signals of chip inside, need increase 5 pin outputs outside the chip. However, the chip signal testing method has a large number of chip pins, which is not favorable for system design and hardware layout of the small-sized device such as a capsule endoscope.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a chip signal test circuit and a capsule endoscope, which can select corresponding test signals from a plurality of test signals to output and test in a signal gating mode according to signal test requirements, thereby saving the number of pins for off-chip test as much as possible and being beneficial to system design and hardware layout of the capsule endoscope.
In order to solve the above technical problem, the present invention provides a chip signal testing circuit, including:
the signal gating circuit is arranged on a test chip in the capsule endoscope, the input ends of the signal gating circuit are connected with a plurality of test signal lines on the test chip one by one, and the signal gating circuit is provided with a single output end;
the control circuit is arranged in the capsule endoscope and connected with the control end of the signal gating circuit, and is used for controlling the signal gating circuit to communicate a test signal line corresponding to a target test signal to a single output end of the signal gating circuit when receiving a test instruction of the target test signal so as to detect the target test signal.
Preferably, the test chip comprises a radio frequency transceiver chip with a microprocessor and a first register;
correspondingly, the control circuit comprises:
a first register coupled to the signal gating circuit;
and the microprocessor is connected with the first register and used for controlling the signal gating circuit to connect a test signal line corresponding to a target test signal to a single output end of the signal gating circuit by configuring the first register when receiving a test instruction of the target test signal of the radio frequency transceiver chip so as to detect the target test signal.
Preferably, the test chip further comprises an image sensor chip with a second register; the second register is connected with the microprocessor through a chip interface;
accordingly, the signal gating circuit includes:
the first signal gating sub-circuit is arranged on the radio frequency transceiver chip, the input ends of the first signal gating sub-circuit are connected with the plurality of test signal lines on the radio frequency transceiver chip one by one, the control ends of the first signal gating sub-circuit are connected with the first register, and the first signal gating sub-circuit is provided with a single output end;
the second signal gating sub-circuit is arranged on the image sensor chip, input ends of the second signal gating sub-circuit are connected with a plurality of test signal lines on the image sensor chip one by one, control ends of the second signal gating sub-circuit are connected with the second register, and the second signal gating sub-circuit is provided with a single output end;
the microprocessor is specifically configured to, when receiving a test instruction of a target test signal of a target test chip, control a signal gating sub-circuit on the target test chip to connect a test signal line corresponding to the target test signal to a single output end of the signal gating sub-circuit by configuring a register on the target test chip, so as to detect the target test signal; wherein the target test chip is the radio frequency transceiver chip or the image sensor chip.
Preferably, the number of signal gating sub-circuits on the target test chip is equal to the maximum number of signals which need to be detected simultaneously by the target test chip in the capsule endoscope joint debugging test;
correspondingly, the register on the target test chip comprises:
the sub-registers are connected with the signal gating sub-circuits on the target test chip one by one and configured by the microprocessor; wherein the test signals configured for the same signal gating sub-circuit are not detected simultaneously.
Preferably, the test pin led out from the signal gating circuit is mutually multiplexed with the original functional pin on the test chip.
In order to solve the technical problem, the invention also provides a capsule endoscope which comprises an image sensor chip, a radio frequency transceiver chip and any one of the chip signal test circuits.
The invention provides a chip signal test circuit which comprises a signal gating circuit and a control circuit used for controlling the signal gating circuit. The signal gating circuit is arranged on a test chip in the capsule type endoscope, the input end of the signal gating circuit is connected with a plurality of test signal lines on the test chip one by one, and the signal gating circuit is provided with a single output end. When the control circuit receives a test instruction of a target test signal, the control signal gating circuit communicates a test signal line corresponding to the target test signal to the single output end of the control signal gating circuit so as to detect the target test signal. Therefore, according to the signal test requirement, the corresponding test signal can be selected from the plurality of test signals in a signal gating mode to be output and tested, so that the number of the pins for off-chip testing is saved as much as possible, and the system design and the hardware layout of the capsule endoscope are facilitated.
The invention also provides a capsule type endoscope which has the same beneficial effect as the chip signal testing circuit.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic diagram of a prior art chip signal test;
fig. 2 is a schematic structural diagram of a chip signal testing circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a chip signal testing circuit according to an embodiment of the present invention.
Detailed Description
The core of the invention is to provide a chip signal test circuit and a capsule endoscope, which can select corresponding test signals from a plurality of test signals to output and test in a signal gating mode according to signal test requirements, thereby saving the number of pins for off-chip test as much as possible and being beneficial to the system design and hardware layout of the capsule endoscope.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a chip signal testing circuit according to an embodiment of the present invention.
The chip signal test circuit includes:
a signal gating circuit 1 which is arranged on a test chip in the capsule endoscope, has input ends connected with a plurality of test signal lines on the test chip one by one and has a single output end;
the control circuit 2 is arranged in the capsule endoscope and connected with the control end of the signal gating circuit 1, and is used for controlling the signal gating circuit 1 to communicate a test signal line corresponding to a target test signal to a single output end of the signal gating circuit 1 when receiving a test instruction of the target test signal so as to detect the target test signal.
Specifically, the chip signal test circuit of the present application includes a signal gating circuit 1 and a control circuit 2, and its operating principle is:
the signal gating circuit 1 is arranged on a test chip in the capsule endoscope and is provided with a plurality of input ends, each input end is connected with one test signal line on the test chip, the plurality of input ends of the signal gating circuit 1 correspond to one output end, namely, the signal gating circuit 1 is used for selecting one test signal from a plurality of input test signals to output, so that the application can realize the detection of the plurality of test signals only by leading out the output end of the signal gating circuit 1 through a chip pin.
The selection of the output signal of the signal gating circuit 1 is controlled by a control circuit 2 arranged in the capsule type endoscope, and the control principle is as follows: the application issues a test instruction of a target test signal to the control circuit 2 according to a signal test requirement. After receiving the test instruction, the control circuit 2 determines a target test signal according to the test instruction, and controls the signal gating circuit 1 to communicate a test signal line corresponding to the target test signal to the output end of the signal gating circuit, so that the signal gating circuit 1 outputs the target test signal, and at this time, the target test signal can be detected through a chip pin corresponding to the output end of the signal gating circuit 1.
The invention provides a chip signal test circuit which comprises a signal gating circuit and a control circuit used for controlling the signal gating circuit. The signal gating circuit is arranged on a test chip in the capsule type endoscope, the input end of the signal gating circuit is connected with a plurality of test signal lines on the test chip one by one, and the signal gating circuit is provided with a single output end. When the control circuit receives a test instruction of a target test signal, the control signal gating circuit communicates a test signal line corresponding to the target test signal to the single output end of the control signal gating circuit so as to detect the target test signal. Therefore, according to the signal test requirement, the corresponding test signal can be selected from the plurality of test signals in a signal gating mode to be output and tested, so that the number of the pins for off-chip testing is saved as much as possible, and the system design and the hardware layout of the capsule endoscope are facilitated.
On the basis of the above-described embodiment:
referring to fig. 3, fig. 3 is a schematic structural diagram of a chip signal testing circuit according to an embodiment of the present invention.
As an alternative embodiment, the test chip includes a radio frequency transceiver chip with a microprocessor and a first register;
accordingly, the control circuit 2 includes:
a first register connected to the signal gating circuit 1;
and the microprocessor is connected with the first register and used for controlling the signal gating circuit 1 to communicate a test signal line corresponding to a target test signal to a single output end of the signal gating circuit by configuring the first register when receiving a test instruction of the target test signal of the radio frequency transceiver chip so as to detect the target test signal.
Specifically, the capsule endoscope includes a radio frequency transceiver chip (e.g., a radio frequency transceiver chip implemented in an ASIC (Application Specific Integrated Circuit)), which may be used as a test chip for testing a chip signal, and the radio frequency transceiver chip includes a microprocessor (e.g., an MCU (Micro Controller Unit)) and a first register.
Based on this, the control circuit 2 of the present application can be implemented by means of an original circuit structure on a radio frequency transceiver chip, and specifically controls the selection of the output signal of the signal gating circuit 1 by means of a configuration register, and the control principle is as follows: according to the signal test requirement of the radio frequency transceiver chip, the test instruction of the target test signal is sent to the radio frequency transceiver chip. After receiving the test instruction, the microprocessor of the radio frequency transceiver chip determines a target test signal of the radio frequency transceiver chip according to the test instruction, and controls the signal gating circuit 1 to communicate a test signal line corresponding to the target test signal to the output end of the signal gating circuit 1 by configuring the first register, so that the signal gating circuit 1 outputs the target test signal. Therefore, the circuit structure of the control circuit 2 does not need to be additionally arranged, and the control circuit can be directly realized by means of the original circuit structure on the radio frequency transceiver chip, so that the cost of the chip signal test circuit is saved, and the structure of the chip signal test circuit is simplified.
For example, the RF transceiver chip has 8 test signal lines and the signal line on the chipThe input ends of the signal gating circuits are connected one by one. The microprocessor can be configured in a binary manner when configuring the first register, 23And 8, the microprocessor configures three digits for the first register, so that the output selection of 8 test signal lines can be realized. If the first test signal line is communicated to the output end of the signal gating circuit, the microprocessor needs to configure '001' for the first register, and the first register outputs '001' to the signal gating circuit so that the signal gating circuit communicates the first test signal line to the output end of the signal gating circuit.
More specifically, the capsule endoscope system comprises a capsule endoscope and a data recorder, wherein a radio frequency transceiver chip in the capsule endoscope can wirelessly transmit data with an external data recorder, and the data recorder can also interact data with an upper computer. The process of issuing the test instruction to the radio frequency transceiver chip may be as follows: and the user sends a test instruction to the data recorder through the upper computer. And after receiving the test instruction, the data recorder wirelessly sends the test instruction to the radio frequency transceiver chip.
As an alternative embodiment, the test chip further comprises an image sensor chip with a second register; the second register is connected with the microprocessor through a chip interface;
accordingly, the signal gating circuit 1 includes:
the first signal gating sub-circuit is arranged on the radio frequency transceiver chip, the input ends of the first signal gating sub-circuit are connected with the plurality of test signal lines on the radio frequency transceiver chip one by one, the control ends of the first signal gating sub-circuit are connected with the first register, and the first signal gating sub-circuit is provided with a single output end;
the second signal gating sub-circuit is arranged on the image sensor chip, the input ends of the second signal gating sub-circuit are connected with the plurality of test signal lines on the image sensor chip one by one, the control end of the second signal gating sub-circuit is connected with the second register, and the second signal gating sub-circuit is provided with a single output end;
the microprocessor is specifically configured to control the signal gating sub-circuit on the target test chip to communicate the test signal line corresponding to the target test signal to the single output end thereof by configuring the register on the target test chip when receiving a test instruction of a target test signal of the target test chip, so as to detect the target test signal; the target test chip is a radio frequency transceiver chip or an image sensor chip.
Further, the capsule type endoscope further comprises an image sensor chip, the image sensor chip can be used as a test chip for testing a chip signal, and a second register is included in the image sensor chip. Similarly, the image sensor chip selects the output test signal by means of the configuration register.
Based on this, a set of signal testing circuits is disposed on the rf transceiver chip, which includes a microprocessor, a first register and a first signal gating sub-circuit (the working principle of signal gating is described in the above embodiments, and is not described herein again). A set of signal testing circuit is also arranged on the image sensor chip and comprises a second register and a second signal gating sub-circuit; the second register is connected to the microprocessor on the rf transceiver chip through the chip interface, that is, the configuration of the second register is also completed by the microprocessor (the signal gating operation principle of the image sensor chip is the same as that of the rf transceiver chip, and details are not repeated herein).
As an alternative embodiment, the number of signal gating sub-circuits on the target test chip is equal to the maximum number of signals required to be detected simultaneously by the target test chip in the capsule endoscope joint debugging test;
correspondingly, the register on the target test chip comprises:
the sub-registers are connected with the signal gating sub-circuits on the target test chip one by one and configured by the microprocessor; wherein the test signals configured for the same signal gating sub-circuit are not detected simultaneously.
Furthermore, according to the working principle of the signal gating sub-circuits, only one test signal can be selected to output and detect the test signal corresponding to the same signal gating sub-circuit at the same time, and a plurality of test signals cannot be output and detected at the same time.
As an alternative embodiment, the test pin led out from the signal gating circuit 1 is multiplexed with the original functional pin on the test chip.
Further, considering that the capsule endoscope is in an inoperative state when performing chip signal testing, that is, an original functional pin on an inner chip of the capsule endoscope is in an idle state, a test pin led out from the signal gating circuit 1 on the test chip can be mutually multiplexed with the original functional pin on the test chip, specifically: when the capsule type endoscope works, the original function pins on the inner chip of the capsule type endoscope are used according to the original functions of the capsule type endoscope; when the capsule type endoscope is used for chip signal testing, the original functions of original function pins on a chip in the capsule type endoscope are shielded, and the multiplexing pins are used as the test pins led out from the output end of the signal gating circuit 1, so that the capsule type endoscope does not need to be additionally provided with the test pins outside the chip, and system design and hardware layout of the capsule type endoscope are facilitated.
The application also provides a capsule endoscope, which comprises an image sensor chip, a radio frequency transceiver chip and any chip signal test circuit.
For the introduction of the capsule endoscope provided by the present application, reference is made to the above-mentioned embodiment of the chip signal testing circuit, which is not described herein again.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (6)
1. A circuit for testing a chip signal, comprising:
the signal gating circuit is arranged on a test chip in the capsule endoscope, the input ends of the signal gating circuit are connected with a plurality of test signal lines on the test chip one by one, and the signal gating circuit is provided with a single output end;
the control circuit is arranged in the capsule endoscope and connected with the control end of the signal gating circuit, and is used for controlling the signal gating circuit to communicate a test signal line corresponding to a target test signal to a single output end of the signal gating circuit when receiving a test instruction of the target test signal so as to detect the target test signal.
2. The chip signal test circuit of claim 1, wherein the test chip comprises a radio frequency transceiver chip with a microprocessor and a first register;
correspondingly, the control circuit comprises:
a first register coupled to the signal gating circuit;
and the microprocessor is connected with the first register and used for controlling the signal gating circuit to connect a test signal line corresponding to a target test signal to a single output end of the signal gating circuit by configuring the first register when receiving a test instruction of the target test signal of the radio frequency transceiver chip so as to detect the target test signal.
3. The chip signal test circuit of claim 2, wherein the test chip further comprises an image sensor chip with a second register; the second register is connected with the microprocessor through a chip interface;
accordingly, the signal gating circuit includes:
the first signal gating sub-circuit is arranged on the radio frequency transceiver chip, the input ends of the first signal gating sub-circuit are connected with the plurality of test signal lines on the radio frequency transceiver chip one by one, the control ends of the first signal gating sub-circuit are connected with the first register, and the first signal gating sub-circuit is provided with a single output end;
the second signal gating sub-circuit is arranged on the image sensor chip, input ends of the second signal gating sub-circuit are connected with a plurality of test signal lines on the image sensor chip one by one, control ends of the second signal gating sub-circuit are connected with the second register, and the second signal gating sub-circuit is provided with a single output end;
the microprocessor is specifically configured to, when receiving a test instruction of a target test signal of a target test chip, control a signal gating sub-circuit on the target test chip to connect a test signal line corresponding to the target test signal to a single output end of the signal gating sub-circuit by configuring a register on the target test chip, so as to detect the target test signal; wherein the target test chip is the radio frequency transceiver chip or the image sensor chip.
4. The chip signal test circuit according to claim 3, wherein the number of signal gating sub-circuits on the target test chip is equal to the maximum number of signals required to be detected simultaneously by the target test chip in the capsule endoscope joint debugging test;
correspondingly, the register on the target test chip comprises:
the sub-registers are connected with the signal gating sub-circuits on the target test chip one by one and configured by the microprocessor; wherein the test signals configured for the same signal gating sub-circuit are not detected simultaneously.
5. The chip signal test circuit according to any one of claims 1 to 4, wherein the test pin led out by the signal gating circuit is multiplexed with the original functional pin on the test chip.
6. A capsule endoscope comprising an image sensor chip and a radio-frequency transceiver chip, further comprising a chip signal test circuit according to any one of claims 1 to 5.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110032965.9A CN112858879A (en) | 2021-01-11 | 2021-01-11 | Chip signal test circuit and capsule type endoscope |
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| CN202110032965.9A CN112858879A (en) | 2021-01-11 | 2021-01-11 | Chip signal test circuit and capsule type endoscope |
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Cited By (1)
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| CN113702801A (en) * | 2021-07-09 | 2021-11-26 | 苏州浪潮智能科技有限公司 | Signal measurement method and device of chip and related assembly |
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