CN112988495A - Multifunctional test method, device and system for SOC chip multiplex pin - Google Patents
Multifunctional test method, device and system for SOC chip multiplex pin Download PDFInfo
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- CN112988495A CN112988495A CN202110264266.7A CN202110264266A CN112988495A CN 112988495 A CN112988495 A CN 112988495A CN 202110264266 A CN202110264266 A CN 202110264266A CN 112988495 A CN112988495 A CN 112988495A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
Abstract
The invention discloses a multifunctional test method, a device and a system for a multiplexing pin of an SOC (system on chip). The method comprises the steps of correspondingly configuring a first port state and a pin state according to a function to be tested, selecting a corresponding communication protocol, executing a corresponding software test code to test, and generating test information according to a test signal. The device comprises an instruction receiving module, a function testing module and a testing report module. The system comprises an external control board, a platform board to be tested, an automatic test board and external equipment, wherein the automatic test board comprises the device. The method, the device and the system not only realize the automatic test of any function to be tested by automatically bridging the platform board to be tested and the external equipment, but also realize the automatic switching test of a plurality of functions to be tested by sequentially sending a plurality of function test instructions through the external control board.
Description
Technical Field
The invention relates to the field of automatic test of SOC chip multiplex pins, in particular to a multifunctional test method, a multifunctional test device and a multifunctional test system of the SOC chip multiplex pins.
Background
At present, system development based on an SOC chip is related to design and verification work on a development board, pins of the SOC chip are usually multiplexed into a plurality of different groups of functions, if the multiplexed functions are to be realized on the development board, a signal coming out of the same pin needs to be added with an analog switch or a jumper cap to jump to a corresponding functional module, and the current chip pins often have a plurality of multiplexed functions.
In the prior art, development board design only considers configuring pins of the SOC chip as one of the commonly used fixed functions. If other functions are to be verified, the development board can only be redesigned or redesigned in a flying wire manner, or even no other functional tests can be made. In addition, new functions are required to be developed frequently in product requirements, and related software functions need to be verified every time a version of software is upgraded, so that the correctness of software function implementation is guaranteed. Once the software is changed or upgraded, the test and verification are required once. The current solution is that hardware engineers participate in testing, and for the hardware function that the software upgrading function module involves, every partial function module carries out manual test verification, results in on the one hand that there are a large amount of repeated tests to do like this, and the time schedule is slower, and on the other hand needs to consume a large amount of operating time of engineers, crowds the research and development resource that occupies the company.
Therefore, there is an urgent need in the current market for a multifunctional test method, device and system for multiplexing pins of an SOC chip, so as to solve the above problems in the prior art.
Disclosure of Invention
In view of the above technical problems, an object of the present invention is to provide a method, an apparatus, and a system for multifunctional testing of multiplexing pins of an SOC chip, which can achieve automatic testing of multiplexing functions, improve testing efficiency, and reduce investment of labor and time costs.
The invention provides a multifunctional test method for a multiplexing pin of an SOC chip, which comprises the following steps: receiving a function test instruction sent by an external control board; wherein, the function test instruction comprises: the function test case corresponds to the function to be tested, and comprises respective first port states of a plurality of first input/output ports; according to a preset state mapping table and the function test instruction, performing function configuration on the plurality of first input/output ports; the first input/output ports are respectively in communication connection with the multiplexing pins of the platform board to be tested and external equipment; the state mapping table comprises first marks of a plurality of first input/output ports, first port states corresponding to the first marks and function configurations corresponding to the first port states; according to different communication protocols, carrying out self-adaptive transmission on interactive data between the platform board to be tested and the external equipment; the interactive data is generated by the platform board to be tested and the external equipment according to the function to be tested; after the interaction between the platform board to be tested and the external equipment is completed, receiving test information corresponding to the function to be tested, which is fed back by the platform board to be tested; and sending the test information to the external control board to complete the test of the platform board to be tested on the function to be tested.
In an embodiment, the adaptively transmitting the interactive data between the platform board to be tested and the external device according to different communication protocols specifically includes: receiving a first test signal sent by the platform board to be tested, calling a corresponding protocol processing module code according to the state mapping table so as to select a first protocol, converting the first test signal according to the first protocol, and sending the converted first test signal to the external equipment; and receiving a second test signal sent by the external equipment, calling a corresponding protocol processing module code according to the state mapping table so as to select a second protocol, converting the second test signal according to the second protocol, and sending the converted second test signal to the platform board to be tested.
In one embodiment, the platform board to be tested sends a first test signal, specifically: the platform board to be tested receives a configuration execution instruction about the current function to be tested, which is sent by the external control board, and performs function configuration on a plurality of multiplexing pins of the platform board to be tested according to the configuration execution instruction and the state mapping table, and executes corresponding software function test codes, thereby generating and sending the first test signal; the configuration execution instruction comprises respective pin state configurations of a plurality of multiplexing pins of the platform board to be tested.
In one embodiment, the external device sends the second test signal, specifically: the external device receives the converted first test signal, and performs response feedback on the converted first test signal, thereby generating and transmitting a second test signal.
In one embodiment, the feeding back the test information by the platform board to be tested according to the converted second test signal specifically includes: and the platform board to be tested receives the converted second test signal and executes the corresponding software function test code by taking the second test signal as a parameter, thereby acquiring and feeding back test information.
The invention also provides a multifunctional test method for the multiplexing pin of the SOC chip, which comprises the following steps: sequentially receiving N function test instructions sent by an external control board, and sequentially testing N functions to be tested according to the multifunctional test method of the SOC multiplexing pin, thereby respectively obtaining N test information corresponding to the N functions to be tested one by one; wherein, one function to be tested corresponds to one function test instruction; and when the external control board receives the N pieces of test information, automatically generating a test report.
The invention also provides a multifunctional test device for the multiplexing pins of the SOC chip, which comprises a receiving module, an automatic bridging module and a result output module, wherein the receiving module is used for receiving the function test instruction sent by an external control board, receiving the interactive data between the platform board to be tested and the external equipment and receiving the test information corresponding to the function to be tested, which is fed back by the platform board to be tested; wherein, the function test instruction comprises: the function test case corresponds to the function to be tested, and comprises respective first port states of a plurality of first input/output ports; the first input/output ports are respectively in communication connection with the multiplexing pins of the platform board to be tested and external equipment; the state mapping table comprises first marks of a plurality of first input/output ports, first port states corresponding to the first marks and function configurations corresponding to the first port states; the automatic bridging module is used for carrying out function configuration on the plurality of first input/output ports according to a preset state mapping table and the function test instruction; according to different communication protocols, carrying out self-adaptive transmission on the interactive data between the platform board to be tested and the external equipment; the result output module is used for sending the test information to the external control board.
In one embodiment, the automatic bridge module is configured to perform adaptive transmission on interaction data between the platform board to be tested and the external device according to different communication protocols, specifically: the automatic bridging module calls a corresponding protocol processing module code according to a first test signal of the platform board to be tested and the state mapping table so as to select a first protocol, converts the first test signal according to the first protocol and sends the converted first test signal to the external equipment; the automatic bridging module also calls a corresponding protocol processing module code according to a second test signal sent by the external equipment and the state mapping table so as to select a second protocol, converts the second test signal according to the second protocol, and sends the converted second test signal to the platform board to be tested.
The invention also provides a multifunctional test device of the multiplexing pin of the SOC chip, which comprises an instruction receiving module, a function test module and a test report module, wherein the instruction receiving module is used for sequentially receiving N function test instructions sent by an external control board; the function testing module comprises the multifunctional testing device for the SOC chip multiplexing pin, and is used for sequentially testing N functions to be tested according to the multifunctional testing method for the SOC chip multiplexing pin, so that N pieces of testing information corresponding to the N functions to be tested one by one are respectively obtained; wherein, one function to be tested corresponds to one function test instruction; the test report module is used for automatically generating a test report after the external control board receives the N pieces of test information.
The invention also provides a multifunctional test system of the multiplexing pin of the SOC chip, which comprises an external control board, a platform board to be tested, an automatic test board and external equipment, wherein the external control board is respectively in communication connection with the platform board to be tested and the automatic test board; the automatic test board is used for sequentially receiving N function test instructions sent by an external control board and sequentially testing N functions to be tested according to the multifunctional test method of the SOC chip multiplexing pins, so that N pieces of test information corresponding to the N functions to be tested one by one are respectively obtained; wherein, one function to be tested corresponds to one function test instruction; the external control board is used for sequentially sending N functional test instructions to the automatic test board and automatically generating a test report after receiving the N test information.
Compared with the prior art, the embodiment of the invention has the following beneficial effects:
the invention provides a multifunctional test method, a device and a system for an SOC chip multiplexing pin, which not only realize the automatic test of any function to be tested by automatically bridging a platform board to be tested and external equipment, but also realize the automatic switching test of a plurality of functions to be tested by sequentially sending a plurality of function test instructions through an external control board by correspondingly configuring a first port state and a pin state according to the function to be tested, selecting a corresponding communication protocol and then executing a corresponding software test code to test and generating test information according to a test signal.
Drawings
The invention will be further described with reference to the accompanying drawings, in which:
FIG. 1 illustrates a flow diagram of one embodiment of a method for multi-functional testing of SOC chip multiplexing pins in accordance with the present invention;
FIG. 2 illustrates a flow diagram of one embodiment of a method for multi-functional testing of SOC chip mux pins, in accordance with the present invention;
FIG. 3 is a block diagram illustrating one embodiment of a multi-functional test apparatus for multiplexing pins of an SOC chip according to the present invention;
FIG. 4 is a block diagram illustrating one embodiment of a multi-functional test apparatus for multiplexing pins of an SOC chip according to the present invention;
FIG. 5 illustrates a block diagram of one embodiment of a multi-functional test system for multiplexing pins for an SOC chip, according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Detailed description of the preferred embodiment
According to the flow chart of one embodiment of the multifunctional test method for the SOC chip multiplex pin, the method comprises the following steps:
and S1, receiving a function test command sent by the external control board.
The process of testing the function to be tested is started by the external control board, and after a function test instruction sent by the external control board is received, the test of the function to be tested is started. When different functions to be tested are tested, the first states of the first input/output ports are different, and the respective first states of the first input/output ports need to be configured through a function test instruction. Thus, the functional test instructions include: and the function test case corresponds to the function to be tested and comprises the first port states of the first input and output ports.
And S2, performing function configuration on the plurality of first input/output ports according to a preset state mapping table and the function test instruction.
The respective first port states of the plurality of first input/output ports included in the functional test instruction can be acquired by receiving the functional test instruction, so that the plurality of first input/output ports can be configured functionally according to the plurality of acquired first port states and a preset state mapping table. The state mapping table comprises first marks of a plurality of first input/output ports, first port states corresponding to the first marks and function configurations corresponding to the first port states; the first input/output ports are respectively in communication connection with the multiplexing pins of the platform board to be tested and external equipment so as to carry out signal transmission subsequently.
And S3, carrying out self-adaptive transmission on the interactive data between the platform board to be tested and the external equipment according to different communication protocols.
Because the port states, the multiplex pin configurations and the external devices corresponding to different functions to be tested are different, when the functions to be tested are tested, the connection structure, the interaction process and the interaction signals between the platform board to be tested and the external devices are different, and meanwhile, the communication protocols used by the different interaction signals are different. Therefore, in the process of adaptively transmitting the interactive data between the platform board to be tested and the external device, the interactive data needs to be analyzed according to the communication protocol corresponding to the interactive data, and the port input, output and bidirectional port characteristics are changed in time, so that the adaptive transmission of the interactive data of different protocols is realized, that is, the platform board to be tested can automatically bridge the external device.
In one embodiment, the adaptive transmission of the interactive data between the platform board to be tested and the external device is performed by the following steps: receiving a first test signal sent by the platform board to be tested, calling a corresponding protocol processing module code according to the state mapping table so as to select a first protocol, converting the first test signal according to the first protocol, and sending the converted first test signal to the external equipment; and receiving a second test signal sent by the external equipment, calling a corresponding protocol processing module code according to the state mapping table so as to select a second protocol, converting the second test signal according to the second protocol, and sending the converted second test signal to the platform board to be tested.
In the above process, the platform board to be tested receives the configuration execution instruction about the current function to be tested sent by the external control board, and performs function configuration on the multiplexing pins of the platform board to be tested according to the configuration execution instruction and the state mapping table, and executes the corresponding software function test code, thereby generating and sending the first test signal. The external equipment receives the converted first test signal, and performs response feedback on the converted first test signal, so as to generate and send a second test signal.
The configuration execution instruction comprises respective pin state configurations of a plurality of multiplexing pins of the platform board to be tested.
And S4, after the platform board to be tested and the external equipment are interacted, receiving test information corresponding to the function to be tested, which is fed back by the platform board to be tested.
And the platform board to be tested receives the converted second test signal and executes the corresponding software function test code by taking the second test signal as a parameter, thereby acquiring and feeding back test information.
And S5, sending the test information to the external control board.
The embodiment provides a multifunctional test method for multiplexing pins of an SOC chip, which is characterized in that a first port state and a pin state are correspondingly configured according to a function to be tested, a corresponding communication protocol is selected, then a corresponding software test code is executed for testing, and test information is generated according to a test signal.
Detailed description of the invention
FIG. 2 shows a flow diagram of one embodiment of a method for multi-functional testing of multiplexing pins of an SOC chip, the method comprising the steps of:
and SS1 for receiving N function test commands sent by the external control board in turn.
When N functions to be tested exist, the external control board can control the sequential process of the N function testing processes. Specifically, when a certain function to be tested is tested, a function test instruction corresponding to the function to be tested and sent by the external control board is received, and after the function to be tested is tested, the external control board automatically and sequentially sends a function test instruction corresponding to the next function to be tested of the function to be tested, so that a new round of function test for the next function to be tested is started.
And SS2, sequentially testing the N functions to be tested according to the multifunctional test method for the multiplexing pin of the SOC chip, thereby respectively obtaining N test information corresponding to the N functions to be tested one by one.
When each function test instruction is received, according to the function test instruction, the function to be tested corresponding to the function test instruction is tested by the multi-functional test method of the SOC chip multiplexing pin, test information corresponding to the function to be tested is obtained, and the test information is sent to an external control board. And (4) receiving a next functional test instruction every time when the test of the function to be tested is finished, and repeating the step to perform a new round of test.
And SS3, when the external control board receives the N test messages, automatically generating a test report.
And after the external control board receives the N pieces of test information, automatically summarizing all the test information, and generating a test report according to all the test information for final feedback.
The embodiment provides a multifunctional test method for multiplexing pins of an SOC chip, which is characterized in that a first port state and a pin state are correspondingly configured according to a function to be tested, a corresponding communication protocol is selected, then a corresponding software test code is executed for testing, and test information is generated according to a test signal.
Detailed description of the preferred embodiment
In addition to the above method, the present invention also provides a multifunctional test apparatus 11 for multiplexing pins of an SOC chip, and fig. 3 shows a structural diagram of an embodiment of the multifunctional test apparatus for multiplexing pins of an SOC chip according to the present invention. The apparatus 11 includes a receiving module 111, an automatic bridging module 112, and a result output module 113.
The receiving module 111 is configured to receive a function test instruction sent by an external control board, receive interaction data between the platform board to be tested and the external device, and receive test information corresponding to the function to be tested and fed back by the platform board to be tested. Wherein, the function test instruction comprises: and the function test case corresponds to the function to be tested and comprises the first port states of the first input and output ports. The first input/output ports are respectively in communication connection with the multiplexing pins of the platform board to be tested and external equipment. The state mapping table includes respective first flags for the plurality of first input-output ports, a first port state corresponding to each first flag, and a functional configuration corresponding to each first port state.
The automatic bridging module 112 is configured to perform function configuration on the plurality of first input/output ports according to a preset state mapping table and the function test instruction; and according to different communication protocols, carrying out self-adaptive transmission on the interactive data between the platform board to be tested and the external equipment.
In order to get rid of the traditional manual testing mode and realize automatic testing, besides configuring hardware ports, overcoming communication barriers between different ports is also one of the problems that must be solved. The automatic bridge module 112 is configured to implement automatic testing, and the platform board to be tested and one or more external devices (or functional test modules) implement automatic bridging through the automatic bridge module 112, so that the platform board to be tested can access the external devices (or functional test modules) through the automatic bridge module 112 for performing functional testing.
The result output module 113 is used to send the test information to the external control board.
In one embodiment, the receiving module 111 receives a function test instruction from an external control board and sends the function test instruction to the automatic bridging module 112, and the automatic bridging module 112 performs function configuration on the plurality of first input/output ports according to the function test instruction and a preset state mapping table, so that the configuration of the plurality of first input/output ports meets the requirement of testing the function to be tested; subsequently, the receiving module 111 receives the interactive data between the platform board to be tested and the external device (or the function testing module) and sends the interactive data to the automatic bridging module 112, and the automatic bridging module 112 transparently transmits the interactive data according to a corresponding communication protocol so that the platform board to be tested can smoothly access the external device to test the function to be tested; after the test is completed, the platform board to be tested sends the test information to the result output module 113, and the result output module 113 sends the test information to the external control board.
The embodiment provides a multifunctional testing device for multiplexing pins of an SOC chip, which is used for automatically testing functions to be tested by correspondingly configuring a first port state and a pin state according to the functions to be tested, selecting a corresponding communication protocol, executing corresponding software testing codes to test and generating testing information according to testing signals.
Detailed description of the invention
FIG. 4 is a block diagram illustrating one embodiment of a multi-functional test apparatus for multiplexing pins of an SOC chip according to the present invention. As shown, the apparatus 12 includes an instruction receiving module 121, a function testing module 122, and a test reporting module 123, wherein,
the instruction receiving module 121 is configured to sequentially receive N function test instructions sent by the external control board.
The function testing module 122 includes the aforementioned multifunctional testing apparatus for SOC chip multiplexing pins, and is configured to sequentially test the N functions to be tested according to the aforementioned multifunctional testing method for SOC chip multiplexing pins, so as to obtain N pieces of testing information corresponding to the N functions to be tested one by one, respectively. Wherein, a function to be tested corresponds to a function test instruction.
The test report module 123 is configured to automatically generate a test report after the external control board receives the N test messages.
In one embodiment, the external control board sends a function test instruction about a function to be tested to the instruction receiving module 121, the instruction receiving module 121 sends the function test instruction to the function testing module 122, the function testing module 122 tests the function to be tested according to the function test instruction and the multifunctional testing method of the SOC chip multiplexing pin as described above, and sends test information to the external control board after the test is completed, then the external control board sends a function test instruction of the next function to be tested to the instruction receiving module 121, the above steps are repeated to perform a new round of function test, after N rounds of tests are performed and the test reporting module 123 receives N test information, all test information is automatically summarized, and a test report is generated according to all test information.
The embodiment provides a multifunctional testing device for multiplexing pins of an SOC chip, which is characterized in that a first port state and a pin state are correspondingly configured according to functions to be tested, a corresponding communication protocol is selected, then a corresponding software testing code is executed to test and test information is generated according to a testing signal.
Detailed description of the preferred embodiment
Besides the above devices, the present invention also provides a multifunctional test system 1 for multiplexing pins of an SOC chip. FIG. 5 illustrates a block diagram of one embodiment of a multi-functional test system for multiplexing pins for an SOC chip, according to the present invention. This system 1 includes external control panel 13, the landing slab 14 that awaits measuring, automatic test board 15 and external equipment 16, this external control panel 13 respectively with the landing slab 14 that awaits measuring, automatic test board 15 communication connection, this landing slab 14 that awaits measuring is through this automatic test board 15 communication connection to this external equipment 16.
The automatic test board 15 includes a multi-functional test device for multiplexing pins of the SOC chip as described above. The automatic test board 15 is configured to sequentially receive the N function test instructions sent by the external control board 13, and sequentially test the N functions to be tested according to the multifunctional test method for the SOC chip multiplexing pin, so as to obtain N test information corresponding to the N functions to be tested one to one. Wherein, a function to be tested corresponds to a function test instruction. The external control board 13 is configured to sequentially send N functional test instructions to the automatic test board 15, and automatically generate a test report after receiving the N test information.
In one embodiment, the external control board 13 starts a function test process of a function to be tested by sending a function test command corresponding to the function to be tested to the automatic test board 15 and simultaneously sending a configuration execution command corresponding to the function to be tested to the platform board 14 to be tested. The automatic switching control of the test process is realized by controlling the automatic test board 15 through the external control board 13: the state bit signal of the output port of the external control panel is sent to the automatic test board 15, the automatic test board 15 detects the IO state bit, and the firmware built in the automatic test board 15 calls the corresponding communication protocol module to transparently transmit the information.
The connection form between the platform board 14 to be tested and the automatic test board 15 has two types: a) the pins of the platform board 14 to be tested having the same function are communicatively connected to the external device 16 through the automatic test board 15. For example, a pin of the platform board 14 to be tested having a plurality of SDIO _ D0 (data D0 signals of an SDIO interface) functions is connected to an input pin of the automatic test board 15, the automatic test board 15 transparently transmits information of one of the connected pins to another output pin according to the port state, so that the information is transparently transmitted to an SDIO device connected to the output pin, a working state bit realizes transparent transmission of a pair of signal lines, and a plurality of working state bits can realize transparent transmission of information of a plurality of signal pins on the platform board 14 to be tested to one signal pin of a device on the automatic test board, similar to the function of a switch with one more select; b) a pin of the platform board 14 to be tested can also realize information transmission through the automatic test board 15 and a plurality of devices, and the function similar to that of a switch for selecting multiple switches.
After receiving the function test instruction, the automatic test board 15 performs function configuration on the plurality of first input/output ports according to a preset state mapping table and the function test instruction; after receiving the configuration execution instruction, the platform board to be tested configures the corresponding multiplexing pin according to the configuration execution instruction and the preset state mapping table, and executes the corresponding software function test code to generate a first test signal and send the first test signal to the automatic test board 15. The automatic test board 15 receives the first test signal sent by the platform board 14 to be tested, calls the corresponding protocol processing module code according to the state mapping table to select the first protocol, converts the first test signal according to the first protocol, and sends the converted first test signal to the external device 16. After receiving the converted first test signal, the external device 16 performs response feedback on the converted first test signal, thereby generating and transmitting a second test signal to the automatic test board 15. The automatic test board 15 receives the second test signal sent by the external device 16, calls the corresponding protocol processing module code according to the state mapping table to select the second protocol, converts the second test signal according to the second protocol, and sends the converted second test signal to the platform board 15 to be tested. The platform board 15 to be tested receives the converted second test signal, and executes the corresponding software function test code with the second test signal as a parameter, thereby acquiring and feeding back the test information to the external control board 13. The external control board 13 automatically generates a test report after receiving the N test messages.
The embodiment provides a multifunctional test system for multiplexing pins of an SOC chip, which is characterized in that a first port state and a pin state are correspondingly configured according to functions to be tested, a corresponding communication protocol is selected, then a corresponding software test code is executed to test and generate test information according to a test signal, the system not only realizes automatic test of any function to be tested by automatic bridging of a platform board to be tested and external equipment, but also realizes automatic switching test of a plurality of functions to be tested by sequentially sending a plurality of function test instructions through an external control board.
The above embodiments are provided to further explain the objects, technical solutions and advantages of the present invention in detail, and it should be understood that the above embodiments are only examples of the present invention and are not intended to limit the scope of the present invention. It should be understood that any modifications, equivalents, improvements and the like, which come within the spirit and principle of the invention, may occur to those skilled in the art and are intended to be included within the scope of the invention.
Claims (10)
1. A multifunctional test method for multiplexing pins of an SOC chip is characterized by comprising the following steps:
receiving a function test instruction sent by an external control board; wherein the functional test instructions include: the function test case corresponds to the function to be tested, and comprises respective first port states of a plurality of first input/output ports;
performing function configuration on the plurality of first input/output ports according to a preset state mapping table and the function test instruction; the first input/output ports are respectively in communication connection with the multiplexing pins of the platform board to be tested and external equipment; the state mapping table comprises first marks of a plurality of first input/output ports, first port states corresponding to the first marks and function configurations corresponding to the first port states;
according to different communication protocols, carrying out self-adaptive transmission on interactive data between the platform board to be tested and the external equipment; the interactive data are respectively generated by the platform board to be tested and the external equipment according to the function to be tested;
after the interaction between the platform board to be tested and the external equipment is completed, receiving test information corresponding to the function to be tested, which is fed back by the platform board to be tested;
and sending the test information to the external control board to complete the test of the platform board to be tested on the function to be tested.
2. The multifunctional test method for the multiplexing pin of the SOC chip according to claim 1, wherein the adaptive transmission of the interactive data between the platform board to be tested and the external device is performed according to different communication protocols, specifically:
receiving a first test signal sent by the platform board to be tested, calling a corresponding protocol processing module code according to the state mapping table so as to select a first protocol, converting the first test signal according to the first protocol, and sending the converted first test signal to the external equipment;
and receiving a second test signal sent by the external equipment, calling a corresponding protocol processing module code according to the state mapping table so as to select a second protocol, converting the second test signal according to the second protocol, and sending the converted second test signal to the platform board to be tested.
3. The multifunctional test method for the multiplexing pin of the SOC chip according to claim 2, wherein the platform board to be tested sends a first test signal, specifically:
the platform board to be tested receives a configuration execution instruction about the current function to be tested, which is sent by the external control board, and performs function configuration on a plurality of multiplexing pins of the platform board to be tested according to the configuration execution instruction and the state mapping table, and executes corresponding software function test codes, so as to generate and send the first test signal; the configuration execution instruction comprises respective pin state configurations of a plurality of multiplexing pins of the platform board to be tested.
4. The multifunctional test method for the multiplexing pin of the SOC chip according to claim 3, wherein the external device sends a second test signal, specifically:
and the external equipment receives the converted first test signal and performs response feedback on the converted first test signal so as to generate and send a second test signal.
5. The multifunctional test method for the multiplexing pin of the SOC chip according to any one of claims 1 to 4, wherein the platform board to be tested feeds back test information according to the converted second test signal, specifically:
and the platform board to be tested receives the converted second test signal and executes the corresponding software function test code by taking the second test signal as a parameter, so as to acquire and feed back test information.
6. A multifunctional test method for multiplexing pins of an SOC chip is characterized by comprising the following steps:
sequentially receiving N function test instructions sent by an external control board;
the multifunctional test method for the multiplexing pin of the SOC chip according to any one of claims 1-5, wherein N functions under test are tested in sequence, so as to obtain N test information corresponding to the N functions under test one by one; wherein, one function to be tested corresponds to one function test instruction;
and when the external control board receives the N pieces of test information, automatically generating a test report.
7. The multifunctional test device for the multiplexing pins of the SOC chip is characterized by comprising a receiving module, an automatic bridging module and a result output module, wherein,
the receiving module is used for receiving a function test instruction sent by an external control board, receiving interactive data between the platform board to be tested and the external equipment, and receiving test information corresponding to the function to be tested, which is fed back by the platform board to be tested; wherein the functional test instructions include: the function test case corresponds to the function to be tested, and comprises respective first port states of a plurality of first input/output ports; the first input/output ports are respectively in communication connection with the multiplexing pins of the platform board to be tested and external equipment; the state mapping table comprises first marks of a plurality of first input/output ports, first port states corresponding to the first marks and function configurations corresponding to the first port states;
the automatic bridging module is used for carrying out function configuration on the plurality of first input/output ports according to a preset state mapping table and the function test instruction; according to different communication protocols, carrying out self-adaptive transmission on the interactive data between the platform board to be tested and the external equipment;
and the result output module is used for sending the test information to the external control board.
8. The multifunctional test device for the multiplexing pin of the SOC chip according to claim 7, wherein the automatic bridging module is configured to adaptively transmit the interactive data between the platform board to be tested and the external device according to different communication protocols, specifically:
the automatic bridging module calls a corresponding protocol processing module code according to a first test signal of the platform board to be tested and the state mapping table so as to select a first protocol, converts the first test signal according to the first protocol and sends the converted first test signal to the external equipment;
the automatic bridging module calls a corresponding protocol processing module code according to a second test signal sent by the external equipment and the state mapping table so as to select a second protocol, converts the second test signal according to the second protocol, and sends the converted second test signal to the platform board to be tested.
9. A multifunctional test device for multiplexing pins of an SOC chip is characterized by comprising an instruction receiving module, a functional test module and a test report module, wherein,
the instruction receiving module is used for sequentially receiving N function test instructions sent by the external control panel;
the function testing module comprises the multi-function testing device for the SOC chip multiplexing pin as claimed in claim 7 or 8, and is used for sequentially testing N functions to be tested according to the multi-function testing method for the SOC chip multiplexing pin as claimed in any one of claims 1 to 5, so as to respectively obtain N pieces of testing information corresponding to the N functions to be tested one by one; wherein, one function to be tested corresponds to one function test instruction;
and the test report module is used for automatically generating a test report after the external control board receives the N test information.
10. A multifunctional test system for multiplexing pins of an SOC chip is characterized by comprising an external control board, a platform board to be tested, an automatic test board and external equipment, wherein the external control board is respectively in communication connection with the platform board to be tested and the automatic test board, the platform board to be tested is in communication connection with the external equipment through the automatic test board,
the automatic test board comprises a multifunctional test device of the SOC chip multiplexing pin of claim 9; the automatic test board is used for sequentially receiving N function test instructions sent by an external control board and sequentially testing N functions to be tested according to the multifunctional test method for the SOC chip multiplexing pins as claimed in any one of claims 1 to 5, so that N pieces of test information corresponding to the N functions to be tested one by one are respectively obtained; wherein, one function to be tested corresponds to one function test instruction;
and the external control board is used for sequentially sending N functional test instructions to the automatic test board and automatically generating a test report after receiving the N test information.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113568847A (en) * | 2021-09-22 | 2021-10-29 | 苏州浪潮智能科技有限公司 | Network card and processor interconnection device and server |
| CN113702801A (en) * | 2021-07-09 | 2021-11-26 | 苏州浪潮智能科技有限公司 | Signal measurement method and device of chip and related assembly |
| CN113740091A (en) * | 2021-08-18 | 2021-12-03 | 漳州众环科技股份有限公司 | Automatic test method for complete machine |
| CN114328068A (en) * | 2021-12-08 | 2022-04-12 | 中国人民解放军第六九O五工厂 | Novel burn and write and test integration device |
| CN114372002A (en) * | 2022-01-11 | 2022-04-19 | 上海移芯通信科技有限公司 | Automatic testing method, testing box and testing system |
| CN115061032A (en) * | 2022-06-14 | 2022-09-16 | 无锡华大国奇科技有限公司 | Function test method and device for multi-clock-domain chip |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015196578A1 (en) * | 2014-06-25 | 2015-12-30 | 深圳市中兴微电子技术有限公司 | Method and apparatus for pin multiplexing |
| CN106230431A (en) * | 2016-08-04 | 2016-12-14 | 浪潮电子信息产业股份有限公司 | A kind of pin multiplexing method and CPLD chip |
| CN110647485A (en) * | 2019-09-23 | 2020-01-03 | 大唐半导体科技有限公司 | Chip and implementation method for multiplexing pins thereof |
| CN111273154A (en) * | 2020-01-21 | 2020-06-12 | 浙江大华技术股份有限公司 | Pin multiplexing test trimming system, method, computer device and storage medium |
| CN112162894A (en) * | 2020-09-25 | 2021-01-01 | 展讯通信（上海）有限公司 | Chip and debugging subassembly, debug system thereof |
-
2021
- 2021-03-11 CN CN202110264266.7A patent/CN112988495B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015196578A1 (en) * | 2014-06-25 | 2015-12-30 | 深圳市中兴微电子技术有限公司 | Method and apparatus for pin multiplexing |
| CN106230431A (en) * | 2016-08-04 | 2016-12-14 | 浪潮电子信息产业股份有限公司 | A kind of pin multiplexing method and CPLD chip |
| CN110647485A (en) * | 2019-09-23 | 2020-01-03 | 大唐半导体科技有限公司 | Chip and implementation method for multiplexing pins thereof |
| CN111273154A (en) * | 2020-01-21 | 2020-06-12 | 浙江大华技术股份有限公司 | Pin multiplexing test trimming system, method, computer device and storage medium |
| CN112162894A (en) * | 2020-09-25 | 2021-01-01 | 展讯通信（上海）有限公司 | Chip and debugging subassembly, debug system thereof |
Non-Patent Citations (1)
| Title |
|---|
| TANGTANG_YUE: "学习STM32(2)-IO-AFIO(复用功能IO和调试配置)", 《CSDN》 * |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113702801A (en) * | 2021-07-09 | 2021-11-26 | 苏州浪潮智能科技有限公司 | Signal measurement method and device of chip and related assembly |
| CN113740091A (en) * | 2021-08-18 | 2021-12-03 | 漳州众环科技股份有限公司 | Automatic test method for complete machine |
| CN113568847A (en) * | 2021-09-22 | 2021-10-29 | 苏州浪潮智能科技有限公司 | Network card and processor interconnection device and server |
| CN113568847B (en) * | 2021-09-22 | 2021-12-21 | 苏州浪潮智能科技有限公司 | Network card and processor interconnection device and server |
| CN114328068A (en) * | 2021-12-08 | 2022-04-12 | 中国人民解放军第六九O五工厂 | Novel burn and write and test integration device |
| CN114328068B (en) * | 2021-12-08 | 2024-04-19 | 中国人民解放军第六九O五工厂 | Novel burn and write and test integration device |
| CN114372002A (en) * | 2022-01-11 | 2022-04-19 | 上海移芯通信科技有限公司 | Automatic testing method, testing box and testing system |
| CN114372002B (en) * | 2022-01-11 | 2023-08-18 | 上海移芯通信科技股份有限公司 | Automatic test method, test box and test system |
| CN115061032A (en) * | 2022-06-14 | 2022-09-16 | 无锡华大国奇科技有限公司 | Function test method and device for multi-clock-domain chip |
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