CN113690296A - Trench gate IGBT device and preparation method thereof - Google Patents

Trench gate IGBT device and preparation method thereof Download PDF

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Publication number
CN113690296A
CN113690296A CN202010425278.9A CN202010425278A CN113690296A CN 113690296 A CN113690296 A CN 113690296A CN 202010425278 A CN202010425278 A CN 202010425278A CN 113690296 A CN113690296 A CN 113690296A
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emitter
trench
layer
emitting
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方冬
肖魁
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CSMC Technologies Fab2 Co Ltd
CSMC Technologies Corp
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CSMC Technologies Fab2 Co Ltd
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Priority to CN202010425278.9A priority Critical patent/CN113690296A/en
Priority to PCT/CN2020/140599 priority patent/WO2021232810A1/en
Publication of CN113690296A publication Critical patent/CN113690296A/en
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    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
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    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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Abstract

The application relates to a trench gate IGBT device and a preparation method thereof, wherein the device comprises: the drift region, the body region, the first emitting region and the second emitting region are sequentially stacked; the grooves are distributed along the first direction, penetrate through the first emitter region and the body region and extend downwards into the drift region; the first dielectric layer is formed on the inner wall of the groove, the gate conductive layer is formed on the first dielectric layer and filled in the groove, and the second dielectric layer is formed on the gate conductive layer; the first emitting region and the second emitting region are connected and distributed along the second direction, and the first emitting region and the second emitting region which are positioned between two adjacent grooves are in contact with the side faces of the grooves adjacent to the two sides. The second emitting area is arranged in the first emitting area and penetrates through the first emitting area, the emitter layer is directly contacted with the first emitting area and the second emitting area, a conductive plug does not need to be arranged, the space occupied by the conductive plug in the prior art is saved, and therefore the density of the trench gate can be improved.

Description

Trench gate IGBT device and preparation method thereof
Technical Field
The invention relates to the field of semiconductors, in particular to a trench gate IGBT device and a preparation method of the trench gate IGBT device.
Background
In the fabrication of IGBTs, trench gates are typically formed to improve the integration and channel current density of the chip. The trench gate is formed by forming a trench in the body region and filling a gate structure in the trench. After the trench gate is formed, it is necessary to form two emitter regions of different conductivity types in the body region and to form an emitter layer electrically connected to each emitter region on the body region. The emitter layer needs to be electrically connected with the N-type emitter region and the P-type emitter region by means of the conductive plugs, and the conductive plugs need to occupy a certain device space, so that the further increase of the trench gate density is limited.
Disclosure of Invention
In order to solve the problems, a novel IGBT device and a preparation method thereof are provided.
The first solution proposed by the present application is:
a trench-gate IGBT device, comprising:
a drift region having a first conductivity type;
a body region having a second conductivity type formed on the drift region;
the first emitting region is provided with a first conductive type and is formed on the body region, a plurality of grooves which are distributed side by side along a first direction are formed in the first emitting region, and each groove sequentially penetrates through the first emitting region and the body region and extends to the drift region;
a second emitter region of a second conductivity type formed in a partial region of the first emitter region and penetrating the first emitter region to contact the body region, the first emitter region and the second emitter region being contiguously distributed along a second direction, the first emitter region and the second emitter region located between two adjacent trenches each contacting a side surface of the trench adjacent to both sides, the second direction being different from the first direction;
the gate structure comprises a first dielectric layer and a second dielectric layer, the first dielectric layer is formed on the inner wall of the groove, the gate conductive layer is formed on the first dielectric layer and filled in the groove, and the second dielectric layer is formed on the gate conductive layer;
and the emitter layer is formed on the first emitter region and the second emitter region, is in contact with the first emitter region and the second emitter region, and is separated from the gate conductive layer through the second dielectric layer.
In one embodiment, the top surface of the first emission region is flush with the top surface of the second emission region, and the bottom surface of the first emission region is flush with the bottom surface of the second emission region.
In one embodiment, the implantation depth of the first emission region and the implantation depth of the second emission region are both greater than the thickness of the second dielectric layer.
In one embodiment, a top surface of the second dielectric layer is flush with a top surface of the trench.
In one embodiment, the coverage area of the second emission region is smaller than the coverage area of the first emission region.
In one embodiment, a plurality of second emission regions arranged at intervals are formed in the first emission region between adjacent trenches, and the first emission regions and the second emission regions are alternately distributed in the second direction.
In one embodiment, the first emitting regions on both sides of the trench are provided with second emitting regions, and the first emitting regions and the second emitting regions on both sides of the trench are arranged in the same manner.
In one embodiment, the first emitting regions on both sides of the trench are provided with second emitting regions, and the first emitting regions and the second emitting regions on both sides of the trench are arranged in different manners.
In one embodiment, the same trench has opposite first and second sides, and in the first direction, a first emission region in contact with the first side is opposite to a second emission region in contact with the second side, and the second emission region in contact with the first side is opposite to the first emission region in contact with the second side.
A preparation method of a trench gate IGBT device comprises the following steps:
forming a drift region with a first conductivity type, wherein a plurality of grooves distributed side by side along a first direction are formed in the drift region;
forming a first dielectric layer on the inner wall of the groove, filling a gate conductive layer, and forming a second dielectric layer on the gate conductive layer;
forming a body region with a second conductivity type on the surface layer of the drift region by an ion implantation process, wherein the depth of the body region is less than that of the trench;
forming a first emitting region with a first conductivity type on the surface layer of the body region and forming a second emitting region with a second conductivity type in a partial region of the first emitting region by an ion implantation process, wherein the second emitting region penetrates through the first emitting region and is in contact with the body region, the first emitting region and the second emitting region are distributed in a connected mode along a second direction, the first emitting region and the second emitting region located between two adjacent trenches are in contact with the side faces of the trenches adjacent to two sides, and the second direction is different from the first direction;
and forming emitter layers on the first and second emission regions in direct contact with the first and second emission regions, wherein the emitter layers are isolated from the gate conductive layer by the second dielectric layer.
According to the IGBT device and the preparation method thereof, the second emitting area is positioned in the first emitting area and penetrates through the first emitting area to be contacted with the body area by changing the distribution mode of the first emitting area and the second emitting area, namely, the first emitting area and the second emitting area are distributed in a plane parallel to the top surface of the body area, at the moment, only the emitter layers are required to be directly formed on the first emitting area and the second emitting area, the emitter layers can be directly contacted with the first emitting area and the second emitting area, the conductive plugs are not required to be arranged, the space occupied by the conductive plugs in the prior art is saved, and the density of the trench gate can be improved. And because the second dielectric layer is formed on the gate conducting layer, the gate conducting layer and the emitter layer can be isolated through the second dielectric layer. Meanwhile, compared with the distribution mode that the first emitting region and the second emitting region are distributed along the first direction, the distribution mode that the first emitting region and the second emitting region between the grooves are connected and distributed along the second direction and are simultaneously contacted with the side faces of the grooves adjacent to the two sides can reduce the distance between the grooves, and therefore the groove gate density can be further improved.
Drawings
Fig. 1 is a schematic structural diagram of a trench gate IGBT device in an embodiment;
fig. 2a, fig. 3 and fig. 4 are schematic structural diagrams of a trench gate IGBT device without an emitter layer formed in different embodiments, respectively;
FIG. 2b is a schematic view illustrating a contact manner between the emitter layer and the first and second emitter regions according to an embodiment;
FIG. 5 is a schematic diagram of an embodiment of a gate layer distribution;
FIG. 6 is a flowchart illustrating steps of a method for manufacturing a trench gate IGBT device according to an embodiment;
fig. 7a to 7f are schematic structural diagrams corresponding to relevant steps of a manufacturing method of a corresponding trench gate IGBT device according to an embodiment.
Element number description:
a drift region: 100, respectively; body region: 110; emission region layer: 120 of a solvent; a buffer area: 130, 130; and a collector region: 140 of a solvent; a first emission region: 121, a carrier; a second emission region: 122; gate conductive layer: 210; the medium structure is as follows: 220, 220; a first dielectric layer: 221; a second dielectric layer: 222, c; groove gate: 200 of a carrier; a collector layer: 300, respectively; an emitter layer: 400, respectively; an active region: AA; peripheral area: w is added.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1, in an embodiment of the trench gate IGBT device, the body region 110 ' is located on the drift region 100 ', the drift region 100 ' is N-type, the body region 110 ' is P-type, and the P-type emitter region 122 ' and the N-type emitter region 121 ' are stacked on the body region 110 '. The trench gate 200 'penetrates the N-type emitter region 121' and the body region 110 'and extends into the drift region 100'. The emitter layer 400 'is formed over the N-type emitter region 121', and a conductive plug 410 'penetrating the N-type emitter region 121' and extending into the P-type emitter region 122 'is further formed between the adjacent trench gates 200'. The emitter layer 400 'is electrically connected to the P-type emitter region 122' and the N-type emitter region 121 'through the conductive plug 410'. In the conventional art, since the conductive plugs 410 'are required to be formed between the trench gates 210', the conductive plugs 410 'occupy a certain space, thereby limiting further reduction of the spacing between the trench gates 200', which is not favorable for increasing the trench gate density.
Based on this, the present application proposes a new trench gate IGBT device. As shown in fig. 2a and fig. 2b, the trench gate IGBT device in this application includes a drift region 100, a body region 110, a first emitter region 121 and a second emitter region 122, a trench, a gate conductive layer 210, a dielectric structure 220, and an emitter layer 400.
The drift region 100 has a first conductivity type, and specifically, the drift region 100 may be a wafer epitaxial layer of the first conductivity type. One surface defining the drift region 100 is a front surface, and the surface opposite to the front surface of the drift region 100 is a back surface.
The body region 110 has the second conductivity type and is formed on the front surface of the drift region 100. Specifically, the surface layer of the drift region 100 may be doped with the second conductivity type, so that the surface layer of the drift region 100 is changed from the first conductivity type to the second conductivity type, and the surface layer of the drift region 100 is changed to the body region 110 having the second conductivity type.
The first emission region 121 has a first conductivity type and is formed on the body region 110.
A plurality of trenches are formed in the first emitter region 121 and distributed side by side along a first direction, and each trench sequentially penetrates through the first emitter region 121 and the body region 110 and extends into the drift region 100, in an embodiment, the first direction is an X-axis direction shown in fig. 2 a.
The second emitter region 122 has the second conductive type and the doping concentration of the second emitter region 122 is higher than that of the body region 110, and the second emitter region 122 is formed in a partial region of the first emitter region 121 and penetrates the first emitter region 121 to contact the body region 110. The first emitting region 121 and the second emitting region 122 located between two adjacent trenches are connected and distributed along the second direction, the first emitting region 121 and the second emitting region located between two adjacent trenches are both in contact with the side surfaces of the trenches adjacent to both sides, that is, each trench has a side surface extending along the second direction, the first emitting region 121 is sandwiched between the adjacent trenches, the first emitting region 121 is respectively in contact with the trenches on both sides, the second emitting region 122 is also sandwiched between the adjacent trenches, and the second emitting region 122 is respectively in contact with the trenches on both sides. In one embodiment, the second direction is the Y-axis direction shown in fig. 2 a. In other embodiments, the second direction is different from the first direction, i.e. the angle between the first direction and the second direction is greater than 0 ° and less than 180 °. Optionally, the first direction and the second direction are perpendicular to each other. At this time, the first and second emission regions 121 and 122 constitute an emission region layer 120. As shown in fig. 2a, the drift region 100, the body region 110, and the emitter region layer 120 are located on a XY plane, and the drift region 100, the body region 110, and the emitter region layer 120 are sequentially stacked along the Z-axis direction. The first emission region 121 and the second emission region 122 are distributed in the XY plane.
A first dielectric layer 221 is formed on the inner wall of the trench, a gate conductive layer 210 is formed on the first dielectric layer 221 and filled in the trench, a second dielectric layer 222 is formed on the gate conductive layer 210, and the first dielectric layer 221 and the second dielectric layer 222 are connected with each other to form a dielectric structure 220 surrounding the gate conductive layer 210. It should be noted that all the dielectric layers formed on the inner wall of the trench are defined as the first dielectric layer 221, and the first dielectric layer 221 may only include one dielectric material or may include a plurality of dielectric materials, for example, the dielectric materials of the first dielectric layers 221 located at different positions may be the same or different. Similarly, all the dielectric layers above the gate conductive layer 210 are defined as the second dielectric layer 222, and the second dielectric layer 222 may only include one dielectric material or may include a plurality of dielectric materials, for example, the dielectric materials of the second dielectric layers 222 at different positions may be the same or different. In one embodiment, the first dielectric layer 221 may be specifically silicon oxide, or may be other materials with high dielectric constant. The gate conductive layer 210 may be polysilicon, or may be other material with good conductivity such as metal. The second dielectric layer 222 may be the same as or different from the first dielectric layer 221, and specifically, silicon nitride, silicon oxide, or the like may be used.
The emitter layer 400 is formed on the first and second emitter regions 121 and 122, that is, the emitter layer 400 is formed on the emitter region layer 120, and the bottom surface of the emitter layer 400 is directly contacted with the first and second emitter regions 121 and 122 without forming a conductive plug, and the emitter layer 400 is electrically isolated from the gate conductive layer 210 by the second dielectric layer 222.
Wherein the first conductivity type is opposite to the second conductivity type, for example, when the first conductivity type is N type, the second conductivity type is P type; when the first conductive type is N type, the second conductive type is P type.
It is understood that, as shown in fig. 2a or fig. 2b, the IGBT device further includes a gate layer (not shown), a collector region 140, and a collector layer 300 electrically connected to the collector region 140. Wherein the gate layer is electrically connected to the gate conductive layer 210 in the trench gate 200 to control the switching of the device. Wherein collector region 140 has the second conductivity type, collector region 140 is typically formed on the back side of drift region 100. In an embodiment, between the collector region 140 and the drift region 100, a buffer region 130 is further formed, the buffer region 130 has the first conductivity type and a doping concentration of the buffer region 130 is higher than a doping concentration of the drift region 100. The first emitter region 121, the second emitter region 122, the body region 110, the trench gate 200 and the drift region 100 form an MOS structure, the body region 110, the drift region 100, the buffer region 130 and the collector region 140 form a triode structure, and the on-off of the MOS structure can be controlled through the trench gate 200, so that the on-off of the IGBT is controlled.
In the trench gate IGBT device, the trench penetrates through the first emitter region 121 and the body region 110 and extends into the drift region 100, the first dielectric layer 221 is formed on the inner wall of the trench, the gate conductive layer 210 on the first dielectric layer 221 is filled in the trench, the first dielectric layer 221 sandwiched between the gate conductive layer 210 and the inner wall of the trench is a gate dielectric layer, the gate conductive layer 210 and the gate dielectric layer form a trench gate 200, and the on-off of the IGBT device is controlled by the trench gate 200.
Meanwhile, by changing the distribution mode of the first emitter region 121 and the second emitter region 122, the second emitter region is located in the first emitter region and penetrates through the first emitter region to be in contact with the body region, that is, the first emitter region 121 and the second emitter region 122 are distributed in a plane parallel to the top surface of the body region 110, at this time, the emitter layer 400 only needs to be directly formed on the first emitter region 121 and the second emitter region 122 to be in direct contact with the first emitter region 121 and the second emitter region 122, a conductive plug does not need to be arranged, and a space occupied by the conductive plug is omitted, so that the density of the trench gate 200 can be improved, and the device area is effectively reduced. And since the second dielectric layer 222 is formed on the gate conductive layer 210, the gate conductive layer 210 and the emitter layer 400 may be separated by the second dielectric layer 222. Meanwhile, the first emitter region 121 and the second emitter region 122 are connected and distributed along the side surface of the trench in the second direction, and compared with the distribution mode that the first emitter region 121 and the second emitter region 122 are distributed along the first direction, the distance between the trenches can be reduced, so that the density of the trench gate 200 can be further improved, and the current density of the trench can be further improved. Meanwhile, compared with the conventional technology in which the emitter layer 400 is electrically connected to the first emitter region 121 and the second emitter region 122 through the conductive plug, in the present application, the emitter layer 400 is directly contacted to the first emitter region 121 and the second emitter region 122, which can improve the electrical output capability of the device, reduce the power loss, and is more favorable for the heat dissipation of the device.
In an embodiment, the top surface of the first emission region 121 and the top surface of the second emission region 122 are flush, the bottom surface of the first emission region 121 and the bottom surface of the second emission region 122 are flush, and the thicknesses of the first emission region 121 and the second emission region 122 are the same or different. In a specific process, the first emitter region 121 and the second emitter region 122 are formed by doping the surface layer of the body region 110, and the thicknesses of the first emitter region 121 and the second emitter region 122 are the same, that is, the implantation depths of the first emitter region 121 and the second emitter region 122 are the same, so that the phenomenon that the first emitter region 121 diffuses below the second emitter region 122 or the second emitter region 122 diffuses below the first emitter region 121 can be reduced as much as possible, and the structure is more stable. Of course, in other embodiments, the implantation depths of the first emitter region 121 and the second emitter region 122 may be different, and the implantation depths of the two emitter regions can be flexibly adjusted only by adjusting the doping conditions, so as to ensure that the second emitter region 122 is in contact with the body region 110.
In an embodiment, the implantation depth of the first emitter region 121 and the second emitter region 122 is greater than the thickness of the second dielectric layer 222, that is, the first emitter region 121 and the second emitter region 122 both contact the gate dielectric layer below the second dielectric layer 222, so that a complete current path can be formed among the first emitter region 121, the body region 110 and the drift region 100.
In one embodiment, the gate conductive layer 210 is not filled in the trench, i.e., the top trench is not filled in the gate conductive layer 210, the top surface of the gate conductive layer 210 is lower than the top surface of the emitter layer 120, and the second dielectric layer 222 is filled in the trench above the gate conductive layer 210. Further, the second dielectric layer 222 just fills the trench, and the top surface of the second dielectric layer 222 is flush with the top surface of the trench. Further, the top surface of the second dielectric layer 222, the top surface of the first emission region 121, and the top surface of the second emission region 122 are flush. In this embodiment, the top surfaces of the second dielectric layer 222, the first emitting region 121 and the second emitting region 122 are flush, so as to ensure that the surface of the emitter layer 400 is flat.
In an embodiment, the sizes of the first emission region 121 and the second emission region 122 can be flexibly set according to needs. Specifically, the coverage area of the first emitter region 121 is larger than that of the second emitter region 122, thereby increasing the contact area of the first emitter region 121 and the trench gate 200, and thus increasing the density of the conductive channel.
In an embodiment, the second direction is a Y-axis direction, a plurality of second emitter regions 122 are formed in the first emitter region 121 formed between adjacent trenches, that is, in the second direction, the total number of the first emitter regions 121 and the second emitter regions 122 contacting the same side of the trench is greater than or equal to three, and the first emitter regions 121 and the second emitter regions 122 are alternately distributed in the second direction, thereby improving the uniformity of power transmission of the emitter layer 400.
In an embodiment, as shown in fig. 2a, when the first direction is an X-axis direction and the second direction is a Y-axis direction, and the IGBT device has a plurality of trenches arranged side by side along the first direction to form a plurality of trench gates 200 arranged side by side along the first direction, a first emitter region 121 and a second emitter region 122 arranged and connected along the second direction are disposed between each adjacent trench. In another embodiment, as shown in fig. 3, the first direction is an X-axis direction, and the second direction is a Y-axis direction, or a first emitting region 121 and a second emitting region 122 that are contiguously distributed along the second direction may be disposed between some adjacent trenches, and only the first emitting region 121 is formed between other adjacent trenches.
In an embodiment, the first direction is an X-axis direction, the second direction is a Y-axis direction, the plurality of trenches are distributed at intervals along the X-axis direction, the trenches have side surfaces extending along the Y-axis direction, the first emitting regions 121 and the second emitting regions 122 on both sides of the trenches are distributed in the same manner, that is, the first emitting regions 121 and the second emitting regions 122 are alternately distributed in the Y-axis direction, and are located on the same straight line in the X-axis direction, the types of the emitting regions on both sides of the trenches are the same, and on the same straight line in the X-axis direction, the emitting regions on both sides of the trenches are the same as the first emitting regions 121 or the same as the second emitting regions 122. In this embodiment, the emission regions on both sides of the trench are of the same type on the same straight line in the X-axis direction, that is, the emission regions distributed side by side in the X-axis direction are of the same type, which can reduce the difficulty of the process, for example, when the first emission region 121 or the second emission region 122 is formed by a doping process, a mask layer needs to be formed on the emission region layer 120, because the emission regions in the X-axis direction are of the same type, openings of the mask layer are distributed in a one-dimensional stripe shape, compared with the case where the emission regions in the Y-axis direction and the X-axis direction are different in type, a two-dimensional grid-shaped mask needs to be used, and the requirement of the mask alignment process required in this embodiment is lower.
In an embodiment, the first direction is an X-axis direction, the second direction is a Y-axis direction, the second emitting regions 122 are disposed in the first emitting regions 121 on both sides of the trench, and the arrangement of the first emitting regions on both sides of the trench is different. In a specific embodiment, referring to fig. 4, the same trench is defined to have opposite first and second sides, and in the first direction, the first emission region 121 in contact with the first side is opposite to the second emission region 122 in contact with the second side, and the second emission region 122 in contact with the first side is opposite to the first emission region 121 in contact with the second side. In other words, the first emitting regions 121 and the second emitting regions 122 are alternately distributed in the second direction, and the first emitting regions 121 and the second emitting regions 122 are also alternately distributed in the first direction. In the present embodiment, the first emitter region 121 and the second emitter region 122 are uniformly distributed on the emitter region layer 120, so that current transmission is more uniform, thereby improving the stability of the device.
In one embodiment, referring to FIG. 2a, the slot is elongated, the opening of the slot has long sides and short sides, the long sides of the slot extend along the Y-axis direction, and the short sides of the slot extend along the X-axis direction. In the present embodiment, the stripe-type trenches are arranged to form the stripe-type trench gates 200, so that the density of the trench gates 200 can be increased.
The IGBT device described above further includes a gate electrode layer electrically connected to the gate conductive layer 210. In an embodiment, as shown in fig. 5, the trench gate IGBT device has an active area AA and a peripheral area W surrounding the active area AA, the emitter layer 120 is formed in the active area AA, the trench is an elongated trench extending along the Y-axis direction, a trench opening along the Y-axis direction extends from the active area AA to the peripheral area W, the emitter layer 400 covers the active area AA, and the gate layer is located in the peripheral area W and electrically connected to the gate conductive layer 210 located in the trench in the peripheral area W. In the present embodiment, the trench is extended to the peripheral region W, the gate layer can be led out from the peripheral region W, and the emitter layer 400 covers the active region AA, so that the gate layer and the emitter layer 400 are distributed in different regions through a simple process.
Above-mentioned trench gate IGBT device, through the distribution mode who changes first emitter region 121 and second emitter region 122, make first emitter region 121 and second emitter region 122 distribute in the XY plane, at this moment, only need directly form emitter layer 400 on first emitter region 121 and second emitter region 122, alright make emitter layer 400 directly contact with first emitter region 121 and second emitter region 122, need not set up the electrically conductive embolism, the space that electrically conductive embolism occupied in the tradition has been saved, thereby can improve trench gate 200's density. And since the second dielectric layer 222 is formed on the gate conductive layer 210, the gate conductive layer 210 and the emitter layer 400 may be separated by the second dielectric layer 222. Meanwhile, compared with the distribution mode that the first emitting region 121 and the second emitting region 122 are distributed along the first direction, the distribution mode that the first emitting region 121 and the second emitting region 122 are connected and distributed along the second direction in the application can reduce the distance between adjacent trenches, so that the density of the trench gate 200 is improved.
The application also relates to a preparation method of the trench gate IGBT device, which is used for preparing the trench gate IGBT device.
As shown in fig. 6, a flowchart of steps of a method for manufacturing a trench gate IGBT device is shown, where the method includes:
step S100: and forming a drift region with a first conductivity type, wherein a plurality of grooves distributed side by side along a first direction are formed in the drift region.
As shown in fig. 7a, a drift region 100 is formed on a semiconductor substrate, the drift region 100 has a first conductivity type, and the drift region 100 is opened with a plurality of trenches distributed side by side along a first direction. The first direction is the X axle direction, and the opening of slot has long limit and minor face, and the long limit of slot extends along the Y axle direction, and the minor face of slot extends along the X axle direction, and a plurality of slots are along X axle direction interval and parallel arrangement.
Step S200: and forming a first dielectric layer on the inner wall of the groove, filling a gate conductive layer, and forming a second dielectric layer on the gate conductive layer.
As shown in fig. 7b, first, a first dielectric layer 221 is formed on the inner wall of the trench. In an embodiment, the first dielectric layer 221 may be deposited on the inner wall of the trench by a deposition process, and the deposition process may be a chemical vapor deposition process or an atomic layer deposition process. In another embodiment, an oxide layer may also be grown on the inner wall of the trench as the first dielectric layer 221 by a thermal oxidation process.
After the first dielectric layer 221 is formed, the trench is filled with the gate conductive layer 210. In one embodiment, the trench is filled with the gate conductive layer 210 by a deposition process.
After filling the gate conductive layer 210, a second dielectric layer 222 is formed on the gate conductive layer 210. In an embodiment, an oxide layer may be grown on the gate conductive layer 210 as the second dielectric layer 222 through a thermal oxidation process. In another embodiment, a second dielectric layer 222 may be deposited, and the second dielectric layer 222 may be selectively removed, leaving only the second dielectric layer 222 on the gate conductive layer 210. In one embodiment, the gate conductive layer 210 fills the trench, and the second dielectric layer 222 is located above the trench. In another embodiment, after the trench is filled with the gate conductive layer 210, the gate conductive layer 210 is etched back to reduce the height of the gate conductive layer 210, and then the second dielectric layer 222 is deposited in the trench above the gate conductive layer 210, such that the top surface of the second dielectric layer 222 is flush with the top surface of the trench.
Step S300: and forming a body region with a second conductivity type on the surface layer of the drift region by an ion implantation process, wherein the depth of the body region is less than that of the groove.
As shown in fig. 7c, doping ions of the second conductivity type are implanted into the surface layer of the drift region 100 through an ion implantation process, and the implantation depth is smaller than the depth of the bottom of the trench, so that the surface layer of the drift region 100 is transformed into a body region 110 having the second conductivity type, and a body region 110 located on the drift region 100 is formed, where the depth of the body region 110 is smaller than the depth of the bottom of the trench, and at this time, the trench penetrates through the body region 110 and extends into the drift region 100.
Step S400: and forming a first emitting region with a first conductivity type on the surface layer of the body region and forming a second emitting region with a second conductivity type in a partial region of the first emitting region by an ion implantation process, wherein the second emitting region penetrates through the first emitting region and is in contact with the body region, the first emitting region and the second emitting region are in connection distribution along a second direction, and the first emitting region and the second emitting region positioned between two adjacent grooves are in contact with the side surfaces of the grooves adjacent to two sides.
In one embodiment, as shown in FIG. 7d, the second direction is the Y-axis direction. Doping ions with the first conductivity type and doping ions with the second conductivity type are respectively implanted into different areas of the surface layer of the body region 110, so that a first emitter region 121 with the first conductivity type and a second emitter region 122 with the second conductivity type are respectively formed on the surface layer of the different areas of the body region 110, namely, the first emitter region 121 and the second emitter region 122 both extend from the upper surface of the body region 110 to the inside of the body region 110, the first emitter region 121 and the second emitter region 122 are distributed in a connection mode along the second direction, and the first emitter region 121 and the second emitter region 122 located between two adjacent grooves are both in contact with the side surfaces of the two adjacent grooves on two sides.
Specifically, a first mask layer may be formed first, a surface layer region of the body region 110 where the first emitter region 121 is to be formed is exposed through an opening of the first mask layer, and dopant ions having a first conductivity type are implanted into the surface layer of the body region 110, so that the surface layer of the body region 110 in the exposed region is converted into the first emitter region 121; the first mask layer is removed, and a second mask layer is formed, wherein the second mask layer covers the first emitter region 121, the opening of the second mask layer exposes the surface region of the body region 110 where the second emitter region 122 is to be formed, and doping ions with the second conductivity type are doped into the surface region of the body region 110, so that the surface region of the body region 110 in the other exposed region is converted into the second emitter region 122.
In another embodiment, doping ions having a first conductivity type may be implanted into the surface layer of the body region 110 to form the first emitter region 121, and then doping ions having a second conductivity type may be implanted into a partial region of the first emitter region 121 to transform a portion of the first emitter region 121 into the second emitter region 122 having the second conductivity type.
In an embodiment, after forming the first emitter region 121 and the second emitter region 122, a back process is performed, as shown in fig. 7e, a collector region 140 having the second conductivity type is formed on a side surface of the drift region 100 facing away from the body region 110, and in an embodiment, a buffer region 130 having the first conductivity type is further formed between the drift region 100 and the collector region 140, and a doping concentration of the buffer region 130 is higher than a doping concentration of the drift region 100.
Step S500: and forming emitter layers on the first and second emission regions in direct contact with the first and second emission regions, wherein the emitter layers are isolated from the gate conductive layer by the second dielectric layer.
As shown in fig. 7f, the emitter layer 400 is deposited on the first and second emitter regions 121 and 122 through a deposition process, the emitter layer 400 is in direct contact with the first and second emitter regions 121 and 122, and the first emitter layer 400 is isolated from the gate conductive structure by the second dielectric layer 222. It will be appreciated that a collector layer 300 is also deposited on the collector region 140 on the back side.
In the preparation method of the IGBT device, the first emitter region 121 and the second emitter region 122 are formed on the surface layer of the body region 110, and at this time, the emitter layer 400 only needs to be directly deposited on the first emitter region 121 and the second emitter region 122, so that the emitter layer 400 can be directly contacted with the first emitter region 121 and the second emitter region 122, and a conductive plug does not need to be arranged, so that the space occupied by the conventional conductive plug is saved, and the density of the trench gate 200 can be increased. And since the second dielectric layer 222 is formed on the gate conductive layer 210, the gate conductive layer 210 and the emitter layer 400 may be separated by the second dielectric layer 222. Meanwhile, compared with the distribution mode that the first emitting region 121 and the second emitting region 122 are distributed along the first direction, the distribution mode that the first emitting region 121 and the second emitting region 122 are connected and distributed along the second direction in the application can reduce the distance between adjacent trenches, so that the density of the trench gate 200 can be further improved.
The above examples only show some embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A trench gate IGBT device, comprising:
a drift region having a first conductivity type;
a body region having a second conductivity type formed on the drift region;
the first emitting region is provided with a first conductive type and is formed on the body region, a plurality of grooves which are distributed side by side along a first direction are formed in the first emitting region, and each groove sequentially penetrates through the first emitting region and the body region and extends to the drift region;
a second emitter region of a second conductivity type formed in a partial region of the first emitter region and penetrating the first emitter region to contact the body region, the first emitter region and the second emitter region being contiguously distributed along a second direction, the first emitter region and the second emitter region located between two adjacent trenches each contacting a side surface of the trench adjacent to both sides, the second direction being different from the first direction;
the gate structure comprises a first dielectric layer and a second dielectric layer, the first dielectric layer is formed on the inner wall of the groove, the gate conductive layer is formed on the first dielectric layer and filled in the groove, and the second dielectric layer is formed on the gate conductive layer;
and the emitter layer is formed on the first emitter region and the second emitter region, is in contact with the first emitter region and the second emitter region, and is separated from the gate conductive layer through the second dielectric layer.
2. The trench gate IGBT device of claim 1, wherein a top surface of the first emission region is flush with a top surface of the second emission region, and a bottom surface of the first emission region is flush with a bottom surface of the second emission region.
3. The trench gate IGBT device of claim 1, wherein the implant depth of the first emitter region and the implant depth of the second emitter region are both greater than the thickness of the second dielectric layer.
4. The trench gate IGBT device of claim 1, wherein a top surface of the second dielectric layer is flush with a top surface of the trench.
5. The trench gate IGBT device of claim 1, wherein a footprint of the second emitter region is less than a footprint of the first emitter region.
6. The trench gate IGBT device of claim 1, wherein a plurality of second emitter regions are formed in the first emitter region between adjacent trenches, and the first emitter regions and the second emitter regions are alternately distributed in the second direction.
7. The trench gate IGBT device according to any one of claims 1 to 6, wherein second emitter regions are arranged in the first emitter regions on both sides of the trench, and the first emitter regions and the second emitter regions on both sides of the trench are arranged in the same manner.
8. The trench gate IGBT device according to any one of claims 1 to 6, wherein second emitter regions are arranged in the first emitter regions on both sides of the trench, and the arrangement manner of the first emitter regions and the second emitter regions on both sides of the trench is different.
9. The trench gate IGBT device of claim 8, wherein the same trench has opposite first and second sides, and in the first direction, a first emitter region in contact with the first side is opposite a second emitter region in contact with the second side, and a second emitter region in contact with the first side is opposite a first emitter region in contact with the second side.
10. A preparation method of a trench gate IGBT device is characterized by comprising the following steps:
forming a drift region with a first conductivity type, wherein a plurality of grooves distributed side by side along a first direction are formed in the drift region;
forming a first dielectric layer on the inner wall of the groove, filling a gate conductive layer, and forming a second dielectric layer on the gate conductive layer;
forming a body region with a second conductivity type on the surface layer of the drift region by an ion implantation process, wherein the depth of the body region is less than that of the trench;
forming a first emitting region with a first conductivity type on the surface layer of the body region and forming a second emitting region with a second conductivity type in a partial region of the first emitting region by an ion implantation process, wherein the second emitting region penetrates through the first emitting region and is in contact with the body region, the first emitting region and the second emitting region are distributed in a connected mode along a second direction, the first emitting region and the second emitting region located between two adjacent trenches are in contact with the side faces of the trenches adjacent to two sides, and the second direction is different from the first direction;
and forming emitter layers on the first and second emission regions in direct contact with the first and second emission regions, wherein the emitter layers are isolated from the gate conductive layer by the second dielectric layer.
CN202010425278.9A 2020-05-19 2020-05-19 Trench gate IGBT device and preparation method thereof Pending CN113690296A (en)

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