CN113687705B - Method for providing power supply in standby stage - Google Patents

Method for providing power supply in standby stage Download PDF

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Publication number
CN113687705B
CN113687705B CN202010425085.3A CN202010425085A CN113687705B CN 113687705 B CN113687705 B CN 113687705B CN 202010425085 A CN202010425085 A CN 202010425085A CN 113687705 B CN113687705 B CN 113687705B
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power
programmable logic
power supply
signal
mode
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CN113687705A (en
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王启禹
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Mitac Computer Shunde Ltd
Mitac Computing Technology Corp
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Mitac Computer Shunde Ltd
Mitac Computing Technology Corp
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/266Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips

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  • General Engineering & Computer Science (AREA)
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  • Computer Hardware Design (AREA)
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Abstract

A method for providing power during standby phase is implemented by a computer system supporting specifications of open operation plan, and includes the following steps: (A) A programmable logic unit sets a card signal related to an open operation card to a high level to enter a first mode; (B) In a first mode of the computer system, a baseboard management control unit determines whether the standby power is insufficient; (C) When the standby power is insufficient, the baseboard management control unit transmits a trigger signal to the programmable logic unit; (D) When the programmable logic unit receives the trigger signal, the programmable logic unit transmits a notification signal to a power supply unit so as to enter a second mode; and (E) when the computer system is in the second mode, the power supply unit provides a main power supply for the open operation card.

Description

Method for providing power supply in standby stage
[ Field of technology ]
The present invention relates to a method for providing power, and more particularly to a method for providing power required by a computer system in a standby phase.
[ Background Art ]
The standby power (standby power) provided by the power supply of the existing server is 12V and the current is between 1.5A and 2A, and the standby power supply capacity is sufficient for the server in standby state for the application of the past server products. However, under the circumstance that new interfaces (interfaces) and devices are continuously updated, the specifications of the power supply cannot meet the requirements of some system designs, and in terms of the specifications of the open operation plan (Open Compute Project, abbreviated as OCP) V3.0, A current of 1.5A is required in the standby state, and in addition, A standby power required by the fan and the system (platform path control, baseboard management controller, gigabit ethernet transceiver (PHY), etc.) is about 1A, the total 12V standby power requirement is about 3A, and the power supply of the conventional server cannot meet the requirements of the OCP V3.0 system design in the standby state, so A solution is required.
[ Invention ]
The invention provides a method for supplying power in standby phase, which can meet standby power requirement of computer system supporting open operation plan specification.
In order to solve the above-mentioned problems, the present invention provides a method for providing power in a standby phase, which is implemented by a computer system supporting a specification of an open operation plan, the computer system is in a first mode when entering a standby phase, and then enters a second mode with a higher power demand than the first mode, the computer system comprises a baseboard management control unit, an open operation card, a programmable logic unit electrically connected with the baseboard management control unit and the open operation card, and a power supply unit for supplying power to the baseboard management control unit, the open operation card and the programmable logic unit, the method for providing power in the standby phase comprises the following steps:
(A) Setting a card signal related to the start of the open operation card to a high level by the programmable logic unit to enter the first mode;
(B) In the first mode, the baseboard management control unit obtains the card data related to the open operation card, and judges whether a standby power provided by the power supply unit is insufficient according to the card data;
(C) When the baseboard management control unit determines that the standby power is insufficient, the baseboard management control unit transmits a trigger signal to the programmable logic unit;
(D) When the programmable logic unit receives the trigger signal, the programmable logic unit responds to the trigger signal to transmit a notification signal indicating that a main power supply is started to the power supply unit so as to enter the second mode; and
(E) When the computer system is in the second mode, the power supply unit responds to the notification signal to provide the main power supply with power larger than the standby power supply so as to supply enough power to the open operation card.
Compared with the prior art, the invention informs the programmable logic unit to transmit the notification signal indicating that the main power is started to the power supply unit when the standby power is judged to be insufficient by the baseboard management control unit, so that the power supply unit can provide the main power larger than the standby power to the open operation card in advance when the computer system is in the second mode, thereby meeting the requirement of the standby power required by the computer system supporting the open operation plan specification.
[ Description of the drawings ]
Other features and advantages of the present invention will become apparent from the following description of the embodiments with reference to the drawings, in which:
FIG. 1 is a block diagram illustrating a computer system for implementing an embodiment of a method for providing power during standby phase of the present invention;
FIG. 2 is a timing diagram illustrating states of a plurality of signals and voltages in different modes;
FIG. 3 is a block diagram illustrating the status of signals when the computer system is in a first mode;
FIG. 4 is a flow chart illustrating a first mode entry procedure in an embodiment of a method for providing power during standby phase according to the present invention;
FIG. 5 is a block diagram illustrating the status of signals when the computer system is in a second mode;
FIG. 6 is a flowchart illustrating a standby power supply procedure in an embodiment of the method for providing power during standby phase of the present invention;
FIG. 7 is a block diagram illustrating the status of signals when the computer system is in a third mode; and
FIG. 8 is a flow chart illustrating a main power supply procedure in an embodiment of the method for providing power during standby phase of the present invention.
[ Detailed description ] of the invention
Referring to FIG. 1, an embodiment of the method for providing power during standby is implemented by a computer system supporting specifications of open operation plans. The computer system comprises a baseboard management control unit 1, a platform path control unit 2, a central processing unit 3, a memory unit 4 electrically connected with the central processing unit 3, an open operation card 5 electrically connected with the baseboard management control unit 1, a hot plug control unit 6 electrically connected with the open operation card 5, a programmable logic unit 7 electrically connected with the baseboard management control unit 1, the platform path control unit 2, the open operation card 5 and the hot plug control unit 6, a fan 8 and a power supply unit 9 for supplying power to the baseboard management control unit 1, the platform path control unit 2, the central processing unit 3, the memory unit 4, the open operation card 5, the hot plug control unit 6, the programmable logic unit 7 and the fan 8.
In this embodiment, the computer system is, for example, a server, the baseboard management control unit 1 is, for example, a Baseboard Management Controller (BMC), the platform path control unit 2 is, for example, a platform Path Controller (PCH), the central processing unit 3 is, for example, a Central Processing Unit (CPU), the memory unit 4 is, for example, a dual in-line memory module (DIMM), the open computing card 5 is, for example, an OCP card supporting OCP v3.0, the Hot plug control unit 6 is, for example, a Hot plug controller (Hot switch), the programmable logic unit 7 is, for example, a Complex Programmable Logic Device (CPLD), the power supply unit 9 comprises an AND gate 91 (AND gate) electrically connected to the programmable logic unit 7, a first switching unit 92 electrically connected to the Hot plug control unit 6 AND the AND gate 91, a second switching unit 93 electrically connected to the fan 8 AND the programmable logic unit 7, a first switching unit 92 electrically connected to the fan 8, the Hot plug control unit 6, the programmable logic unit 2, the platform path control unit 1 AND the baseboard management unit 94, a first switching unit 94 AND a second switching unit 95 electrically connected to the first switching unit 95 AND the second switching unit 95, AND the first switching unit 95 AND the second switching unit 95 are electrically connected to the power supply unit AND the first switching unit 95 AND the first switching unit AND the second switching unit 95.
It should be noted that, when the computer system supporting the specification of the open operation plan enters a standby stage, it is first in a first mode, then enters a second mode with higher power demand than the first mode, and when the computer system enters a power-on stage, it enters a third mode. In this embodiment, the first mode is ID mode, and +3.3v_edge can be provided to the open computing card 5 when the computer system is in ID mode, in which only access to a field replaceable Unit (FIELD REPLACE Unit, FRU) and a scan chain (SCAN CHAIN) (not shown) of the open computing card 5 is allowed. The second mode is AUX power mode, and +3v_edge and +12v_edge can be provided to the open operation card 5 when the computer system is in AUX power mode. The third mode is Main power mode, and the open operation card 5 can operate in full capacity.
Embodiments of a method for providing power in a standby phase of the present invention implemented by the computer system will be described with reference to the accompanying drawings, which sequentially include a first mode entry program running in a first mode of the standby phase, a standby power supply program running in a second mode of the standby phase, and a main power supply program running in a third mode of the power-on phase.
Referring to FIG. 2, which is a timing diagram illustrating the state of the voltage supplied by the power supply 96, the signal outputted by the programmable logic unit 7, the signal outputted by the platform path control unit 2, and the signal outputted by the open operation card 5 when the computer system is in different modes according to the present embodiment.
Referring to fig. 3 and 4, the computer system implements a first mode entry procedure of the method for providing power during standby phase of the present invention. The first mode entry program describes how to enter the first mode and states of the signal outputted from the programmable logic unit 7, the signal outputted from the stage path control unit 2, and the signal outputted from the open operation card 5 in the first mode, and includes the following steps.
In step 401, when the baseboard management control unit 1 detects that the computer system includes the open operation card 5, a detection notification signal is sent to the programmable logic unit 7 by the baseboard management control unit 1.
In step 402, when the programmable logic unit 7 receives the detection notification signal, the card signal (i.e., an ocp_v3_en signal) associated with the activation of the open operation card 5 is set to a high level by the programmable logic unit 7 and sent to the hot plug control unit 6 to enter the first mode.
In step 403, the platform path control unit 2 sets a status signal (i.e. an s3_n signal) indicating whether the computer system enters the power-on stage to a low level and sends the status signal to the programmable logic unit 7 to indicate that the computer system does not enter the power-on stage.
In step 404, after the programmable logic unit 7 receives the status signal, the programmable logic unit 7 maintains a MAIN enable signal (i.e., a main_pwr_en signal) associated with the start of a MAIN power supply at a low level in response to the status signal at the low level and transmits the MAIN enable signal to the open operation card 5.
In step 405, the programmable logic unit 7 also responds to the status signal to maintain a supply signal (i.e. a main_pwr_on signal) indicating whether to supply the MAIN power at a low level and transmit the signal to the second transformer 95, so that the second transformer 95 does not output voltage to the cpu 3 and the memory unit 4, and further does not supply the MAIN power to the cpu 3 and the memory unit 4.
In step 406, the programmable logic unit 7 also maintains an enable main power signal (i.e., an aux_psu_en signal) associated with enabling the main power at a low level and sends the signal to the and gate 91 while the computer system is in the first mode.
In step 407, the AND gate 91 performs an AND operation ON the active main power signal at a low level AND an open/close signal (i.e., an input signal) indicating whether the cover of the server is open or not to obtain AND transmit a notification signal (i.e., a ps_on signal, at which the ps_on signal after the AND operation is at a low level) indicating that the main power is not active to the power supply 96 AND the first switching unit 92, thereby not enabling the main power (i.e., a main voltage Vpsu =0v provided by the power supply 96, see the dashed line portion of fig. 3), AND causing the first switching unit 92 to select a standby voltage vsb=12v provided by the power supply 96 to be transmitted to the first transformer 94 AND the hot plug control unit 6 to output voltages to the baseboard management control unit 1, the platform path control unit 2, the programmable logic unit 7, the hot plug control unit 6 AND the open operation card 5, thereby supplying the standby power to the baseboard management control unit 1, the platform path control unit 2, the hot plug control unit 7 AND the hot plug control unit 5. It should be noted that, when the cover of the server is opened, the opening/closing signal is at a low level; when the cover plate of the server is closed, the opening/closing signal is at a high level.
In step 408, when the computer system is in the first mode, the programmable logic unit 7 also maintains a secondary start signal (i.e. an aux_pwr_en signal) associated with the start of the standby power supply at a low level and transmits the signal to the open computing card 5 and the second switching unit 93, so that the second switching unit 93 selectively turns off the power supply 96 from the fan 8, thereby not providing power to the fan 8.
In step 409, after the open computing card 5 receives the auxiliary power-up signal, the open computing card 5 maintains an operation signal (i.e., a nic_pwr_good signal) indicating whether the power supplied to the open computing card 5 is stable at a low level and transmits the operation signal to the programmable logic unit 7 to indicate that the power supplied to the open computing card 5 is unstable.
It should be noted that the execution sequence of steps 404 to 409 disclosed in the present embodiment is merely an example, and the execution sequence of steps 404 to 409 may be adjusted or performed simultaneously according to the requirement.
Referring to fig. 5 and 6, the computer system implements a standby power supply program of the method for supplying power in a standby phase according to the present invention. The standby power supply program illustrates how the power supply 96 provides sufficient power to the open computing card 5 and includes the following steps.
In step 501, when the computer system is in the first mode, the baseboard management control unit 1 obtains card data related to the open operation card 5, and determines whether the standby power provided by the power supply unit 9 is insufficient according to the card data. When the baseboard management control unit 1 determines that the standby power is insufficient, the flow proceeds to step 502; when the baseboard management control unit 1 determines that the standby power supply is sufficient, the flow ends. In this embodiment, the card data is stored in the field replaceable unit of the open computing card 5 and includes a power value indicating the power required by the open computing card 5. The baseboard management control unit 1 obtains the card data by reading the card data stored in the field replaceable unit, and determines whether the standby power is insufficient by determining whether the power value in the card data is greater than a preset power threshold. When the baseboard management control unit 1 determines that the power value is greater than the power threshold value, it represents that the standby power provided by the power supply unit 9 is insufficient; when the baseboard management control unit 1 determines that the power value is not greater than the power threshold value, it means that the standby power provided by the power supply unit 9 is sufficient.
It should be noted that, if the baseboard management control unit 1 determines that the standby power is sufficient, the computer system performs a conventional normal standby process, and details thereof are omitted herein for brevity since the present invention is not characterized by the normal standby process known to those skilled in the art.
In step 502, the baseboard management control unit 1 transmits a trigger signal to the programmable logic unit 7.
In step 503, when the programmable logic unit 7 receives the trigger signal, the programmable logic unit 7 responds to the trigger signal to transmit a notification signal (i.e. the ps_on signal) indicating that the main power is enabled to the power supply 96 and the first switching unit 92, thereby enabling the main power and enabling the first switching unit 92 to select the main voltage Vpsu =12v provided by the power supply 96 to be transferred to the first transformer 94. In this embodiment, the programmable logic unit 7 enters the second mode by setting the active main power signal (i.e., the aux_psu_en signal) associated with the active main power to a high level and transmitting to the and gate 91.
In step 504, the AND gate 91 performs an AND operation ON the high-level enabled main power signal AND the open/close signal to obtain AND transmit the notification signal (at this time, the ps_on signal after the AND operation is at the high level) indicating that the main power is enabled to the power supply 96 AND the first switching unit 92.
In step 505, the power supply 96 responds to the notification signal to provide the main power source larger than the standby power source to output the main voltage Vpsu =12v and is transmitted to the hot plug control unit 6 and the first transformer 94 via the selection of the first switching unit 92 to output voltages to the baseboard management control unit 1, the platform path control unit 2, the programmable logic unit 7, the hot plug control unit 6 and the open operation card 5, thereby providing sufficient power to the open operation card 5.
In step 506, the programmable logic unit 7 sets the auxiliary power-on signal (i.e. the aux_pwr_en signal) associated with the activation of the standby power supply to a high level and transmits the signal to the open operation card 5 and the second switching unit 93, so that the second switching unit 93 selectively transmits the main voltage vsb=12v provided by the power supply 96 to the fan 8, thereby providing power to the fan 8.
In step 507, after the open operation card 5 receives the auxiliary start signal, the open operation card 5 sets the operation signal (i.e., the nic_pwr_good signal) indicating whether the power supplied to the open operation card 5 is stable to a high level and transmits the signal to the programmable logic unit 7 to indicate that the power supplied to the open operation card 5 is stable.
In step 508, the programmable logic unit 7 also maintains the card signal (i.e., the ocp_v3_en signal) associated with the activation of the open computing card 5 at a high level and sends it to the hot plug control unit 6 while the computer system is in the second mode.
In step 509, the platform path control unit 2 maintains the status signal (i.e., the s3_n signal) indicating whether the computer system is in the power-on stage at a low level and sends the status signal to the programmable logic unit 7 to indicate that the computer system is not in the power-on stage.
In step 510, after the programmable logic unit 7 receives the status signal, the programmable logic unit 7 maintains the MAIN power-up signal (i.e., the main_pwr_en signal) associated with the power-up of the MAIN power source at a low level in response to the status signal at the low level and transmits the MAIN power-up signal to the open computing card 5.
In step 511, the programmable logic unit 7 also responds to the status signal to maintain the supply signal (i.e. the main_pwr_on signal) indicating whether to supply the MAIN power at a low level and transmit the signal to the second transformer 95, so that the second transformer 95 does not output voltage to the cpu 3 and the memory unit 4 (see the dotted line portion of fig. 5), and further does not supply the MAIN power to the cpu 3 and the memory unit 4.
It should be noted that the execution sequence of steps 506 to 511 in the present embodiment is merely an example, and the execution sequence of steps 506 to 511 can be adjusted or performed simultaneously according to the requirement.
Referring to fig. 7 and 8, the computer system implements the main power supply program of the method for supplying power in standby phase of the present invention. The main power program illustrates how the power supply 96 provides the main power to the computer system for power-on operation, and includes the following steps.
In step 801, when the platform path control unit 2 receives a power-on signal, the platform path control unit 2 sets the status signal (i.e., the s3_n signal) indicating whether the computer system enters the power-on stage to a high level, and sends the status signal to the programmable logic unit 7 to indicate that the computer system enters the power-on stage. In this embodiment, the power-on signal may be generated by a user pressing a power switch of the computer system or may be obtained by a remote transmission of a power-on command. When the platform path control unit 2 receives the power-on signal, the computer system leaves the standby stage to enter the power-on stage, otherwise, the computer system keeps on the standby stage.
In step 802, after the programmable logic unit 7 receives the status signal, the programmable logic unit 7 sets the MAIN power-up signal (i.e., the main_pwr_en signal) associated with the power-up of the MAIN power source to a high level in response to the status signal being at the high level and transmits the MAIN power-up signal to the open computing card 5 to enter the third mode.
In step 803, the programmable logic unit 7 is further responsive to the status signal to set the supply signal (i.e. the main_pwr_on signal) indicating whether to supply the MAIN power to the cpu 3 and the memory unit 4, and sends the supply signal to the second transformer 95, so that the second transformer 95 adjusts the MAIN voltage Vpsu =12v provided by the power supply 96 to output a voltage to the cpu 3 and the memory unit 4, and further supplies the MAIN power to the cpu 3 and the memory unit 4.
In step 804, the programmable logic unit 7 maintains the active main power signal (i.e., the aux_psu_en signal) associated with the active main power at a high level and sends it to the and gate 91 while the computer system is in the third mode.
In step 805, the AND gate 91 performs an AND operation ON the active main power signal with a high level AND the open/close signal to obtain AND transmit the notification signal (at this time, the ps_on signal after the AND operation is a high level) indicating that the main power is active to the power supply 96 AND the first switching unit 92, thereby maintaining the active main power.
In step 806, the power supply 96 responds to the notification signal to provide the main power to output the main voltage Vpsu =12v and is transmitted to the hot plug control unit 6 and the first transformer 94 via the selection of the first switching unit 92 to output voltages to the baseboard management control unit 1, the platform path control unit 2, the programmable logic unit 7, the hot plug control unit 6 and the open operation card 5.
In step 807, the programmable logic unit 7 also maintains the card signal (i.e., the ocp_v3_en signal) associated with the activation of the open computing card 5 at a high level and sends it to the hot plug control unit 6 while the computer system is in the third mode.
In step 808, when the computer system is in the third mode, the programmable logic unit 7 also maintains the auxiliary power-up signal (i.e. the aux_pwr_en signal) associated with the start-up of the standby power supply at a high level and transmits the auxiliary power-up signal to the open operation card 5 and the second switching unit 93, so that the second switching unit 93 selectively transmits the main voltage vsb=12v provided by the power supply 96 to the fan 8, thereby maintaining the power supply to the fan 8.
In step 809, the open computing card 5 maintains the operation signal (i.e., the nic_pwr_good signal) indicating whether the power supplied to the open computing card 5 is stable in the third mode of the computer system at a high level and transmits the operation signal to the programmable logic unit 7 to indicate that the power supplied to the open computing card 5 is stable.
It should be noted that the execution sequence of steps 803 to 809 disclosed in the present embodiment is merely an example, and the execution sequence of steps 803 to 809 can be adjusted or performed simultaneously according to the requirement.
In summary, in the method for providing power in standby phase of the present invention, the baseboard management control unit 1 notifies the programmable logic unit 7 to transmit the notification signal indicating that the MAIN power is enabled to the power supply unit 9 when determining that the standby power is insufficient, so that the power supply unit 9 can provide the MAIN power larger than the standby power to the open computing card 5 in advance when the computer system is in the second mode, although the MAIN power of the power supply 96 can be started in advance when the computer system is in the second mode, the signals such as the aux_pwr_en signal, the main_pwr_on signal and the nic_pwr_goose signal, and the power-up sequence all conform to the specification of the open computing plan, thereby being applicable to the specification of the open computing plan and meeting the requirement of the standby power required by the computer system supporting the specification of the open computing plan. In addition, the power supply 96 used in the present invention can be a power supply 96 commonly used in the industry, and the power supply 96 with high standby power is not required to be customized, so as to greatly reduce the design and the cost of the security application of the new power supply 96 and accelerate the design time of the system product, thereby really achieving the purpose of the present invention.
However, the foregoing is merely illustrative of the present invention and, as such, it is not intended to limit the scope of the invention, but rather to cover all modifications and variations within the scope of the present invention as defined by the appended claims and their equivalents.

Claims (10)

1. The method for providing power supply in standby stage is implemented by means of a computer system supporting the specification of open operation plan, when the computer system is in a first mode, and then is in a second mode with higher power requirement than the first mode, the computer system includes a baseboard management control unit, an open operation card, a programmable logic unit electrically connected with the baseboard management control unit and the open operation card, and a power supply unit for supplying power to the baseboard management control unit, the open operation card and the programmable logic unit, and is characterized by that the method for providing power supply in standby stage includes the following steps:
(A) Setting a card signal related to the start of the open operation card to a high level by the programmable logic unit to enter the first mode;
(B) In the first mode, the baseboard management control unit obtains the card data related to the open operation card, and judges whether a standby power provided by the power supply unit is insufficient according to the card data;
(C) When the baseboard management control unit determines that the standby power is insufficient, the baseboard management control unit transmits a trigger signal to the programmable logic unit;
(D) When the programmable logic unit receives the trigger signal, the programmable logic unit responds to the trigger signal to transmit a notification signal indicating that a main power supply is started to the power supply unit so as to enter the second mode; and
(E) When the computer system is in the second mode, the power supply unit responds to the notification signal to provide the main power supply with power larger than the standby power supply so as to supply enough power to the open operation card.
2. The method of claim 1, wherein in step (B), the card data includes a power value indicating power required for the open computing card, and the baseboard management control unit determines whether the standby power is insufficient by determining whether the power value is greater than a predetermined power threshold.
3. The method of claim 1, wherein in step (a), the first mode is an ID mode, and in step (D), the second mode is an AUX power mode.
4. The method of claim 1, wherein in step (D), the programmable logic unit sends the notification signal indicating the activation of the main power supply to the power supply unit by setting an active main power signal associated with the activation of the main power supply to a high level.
5. The method of claim 1, wherein the computer system further comprises a fan, the power supply unit is further configured to supply power to the fan, and after step (D), the method further comprises the steps of:
(F) In the second mode, the programmable logic unit sets an auxiliary power signal associated with the power on of the standby power supply to a high level to supply power to the fan.
6. The method of providing power during standby phase according to claim 1, further comprising the steps of, prior to step (a):
(G) When the baseboard management control unit detects that the computer system comprises the open operation card, the baseboard management control unit transmits a detection notification signal to the programmable logic unit;
In step (a), when the programmable logic unit receives the detection notification signal, the card signal corresponding to the start of the open operation card is set to a high level by the programmable logic unit to enter the first mode.
7. The method of providing power during standby phase according to claim 5, further comprising the steps of, after step (F):
(H) In the second mode, the open operation card sets an operation signal indicating whether the power supplied to the open operation card is stable to a high level to indicate that the power supplied to the open operation card is stable.
8. The method of claim 1, wherein the computer system further comprises a platform path control unit electrically connected to the programmable logic unit, the power supply unit further configured to supply power to the platform path control unit, and the method further comprises, after step (E), the steps of:
(I) When the computer system enters a starting stage, the platform path control unit sets a state signal indicating whether the computer system enters the starting stage to be at a high level and transmits the state signal to the programmable logic unit, and (J) after the programmable logic unit receives the state signal, the programmable logic unit responds to the state signal to set a main starting signal related to the starting of the main power supply to be at the high level so as to enter the starting stage.
9. The method of claim 8, wherein in step (J), the programmable logic unit further adjusts a power signal indicating whether the main power is supplied to a high level in response to the status signal to supply the main power required for performing the power-on procedure.
10. The method of claim 1, wherein the computer system further comprises a central processing unit and a memory unit electrically connected to the central processing unit, wherein in step (E), the power supply unit does not supply the main power to the central processing unit and the memory unit when the computer system is in the second mode.
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