CN102213991A - Standby voltage supply system of server - Google Patents

Standby voltage supply system of server Download PDF

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Publication number
CN102213991A
CN102213991A CN2010101512437A CN201010151243A CN102213991A CN 102213991 A CN102213991 A CN 102213991A CN 2010101512437 A CN2010101512437 A CN 2010101512437A CN 201010151243 A CN201010151243 A CN 201010151243A CN 102213991 A CN102213991 A CN 102213991A
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CN
China
Prior art keywords
standby voltage
resistance
motherboard
couples
voltage supply
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CN2010101512437A
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Chinese (zh)
Inventor
杨君东
范文纲
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Inventec Corp
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Inventec Corp
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Priority to CN2010101512437A priority Critical patent/CN102213991A/en
Publication of CN102213991A publication Critical patent/CN102213991A/en
Pending legal-status Critical Current

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Abstract

The invention provides a standby voltage supply system of a server. The system comprises N main boards, a power module and N voltage supply delay units, wherein, N is a positive integer greater than 1; and the N voltage supply delay units are defined as P1, P2...PN and respectively provide standby voltages supplied by the power module to the main boards MLB1, MLB2...MLBN after time is delayed for h1, h2...hN respectively, wherein, h1, h2...hN are not equal. The standby voltage supply system has the beneficial effects that the standby voltages are respectively provided to a plurality of the main boards at different time points so that inrush current is not generated at the same time and then superposed, thus lowering the maximum current value of the inrush current.

Description

Server standby voltage supply system
Technical field
The present invention relates to a kind of power supply provisioning technique of supporting a plurality of motherboards, relate in particular to a kind of server standby voltage supply system that respectively standby voltage is supplied to a plurality of motherboards in different time points.
Background technology
Partial circuit assembly (as: electric capacity) in the motherboard has charge/discharge characteristics, therefore provides a standby voltage (Stand-By Voltage) can to produce inrush current (Inrush Current) abruptly for the moment of motherboard.The power supply unit of in the past supplying standby voltage is when finding that inrush current is excessive; will start overcurrent protection (Over-Current Protection; be called for short OCP) mechanism, make its output of cutting off the electricity supply, in order to avoid the circuit unit in the motherboard burns because inrush current is excessive.
For the server system that in the past had a plurality of motherboards, the standby voltage of All hosts plate is usually all by same power supply unit supply.Therefore, when power supply unit provided standby voltage to give a plurality of motherboard simultaneously, the inrush current that each motherboard produced is superposition mutually, thereby moment forms bigger inrush current.About slightly single the motherboard of the current value of this inrush current produces M times of inrush current, and M is for providing the number of standby power motherboard simultaneously.At this moment, light then can trigger the over current protection protection mechanism of power supply unit, cause motherboard to start shooting.Heavy then can directly burn the circuit unit on the motherboard, cause motherboard to damage.
Summary of the invention
The invention provides a kind of server standby voltage supply system, native system can reduce the lowest high-current value of inrush current, and then reduces the probability of the over current protection protection mechanism that triggers power supply unit.In addition, native system also can reduce the risk that motherboard damages, and the selected electric pressure of circuit unit also can descend thereupon in the motherboard.
The present invention proposes a kind of server standby voltage supply system, comprises N motherboard, a power module and N voltage supply delay cell, and wherein N is the positive integer greater than 1.N motherboard is defined as MLB 1, MLB 2MLB NPower module is coupled to N motherboard, and supplies a standby voltage to these motherboards.N voltage supply delay cell is defined as P 1, P 2P N, these voltage supply delay cell P 1, P 2P NCouple power module and motherboard MLB respectively 1, MLB 2MLB N, and postponing h respectively 1, h 2H NAfter time, above-mentioned standby voltage is provided respectively to motherboard MLB 1, MLB 2MLB N, h wherein 1≠ h 2The h of ≠～≠ N
In one embodiment of this invention, when the standby voltage of supplying when power module was stablized, power module will produce a power supply suppling signal.At this moment, P iPower supply supply delay cell comprises a signal delay unit and a switch element, and wherein i is integer and 1≤i≤N.Signal delay unit is coupled to power module, is used to receive above-mentioned power supply suppling signal, and postpones h iProduce one after time and postpone suppling signal.Switch element then is coupled to signal delay unit, be used for according to above-mentioned delay suppling signal with standby voltage provide to above-mentioned motherboard one of them.
From another angle, the present invention proposes a kind of server standby voltage supply system, this server standby voltage supply system comprises one first motherboard, one second motherboard, a power module and a standby voltage supply module, and power module is used to supply standby voltage to the first motherboard and second motherboard.Standby voltage supply module comprises one first voltage supply delay cell and one second voltage supply delay cell.After first voltage supply delay cell is used to postpone a very first time, standby voltage is provided to first motherboard.Second voltage supply delay cell then provides standby voltage to second motherboard after one second time of delay, and wherein the very first time is uneven in length in the length of second time.
In one embodiment of this invention, when the standby voltage of supplying when power module was stablized, power module produced a power supply suppling signal.At this moment, first power supply supply delay cell comprises a signal delay unit and a switch element.Signal delay unit is coupled to power module, is used to receive above-mentioned power supply suppling signal, and produces a delay suppling signal after postponing the very first time.Switch element is coupled to signal delay unit, and being used for provides standby voltage to first motherboard according to postponing suppling signal.
Based on above-mentioned, the embodiment of the invention provides respectively to a plurality of motherboards at the different time standby voltage of naming a person for a particular job, and it is all inequality that each motherboard receives the time point of standby voltage.Therefore, inrush current can not produce and mutual superposition simultaneously, to reduce the probability of the over current protection protection mechanism that triggers power supply unit.In addition, the embodiment of the invention also can reduce the risk that motherboard damages, and circuit unit need not select for use too high electric pressure to prevent that inrush current from burning circuit unit in the motherboard.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate appended graphic being described in detail below.
Description of drawings
Fig. 1 is the structural representation of one embodiment of the invention server standby voltage supply system;
Fig. 2 is voltage supply delay cell P among Fig. 1 iStructural representation;
Fig. 3 is one embodiment of the invention voltage supply delay cell P iCircuit diagram;
Fig. 4 provides the inrush current synoptic diagram of 12V standby voltage to three motherboard simultaneously for existing server;
Fig. 5 provides the inrush current synoptic diagram of 5V standby voltage to three motherboard simultaneously for existing server;
Fig. 6 provides the inrush current oscillogram of 12V standby voltage for one embodiment of the invention server standby voltage supply system;
Fig. 7 provides the inrush current oscillogram of 5V standby voltage for one embodiment of the invention server standby voltage supply system;
Fig. 8 is the structural representation of another embodiment of the present invention server standby voltage supply system.
Main description of reference numerals
100,800: server standby voltage supply system; 110,810: standby voltage supply module;
120: power module; 210: signal delay unit;
220: switch element; B1: two-carrier junction transistor;
GND: earth terminal; C1, C2: first electric capacity and second electric capacity;
MLB 1～MLB N: motherboard; The MN:NMOS transistor;
The MP:PMOS transistor; P 1, P 2P N: voltage supply delay cell;
R1～R4: first resistance to the, four resistance; STB: standby voltage;
S STB_OK: the power supply suppling signal; SD STB_OK: postpone suppling signal.
Embodiment
Now will the example of described one exemplary embodiment be described in the accompanying drawings in detail with reference to one exemplary embodiment of the present invention.In addition, all possibility parts, the identical or similar portions of assembly/member/symbology of use same numeral in graphic and embodiment.
Fig. 1 is the structural representation of one embodiment of the invention server standby voltage supply system.As shown in Figure 1, server standby voltage supply system 100 comprises a plurality of motherboard MLB 1～MLB NWith standby voltage supply module 110, wherein N is the positive integer greater than 1.Standby voltage supply module 110 comprises power module 120 and N voltage supply delay cell P 1, P 2P NPower module 120 is used to supply standby voltage STB (can be 5V/12V, but do not exceed according to this), and power module 120 produces power supply suppling signal S when standby voltage STB stablizes STB_OKIn addition, in the present embodiment, power module 120 has overcurrent protection (Over-Current Protection, be called for short OCP) mechanism, in case when finding that inrush current is excessive, the output of will cutting off the electricity supply of this mechanism is in order to avoid motherboard MLB 1～MLB NIn circuit unit burn because inrush current is excessive.
In the present embodiment, voltage supply delay cell P iReceive power supply suppling signal S STB_OKAnd postpone h iAfter time, STB provides to motherboard MLB with standby voltage i, wherein i is integer, 1≤i≤N, and h 1≠ h 2The h of ≠～≠ NWherein, each motherboard MLB 1～MLB NThe time interval that reception standby voltage STB is postponed should be greater than each motherboard MLB 1～MLB NProduce the maximal value during the sudden inrush current.Thus, standby voltage supply module 110 provides respectively to motherboard MLB at the different time standby voltage STB that names a person for a particular job 1～MLB NIn, inrush current just can not produce and mutual superposition simultaneously, so that allow the lowest high-current value of inrush current drop to the sudden inrush current that single motherboard produces.
In order to make those skilled in the art can understand the present invention more, below describe voltage supply delay cell P in detail iOperation principles and flow process, please refer to Fig. 2.Fig. 2 is voltage supply delay cell P among Fig. 1 iStructural representation.Power supply supply delay cell P iComprise signal delay unit 210 and switch element 220.Signal delay unit 210 is coupled to power module 120, is used to receive above-mentioned power supply suppling signal S STB_OK, and postpone h iProduce after time and postpone suppling signal SD STB_OK220 of switch elements are coupled to signal delay unit 210, are used for according to postponing suppling signal SD STB_OKSTB provides to motherboard MLB with standby voltage i
Clearer, Fig. 3 is one embodiment of the invention voltage supply delay cell P iCircuit diagram.Please refer to Fig. 3, in the present embodiment, signal delay unit 210 comprises first resistance R 1, first capacitor C 1, two-carrier junction transistor B1 and second resistance R 2.First termination of first resistance R 1 is received power supply suppling signal S STB_OKFirst end of first capacitor C 1 is coupled to earth terminal GND, and second end of first capacitor C 2 then is coupled to second end of first resistance R 1.Wherein, h iThe length of time is that the capacitance by the resistance value of first resistance R 1 and first capacitor C 1 is determined.The base terminal B of two-carrier junction transistor B1 is coupled to second end of first resistance R 1 and second end of first capacitor C 2, the emitter-base bandgap grading end E of two-carrier junction transistor B1 is coupled to earth terminal, and the collector terminal C of two-carrier junction transistor B1 then is used for producing delay suppling signal SD STB_OKFirst termination of second resistance R 2 is received standby voltage STB, and second end of second resistance R 2 is coupled to the collector terminal C of two-carrier junction transistor B1.
Switch element 220 comprises PMOS transistor MP, the 3rd resistance R 3, second capacitor C 2 and nmos pass transistor MN.The gate terminal G receive delay suppling signal SD of PMOS transistor MP STB_OKFirst end of the 3rd resistance R 3 couples the drain electrode end S of PMOS transistor MP, and second termination of the 3rd resistance R 3 is received standby voltage STB.First end of second capacitor C 2 couples second end of the 3rd resistance R 3 and receives standby voltage STB, and second end of second capacitor C 2 then is coupled to the source terminal D of PMOS transistor MP.The gate terminal G of nmos pass transistor MP is coupled to the source terminal D of PMOS transistor MP and second end of second capacitor C 2, and the source terminal D of nmos pass transistor MN then couples second end of the 3rd resistance R 3 and first end of second capacitor C 2, and receives standby voltage STB.The drain electrode end S of nmos pass transistor MN then is used to provide standby voltage STB to motherboard MLB iFirst end of the 4th resistance R 4 couples the gate terminal G of nmos pass transistor MP, and its second end is coupled to earth terminal GND.
Based on above-mentioned, when standby voltage STB stablizes, the power supply suppling signal S that power module 120 is produced STB_OKCan be pulled up to high levle by low level.Each voltage supply delay cell P i Signal delay unit 210 receive power supply suppling signal S STB_OKAnd through h iAfter time, first resistance R 1 and first capacitor C 1 can allow the base terminal B of two-carrier junction transistor B1 be pulled up to high levle by low level, so two-carrier junction transistor B1 becomes conducting by ending.Thus, postpone suppling signal SD STB_OKDraw by high levle and to reduce to low level, allow power supply suppling signal S STB_OKWith delay suppling signal SD STB_OKWhen transition, has h iThe delay of time.PMOS transistor MP is because of postponing suppling signal SD STB_OKConducting during for low level, so the gate terminal G of nmos pass transistor MN is pulled up to noble potential by original electronegative potential and makes drain electrode end S and the source terminal D conducting of nmos pass transistor MN, and then standby voltage STB is provided to motherboard MLB i
Wherein, because each voltage supply delay cell P iThe time that is postponed is inequality (to be h 1≠ h 2The h of ≠～≠ N), so the resistance value of first resistance R 1 of each voltage supply delay cell 210 all should be different to some extent with the capacitance of first capacitor C 1.For example be respectively 30K Ω and 220pF, 30K Ω and 2Pf, reach 30K Ω and 2.2uF, but be not restricted to this.
Utilize the standby voltage of the standby voltage of 12V and 5V to offer three motherboards (being that N equals 3) respectively at this and propose experimental data with the evidence embodiment of the invention, please be simultaneously with reference to Fig. 4 to Fig. 7.Fig. 4 provides the inrush current synoptic diagram of 12V standby voltage to three motherboard simultaneously for existing server; Fig. 5 provides the inrush current synoptic diagram of 5V standby voltage to three motherboard simultaneously for existing server; Fig. 6 provides the inrush current oscillogram of 12V standby voltage for one embodiment of the invention server standby voltage supply system; Fig. 7 provides the inrush current oscillogram of 5V standby voltage for one embodiment of the invention server standby voltage supply system;
By Fig. 4 and Fig. 5 as can be known, existing server is at T 1Time point provides the standby voltage of 12V/5V to give three motherboards simultaneously, the mutual superposition of the inrush current that causes these motherboards to produce, and make the lowest high-current value of Fig. 4 or Fig. 5 inrush current make an appointment with slightly 7.46A/13.4A.Then, please be simultaneously with reference to Fig. 1, Fig. 6 and Fig. 7.When time point O stablized for the standby voltage STB that is supplied when power module 120, power module produced power supply suppling signal S STB_OKThe time.Time point T 2, T 3With T 4Then postpone h respectively for time point O 1, h 2With h 3Time point after time.In the present embodiment, standby voltage supply system 100 offers motherboard MLB at T2, T3 and T4 time point with standby voltage STB respectively 1, MLB 2With MLB 3, so that motherboard MLB 1～MLB 3The inrush current that is produced is superposition mutually not, so the lowest high-current value of the inrush current of Fig. 6 or Fig. 7 2.88A/5.52A approximately slightly.Learn that by experimental data standby voltage supply system 100 has reduced the lowest high-current value of inrush current, to reduce the probability that triggers over current protection protection mechanism in the power module 120.
From another angle, standby voltage supply module 110 might not comprise power module 120.Thus, the present invention proposes a kind of server standby voltage supply system 800, please refer to Fig. 8.Fig. 8 is the structural representation of another embodiment of the present invention server standby voltage supply system.Server standby voltage supply system 800 comprises the first motherboard MLB at least 1, the second motherboard MLB 2, power module 120 and standby voltage supply module 810.Standby voltage supply module 810 comprises first voltage supply delay cell P 1And the second voltage supply delay cell P 2First voltage supply delay cell P 1Be used to postpone very first time h 1After, standby voltage STB is provided to the first motherboard MLB 1Second voltage supply delay cell P 2Then postponing the second time h 2After standby voltage STB is provided to the second motherboard MLB 2, very first time h wherein 1Be uneven in length in the second time h 2Length.Present embodiment is similar to the various embodiments described above, so same action mode and explanation repeat no more.
In the various embodiments described above, standby voltage supply module can comprise power module and each voltage supply delay cell P i, or only with whole voltage supply delay cell P iBe integrated into a standby voltage supply module, but be not to be used to limit the present invention.Also can be with each voltage supply delay cell P iBe integrated into motherboard MLB iOn realize the embodiment of the invention.
In sum, embodiments of the invention provide respectively to a plurality of motherboards at the different time standby voltage of naming a person for a particular job, and it is all inequality that each motherboard receives time of standby voltage.Therefore, inrush current can not produce and mutual superposition simultaneously, to reduce the probability of the over current protection protection mechanism that triggers power supply unit.In addition, the embodiment of the invention also can reduce the risk that motherboard damages, and circuit unit need not select for use too high electric pressure to prevent that inrush current from burning circuit unit in the motherboard.
Though the present invention discloses as above with embodiment; but it is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; can change arbitrarily or be equal to replacement, so protection scope of the present invention should be as the criterion with the scope that the application's claims are defined.

Claims (8)

1. server standby voltage supply system, this system comprises:
N motherboard is defined as MLB 1, MLB 2... MLB N
One power module couples this N motherboard, and supplies a standby voltage to a described N motherboard; And
N voltage supply delay cell is defined as P 1, P 2... P N, described N voltage supply delay cell P 1, P 2... P NCouple this a power module and described N motherboard MLB respectively 1, MLB 2... MLB N, described N voltage supply delay cell P 1, P 2... P NPostpone h respectively 1, h 2... h NAfter time, this standby voltage is provided respectively to described N motherboard MLB 1, MLB 2... MLB N, h wherein 1≠ h 2The h of ≠～≠ N, and N is the positive integer greater than 1.
2. server standby voltage supply system according to claim 1 produces a power supply suppling signal when wherein this standby voltage of supplying when this power module is stablized, and P iPower supply supply delay cell comprises:
One signal delay unit is coupled to this power module, is used to receive this power supply suppling signal, and postpones h iProduce one after time and postpone suppling signal; And
One switch element is coupled to this signal delay unit, and being used for provides this standby voltage to one of described N motherboard according to this delay suppling signal, and wherein i is integer and 1≤i≤N.
3. server standby voltage supply system according to claim 2, wherein this signal delay unit comprises:
One first resistance, its first termination is received this power supply suppling signal;
One first electric capacity, its first end is coupled to an earth terminal, and second end of this first electric capacity couples second end of this first resistance;
One two-carrier junction transistor, its base terminal couples second end of this first resistance and second end of this first electric capacity, the emitter-base bandgap grading end of this two-carrier junction transistor is coupled to this earth terminal, and the collector terminal of this two-carrier junction transistor is used to produce this delay suppling signal; And
One second resistance, its first termination is received this standby voltage, and second end of this second resistance couples the collector terminal of this two-carrier junction transistor;
Wherein, h iThe length of time is determined by the resistance value of this first resistance and the capacitance of this first electric capacity.
4. server standby voltage supply system according to claim 2, wherein this switch element comprises:
One PMOS transistor, its gate terminal receive this delay suppling signal;
One the 3rd resistance, its first end couple this PMOS transistor drain end, and second termination of the 3rd resistance is received this standby voltage;
One second electric capacity, its first end couple second end of the 3rd resistance and receive this standby voltage, and second end of this second electric capacity couples the transistorized source terminal of this PMOS;
One nmos pass transistor, its gate terminal couples second end of the transistorized source terminal of this PMOS and this second electric capacity, the source terminal of this nmos pass transistor couples second end of the 3rd resistance and first end of this second electric capacity, and receiving this standby voltage, the drain electrode end of this nmos pass transistor is used to provide this standby voltage to one of described N motherboard; And
One the 4th resistance, its first end couples the gate terminal of this nmos pass transistor, and second end of the 4th resistance couples this earth terminal.
5. server standby voltage supply system, this system comprises:
One first motherboard;
One second motherboard;
One power module, this power module are used to supply a standby voltage to this first motherboard and this second motherboard; And
One standby voltage supply module, this standby voltage supply module comprises:
One first voltage supply delay cell, be used to postpone a very first time after, this standby voltage is provided to this first motherboard; And
One second voltage supply delay cell, be used to postpone one second time after, this standby voltage is provided to this second motherboard, wherein should the very first time be uneven in length in the length of this second time.
6. server standby voltage supply system according to claim 5 produces a power supply suppling signal when wherein this standby voltage of supplying when this power module is stablized, and this first power supply supply delay cell comprises:
One signal delay unit is coupled to this power module, is used to receive this power supply suppling signal, and produces a delay suppling signal after postponing this very first time; And
One switch element is coupled to this signal delay unit, and being used for provides this standby voltage to this first motherboard according to this delay suppling signal.
7. server standby voltage supply system according to claim 6, wherein this signal delay unit comprises:
One first resistance, its first termination is received this power supply suppling signal;
One first electric capacity, its first end is coupled to an earth terminal, and second end of this first electric capacity couples second end of this first resistance;
One two-carrier junction transistor, its base terminal couples second end of this first resistance and second end of this first electric capacity, the emitter-base bandgap grading end of this two-carrier junction transistor is coupled to this earth terminal, and the collector terminal of this two-carrier junction transistor is used to produce this delay suppling signal; And
One second resistance, its first termination is received this standby voltage, and second end of this second resistance couples the collector terminal of this two-carrier junction transistor;
Wherein, the length of this very first time is determined by the resistance value of this first resistance and the capacitance of this first electric capacity.
8. server standby voltage supply system according to claim 6, wherein this switch element comprises:
One PMOS transistor, its gate terminal receive this delay suppling signal;
One the 3rd resistance, its first end couple this PMOS transistor drain end, and second termination of the 3rd resistance is received this standby voltage;
One second electric capacity, its first end couple second end of the 3rd resistance and receive this standby voltage, and second end of this second electric capacity couples the transistorized source terminal of this PMOS;
One nmos pass transistor, its gate terminal couples second end of the transistorized source terminal of this PMOS and this second electric capacity, the source terminal of this nmos pass transistor couples second end of the 3rd resistance and first end of this second electric capacity, and receiving this standby voltage, the drain electrode end of this nmos pass transistor is used to provide this standby voltage to this first motherboard; And
One the 4th resistance, its first end couples the gate terminal of this nmos pass transistor, and second end of the 4th resistance couples this earth terminal.
CN2010101512437A 2010-04-07 2010-04-07 Standby voltage supply system of server Pending CN102213991A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103401550A (en) * 2013-08-09 2013-11-20 深圳芯邦科技股份有限公司 Driving method and device for interface circuits pads of chip
CN104866061A (en) * 2015-05-12 2015-08-26 浪潮电子信息产业股份有限公司 Method for controlling redundant power supply, power supply cabinet, and system
CN110231862A (en) * 2018-03-06 2019-09-13 佛山市顺德区顺达电脑厂有限公司 Server system and its method with power-down protection
CN113687705A (en) * 2020-05-19 2021-11-23 佛山市顺德区顺达电脑厂有限公司 Method for supplying power in standby phase
CN113687705B (en) * 2020-05-19 2024-04-19 佛山市顺德区顺达电脑厂有限公司 Method for providing power supply in standby stage

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JP3404723B2 (en) * 1994-06-22 2003-05-12 株式会社安川電機 Inrush current prevention device and method
US20090045677A1 (en) * 2007-08-13 2009-02-19 Arm Limited Power control circuitry and method
CN201238284Y (en) * 2008-08-01 2009-05-13 青岛海信宽带多媒体技术股份有限公司 Power-on/off mute circuit and set-top box with the same

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Publication number Priority date Publication date Assignee Title
JP3404723B2 (en) * 1994-06-22 2003-05-12 株式会社安川電機 Inrush current prevention device and method
US20090045677A1 (en) * 2007-08-13 2009-02-19 Arm Limited Power control circuitry and method
CN201238284Y (en) * 2008-08-01 2009-05-13 青岛海信宽带多媒体技术股份有限公司 Power-on/off mute circuit and set-top box with the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103401550A (en) * 2013-08-09 2013-11-20 深圳芯邦科技股份有限公司 Driving method and device for interface circuits pads of chip
CN104866061A (en) * 2015-05-12 2015-08-26 浪潮电子信息产业股份有限公司 Method for controlling redundant power supply, power supply cabinet, and system
CN110231862A (en) * 2018-03-06 2019-09-13 佛山市顺德区顺达电脑厂有限公司 Server system and its method with power-down protection
CN110231862B (en) * 2018-03-06 2022-10-28 佛山市顺德区顺达电脑厂有限公司 Server system with power failure protection function and method thereof
CN113687705A (en) * 2020-05-19 2021-11-23 佛山市顺德区顺达电脑厂有限公司 Method for supplying power in standby phase
CN113687705B (en) * 2020-05-19 2024-04-19 佛山市顺德区顺达电脑厂有限公司 Method for providing power supply in standby stage

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Application publication date: 20111012