CN113678189A - Method for compensating brightness of display and display - Google Patents
Method for compensating brightness of display and display Download PDFInfo
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- CN113678189A CN113678189A CN202080028516.0A CN202080028516A CN113678189A CN 113678189 A CN113678189 A CN 113678189A CN 202080028516 A CN202080028516 A CN 202080028516A CN 113678189 A CN113678189 A CN 113678189A
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Abstract
A method of compensating luminance of a display using a vertical organic light emitting transistor and a display are provided, which suppress variation in luminance over a long period of time. The method is a method of compensating for the luminance of a display including a plurality of vertical organic light emitting transistors and a memory storing characteristic information of the vertical organic light emitting transistors. The method comprises the following steps: a step (A) of applying a voltage for luminance inspection to a gate electrode of a vertical organic light emitting transistor to be corrected; a step (B) of measuring a current flowing through a current supply line by applying a voltage for luminance check to a gate electrode of the vertical organic light emitting transistor to be corrected, the current being supplied to a source electrode of the vertical organic light emitting transistor via the current supply line; and a step (C) of determining a correction value of a voltage to be applied to the gate electrode of the vertical organic light emitting transistor based on the value of the current measured in the step (B) and the characteristic information of the vertical organic light emitting transistor stored in the memory.
Description
Technical Field
The invention relates to a method of driving and operating a light emitting display and a display.
Background
In recent years, displays using organic semiconductor elements such as organic light emitting diodes (organic light emitting diodes) as light source elements have been put to practical use and are now commercially available. In the development of displays using organic semiconductor elements as light sources, in order to further improve performance, research is continuously being conducted to achieve higher luminance, higher definition, lower power consumption, and longer life.
Conventionally, a light emitting element (also referred to as a "pixel" and/or a "sub-pixel") of an organic Electroluminescence (EL) display is composed of an organic light emitting diode (also referred to as an "OLED") and a transistor that controls a current flowing through the organic light emitting diode. An organic light emitting diode is a device that emits light in response to a current input from a thin film transistor (also referred to as "TFT") formed on a rigid or flexible substrate to an organic EL layer interposed between an anode electrode and a cathode electrode.
However, with the above configuration, patent document 1 below describes a transistor which is used as an element for reducing the number of control elements and increasing the light emitting area to achieve higher luminance and controls the voltage applied to the gate electrode to adjust the current flowing through the transistor, and patent document 1 also describes a vertical organic light emitting transistor (also referred to as "VOLET") which emits light by itself according to the amount of current flowing through the vertical organic light emitting transistor. Patent document 2 below describes a display using vertical organic light emitting transistors, and is expected to greatly increase the luminance of the display.
PTL 1: patent document 1: WO 2009/036071
PTL 2: patent document 2: JP-A-2014-505324
Disclosure of Invention
Similar to a field effect transistor, a vertical organic light emitting transistor includes a source electrode, a gate electrode, and a drain electrode. The source electrode corresponds to an anode electrode, and the drain electrode corresponds to a cathode electrode. An EL element and an organic semiconductor layer are formed between the source electrode and the drain electrode, and each electrode is configured to emit EL by passing current through the EL element and the organic semiconductor layer. At least one of the source electrode and the drain electrode is configured to be transparent so that light obtained by light emission is emitted to the outside.
It is known that when the organic light emitting diode used in the conventional configuration is continuously lit for a long period of time, deterioration occurs in proportion to the injected current and the luminance gradually decreases. Potential causes are variations in interlayer injection efficiency due to chemical changes in the organic light emitting diode, accumulation of charges at interfaces of respective organic layers, and the like. The same applies to a vertical organic light emitting transistor that emits EL by passing a current through an EL element and an organic semiconductor layer interposed between a source electrode corresponding to an anode electrode and a drain electrode corresponding to a cathode electrode, as described above.
However, as a result of intensive studies, the present inventors have found that a display using a vertical organic light emitting transistor may suffer from the following problems depending on the detailed device structure and the materials used. When the vertical organic light emitting transistor applies a voltage to the gate electrode to emit EL by flowing a current through the EL element and the organic semiconductor layer, charges are accumulated at the interface between the gate electrode and the gate insulating film layer, the interface between the source electrode and the organic semiconductor layer and the surface layer, and the like, and at the respective gate insulating film layer and the surface layer. When charge accumulates at these interfaces, the following phenomena occur: even if a predetermined voltage is applied to the gate electrode by the vertical organic light emitting transistor, no charge equal to that in a state where the transistor is just manufactured or shipped in a factory is injected into the EL element and the organic semiconductor layer, and thus the luminance is reduced more quickly than the organic light emitting diode. Therefore, a display using a vertical organic light emitting transistor tends to cause characteristic fluctuations in a short period of time and tends to have a short lifetime, and thus reliability of a product becomes an issue.
Even if the current flowing through the vertical organic light emitting transistor changes, a circuit that performs feedback control may be configured so that a desired current flows. However, this adds to the complex circuit configuration, thus requiring an area for component placement. That is, the light emitting area becomes small, and achievement of higher luminance is hindered.
In view of the above problems, it is an object of the present invention to provide a method of compensating for luminance of a display using vertical organic light emitting transistors, which suppresses variation in luminance over a long period of time without increasing a complicated circuit configuration, and a display.
A method of compensating for luminance of a display according to the present invention is a method of compensating for luminance of a display including a plurality of vertical organic light emitting transistors and a memory storing characteristic information of the vertical organic light emitting transistors.
The method comprises the following steps: a step (A) of applying a voltage for luminance inspection to a gate electrode of a vertical organic light emitting transistor to be corrected; a step (B) of measuring a current flowing through a current supply line by applying a voltage for luminance check to a gate electrode of the vertical organic light emitting transistor to be corrected, the current being supplied to a source electrode of the vertical organic light emitting transistor via the current supply line; and a step (C) of determining a correction value of a voltage to be applied to the gate electrode of the vertical organic light emitting transistor based on the value of the current measured in the step (B) and the characteristic information of the vertical organic light emitting transistor stored in the memory.
The memory stores characteristic information of the vertical organic light emitting transistor when the display is just manufactured or when it is shipped in a factory. Here, the characteristic information of the vertical organic light emitting transistor includes, for example, a look-up table of electron mobility (μ), conductance (gm ═ Id/Vg), threshold voltage (Vt), luminance-voltage, and/or current-voltage characteristics, and the like. Id denotes a current value flowing between the source electrode and the drain electrode of the vertical organic light emitting transistor, and Vg denotes a voltage applied to the gate electrode of the vertical organic light emitting transistor.
As described above, the current value of the current flowing through the current supply line or each vertical organic light emitting transistor is confirmed, and in each vertical organic light emitting transistor, the voltage applied to the gate electrode is corrected based on the characteristic information stored in the memory so that the current having a desired current value flows. That is, the current supplied to the organic semiconductor layer of the vertical organic light emitting transistor for a long period of time is adjusted to have a desired current value. Therefore, the variation in luminance due to the deterioration of the vertical organic light emitting transistor itself and/or the OLED stack is suppressed and the luminance can be compensated for a long time.
The current value may be measured individually for each vertical organic light emitting transistor, or may be measured in common for vertical organic light emitting transistors arranged in a specific region or on the same line. When the current value of the current flowing through the source electrode of each vertical organic light emitting transistor is measured and the voltage applied to the gate electrode is adjusted, the current flowing through the source electrode can be accurately corrected to obtain desired luminance.
However, since a display having a large number of pixels is formed of millions to tens of millions of vertical organic light emitting transistors, it takes a long time to correct all the vertical organic light emitting transistors when the vertical organic light emitting transistors are individually corrected. Therefore, there is a luminance difference between a portion where the voltage applied to the gate electrode is corrected and a portion where the correction is not performed, and the image quality may be uneven. Therefore, it is preferable to commonly perform correction on the vertical organic light emitting transistors arranged on a specific region or the same line in a short time.
The step (a) of the luminance compensation method may include the step (a1) of: the current supply to the vertical organic light emitting transistor not to be corrected is cut off.
When the steps (a) and (B) are performed, a voltage for luminance check is applied to the gate electrode of the vertical organic light emitting transistor instead of a voltage corresponding to an image to be displayed, so that an unintended display (unintended display) is temporarily displayed on the screen. In this case, if a bright screen is displayed immediately, a person viewing the display may feel flickering of the screen. Therefore, it is preferable to use a screen that is as dark as possible.
By adopting the above method, a path serving as a supply source of current flowing through the vertical organic light emitting transistor can be cut off, a correction step can be carried out on a darker screen, and the current can be measured more accurately.
Steps (a) and (B) of the illumination compensation method are carried out during an image update interval.
The characteristics of the vertical organic light emitting transistor are easily affected by temperature, and during an operation at a temperature higher than that at the time of power-on, the value of a flowing current is different even when the same voltage is applied to the gate electrode of the vertical organic light emitting transistor. Therefore, it is necessary to measure and correct the current value at the temperature during operation.
By adopting the above method, the voltage applied to the gate electrode of the vertical organic light emitting transistor is corrected at the time when the display starts to operate and the temperature rises and in a state where the temperature rises to the operating temperature, so that a desired luminance can be realized, and as a result, light emission having the desired luminance after the correction can be realized. After the power is turned on, a correction value is determined through a single current measurement, and the offset voltage of each vertical organic light emitting transistor is obtained and stored, and control may be exercised such that the voltage applied to the gate electrode of the vertical organic light emitting transistor is offset (offset) according to the lapse of time and temperature.
In a liquid crystal display or monitor, a different screen from the image displayed during the update interval of the image to be displayed is temporarily inserted to provide the following effects: the afterimage (afterimage) may be reduced when the previous image is switched to the next image.
The step (B) of the luminance compensation method may include the step (B1) of: storing the current value measured in step (B) in a memory.
By adopting the above-described method, it is possible to carry out the correction so that not only the initial characteristic information of each vertical organic light emitting transistor stored in the memory but also the difference or the like with respect to the current value measured in the existing step and the corrected voltage value is adjusted. Therefore, even after the power is turned on, the current value of the source electrode of the vertical organic light emitting transistor is not measured, and an image or a movie can be displayed in a state where correction is performed based on the current value at the previous correction.
The display of the present invention includes:
a plurality of vertical organic light emitting transistors arranged in an array;
a data line supplying a voltage for controlling gate electrodes of the plurality of vertical organic light emitting transistors;
a current supply line supplying current to source electrodes of the plurality of vertical organic light emitting transistors;
a first thin film transistor connected between a gate electrode of each vertical organic light emitting transistor and a data line and controlling a voltage supply to the gate electrode of the vertical organic light emitting transistor;
a first gate line connected to a gate electrode of the first thin film transistor and controlling the first thin film transistor;
a controller controlling a voltage applied to at least the first gate line;
a current measuring section that measures a current flowing through the current supply line; and
and a memory storing characteristic information of the respective vertical organic light emitting transistors.
The controller exercises control to apply a voltage for brightness check to the gate electrode of the vertical organic light emitting transistor to be corrected,
the current measuring part measures a current flowing through a source electrode of the vertical organic light emitting transistor by applying a voltage for brightness check to a gate electrode of the vertical organic light emitting transistor to be corrected, and stores a value of the measured current in a memory, and
the controller determines a correction value of a voltage to be applied to the gate electrode of the vertical organic light emitting transistor based on the measured value of the current and the characteristic information of the vertical organic light emitting transistor stored in the memory.
For example, the controller controls the voltage of the first gate line to turn on the first thin film transistor connected to the vertical organic light emitting transistor to be corrected, and in this on state, determines a correction value of the voltage applied to the data line according to the current value of the current supply line measured by the current measuring part and the characteristic information of the vertical organic light emitting transistor stored in the memory. Therefore, the luminance of the vertical organic light emitting transistor to be corrected can be corrected.
According to the above configuration, the voltage applied to the data line may be adjusted to display a desired image. Therefore, the value of the current flowing through the vertical organic light emitting transistor can be corrected, and a display in which the image quality and the luminance do not change even though it is used for a long time is configured, and the luminance can be compensated for long-time illumination.
In a display, a dielectric layer may be formed between a gate electrode and a source electrode of a vertical organic light emitting transistor.
An image displayed on the display is updated by sequentially switching on/off states of first thin film transistors connected to the respective vertical organic light emitting transistors and applying a desired voltage to gate electrodes of the vertical organic light emitting transistors according to the respective pixels. At this time, after the voltage application to the gate electrode of the vertical organic light emitting transistor is completed and the first thin film transistor is switched to the off state, the vertical organic light emitting transistor must maintain its luminance for a predetermined time. That is, in order to maintain the current flowing through the vertical organic light emitting transistor, it is necessary to maintain the voltage between the gate electrode and the source electrode of the vertical organic light emitting transistor.
For this purpose, an element for maintaining charge, such as a capacitor, must be connected between the gate electrode and the source electrode of the vertical organic light emitting transistor. If a capacitor configured as a semiconductor circuit is used to obtain a capacitance value for a sustain voltage, a very large element is required and a light emitting region is compressed.
Therefore, with the above configuration, the capacitor can be configured as a parasitic element in the vertical organic light emitting transistor, which is formed to have a large size to increase a light emitting area. That is, a capacitor for maintaining a voltage need not be separately connected, and a light emitting region is not compressed, so that a display with higher luminance can be constructed.
In a vertical organic light emitting transistor of a display, a source electrode and/or a drain electrode may be formed of a conductive material containing carbon.
In addition, in a vertical organic light emitting transistor of a display, a source electrode and/or a drain electrode may be formed of a carbon nanotube (also referred to as "CNT").
The conductive material containing carbon (particularly, carbon nanotube) has a high capacity to carry a high current density, and can form a conductive film transparent to visible light. Therefore, by using the materials as described above, a vertical organic light emitting transistor which is transparent to visible light and can flow a large current can be constituted. Since the carbon nanotubes have high mechanical strength and are flexible, a flexible display can also be configured.
The display further includes a second thin film transistor connected between the source electrode of the vertical organic light emitting transistor and the current supply line and controlling the supply of current to the source electrode of the vertical organic light emitting transistor, and a second gate line connected to the gate electrode of the second thin film transistor and controlling the second thin film transistor. The controller may exercise control so that the second thin film transistor connected to the vertical organic light emitting transistor not to be corrected is in an off state.
In addition, the second thin film transistor of the display may be formed of an oxide semiconductor.
During normal operation, the second thin film transistor in an on state is switched to an off state, so that a supply path of current flowing through the vertical organic light emitting transistor can be cut off. In addition, when the second thin film transistor is formed of an oxide semiconductor in which a small amount of current (leakage current) flows even in an off state, the current flowing through the vertical organic light emitting transistor which is not to be corrected can be further reduced.
The present invention realizes a method of compensating for the luminance of a display using a vertical organic light emitting transistor, which suppresses the variation in luminance over a long period of time without increasing a complicated circuit configuration, and a display.
Drawings
Fig. 1 is a schematic configuration diagram of a part of an embodiment of a display.
Fig. 2 is a circuit diagram of the light emitting unit in fig. 1.
Fig. 3 is a configuration diagram of the controller in fig. 1.
Fig. 4 is a plan view of a schematic element arrangement of a light emitting unit arranged on a substrate.
Fig. 5 is a side view of the light emitting unit in fig. 4.
Fig. 6 is a flowchart showing a luminance correction procedure of the display.
Fig. 7 is a schematic configuration diagram of a part of another embodiment of a display.
Detailed Description
Hereinafter, the configuration of the display of the present invention will be explained with reference to the drawings. The following drawings are schematically illustrated, and the size ratio and the number in the drawings do not necessarily coincide with the actual size ratio and the actual number.
Configuration of
First, the configuration of the display will be explained. Fig. 1 is a schematic configuration diagram of a part of an embodiment of a display 1. As shown in fig. 1, the display 1 of the present embodiment includes: a light emitting unit 10 including vertical organic light emitting transistors arranged in an array; a data line 11 supplying a voltage to a gate electrode of the vertical organic light emitting transistor; a current supply line 12 supplying current to a source electrode of the vertical organic light emitting transistor; a first gate line 13 controlling the first thin film transistor; a second gate line 14 controlling the second thin film transistor; a controller 15; a current measuring unit 16 for measuring a current flowing through the current supply line 12; and a memory 17.
Fig. 2 is a circuit diagram of the light emitting unit 10 in fig. 1. As shown in fig. 2, the light emitting unit 10 includes: a vertical organic light emitting transistor 20; a first thin film transistor 21 controlling a voltage supply to a gate electrode of the vertical organic light emitting transistor 20; a second thin film transistor 22 controlling current supply to the source electrode of the vertical organic light emitting transistor 20; and a capacitor 23 connected between the source electrode and the gate electrode of the vertical organic light emitting transistor 20.
The data line 11 is a wiring for applying a voltage to the gate electrode of the vertical organic light emitting transistor 20 through the first thin film transistor 21 to adjust the light emission luminance of the vertical organic light emitting transistor 20 according to an image to be displayed. The current supply line 12 is a wiring for supplying a current to the source electrode of the vertical organic light emitting transistor 20 through the second thin film transistor 22.
The first gate line 13 is connected to a gate electrode of the first thin film transistor 21 and controls on/off of the first thin film transistor 21, that is, controls energization (energization) between the gate electrode of the vertical organic light emitting transistor 20 and the data line 11. The second gate line 14 is connected to a gate electrode of the second thin film transistor 22, and controls on/off of the second thin film transistor 22, that is, controls energization between a source electrode of the vertical organic light emitting transistor 20 and the current supply line 12.
The current measuring section 16 is provided to measure the total value of the amounts of current flowing to the light emitting cells 10 (vertical organic light emitting transistors 20) connected to the same current supply line 12.
Fig. 3 is a configuration diagram of the controller 15 in fig. 1. As shown in fig. 3, the controller 15 includes: a plurality of gate drivers 15a for driving the data lines 11; a plurality of source drivers 15b for driving the current supply lines 12; a plurality of gate controllers 15c for controlling the voltage of the first gate lines 13 and the voltage of the second gate lines 14; a data input/output circuit 15d that receives the current value measured by the current measuring section 16 and stores the current value in the memory 17; and an arithmetic processing circuit 15e that calculates a correction value of the voltage applied to the gate electrode of the vertical organic light emitting transistor 20 based on the current value measured by the current measuring section 16 and the characteristic information of the vertical organic light emitting transistor 20 stored in the memory 17. Details regarding the control will be set forth in the following control method section.
The specific arrangement of the individual blocks constituting the controller 15 is constituted by dedicated circuits, a processor controlled by a software program, or a combination thereof. For example, the special-purpose Circuit may be an Application Specific Integrated Circuit (ASIC) or a programmable device (PLD), a Complex Programmable Logic Device (CPLD), a Field Programmable Gate Array (FPGA)). The ASIC is configured to be electrically connected to a logic circuit driving circuit for generating a control signal, the logic circuit being disposed on the substrate on which the vertical organic light emitting transistors 20 are disposed, the driving circuit for driving each vertical organic light emitting transistor 20 or each line (11, 12, 13, 14). Programmable devices can be programmed to implement specialized circuits.
The processor may be a Central Processing Unit (CPU), another general-purpose processor, a Digital Signal Processor (DSP), an ASIC, etc. A general purpose processor may be a microprocessor, and the processor may be any standard processor or the like. The various process steps may be performed directly by a hardware processor or may be performed by a combination of hardware and software (or software functional blocks) in a processor. Furthermore, a control device such as a microcontroller may be used.
The memory 17 may comprise high speed Random Access Memory (RAM) and may be implemented by any type of volatile or non-volatile memory device, or combination thereof. Embodiments include Static Random Access Memory (SRAM), Electrically Erasable Programmable Read Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Read Only Memory (PROM), Read Only Memory (ROM), magnetic memory, flash memory, magnetic disks, and optical disks.
The capacitor 23 is a voltage holding element provided to maintain a display image for a predetermined time when the first thin film transistor 21 is in an off state, and holds a voltage between the gate electrode and the source electrode of the vertical organic light emitting transistor 20.
Next, the structure of each element formed on the substrate will be explained. Fig. 4 is a top view of an exemplary element arrangement of the light emitting unit 10 disposed on the substrate 30. Fig. 5 is a side view of the light emitting unit 10 in fig. 4. As shown in fig. 4 and 5, the vertical organic light emitting transistor 20, the first thin film transistor 21, and the second thin film transistor 22 are formed in a region divided by the data line 11, the current supply line 12, the first gate line 13, and the second gate line 14.
The substrate 30 may be made of a glass material or a plastic material such as polyethylene Terephthalate (PET), polyethylene Naphthalate (PEN), or polyimide.
In the following description, the description will be made by assuming that: the wiring direction of the data line 11 and the current supply line 12 is the X direction, the wiring direction of the first gate line 13 and the second gate line 14 is the Y direction, the direction orthogonal to the X direction and the Y direction is the Z direction, and the side facing the direction (+ Z direction) away from the substrate 30 is the upper layer side.
In the configuration of the vertical organic light emitting transistor 20, a source electrode layer 20s is formed, and a gate electrode layer 20g is further formed below the source electrode layer 20s via a gate insulating film layer 20h formed of a dielectric. The source electrode layer 20s is configured to apply a conductive material containing carbon (in the present embodiment, carbon nanotubes) from an upper layer onto the surfaces of the drain electrode layer 20d, the organic EL layer 20c, the organic semiconductor layer 20a, and the surface layer 31 corresponding to the cathode electrode. When a voltage is applied to the gate electrode layer 20g, a Schottky barrier (Schottky barrier) between the organic semiconductor layer 20a and the source electrode layer 20s is changed, and once a predetermined threshold value is exceeded, a current flows from the source electrode layer 20s to the organic semiconductor layer 20a, thereby causing the vertical organic light emitting transistor 20 to emit light.
In the display 1 of the present embodiment, the substrate 30 is made of a material transparent to visible light, and the gate electrode layer 20g and the source electrode layer 20s are configured to have a gap through which visible light can pass, so that light emitted from the organic semiconductor layer 20a passes through the substrate 30 and is emitted to the outside, thereby displaying an image. As described above, a method of passing light through the substrate 30 and emitting light is also called a "bottom emission method", which has advantages of easy wiring connection between electrodes and easy manufacturing.
The first thin film transistor 21 and the second thin film transistor 22 are connected to source electrode layers (21s, 22s) and drain electrode layers (21d, 22d), respectively, the oxide semiconductor layers (21a, 22a) are interposed between the source electrode layers (21s, 22s) and the drain electrode layers (21d, 22d), and gate electrode layers (21g, 22g) are formed below the oxide semiconductor layers (21a, 22a), and an insulating layer or a dielectric layer is interposed between the gate electrode layers (21g, 22g) and the oxide semiconductor layers (21a, 22 a). When a voltage is applied to the gate electrode layers (21g, 22g), a channel is formed in the oxide semiconductor layers (21a, 22a), and the source electrode layers (21s, 22s) and the drain electrode layers (21d, 22d) are energized.
In the first thin film transistor 21, the source electrode layer 21s is connected to the data line 11, and the drain electrode layer 21d is connected to the gate electrode layer 20g of the vertical organic light emitting transistor 20. In the second thin film transistor 22, the source electrode layer 22s is connected to the current supply line 12, and the drain electrode layer 22d is connected to the source electrode layer 20s of the vertical organic light emitting transistor 20. In the first thin film transistor 21, the source electrode layer 21s may be connected to the gate electrode layer 20g of the vertical organic light emitting transistor 20, and the drain electrode layer 21d may be connected to the data line 11.
As shown in fig. 4, the vertical organic light emitting transistor 20 is formed such that a light emitting area is as large as possible to achieve high luminance, and the first thin film transistor 21 and the second thin film transistor 22 are formed as small as possible at corners of the segmented regions such that an influence on the light emitting area of the vertical organic light emitting transistor 20 is small.
In fig. 4 and 5, the capacitor 23 is not illustrated, but as shown in fig. 5, in the vertical organic light emitting transistor 20 of the present embodiment, a source electrode layer 20s and a gate electrode layer 20g are arranged to face each other with a gate insulating film layer 20h interposed between the source electrode layer 20s and the gate electrode layer 20g to provide the capacitor 23 as a parasitic element. In such a capacitor 23 as a parasitic element, when the capacitance value is insufficient, another capacitor may be additionally formed.
Hereinafter, materials for the respective layers will be exemplified.
Examples of the material of the drain electrode layer 20d of the vertical organic light emitting transistor 20 include single or multi-layer graphene, carbon nanotubes, aluminum (Al), lithium fluoride (LiF), molybdenum oxide (MoXOY), Indium Tin Oxide (ITO), and zinc oxide (ZnO).
Examples of the material of the gate electrode layer 20g of the vertical organic light emitting transistor 20 include zinc oxide (ZnO) doped with a metal (e.g., aluminum (Al), tin (Sn), yttrium (Y), scandium (Sc), or gallium (Ga)), a transparent conductive oxide (e.g., indium oxide (In)) doped with a metal, and undoped2O3) Tin dioxide (SnO)2) And cadmium oxide (CdO)) And materials containing combinations thereof). Alternatively, aluminum (Al), gold (Au), silver (Ag), platinum (Pt), cadmium (Cd), nickel (Ni), and tantalum (Ta), and combinations thereof, as well as p-doped silicon (Si) or n-doped silicon (Si) and gallium arsenide (GaAs) may be employed.
An embodiment of the material of the gate insulating film layer 20h between the surface layer 31 and the gate electrode layer 20g of the vertical organic light emitting transistor 20 comprises an organic compound, such as silicon oxide (SiO)X) Alumina (Al)2O3) Silicon nitride (Si)3N4) Yttrium oxide (Y)2O3) Lead titanate (PbTiO)X) Aluminum titanate (AlTiO)X) Glass and parylene polymers, polystyrene, polyimide, polyvinylphenol, polymethylmethacrylate, and fluoropolymer.
Examples of the material of the organic semiconductor layer 20a of the vertical organic light emitting transistor 20 include: linear condensed polycyclic aromatic compounds (or acene compounds) (e.g., naphthalene, anthracene, rubrene, tetracene, pentacene, hexacene, and derivatives thereof), pigments (e.g., copper phthalocyanine (CuPc) compounds, azo compounds, perylene compounds, and derivatives thereof), low molecular weight compounds (e.g., hydrazone compounds, triphenylmethane compounds, diphenylmethane compounds, stilbene compounds, allyl vinyl compounds, pyrazoline compounds, triphenylamine derivatives (TPD), allyl amine compounds, low molecular weight amine derivatives (a-NPD), 2',7,7' -tetrakis (diphenylamino) -9,9'-spirobifluorene (2,2',7,7'-tetrakis (diphenylamino) -9,9' -spirobifluorene, spiroo-TAD), and mixtures thereof), and their use, N, N ' -di (1-naphthyl) -N, N ' -diphenyl-4,4' -diaminobiphenyl (N, N ' -di (1-naphthyl) -N, N ' -diphenyl-4,4' -diaminobiphenol, spiro-NPB), 4' -tris [ N-3-methylphenyl-N-phenylamino group]Triphenylamine (4,4' -tris [ N-3-methylphenyl-N-phenylaminono)]triphenylamine, mMTDATA), 2',7,7' -tetrakis (2,2-diphenylvinyl) -9,9-spirobifluorene (2,2',7,7' -tetrakis (2,2-diphenylvinyl) -9,9-spirobifluorene, spiro-DPVBi), 4'-bis (2,2-diphenylvinyl) biphenyl (4,4' -bis (2,2-diphenylvinyl) biphenol, DPVBi), (8-hydroxyquinoline) aluminum ((8-quinolinola)to) aluminum, Alq), tris (8-quinolinolato) aluminum (tris (8-quinolinolato) aluminum, Alq3) Tris (4-methyl-8quinolinolato) aluminum (tris (4-methyl-8 quinonolato) aluminum, Almq3) And derivatives thereof), polymer compounds (e.g., polythiophene, poly (p-phenylene vinylene) (PPV), biphenyl-containing polymers, dialkoxy-containing polymers, alkoxyphenyl PPV, phenyl/dialkoxy PPV copolymers, poly (2-methoxy-5- (2'-ethylhexyloxy) -1,4-phenylene vinylene) (poly (2-methoxy-5- (2' -ethylhexyloxy) -1,4-phenylene vinylene), MEH-PPV), poly (ethylenedioxythiophene) (poly (ethylenedioxythiophene), PEDOT), poly (styrenesulfonic acid) (poly (styrenesulfonic acid), PSS), poly (aniline), PAM), poly (N-vinylcarbazole), poly (vinylpyrene), poly (ethylene-p-phenylene vinylene), PPV, and pdm, and pdn, and p-vinylpyrene, Ethyl carbazole formaldehyde halogenated resin and modified compounds thereof), n-type transport organic low molecules (e.g., 5-diperfluorohexylcarbonyl-2, 2: 5_,2 _: 5_,2_ -tetrathiophene (DFHCO-4T), α, ω -diperfluorohexyltetrathiophene (DFH-4T), bis (perfluorophenylcarbonyl) -2,2'5', 2'5', 2-tetrapolythiophene (DFCO-4T), poly { [ N, N ' -bis (2-octyldodecanol) naphthalene-1, 4,5, 8-bis- (dicarboximide) -2, 6-diyl]-5,5'- (2,2' -bithiophene) } (P (NDI2OD-T2)), N '-bis (N-octyl) -dicyanolacetylene-3, 4,9, 10-bis (dicarboximide) (PDI8-CN2), N' -1H, 1H-perfluorobutyl dicyanoperyleneimide (PDIF-CN2), fluorinated copper phthalocyanine (F16CuPc), fullerene, naphthalene, perylene, and oligothiophene derivatives, oligomers, or polymers), and aromatic compounds having a thiophene ring (e.g., thieno [3,2-b ])]Thiophene, dinaphthyl [2, 3-b: 2',3' -f]Thieno [3,2-b]Thiophene (dinaphthyl [2, 3-b: 2',3' -f)]thieno[3,2-b]thiophene, DNTT) and 2-decyl-7-phenyl [ 1]]Benzothieno [3,2-b ]][1]Benzothiophene (2-decyl-7-phenyl [ 1]]benzothieno[3,2-b][1]benzothiophene，BTBT))。
Here, in the vertical organic light emitting transistor 20, an organic semiconductor having a suitable energy level is appropriately selected, so that a hole injection layer, a hole transport layer, an organic EL layer, an electron transport layer, an electron injection layer, and the like, which are generally used in an OLED display, can be advantageously used. The color of light emitted to the outside is adjusted by selecting a material constituting the organic EL layer 20c to emit light of colors such as red, green, and blue. Further, the vertical organic light emitting transistor 20 may be configured to emit white light, and in a pixel having the same vertical organic light emitting transistor 20, a color filter may be incorporated and used to select light of a desired color and thus emit light. Further, the vertical organic light emitting transistor 20 may be configured to emit light of a short wavelength (e.g., blue light), and in a pixel having the same vertical organic light emitting transistor 20, a layer composed of an energy conversion material (e.g., quantum dots) may be used to convert the emitted light to a desired wavelength and thus emit light of a desired color (e.g., green and red).
The surface layer 31 is a layer formed on the gate insulating film layer 20h for fixing the source electrode layer 20s (specifically, CNT layer). The surface layer 31 may be formed by applying a composition containing a binder resin formed of a silane coupling material, an acrylic resin, or the like.
Examples of the material of the oxide semiconductor layers (21a, 22a) composed of the first thin film transistor 21 and the second thin film transistor 22 include In-Ga-Zn-O-based semiconductor, Zn-O-based semiconductor (ZnO), In-Zn-O-based semiconductor (IZO (registered trademark)), Zn-Ti-O-based semiconductor (ZTO), Cd-Ge-O-based semiconductor, Cd-Pb-O-based semiconductor, cadmium oxide (CdO), Mg-Zn-O-based semiconductor, In-Sn-Zn-O-based semiconductor (for example, In2O3-SnO2-ZnO) and In-Ga-Sn-O based semiconductors.
In the present embodiment, the first thin film transistor 21 and the second thin film transistor 22 are thin film transistors each made of an oxide semiconductor, but may be thin film transistors made of amorphous silicon. Either p-type or n-type may be used. Further, as the specific configuration, any configuration may be adopted, such as a staggered type, an inverted staggered type, a coplanar type, or an inverted coplanar type.
The vertical organic light emitting transistor 20 described in patent document 1 and patent document 2 can also be adopted as the vertical organic light emitting transistor 20.
Control method
Finally, a display control method will be explained. In the present embodiment, as shown in fig. 1, the light emitting cells 10 are arranged in an array. A column in the vertical direction in fig. 1 shares the data line 11 and the current supply line 12, and a column in the horizontal direction in fig. 1 shares the first gate line 13 and the second gate line 14.
In the following description, on the premise of the above configuration, the light emitting cells 10 to be corrected at a time are described as a combination of horizontal rows sharing the first gate line 13 and the second gate line 14 in fig. 1. However, the light emitting cells 10 to be corrected at a time may be corrected simultaneously in a plurality of combinations in the horizontal direction sharing the first gate line 13 in fig. 1, or the single light emitting cells 10 may be corrected in order.
The brightness compensation method according to the present embodiment is carried out during an image update interval for displaying the next image with respect to the displayed image while the display 1 is displaying an image. The following luminance compensation method may be performed at any time, may be performed when the power is turned on, or may be performed at certain time intervals from when the power is turned on. In the case of the brightness compensation method being implemented when the power is just switched on, before the display 1 displays any image or video from any signal input, a standard brightness correction procedure may be implemented during which the measured pixels in the display will light up and a flashing or color shifting or scrolling pattern will be observed on the display 1. This can be considered a start-up sequence (bootup sequence) of the display, since it is done before any image or video from any signal input is displayed on the display 1, and the interruption of the display viewing experience experienced by the viewer of the display will be minimal.
Fig. 6 is a flowchart showing a luminance correction routine of the display 1. As shown in fig. 6, when the display 1 performs the correction control from the state in which the normal image display is carried out, the gate controller 15c of the controller 15 switches the second thin film transistor 22 connected to the vertical organic light emitting transistor 20 to be corrected to the on state and switches the second thin film transistor 22 connected to the vertical organic light emitting transistor 20 not to be corrected to the off state (S1).
After performing step S1, the gate controller 15c of the controller 15 switches the first thin film transistor 21 connected to the vertical organic light emitting transistor 20 to be corrected to an on state and switches the first thin film transistor 21 connected to the vertical organic light emitting transistor 20 not to be corrected to an off state (S2). The controller 15 thus exercises control so that no voltage is applied to the gate electrode of the vertical organic light emitting transistor 20 that is not to be corrected, and no current is supplied to the source electrode.
When the control is carried out as described above, a voltage for luminance check is applied to the data line 11 connected to the first thin film transistor 21 in the on state or to all the data lines 11 (S3). Therefore, currents corresponding to the sum of the respective current values obtained when the voltage for luminance inspection is applied to the vertical organic light emitting transistor 20 to be corrected flow through the current supply line 12.
Therefore, the current measuring section 16 measures the current of the current supply line 12 connected to the second thin film transistor 22 in the on state or all the current supply lines 12 (S4). At this time, it is desirable to measure a current value obtained by multiplying a value of a current flowing from the current supply line 12 to the source electrode by the number of the vertical organic light emitting transistors 20 to be corrected when a voltage for luminance inspection is applied to the gate electrode of the second thin film transistor 22.
Specific embodiments of the method of measuring a current value include: a method of measuring a current value by an analog/digital converter (a/D converter); a method of setting a resistor on the current supply line 12 and comparing the voltage appearing across the resistor with a desired voltage value; and a method of providing a shunt path, measuring a current flowing through the shunt path without flowing through each of the vertical organic light emitting transistors using an ammeter when a current corresponding to a predetermined current value flows through the current supply line 12, and measuring a difference between the measured current value and a predetermined supply current value.
The controller 15 acquires a current value (I1) corresponding to the voltage (Vc) for luminance check actually measured by the data input/output circuit 15d as characteristic information, and stores the current value in the memory 17. At this time, the data input/output circuit 15d of the controller 15 reads from the memory 17 the current value (I0) corresponding to the voltage (Vc) for luminance inspection in a state just as manufactured or at the time of factory shipment. Then, the arithmetic processing circuit 15e confirms the deviation from the characteristic information, and determines the correction value of the voltage applied to the data line 11 to reduce the deviation (Δ I — I1-I0) by the current value (S5). The characteristic information for comparison at this time may be conductance calculated by the arithmetic processing circuit 15e conductance (gm1 ═ I1/Vc).
When the correction value is determined, the control returns to the normal image display control, the gate controller 15c of the controller 15 switches the second thin film transistor 22 to the on state, and the correction voltage, which is the voltage corresponding to the image to be displayed by the gate driver 15a of the controller 15, is applied to the data line 11.
As described above, the correction voltage value is applied to the gate electrode of the vertical organic light emitting transistor 20 so that even when an expected current does not flow through the source electrode due to deterioration in the case of applying a voltage to the gate electrode, the control of the gate electrode is corrected to obtain an expected current value, and it is possible to suppress a change in luminance and compensate the luminance for long-time illumination.
In the luminance compensation method of the present embodiment, as described above, almost no current flows through the vertical organic light emitting transistor 20 not to be corrected. Therefore, when the correction control is carried out in the light emitting unit 10 each time, although only one horizontal line sharing the first and second gate lines 13 and 14 slightly emits light in fig. 1, the other vertical organic light emitting transistors 20 are turned off. Therefore, this corresponds to black screen insertion (black screen insertion) in the image update interval. The black screen insertion may be carried out after each image display frame, i.e. the black screen alternates with the image display screen every other frame during the operating time of the display 1. Thus, during each black screen insertion time, one horizontal line in fig. 1 may undergo a brightness measurement and compensation process, and all pixels in the display will be continuously measured and compensated in a rolling fashion, line by line. To minimize the impact on display quality of the rows measured and compensated for in a black screen insertion frame, the luminance signals of the individual pixels in the rows may be adjusted so that the time average brightness (time average brightness) emitted by the pixels is equal to the target brightness of the pixels needed to display the content. Due to black screen insertion, a pixel typically requires twice the brightness during an image display frame to meet the time-averaged brightness requirement. For example, if a pixel has a target luminance of 100cd/m ^2 required to display content in the next frame, the actual output luminance of the pixel during the image display frame needs to be 200cd/m ^2, and thus the average luminance of the pixel during the image display frame and the black screen insertion frame is 100cd/m ^2 because the pixel will not emit any light during the black screen insertion frame. However, if the pixel in a row that will undergo the measurement and compensation sequence during the next blackscreen insertion frame needs to be lit to the target luminance of 100cd/m ^2 required for displaying the content, then since the pixel will be lit during the blackscreen insertion frame, the luminance of the pixel during the image display frame and the blackscreen insertion frame can be adjusted to get the target value, such as the image display frame luminance: black screen insertion frame luminance 100cd/m ^ 2: 100cd/m ^2, or 150cd/m ^ 2: 50cd/m ^2, or 50cd/m ^ 2: 150cd/m 2, or 0cd/m 2: 200cd/m 2, and so on. The need for more accurate and efficient measurement and compensation can be met using appropriate luminance values, and thus appropriate current values, of the pixels during black screen insertion frames.
When a black screen is inserted in an image update interval in a liquid crystal display or a light emitting display, a screen different from an image displayed during the update interval of an image to be displayed is temporarily inserted to reduce a residual image when a previous image is switched to a next image. Therefore, by suppressing the residual image in the above-described manner, the display can display the image and the moving image more clearly.
Another embodiment
Hereinafter, another embodiment will be explained.
<1> the correction value can be determined based on the current value or conductance measured during the existing correction control stored in the memory 17. The display 1 may also be used to correct the correction value based on the value measured during the existing correction control according to the lapse of time and the detection of a defect.
<2> fig. 7 is a schematic configuration diagram of a part of another embodiment of the display 1. As shown in fig. 7, the display 1 of the present invention may not include the second thin film transistor 22. The second thin film transistor 22 cuts off the current path, and thus no current flows through the vertical organic light emitting transistor 20 that is not to be modified. By applying a suitable data signal voltage on the data line 11 and feeding a suitable voltage to the gate electrode of the vertical organic light emitting transistor 20, the vertical organic light emitting transistor 20 can be switched to its off-state in which only a minimal current flows through the vertical organic light emitting transistor 20. In other words, if the current flowing through the vertical organic light emitting transistor 20 not to be corrected in the state where the vertical organic light emitting transistor 20 is turned off is very small and not so high as to affect the correction calculation, the second thin film transistor 22 may not be required.
With the above configuration, wirings and elements can be reduced, and a light emitting region can be further increased. Thus, a display 1 having higher luminance can be realized.
<3> the display 1 may be configured to emit light emitted from the organic semiconductor layer 20a to an opposite side of the substrate 30 and display an image. This configuration is also called a "top emission method", and has an advantage that an element can be disposed between the vertical organic light emitting transistor 20 and the substrate 30.
<4> the configuration included in the above display 1 is only an embodiment, and the present invention is not limited to the illustrated configuration.
Claims (13)
1. A method of compensating for luminance of a display including a plurality of vertical organic light emitting transistors and a storage element storing characteristic information regarding performance characteristics of the vertical organic light emitting transistors, the method comprising:
a step (A) of applying a voltage for luminance inspection to a gate electrode of a vertical organic light emitting transistor to be corrected;
a step (B) of measuring a current flowing through a current supply line through which the current is supplied to a source electrode of the vertical organic light emitting transistor by applying the voltage for luminance check to the gate electrode of the vertical organic light emitting transistor to be corrected; and
a step (C) of determining a correction value of the voltage to be applied to the gate electrode of the vertical organic light emitting transistor based on the value of the current measured in the step (B) and the characteristic information of the vertical organic light emitting transistor stored in the memory.
2. The method of compensating for the brightness of a display according to claim 1, wherein said step (a) comprises the step (a1) of: the supply of current to the vertical organic light emitting transistor not to be corrected is cut off.
3. The method of compensating for brightness of a display of claim 1 or 2, wherein the steps (a) and (B) are carried out during an image update interval.
4. The method of compensating the brightness of a display according to any one of claims 1 to 3, wherein the step (B) comprises the step (B1) of: storing the value of the current measured in the step (B) in the memory.
5. A display, comprising:
a plurality of vertical organic light emitting transistors;
a data line supplying a voltage for controlling gate electrodes of the plurality of vertical organic light emitting transistors;
a current supply line supplying current to source electrodes of the plurality of vertical organic light emitting transistors;
a first thin film transistor connected between the gate electrode of each of the vertical organic light emitting transistors and the data line and controlling a voltage supply to the gate electrode of the vertical organic light emitting transistor;
a first gate line connected to a gate electrode of the first thin film transistor and controlling the first thin film transistor;
a controller controlling a voltage applied to at least the first gate line;
a current measuring section that measures a current flowing through the current supply line; and
a memory storing characteristic information of each of the vertical organic light emitting transistors,
wherein the controller exercises control to apply a voltage for brightness check to the gate electrode of the vertical organic light emitting transistor to be corrected,
the current measuring part measures a current flowing through the source electrode of the vertical organic light emitting transistor by applying the voltage for luminance check to the gate electrode of the vertical organic light emitting transistor to be corrected, and stores a value of the measured current in the memory, and
the controller determines a correction value of the voltage to be applied to the gate electrode of the vertical organic light emitting transistor based on the measured value of the current and the characteristic information of the vertical organic light emitting transistor stored in the memory.
6. The display defined in claim 5 wherein a dielectric layer is formed between the gate and source electrodes of the vertical organic light-emitting transistors.
7. The display of claim 5 or 6, wherein in the vertical organic light emitting transistor, at least one selected from the source electrode and the drain electrode comprises a conductive material comprising carbon.
8. The display defined in claim 7 wherein in the vertical organic light-emitting transistor at least one selected from the source and drain electrodes comprises carbon nanotubes or graphene.
9. The display according to any one of claims 5 to 8, further comprising:
a second thin film transistor connected between the source electrode of the vertical organic light emitting transistor and the current supply line and controlling current supply to the source electrode of the vertical organic light emitting transistor; and
a second gate line connected to a gate electrode of the second thin film transistor and controlling the second thin film transistor,
wherein the controller exercises control so that the second thin film transistor connected to the vertical organic light emitting transistor not to be corrected is in an off state.
10. The display defined in claim 9 wherein the group of second thin-film transistors in a column operate in a sequence that causes current to flow through only one vertical light-emitting transistor in the column at a time.
11. The display defined in claim 10 wherein the current flowing through the current supply line that flows into a single vertical light-emitting transistor via a single second thin-film transistor is measured by measurement circuitry located on the perimeter of the panel.
12. The display according to claim 9, wherein the second thin film transistor comprises an oxide semiconductor.
13. The display defined in claim 9 wherein the second thin-film transistor comprises an amorphous silicon semiconductor.
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| JP2019086406A JP2020183968A (en) | 2019-04-26 | 2019-04-26 | Luminance compensation method and display |
| US202063004046P | 2020-04-02 | 2020-04-02 | |
| US63/004,046 | 2020-04-02 | ||
| PCT/JP2020/017499 WO2020218421A1 (en) | 2019-04-26 | 2020-04-23 | Method of compensating brightness of display and display |
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