CN113629184A - Compound semiconductor Hall element and preparation method thereof - Google Patents

Compound semiconductor Hall element and preparation method thereof Download PDF

Info

Publication number
CN113629184A
CN113629184A CN202110900744.9A CN202110900744A CN113629184A CN 113629184 A CN113629184 A CN 113629184A CN 202110900744 A CN202110900744 A CN 202110900744A CN 113629184 A CN113629184 A CN 113629184A
Authority
CN
China
Prior art keywords
magnetic induction
substrate
electrode
compound semiconductor
hall element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110900744.9A
Other languages
Chinese (zh)
Inventor
何渊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Juzhen Photoelectric Co ltd
Original Assignee
Suzhou Juzhen Photoelectric Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Juzhen Photoelectric Co ltd filed Critical Suzhou Juzhen Photoelectric Co ltd
Priority to CN202110900744.9A priority Critical patent/CN113629184A/en
Publication of CN113629184A publication Critical patent/CN113629184A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00—Hall-effect devices
    • H10N52/101—Semiconductor Hall-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00—Hall-effect devices
    • H10N52/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00—Hall-effect devices
    • H10N52/80—Constructional details

Abstract

The embodiment of the invention discloses a compound semiconductor Hall element and a method for preparing the same. The compound semiconductor Hall element comprises a substrate, an adhesive layer, an electrode part and a magnetic induction part. The adhesive layer is on a surface of the substrate. At least a portion of the electrode portion is embedded in the adhesive layer. The end portion of the magnetic induction portion is superposed on the electrode portion to form an ohmic contact and bonded to a substrate through an adhesive layer. The invention belongs to the technical field of semiconductors. The embodiment of the invention improves the binding force between the electrode and the magnetic induction part, and improves the Hall output, thereby improving the sensitivity of the Hall element.

Description

Compound semiconductor Hall element and preparation method thereof
Technical Field
The present disclosure relates to the field of semiconductor technology, and more particularly, to a compound semiconductor hall element and a method for manufacturing the same.
Background
The hall element is a magnetic sensor based on the hall effect. The hall effect is a physical phenomenon in which when a magnetic field acts on carriers in a metal conductor or a semiconductor, the carriers are deflected, an additional electric field is generated in a direction perpendicular to a current and the magnetic field, and a lateral potential difference is generated between both ends of the semiconductor. The Hall device made according to the Hall effect can convert the motion parameters of an object into voltage to be output by taking a magnetic field as a working medium, so that the Hall device has the functions of sensing and switching.
In the application of the hall element, since the high hall output can improve the resolution of the application, it has been desired that the hall element realize a high hall output and thus a high-sensitivity hall element. For example, current sensors can sense weaker currents after using hall elements with high sensitivity.
The hall output is related to the kind and quality of the compound semiconductor material of the magnetic induction portion. Compound semiconductor materials that are expected to be used for manufacturing the magnetic induction portion of the hall element include GaAs, InSb, InAs, and the like, which have high carrier mobility and thus high hall magnetic induction sensitivity. Semiconductor materials such as InSb are generally prepared by vapor deposition or heteroepitaxy. However, because of the large lattice mismatch rate (14%) between the InSb semiconductor material and the foreign substrate, the InSb semiconductor material film prepared by heteroepitaxy has poor crystal quality, high defect rate, low mobility and optimal mobility which does not exceed 50000cm2/Vs。
In the hall element, generally, the magnetic sensor portion is bonded to the substrate (for example, via an adhesive layer), and then the metal electrode is formed on the magnetic sensor portion. In this method, the metal electrode has a poor bonding force with the magnetic induction portion and the cured adhesive layer, which is disadvantageous for realizing a high hall output, and thus a hall element with high sensitivity cannot be realized.
Disclosure of Invention
In view of the above, there is an urgent need for a compound semiconductor hall element having high sensitivity and improved bonding force between an electrode and a magnetic induction part.
In order to solve at least one of the above-described problems occurring in the prior art, embodiments of the present invention provide a compound semiconductor hall element and a method of manufacturing the same, in which a bonding force between an electrode part and a magnetic induction part is improved by embedding the electrode part together into an adhesive layer after the electrode part is previously prepared on the magnetic induction part.
Alternatively, the compound semiconductor film used for manufacturing the magnetic induction portion of the compound semiconductor hall element has not only high mobility but also high sheet resistance at the same time.
According to an aspect of the present application, there is provided a compound semiconductor hall element including: a substrate; an adhesive layer on a surface of a substrate; an electrode portion at least a portion of which is embedded in the adhesive layer; a magnetic induction portion having an end portion superposed on the electrode portion to form an ohmic contact and bonded to a substrate through an adhesive layer.
In some embodiments, the electrode portion includes a step portion disposed toward the magnetic induction portion, at least a portion of the magnetic induction portion being disposed on the step portion.
In some embodiments, the magnetic induction part is entirely embedded in the adhesive layer, and the magnetic induction part is flush with the upper surface of the electrode part or the upper surface of the magnetic induction part is lower than the upper surface of the electrode part.
In some embodiments, the substrate comprises a poly-magnetic substrate, a ceramic substrate, a semiconductor substrate, a glass substrate, or a plastic substrate; the adhesive layer comprises polyimide or epoxy.
In some embodiments, the magnetic induction part and the electrode part are prepared by the following steps: epitaxially growing a compound semiconductor film on a semiconductor single crystal substrate, and forming magnetic induction portions by a patterning process; depositing a metal material on the magnetic induction part, and forming an electrode part through a patterning process; coating an adhesive on the substrate and/or the magnetic induction part and the electrode part to form an adhesive layer, and bonding the magnetic induction part and the electrode part with the substrate in a face-to-face manner through the adhesive layer; and selectively removing the semiconductor single crystal substrate, a part of the magnetic induction part and/or a part of the electrode part to form the magnetic induction part and the electrode part.
In some embodiments, the semiconductorThe single crystal substrate comprises a GaAs, InP, GaN or Si single crystal substrate; the mobility of the magnetic induction part with only the semiconductor single crystal substrate removed is greater than 40000cm2Vs, the thickness of the magnetic induction part is 500nm-10 μm; the mobility of the magnetic induction part in which the semiconductor single crystal substrate and a part of the compound semiconductor film are simultaneously removed is more than 50000cm2Vs and less than 78000cm2Vs, the thickness of the magnetic induction part is 10nm-9 μm; the magnetic induction part comprises InSb, GaAs, InAs, InGaAs or InGaP.
In some embodiments, the compound semiconductor hall element further comprises a protective layer covering all of the magnetic induction part but exposing at least a part of the electrode part; the protective layer includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.
According to another aspect of the present application, there is provided a method of manufacturing the compound semiconductor hall element according to any one of the above embodiments, the method including: manufacturing a magnetic induction part on a semiconductor single crystal substrate; manufacturing an electrode part on the magnetic induction part; providing a substrate; coating an adhesive layer on the magnetic induction part, the electrode part and/or the substrate, and bonding the magnetic induction part, the electrode part and the substrate together in a face-to-face manner; the semiconductor single crystal substrate, a part of the magnetic induction portion, and/or a part of the electrode portion are selectively removed.
In some embodiments, during the bonding, the magnetic induction portion, the electrode portion, and the substrate react with the uncured adhesive layer and cause the magnetic induction portion and the electrode portion to be embedded in the adhesive layer.
In some embodiments, the method further comprises disposing a protective layer on the magnetic induction portion and exposing at least a portion of the electrode portion.
Other objects and advantages of the present disclosure will become apparent from the following description of the embodiments of the present disclosure, which is made with reference to the accompanying drawings, and can assist in a comprehensive understanding of the present disclosure.
Drawings
These and/or other aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the preferred embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic cross-sectional structure diagram of a compound semiconductor hall element according to one embodiment of the present invention;
fig. 2A shows a schematic cross-sectional structure of a compound semiconductor film heteroepitaxially grown with a hall magnetic induction function on a semiconductor single crystal substrate;
FIG. 2B is a schematic cross-sectional view of the electrode portion formed on the structure of FIG. 2A;
FIG. 2C is a schematic cross-sectional view of the substrate after the adhesive layer is applied;
FIG. 2D shows a schematic cross-sectional structure of the structure of FIG. 2B after bonding with the structure of FIG. 2C;
fig. 2E shows a schematic diagram of a cross-sectional structure after selectively removing the semiconductor single-crystal substrate and the first portion of the compound semiconductor film, which were originally used for heteroepitaxially growing the compound semiconductor film, on the basis of the structure of fig. 2D;
fig. 2F shows a schematic cross-sectional structure of a protective layer prepared on the basis of the structure of fig. 2E.
Detailed Description
The technical scheme of the invention is further specifically described by the following embodiments and the accompanying drawings. In the specification, the same or similar reference numerals denote the same or similar components. The following description of the embodiments of the present invention with reference to the accompanying drawings is intended to explain the general inventive concept of the present invention and should not be construed as limiting the invention.
The following embodiments of the present invention provide a compound semiconductor hall element and a method of manufacturing the same, in which the bonding force between the electrode part and the magnetic induction part is improved by embedding the electrode part together into the adhesive layer after the electrode part is previously prepared on the magnetic induction part. By preparing a compound semiconductor film for forming a magnetic induction portion in advance and then transferring it onto a predetermined substrate, the resulting magnetic induction portion has not only high mobility but also high sheet resistance.
As shown in fig. 1, a compound semiconductor hall element 100 of an embodiment of the present invention includes a substrate 10, an adhesive layer 20, a magnetic induction portion 30, and an electrode portion 40. In an alternative embodiment, the compound semiconductor hall element 100 further includes a protective layer 50.
The substrate 10 may include a poly-magnetic substrate, a ceramic substrate, a semiconductor substrate, a glass substrate, a plastic substrate, or any other substrate. In one example, the substrate 10 may be selected to be a poly-magnetic substrate made of a ferrite material. The magnetism-gathering substrate has a magnetism-gathering effect, and the magnetic induction parts are arranged on the substrate with the magnetism-gathering effect, so that the Hall output of the element can be improved, and can be improved by 2-3 times.
The adhesive layer 20 is disposed on one surface of the substrate 10 and may comprise any suitable adhesive material such as polyimide or epoxy. The magnetic induction portion 30 and the electrode portion 40 are bonded to the substrate 10 through the adhesive layer 20.
At least a part of the electrode portion 40 is embedded in the adhesive layer 20. The electrode portion 40 includes a step portion 41 provided toward the magnetic induction portion 30, and at least a part of the magnetic induction portion 30 is provided on the step portion 41.
The end portions of the magnetic induction portion 30 are superposed on the electrode portion 40 (e.g., the step portion 41) to form ohmic contact, and bonded to the substrate 10 through the adhesive layer 20. The magnetic induction portion 30 includes any suitable semiconductor thin film material such as InSb, GaAs, InAs, InGaAs, or InGaP. Alternatively, the magnetic induction unit 30 is generally electrically isolated from the substrate 10. The magnetic induction part 30 may also be stepped in cross section, or rectangular or cross in plan view.
The electrode portion 40 forms ohmic contact with the magnetic induction portion 30 to transmit a signal induced by the magnetic induction portion 30 into the detection circuit. In the embodiment, the electrode portion 40 is located on the lower surface of the magnetic induction portion 30 and surrounds at least the side surface of the magnetic induction portion 30 by being provided with the stepped portion 41, and is located in the adhesive layer 20. In this way, since the electrode portion 40 is formed on the magnetic induction portion 30 in advance, and the electrode portion 40 is embedded in the adhesive layer 20 together with the magnetic induction portion 30 before the adhesive layer 20 is uncured, a good bonding force is maintained in the electrical connection process with the detection circuit at a later stage, and the hall output is improved. The problem that the bonding force between the electrode parts 40 and the adhesive layer is not good enough because the adhesive layer 20 is already cured when the electrode parts 40 are prepared after the magnetic induction parts 30 are formed on the substrate 10 by the thin film transfer process is avoided.
Embodiments of the present invention enable a higher sensitivity compound semiconductor hall element 100, for example, which may be improved by 30% -40%.
In one embodiment, the magnetic induction part 30 is entirely embedded in the adhesive layer 20, and the magnetic induction part 30 is flush with the upper surface of the electrode part 40, so that the electrode part 40 is prevented from occupying the area of the upper surface of the magnetic induction part 30, space is saved, and miniaturization of the device is facilitated. Of course, it is clear to those skilled in the art that the present embodiment is not limited thereto, and the electrode portion 40 may be disposed to cover a part of the upper surface of the magnetic induction portion 30. In one embodiment, the upper surface of the magnetic induction part 30 is lower than the upper surface of the electrode part 40 to better protect the magnetic induction part 30. In one embodiment, it is desirable to use a semiconductor material film of high mobility, which not only can improve the hall output, but also can obtain a hall element of high sensitivity. GaAs, InSb, InAs and the like which can be used for manufacturing compound semiconductor films have high mobility at room temperature, wherein the mobility of the InSb material at room temperature is the highest and can reach 78000cm2and/Vs, and thus is considered to be a material suitable for the magnetic induction portion of the hall element.
In one embodiment of the present invention, there are two ways of preparing a compound semiconductor film such as InSb. One preparation method is to obtain a polycrystalline InSb film by evaporating an InSb material on a mica sheet or a silicon oxide substrate in an evaporation way. Although the InSb film prepared by the method has low manufacturing cost, the quality is poor, and the mobility is generally only 15000cm2Vs to 30000cm2The expected requirement of the Hall element for higher mobility is not met. The other preparation method is to prepare the InSb monocrystal substrate by adopting a homoepitaxial growth method, so that a high-quality InSb monocrystal film can be obtained, and the mobility of the prepared InSb monocrystal filmIs very high. However, since the semi-insulating InSb single crystal substrate is expensive, there is no method for mass production.
Therefore, in the manufacture of the hall element, other semiconductor single crystal substrates, such as GaAs substrates or Si substrates, are often selected. Although these alternative semiconductor single crystal substrates are relatively inexpensive, they have a large lattice mismatch with InSb, and therefore lead to a decrease in quality (high defect rate) of an InSb single crystal film grown on such alternative semiconductor single crystal substrates, and a much lower mobility, generally 30000cm, than an InSb single crystal film obtained on an InSb single crystal substrate2Vs to 50000cm2Vs.
Because of the large lattice mismatch between the InSb film and the semiconductor single crystal substrate, the InSb film grown from the beginning is poor in quality and very low in mobility. As the thickness of the InSb film material increases, the lattice quality becomes better and the mobility increases.
To reach higher than 50000cm2The mobility of/Vs generally requires that the InSb film be grown to a thickness exceeding 1-2 μm, but this case causes a decrease in the sheet resistance of the InSb film due to the thick InSb film thickness, which is disadvantageous for the finally manufactured hall element. The sheet resistance decreases, which results in an increase in power consumption of the entire hall element.
See document Oh et al, "Journal of Applied Physics", volume 66, 10 months 1989, 3618-.
It is described that if an InSb film is formed on a GaAs, InP substrate, there is a large lattice mismatch between the substrate and the InSb film, and therefore a large number of defects (e.g., dislocations) exist in the formed InSb film, which generate residual electrons, significantly reducing electron mobility.
In general, crystal defects of the thin film caused by mismatch with the substrate are conspicuous near the interface of the substrate. Although the density of crystal defects is gradually reduced along with the growth of the thin film, the concentration of crystal defects is high and the electron mobility is lowered. If a thin film of the order of several micrometers is formed, the influence of defect generation in the vicinity of the interface becomes minute, but such a scheme is not only impractical in fabricating a device, but also causes problems of reduction in resistance, increase in power consumption, and the like due to the film thickness.
In order to solve this problem, the following methods are proposed: a buffer layer for alleviating lattice mismatch is grown on a GaAs substrate, and high-resistance Al is usedxIn1-xSb (x.gtoreq.0.07) to produce the above buffer layer, but this results in a defect that the overall film thickness is increased and the mobility of the InSb film is still not sufficiently high (see Liu et al, "Journal of vacuum Science&Technology B "volume 14, 1996 month 5, page 2339-.
The embodiment of the invention provides a compound semiconductor film which forms a magnetic induction part, and the compound semiconductor film has higher mobility, higher crystal quality and higher sheet resistance, so that the formed magnetic induction part and the Hall element have higher sensitivity.
Referring to fig. 2A-2F, a flow chart for preparing a compound semiconductor hall element according to the present invention is shown.
As shown in fig. 2A, a compound semiconductor film 70 is epitaxially grown on a semiconductor single crystal substrate 60. Since the semiconductor single crystal substrate 60 and the compound semiconductor film 70 have a large lattice mismatch ratio therebetween, the compound semiconductor film 70 grown at the beginning is inferior in quality, which is referred to as a first portion 71. As the compound semiconductor film 70 grows, the crystal quality is improved, so that the second portion 72 of better quality is produced. Here, the first portion 71 and the second portion 72 to be explained do not have a clear interface as shown in the drawing, and they are artificially divided into two portions only for the convenience of the following description.
As shown in fig. 2B, the compound semiconductor film 70 is subjected to a patterning process to form the magnetic induction parts 30. For example, the patterning process may be performed on the first portion and/or the second portion 72 of the compound semiconductor film 70.
Then, a metal material is deposited on the magnetic induction parts 30(72) to form the electrode part 40 for later transmitting the signals of the magnetic induction parts 30 to the detection circuit.
Specifically, the electrode part 40 is formed by performing a patterning process on the metal material. The electrode portion 40 is provided with the step portion 41, so that a good ohmic contact with the magnetic induction portion 30 can be formed.
As shown in fig. 2C, a substrate 10 is provided for carrying the magnetic induction portions 30(72) and the electrode portion 40. The substrate 10 may be a magnetic circuit board, a ceramic substrate, a semiconductor substrate, a glass substrate, a plastic substrate, or the like. Preferably, the substrate 10 is a poly-magnetic substrate, such as ferrite.
An adhesive is applied to the substrate 10 to form an adhesive layer 20 (as shown in fig. 2C), and/or an adhesive is applied to the magnetic induction part 30 and the electrode part 40 to form an adhesive layer 20, and the magnetic induction part 30 and the electrode part 40 are bonded to the substrate 10 in a face-to-face manner via the adhesive layer 20, as shown in fig. 2D.
That is, the magnetic induction portions 30(72) and the metal electrode portions 40 are rotated by 180 degrees and bonded to the substrate 10. The magnetic induction portions 30 and 72 react with the adhesive layer 20 having a high viscosity (uncured) and are cured on the substrate 10, and the electrode portions 40 react with the adhesive layer 20 having a high viscosity (uncured) and are cured on the substrate 10. The curing process of the magnetic induction portions 30(72) and the curing process of the electrode portions 40 occur simultaneously. In this way, not only the magnetic induction units 30 and 72 but also the electrode unit 40 can be firmly fixed to the substrate 10.
In one example, the magnetic induction parts 30(72) are bonded to the substrate 10 through the adhesive layer 20, the adhesive layer 20 is cured, and then the electrode parts 40 are formed on the magnetic induction parts 30 (72). That is, the electrode portion 40 acts with the cured adhesive layer 20. In this way, the bonding force between the electrode portion 40 and the adhesive layer 20 is poor, and the bonding force between the electrode portion 40 and the magnetic induction portions 30 and 72 is also poor, which brings about a hidden danger to the subsequent packaging of the hall element and the reliability of the final device.
As shown in fig. 2E, the semiconductor single crystal substrate 10, a part of the magnetic induction portions 30(72), and/or a part of the electrode portion 40 are selectively removed, and the magnetic induction portions 30 and the electrode portion 40 shown in fig. 2E are formed.
Therefore, in the above process, the magnetic induction part 30 and the electrode part 40 are embedded in the uncured adhesive layer 20 and cured simultaneously, so that a stronger bonding force is realized, higher hall output is facilitated, and the good quality of the magnetic induction part 30 in subsequent packaging is ensured, so that the manufactured hall element has high hall output, and can meet the application occasions with higher requirements on hall sensitivity.
The mobility of the compound semiconductor film 70 prepared by the above process with only the semiconductor single-crystal substrate 60 removed is more than 40000cm2Vs and a thickness of 500nm to 10 μm. Preferably, the mobility of the compound semiconductor film 72 after simultaneously removing the semiconductor single-crystal substrate 60 and a part of the compound semiconductor film 71 is more than 50000cm2Vs and less than 78000cm2Vs and the sheet resistance can be selectively increased to a target value by etching the thickness of the magnetic induction portions 30 to 10nm-9 μm.
As described above, in the present invention, the first portion 71 of the compound semiconductor film 70 of poor quality grown on the semiconductor single-crystal substrate 60 is etched away, and therefore the mobility of the compound semiconductor film 72 can be made at least more than 50000cm2/Vs, preferably greater than 60000cm2Vs. In summary, the method of the present invention can select the compound semiconductor film 70 having an appropriate mobility and thickness in consideration of the thickness and the sheet resistance of the compound semiconductor film 70, and thus not only has a simple process and low cost, but also provides a solution to the relative contradiction between mobility and sheet resistance.
In an alternative embodiment, the protective layer 50 covers all of the magnetic induction parts 30, but at least the electrode parts 40 are exposed. The protective layer 50 includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.
Referring to fig. 2A-2F, a flow chart of a manufacturing process of a compound semiconductor hall element according to an embodiment of the present invention is shown.
Specifically, as shown in fig. 2A, a compound semiconductor film 70 is grown on a semiconductor single crystal substrate 60 by an epitaxial method (e.g., Metal Organic Chemical Vapor Deposition (MOCVD) or Molecular Beam Epitaxy (MBE)), the compound semiconductor film 70 including a first portion 71 of poor quality and a second portion 72 of better quality. In one example, the semiconductor single-crystal substrate 60 may be any suitable single-crystal substrate of GaAs, InP, GaN, Si, or the like. The compound semiconductor film 70 may include binary, ternary, quaternary materials composed of In, Sb, As, Ga, P, and the like, such As GaAs, InAs, InSb, InGaAs, InGaP, InGaAsP, and the like, preferably an InSb film.
The following will exemplify InSb. In one example, the thickness of the compound semiconductor film 70 is between 10nm-10 microns, preferably 500nm-3 microns, more preferably 800nm-2 microns. Taking InSb film as an example, the mobility is more than 40000cm2Vs, preferably greater than 50000cm2Vs, more preferably greater than 60000cm2/Vs。
As shown in fig. 2B, the compound semiconductor film 70 is subjected to a patterning process to form the magnetic induction parts 30. For example, the compound semiconductor film 70 may be subjected to a patterning process. In one example, the mesa pattern of the magnetic induction part 30 can be prepared by photolithography. In one example, the areas not protected by the photoresist are removed by dry or wet etching, so as to form a mesa pattern of the compound semiconductor Hall element. The mesa pattern of the compound semiconductor hall element described herein may be a step shape, or a rectangular or cross shape in a plan view thereof.
As shown in fig. 2B, a metal material is deposited on the second portion 72 to form the electrode portion 40 that transmits the signal of the magnetic induction portion to the detection circuit at a later stage. In one example, the metallic material is deposited at four corners of the magnetic induction portion 30, for example, on the upper surface and the side surfaces of the magnetic induction portion 30. In one example, the metal material is first formed by deposition such as electron beam evaporation or magnetron sputtering, and may include Au, Ge, Ni, Ti, Cr, Cu, or alloys thereof.
Thereafter, the electrode portion 40 is formed by performing a patterning process on the metal material. The electrode part 40 may be positioned at the upper surface and the side of the first and second parts 71 and 72 at this time. In one example, the electrode portion 40 is formed of a metal material by stripping or etching; the electrode part 40 is optionally subjected to an annealing process to form a better ohmic contact between the electrode part 40 and the magnetic induction part 30.
Of course, those skilled in the art may set the shape and height of the electrode portion 40 as desired, and are not limited to the illustrated case, and for example, the shape of the electrode portion 40 may be set to be square, circular, elliptical, stepped, trapezoidal, or the like.
As shown in fig. 2C, a substrate 10 is provided for carrying the magnetic induction portion 30 and the electrode portion 40. The substrate 10 may be a magnetic circuit board, a ceramic substrate, a semiconductor substrate, a glass substrate, a plastic substrate, or the like. Preferably, the substrate 10 is a poly-magnetic substrate, such as ferrite.
An adhesive is applied to the substrate 10 to form an adhesive layer 20 (as shown in fig. 2C), and/or an adhesive is applied to the magnetic induction part 30 and the electrode part 40 to form an adhesive layer 20, and the magnetic induction part 30 and the electrode part 40 are bonded to the substrate 10 in a face-to-face manner via the adhesive layer 20, as shown in fig. 2D.
In one example, an adhesive such as polyimide or epoxy is applied to the magnetic induction portions 30 and the electrode portions 40 by coating or taping. Subsequently, the magnetic induction portion 30 and the electrode portion 40 are bonded face to face with the substrate 10 via the adhesive layer 20. Of course, it is also possible to apply an adhesive to the substrate 10 or to apply an adhesive to the magnetic induction parts 30, the electrode parts 40, and the substrate 10 at the same time, and a person skilled in the art can select the material of the substrate 10 as needed, without being limited to the examples described herein.
The magnetic induction part 30 and the electrode part 40 are rotated by 180 degrees, and the magnetic induction part 30 and the electrode part 40 are bonded to the substrate 10 through the adhesive layer 20. Due to the rotation, after the curing process, the metal electrode part 40 is located on the lower surface of the magnetic induction part 30 and surrounds at least the side surface of the magnetic induction part 30, and the electrode part 40 is also located in the adhesive layer 20.
As shown in fig. 2E, semiconductor single crystal substrate 60, a part (e.g., first portion 71) of magnetic induction portion 30, and/or a part of electrode portion 40 are selectively removed to expose the back surfaces of magnetic induction portion 30 and possibly electrode portion 40 (i.e., to remove first portion 71 of compound semiconductor film 70 and a part of electrode portion 40), and magnetic induction portion 30 and electrode portion 40 are formed. In one example, mechanical grinding or chemical etching may be used. The mechanical grinding can be traditional semiconductor grinding equipment, and the chemical corrosion solution can be a mixed solution of phosphoric acid and hydrogen peroxide or a hydrochloric acid solution. It will be appreciated by those skilled in the art that the mechanical grinding or chemical etching herein may take other alternative forms known in the art.
As shown in fig. 2E, the exposed first portions 71 of the compound semiconductor film 70 are removed to leave second portions 72 (i.e., the magnetic induction portions 30) of the compound semiconductor film 70 of high quality. In one example, the exposed first portion 71 of the compound semiconductor film 70 may be removed by dry or wet etching, that is, the first portion 71 that was previously grown on the semiconductor single crystal substrate 60 is removed, and the first portion 71 has poor quality due to lattice mismatch, so that the second portion 72 of the compound semiconductor film 70 having high quality (e.g., high mobility) may be retained. The dry etching described herein may be ion beam etching or the like, and the wet etching may be etching using any suitable solution. Alternatively, a part of the electrode portion 40 may be removed as well, in the same manner as the removal of the compound semiconductor film, and will not be described here again.
It is understood that the upper surface of magnetic induction portion 30 may also be made lower than the upper surface of electrode portion 40 during the selective removal process, thereby serving to protect magnetic induction portion 30 and make the ohmic contact therebetween more stable.
It will be understood by those skilled in the art that the mobility and thickness of the compound semiconductor film 70 can be selected according to the design requirements of the device by using the method of the present invention, thereby providing great flexibility in selecting the mobility and thickness of the compound semiconductor film 70, and thus, the compound semiconductor film 70 with higher mobility and thinner thickness (higher sheet resistance) can be obtained at the same time.
As shown in fig. 2F, a protective layer 50 is formed on at least a portion (e.g., the entire surface) of the magnetic induction portion 30 and the electrode portion 40 of the compound semiconductor hall element 100, and the metal contact area of the electrode portion 40 is exposed, so as to facilitate the subsequent packaging and wire bonding.
The protective layer 50 can prevent the magnetic induction portion 30 of the compound semiconductor hall element 100 from being damaged in the subsequent process, and prevent moisture, impurity particles, and the like from entering the magnetic induction portion 30 of the compound semiconductor hall element 100. The protective layer 50 includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film. The compound semiconductor hall element 100 shown in fig. 1 can be obtained with high sensitivity and low power consumption by forming a photoresist pattern on the magnetic induction portions 30 and on portions other than the exposed regions of the electrode portions 40 by Plasma Enhanced Chemical Vapor Deposition (PECVD), sputtering, or other conventional film forming means, using the photoresist pattern as a mask.
The compound semiconductor Hall element 100 is prepared by using the embodiment of FIGS. 2A to 2F of the present invention, and if the compound semiconductor film of the magnetic induction part 30 is made of InSb material, the mobility of the compound semiconductor film may exceed 60000cm2and/Vs, the sheet resistance of the compound semiconductor film can be designed to a desired value, and a magnetism gathering substrate is adopted, so that high Hall output is obtained, and finally the InSb compound semiconductor Hall element with high sensitivity and low power consumption can be obtained.
In summary, the compound semiconductor hall element and the method for manufacturing the compound semiconductor hall element according to the embodiments of the present invention solve the technical problems proposed in the background art, and specifically, the electrode portion is firmly bonded to the substrate, and the obtained compound semiconductor film for manufacturing the magnetic induction portion has better crystal quality, higher mobility, and reduced overall film thickness compared to the compound semiconductor film manufactured by the prior art, and improves hall output, thereby enabling the compound semiconductor hall element 100 to have high sensitivity and low power consumption.
The invention also provides embodiments in accordance with the following aspects, in particular as follows:
aspect 1: a method of manufacturing a compound semiconductor hall element, comprising:
manufacturing a magnetic induction part on a semiconductor single crystal substrate;
manufacturing an electrode part on the magnetic induction part;
providing a substrate;
coating an adhesive layer on the magnetic induction part, the electrode part and/or the substrate, and bonding the magnetic induction part, the electrode part and the substrate together in a face-to-face manner;
a part of the semiconductor single crystal substrate, the magnetic induction portion and/or the electrode portion is selectively removed.
Aspect 2: the method of manufacturing a compound semiconductor hall element according to aspect 1, wherein the magnetic induction portion, the electrode portion, and the substrate are caused to act with the uncured adhesive layer and the magnetic induction portion and the electrode portion are embedded in the adhesive layer in the bonding process.
Aspect 3: the method of manufacturing a compound semiconductor Hall element according to aspect 1 or 2, wherein,
the semiconductor single crystal substrate includes a GaAs, InP, GaN or Si single crystal substrate.
Aspect 4: the method of manufacturing a compound semiconductor Hall element according to any one of the preceding aspects, wherein,
the substrate comprises a magnetism-gathering substrate, a ceramic substrate, a semiconductor substrate, a glass substrate or a plastic substrate;
the adhesive layer comprises polyimide or epoxy.
Aspect 5: the method of manufacturing a compound semiconductor hall element according to any one of the preceding aspects, wherein only the semiconductor single-crystal substrate is removed, and the mobility of the magnetic induction portion obtained is greater than 40000cm2and/Vs, the thickness of the magnetic induction part is 500nm-10 μm.
Aspect 6: the method of manufacturing a compound semiconductor hall element according to any one of the preceding aspects, wherein the semiconductor single crystal substrate and a part of the magnetic induction portion and the electrode portion are removed simultaneously, the obtained magnetic induction portion has a mobility of more than 50000cm2Vs and less than 78000cm2and/Vs, the thickness of the magnetic induction part is 10nm-9 μm.
Aspect 7: the method of manufacturing a compound semiconductor hall element according to any one of the preceding aspects, wherein the magnetic induction portion comprises InSb, GaAs, InAs, InGaAs, or InGaP.
Aspect 8: the method of manufacturing a compound semiconductor Hall element according to any one of the preceding aspects, wherein,
before the electrode part is manufactured, the method further comprises the step of patterning the magnetic induction part;
the method further includes patterning the electrode portion before bonding the magnetic induction portion and the metal electrode portion to the substrate.
Aspect 9: the method of manufacturing a compound semiconductor hall element according to any one of the preceding aspects, wherein the method further comprises providing a protective layer on the magnetic induction portion and exposing at least a portion of the electrode portion.
Aspect 10: the method of manufacturing a compound semiconductor hall element according to any one of the preceding aspects, wherein the protective layer includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.
Although a few embodiments of the present general inventive concept have been shown and described, it will be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the general inventive concept, the scope of which is defined in the appended claims and their equivalents.

Claims (10)

1. A compound semiconductor hall element comprising:
a substrate;
an adhesive layer on a surface of a substrate;
an electrode portion at least a portion of which is embedded in the adhesive layer;
a magnetic induction portion having an end portion superposed on the electrode portion to form an ohmic contact and bonded to a substrate through an adhesive layer.
2. The compound semiconductor Hall element according to claim 1, wherein,
the electrode portion includes a step portion provided toward the magnetic induction portion, and at least a part of the magnetic induction portion is provided on the step portion.
3. The compound semiconductor Hall element according to claim 1, wherein the magnetic induction part is entirely embedded in an adhesive layer,
and the upper surfaces of the magnetic induction part and the electrode part are flush or the upper surface of the magnetic induction part is lower than the upper surface of the electrode part.
4. The compound semiconductor Hall element according to claim 1, wherein,
the substrate comprises a magnetism-gathering substrate, a ceramic substrate, a semiconductor substrate, a glass substrate or a plastic substrate;
the adhesive layer comprises polyimide or epoxy.
5. The compound semiconductor hall element according to any one of claims 1 to 4, wherein the magnetic induction portion and the electrode portion are prepared by:
epitaxially growing a compound semiconductor film on a semiconductor single crystal substrate, and forming magnetic induction portions by a patterning process;
depositing a metal material on the magnetic induction part, and forming an electrode part through a patterning process;
coating an adhesive on the substrate and/or the magnetic induction part and the electrode part to form an adhesive layer, and bonding the magnetic induction part and the electrode part with the substrate in a face-to-face manner through the adhesive layer;
and selectively removing the semiconductor single crystal substrate, a part of the magnetic induction part and/or a part of the electrode part to form the magnetic induction part and the electrode part.
6. The compound semiconductor hall element according to claim 5, wherein the semiconductor single-crystal substrate comprises a GaAs, InP, GaN, or Si single-crystal substrate;
the mobility of the magnetic induction part with only the semiconductor single crystal substrate removed is greater than 40000cm2Vs, the thickness of the magnetic induction part is 500nm-10 μm;
the mobility of the magnetic induction part in which the semiconductor single crystal substrate and a part of the compound semiconductor film are simultaneously removed is more than 50000cm2Vs and less than 78000cm2Vs, the thickness of the magnetic induction part is 10nm-9 μm;
the magnetic induction part comprises InSb, GaAs, InAs, InGaAs or InGaP.
7. The compound semiconductor Hall element according to any one of claims 1 to 6, wherein,
the compound semiconductor Hall element further comprises a protective layer, wherein the protective layer covers the whole magnetic induction part, but at least one part of the electrode part is exposed;
the protective layer includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.
8. A method of producing a compound semiconductor hall element according to any one of claims 1 to 7, the method comprising:
manufacturing a magnetic induction part on a semiconductor single crystal substrate;
manufacturing an electrode part on the magnetic induction part;
providing a substrate;
coating an adhesive layer on the magnetic induction part, the electrode part and/or the substrate, and bonding the magnetic induction part, the electrode part and the substrate together in a face-to-face manner;
the semiconductor single crystal substrate, a part of the magnetic induction portion, and/or a part of the electrode portion are selectively removed.
9. The method of claim 8, wherein,
during the bonding process, the magnetic induction portion, the electrode portion, and the substrate react with the uncured adhesive layer, and the magnetic induction portion and the electrode portion are embedded in the adhesive layer.
10. The method of claim 9, further comprising providing a protective layer on the magnetic induction portion and exposing at least a portion of the electrode portion.
CN202110900744.9A 2021-08-06 2021-08-06 Compound semiconductor Hall element and preparation method thereof Pending CN113629184A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110900744.9A CN113629184A (en) 2021-08-06 2021-08-06 Compound semiconductor Hall element and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110900744.9A CN113629184A (en) 2021-08-06 2021-08-06 Compound semiconductor Hall element and preparation method thereof

Publications (1)

Publication Number Publication Date
CN113629184A true CN113629184A (en) 2021-11-09

Family

ID=78383083

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110900744.9A Pending CN113629184A (en) 2021-08-06 2021-08-06 Compound semiconductor Hall element and preparation method thereof

Country Status (1)

Country Link
CN (1) CN113629184A (en)

Similar Documents

Publication Publication Date Title
US8389977B2 (en) Reverse side engineered III-nitride devices
CN113299824A (en) Method for manufacturing compound semiconductor Hall element
EP0450601B1 (en) Magnetoelectric transducer and process for producing the same
WO2011033776A1 (en) Method for producing compound semiconductor crystal, method for manufacturing electronic device, and semiconductor substrate
CN113241403A (en) Compound semiconductor Hall element
CN113629184A (en) Compound semiconductor Hall element and preparation method thereof
JP3069545B2 (en) Laminate including compound semiconductor and method of manufacturing the same
CN216054741U (en) Down-incident light type infrared sensor
WO2022242611A1 (en) Compound semiconductor hall element and manufacturing method therefor
JPH0613603A (en) Semiconductor device
CN113759296A (en) Magnetoresistive sensor integrated circuit and method of manufacturing the same
CN113745268A (en) Monolithic integrated Hall circuit
CN216054742U (en) Up-light-entering infrared sensor
JPH08274385A (en) Magnetoelectric transducer element
CN215527756U (en) Substrate structure for preparing InSb functional layer
JP2597774Y2 (en) Hall element
JP3399053B2 (en) Heterojunction Hall element
CN113759295A (en) Integrated Hall magnetic sensor and manufacturing method thereof
US20230307518A1 (en) Hetero-Junction Bipolar Transistor and Method of Manufacturing the Same
KR102449792B1 (en) Manufacturing method of flexible magnetic sensor and the flexible magnetic sensor thereby
CN112802961A (en) Method for preparing InSb functional layer
JP3399057B2 (en) Magnetoelectric conversion element
JP3404843B2 (en) Manufacturing method of Hall element
CN113758993A (en) Two-dimensional detection circuit integrated with array type Hall element
JP5135612B2 (en) Semiconductor element

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination