WO2022242611A1

WO2022242611A1 - Compound semiconductor hall element and manufacturing method therefor

Info

Publication number: WO2022242611A1
Application number: PCT/CN2022/093169
Authority: WO
Inventors: 胡双元; 朱忻
Original assignee: 苏州矩阵光电有限公司
Priority date: 2021-05-21
Filing date: 2022-05-16
Publication date: 2022-11-24

Abstract

Disclosed in embodiments of the present invention are a compound semiconductor Hall element and a manufacturing method therefor. The compound semiconductor Hall element comprises a substrate, a bonding layer, a magnetic induction portion, and electrode portions. The bonding layer is on the surface of the substrate. The magnetic induction portion is bonded to the substrate by means of the bonding layer. The electrode portions are located at the periphery of the magnetic induction portion and forms ohmic contact with the magnetic induction portion. The magnetic induction portion has high mobility and high sheet resistance, so that the compound semiconductor Hall element has high sensitivity and low power consumption.

Description

Compound semiconductor Hall element and manufacturing method thereof

technical field

The disclosure content of the present application relates to the field of semiconductor technology, in particular to a compound semiconductor Hall element and a manufacturing method thereof.

Background technique

The Hall element is a magnetic sensor based on the Hall effect. The so-called Hall effect means that when a magnetic field acts on the carriers in metal conductors and semiconductors, the carriers will be deflected, and an additional electric field will be generated perpendicular to the direction of the current and magnetic field, thereby generating a lateral potential difference at both ends of the semiconductor. physical phenomenon. The Hall device made according to the Hall effect can use the magnetic field as the working medium to convert the motion parameter of the object into the form of voltage output, so that it has the functions of sensing and switching.

It is expected that compound semiconductor materials such as GaAs, InSb, and InAs used to manufacture the magnetic induction portion of the Hall element have high carrier mobility and thus high Hall magnetic induction sensitivity. Usually, semiconductor materials such as InSb are prepared by evaporation or heteroepitaxy. However, due to the obvious lattice mismatch problem between the InSb semiconductor material and the heterogeneous substrate, the mobility of the InSb semiconductor material film prepared by heteroepitaxy is not ideal even when the thickness is thin. rate will not exceed 50000cm ² /Vs.

On the one hand, if the thickness of the semiconductor material film grown by heteroepitaxial growth is relatively thin, the quality of the semiconductor material film is poor, and the mobility is too low to meet the expected requirements; on the other hand, if the thickness of the semiconductor material film is increased, the The mobility will be improved, but at this time the sheet resistance of the semiconductor material film will be reduced, which is disadvantageous for controlling the power consumption of the Hall element.

Contents of the invention

In view of the above, there is an urgent need for a Hall element of a compound semiconductor material film having high mobility and simultaneously high sheet resistance.

In order to solve at least one of the above-mentioned problems in the prior art, an embodiment of the present invention provides a compound semiconductor Hall element and a manufacturing method thereof, wherein the compound semiconductor used to manufacture the magnetic induction part of the compound semiconductor Hall element The material film has not only high mobility but also high sheet resistance.

According to one aspect of the present application, a compound semiconductor Hall element is provided, including:

Substrate;

an adhesive layer on the surface of the substrate;

a magnetic induction part bonded to the substrate through an adhesive layer; and

An electrode part, the electrode part is located at the periphery of the magnetic induction part and forms an ohmic contact with the magnetic induction part.

In some embodiments, the mobility of the magnetic induction part is greater than 40000 cm ² /Vs, and the thickness of the magnetic induction part is 500 nm-10 μm, only the semiconductor single crystal substrate is removed.

In some embodiments, the mobility of the magnetic sensing part where the semiconductor single crystal substrate and a part of the compound semiconductor material film are removed simultaneously is greater than 50000 cm ² /Vs and less than 78000 cm ² /Vs, and the thickness of the magnetic sensing part is 10 nm-9 μm.

In some embodiments, the magnetic induction part is prepared by the following steps:

Epitaxial growth of a compound semiconductor material film on a semiconductor single crystal substrate as a Hall magnetic induction functional layer;

coating an adhesive layer on the surface of at least one of the compound semiconductor material film and the substrate and bonding the compound semiconductor material film and the substrate face-to-face through the adhesive layer;

The semiconductor single crystal substrate and a part of the compound semiconductor material film are selectively removed, and the magnetic induction part is formed through a patterning process.

In some embodiments, the semiconductor single crystal substrate includes a GaAs, InP, GaN or Si single crystal substrate.

In some embodiments, the magnetic sensing part includes InSb, GaAs, InAs, InGaAs or InGaP.

In some embodiments, the substrate includes a magnetic gathering substrate, a ceramic substrate, a semiconductor substrate, a glass substrate, a plastic substrate or any material substrate.

In some embodiments, the bonding layer includes polyimide or epoxy.

In some embodiments, the compound semiconductor Hall element further includes a protective layer, the protective layer covers the entirety of the magnetic induction part and the adhesive layer, but at least exposes a part of the electrode part.

In some embodiments, the protection layer includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, epoxy resin, silica gel, silicon dioxide, and a polyimide film.

In addition, according to another aspect of the present application, a method for manufacturing a compound semiconductor Hall element is also provided, including:

Epitaxially growing a compound semiconductor material film on a semiconductor single crystal substrate as a magnetic induction functional layer of the compound semiconductor Hall element;

Coating an adhesive layer on at least one surface of the compound semiconductor material film and the substrate, and bonding the compound semiconductor material film and the substrate face-to-face through the adhesive layer;

Selectively removing a part of the semiconductor single crystal substrate and the compound semiconductor material film, and forming a magnetic induction part through a patterning process;

forming an electrode portion around the magnetic induction portion;

A protective layer is formed on at least a part of the magnetic induction part and the electrode part and exposes the metal contact area of the electrode part.

In some embodiments, the epitaxially grown film of compound semiconductor material includes a first portion and a second portion overlying the first portion, wherein the mobility of the second portion is greater than that of the first portion.

In some embodiments, removing a portion of the film of compound semiconductor material includes removing a first portion of the film of compound semiconductor material.

In some embodiments, the face-to-face bonding of the compound semiconductor material film and the substrate together through the adhesive layer includes: bonding the substrate and the compound semiconductor material film together by means of an adhesive in the adhesive layer by a bonding machine .

In some embodiments, selectively removing the semiconductor single crystal substrate includes removing the semiconductor single crystal substrate by mechanical grinding or chemical etching.

In some embodiments, the chemical etching solution includes a mixed solution of phosphoric acid and hydrogen peroxide or a hydrochloric acid solution.

In some embodiments, selectively removing the first portion of the compound semiconductor material film includes removing the first portion by dry or wet etching.

In some embodiments, the bonding layer includes polyimide or epoxy.

Other objects and advantages of the present disclosure will be apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, and may help to have a comprehensive understanding of the present disclosure.

Description of drawings

These and/or other aspects and advantages of the present invention will become apparent and comprehensible from the following description of preferred embodiments in conjunction with the accompanying drawings, in which:

1 is a schematic cross-sectional structure diagram of a compound semiconductor Hall element according to an embodiment of the present invention;

2A shows a cross-sectional schematic diagram of a compound semiconductor material film with Hall magnetic induction function grown heteroepitaxially on a semiconductor single crystal substrate;

FIG. 2B shows a schematic diagram of a cross-sectional structure after coating an adhesive layer and bonding a substrate on the basis of the structure in FIG. 2A;

FIG. 2C shows a schematic diagram of a cross-sectional structure after selectively removing the semiconductor single crystal substrate originally used for heteroepitaxial growth of a compound semiconductor material film on the basis of the structure in FIG. 2B;

FIG. 2D shows a schematic diagram of a cross-sectional structure after removing the first part of the compound semiconductor material film based on the structure of FIG. 2C;

FIG. 2E shows a schematic diagram and a top view of a cross-sectional structure of a patterned magnetic sensing part prepared on the basis of the structure of FIG. 2D;

FIG. 2F shows a schematic diagram and a top view of a cross-sectional structure of a patterned electrode layer prepared on the basis of the structure of FIG. 2E;

FIG. 2G shows a schematic cross-sectional structure and a top view of a patterned protective layer prepared on the basis of the structure in FIG. 2F .

Detailed ways

The technical solutions of the present invention will be further specifically described below through the embodiments and in conjunction with the accompanying drawings. In the specification, the same or similar reference numerals designate the same or similar components. The following description of the embodiments of the present invention with reference to the accompanying drawings is intended to explain the general inventive concept of the present invention, but should not be construed as a limitation of the present invention.

As discussed in the background technology section, materials such as GaAs, InSb, and InAs that can be used to manufacture compound semiconductor material films have relatively high mobility at room temperature, among which InSb material has the highest mobility at room temperature, which can reach 78000cm ² / Therefore, Vs is considered to be a suitable material for the magnetic sensing part of the Hall element.

In one embodiment of the present invention, there are two ways to prepare compound semiconductor material films such as InSb. One is to evaporate InSb material on a mica sheet or a silicon oxide substrate by evaporation to obtain a polycrystalline InSb film. Although the manufacturing cost of the InSb film prepared by this method is relatively low, the quality is relatively poor, and the mobility is generally only 15,000 cm ² /Vs to 30,000 cm ² /Vs, which cannot meet the expected high mobility requirement of the Hall element. Another preparation method is to use homoepitaxial growth on a semi-insulating InSb single crystal substrate to obtain a high-quality InSb single crystal film, and the mobility of the InSb single crystal film prepared in this way is very high. However, because the semi-insulating InSb single crystal substrate is relatively expensive, there is no way to use it for large-scale production.

Therefore, in the manufacture of Hall elements, other semiconductor single crystal substrates, such as GaAs substrates or Si substrates, are usually selected. Although the cost of these alternative semiconductor single crystal substrates is relatively cheap, due to the large lattice mismatch with InSb, the quality of InSb single crystal films grown on such alternative semiconductor single crystal substrates will be reduced. Compared with the InSb single crystal film obtained on the InSb single crystal substrate, the mobility is much lower, generally between 30000cm ² /Vs and 50000cm ² /Vs.

Because there is a large lattice mismatch between the InSb film and the semiconductor single crystal substrate, the quality of the InSb film grown at the beginning is very poor and the mobility is very low. As the thickness of the InSb film material increases, the lattice quality will continue to improve and the mobility will increase.

In order to achieve a mobility higher than 50000cm ² /Vs, it is generally required that the growth thickness of the InSb film exceeds 1-2μm, but at this time, because the thickness of the InSb film is very thick, the sheet resistance of the InSb film will decrease. Er components are disadvantageous. A decrease in the sheet resistance will lead to an increase in the power consumption of the entire Hall element.

See literature Oh et al., "Journal of Applied Physics", Volume 66, October 1989, 3618-3621, which proves the correctness of the above cognition.

It describes that if an InSb film is formed on a GaAs, InP substrate, there is a large lattice mismatch between the substrate and the InSb film, and therefore a large number of misfit dislocations exist in the formed InSb film, and these dislocations , Defects generate surplus electrons, significantly reducing electron mobility.

Often, crystal defects of thin films caused by mismatch with the substrate are evident near the interface of the substrate. Although the density of crystal defects gradually decreases with the growth of the thin film, the concentration of crystal defects is high and the electron mobility decreases. If a thin film on the order of a few microns is formed, the influence of defects near the interface becomes very small, but when manufacturing devices, such a solution is not only impractical, but also reduces resistance due to film thickness and increases power consumption. And other issues.

In order to solve this problem, the following method is proposed: first grow a layer of buffer layer to ease the lattice mismatch on the GaAs substrate, and use high-resistance Al _x In _1-x Sb (x ≥ 0.07) to manufacture the above buffer layer, But this leads to defects such as increased overall film thickness and still insufficient mobility of the InSb film (see Liu et al., "Journal of Vaccum Science & Technology B" Vol. 14, May 1996, pp. 2339-2342).

The following embodiments of the present invention provide a compound semiconductor Hall element and a method of manufacturing the compound semiconductor Hall element, wherein the magnetic sensing part of the compound semiconductor Hall element has high mobility compared with the magnetic sensing part prepared in the prior art And at the same time, it has a relatively large sheet resistance, and the thickness of the formed magnetic induction part and the entire compound semiconductor Hall element is relatively small.

As shown in FIG. 1 , a compound semiconductor Hall element 100 according to an embodiment of the present invention includes a substrate 10 , an adhesive layer 20 , a magnetic induction part 30 and an electrode part 40 . Optionally, the compound semiconductor Hall element 100 may further include a protective layer 50 .

The substrate 10 may include a magnetic gathering substrate, a ceramic substrate, a semiconductor substrate, a glass substrate, a plastic substrate or any material substrate. In an example, the substrate 10 may be selected as a magnetic-gathering substrate, and the magnetic-gathering substrate is made of a ferrite material.

The adhesive layer 20 is located on one surface of the substrate 10 and may include any suitable adhesive material such as polyimide or epoxy resin.

The magnetic induction part 30 is bonded to the substrate 10 through the bonding layer 20 and includes any suitable semiconductor thin film material such as InSb, GaAs, InAs, InGaAs or InGaP. Optionally, the magnetic induction part 30 and the substrate 10 are generally in a non-conductive electrical insulation state. The cross-section of the magnetic induction part 30 may also be stepped, or its top view may be rectangular or cross-shaped.

In an example of the present invention, the magnetic induction part 30 is obtained in the following manner to realize the advantages of high mobility, large sheet resistance and proper thickness of the fabricated compound semiconductor Hall element.

As shown in FIG. 2A, a compound semiconductor material film 70 is epitaxially grown on a semiconductor single crystal substrate 60, wherein the compound semiconductor material film 70 includes a first portion 71 of poor quality first grown and a relatively good quality grown subsequently. The second part of 72. Here, the first part 71 and the second part 72 that need to be explained do not have a clear interface as shown in the figure, and they are artificially divided into two parts only for the convenience of subsequent description.

Referring to FIG. 2B , the adhesive layer 20 is coated on the second portion 72 of the compound semiconductor material film 70 and bonded face-to-face with the substrate 10 through the adhesive layer 20 .

Referring to FIG. 2C , FIG. 2D and FIG. 2E , the semiconductor single crystal substrate 60 and the first portion 71 of the compound semiconductor material film 70 are removed, and the magnetic induction part 30 is formed by a patterning process.

For specific process steps, reference may be made to the flow charts shown in FIGS. 2A-2F below, and will not be repeated here.

Therefore, the magnetic induction part 30 prepared by the above process with only the semiconductor single crystal substrate 60 removed has a mobility greater than 40000 cm ² /Vs and a thickness of 500 nm-10 microns. Preferably, the mobility of the magnetic induction part 30 from which the semiconductor single crystal substrate 60 and a part of the compound semiconductor material film 70 are removed at the same time is greater than 50000 cm ² /Vs and less than 78000 cm ² /Vs, and by etching the thickness of the magnetic induction part to 10nm- 9 microns, the sheet resistance can be selectively increased to the target value.

As mentioned above, in the present invention, by etching away the first part 71 of the poor-quality compound semiconductor material film 70 grown on the semiconductor single crystal substrate 60, the mobility of the compound semiconductor material film 70 can be made at least greater than 50000 cm ² /Vs, preferably greater than 60000 cm ² /Vs. In summary, the method of the present invention can take into account the thickness and sheet resistance of the compound semiconductor material film 70 to select the compound semiconductor material film 70 with suitable mobility and thickness, so not only the process is simple, the cost is low, but also the solution to the problem of mobility and sheet resistance is provided. The relatively contradictory schemes among them.

In an optional embodiment, the protective layer 50 covers the whole of the magnetic induction part 30 and the adhesive layer 20 , but at least exposes a part 41 of the electrode part 40 . The protective layer 50 includes any one of silicon nitride film, silicon oxide film, aluminum oxide film, silicon oxynitride film, epoxy resin, silica gel, silicon dioxide and polyimide film.

Referring to FIGS. 2A-2F , a flow chart of manufacturing a compound semiconductor Hall element according to an embodiment of the present invention is shown.

Specifically, as shown in FIG. 2A, a compound semiconductor material film 70 is grown on a semiconductor single crystal substrate 60 by an epitaxial method (for example, MOCVD or MBE). Ok second part 72. In an example, the semiconductor single crystal substrate may be any suitable single crystal substrate such as GaAs, InP, GaN, or Si. The compound semiconductor material film may include binary, ternary, and quaternary materials composed of In, Sb, As, Ga, and P, such as GaAs, InAs, InSb, InGaAs, InGaP, InGaAsP, etc., preferably InSb film.

In the following, InSb will be taken as an example for illustration. In one example, the thickness of the compound semiconductor material film 70 is between 10 nm-10 microns, preferably between 500 nm-3 microns, more preferably 800 nm-2 microns. Taking the InSb film as an example, its mobility is greater than 40000 cm ² /Vs, preferably greater than 50000 cm ² /Vs, more preferably greater than 60000 cm ² /Vs.

As shown in FIG. 2B , an adhesive is coated on the compound semiconductor material film 70 to form an adhesive layer 20 . In one example, a binder such as polyimide or epoxy resin is coated on the compound semiconductor material film 70 by coating or squeegeeing. Subsequently, the compound semiconductor material film 70 is bonded face-to-face with another substrate 10 through the adhesive layer 20, and the other substrate 10 includes a magnetic-gathering substrate, a ceramic substrate semiconductor substrate, a glass substrate, a plastic substrate or any other suitable substrate. material substrate. In one example, the other substrate 10 is a magnetism-gathering substrate, and the magnetism-gathering substrate is made of ferrite material, for example. Of course, it is also possible to apply the adhesive to another substrate 10 or apply the adhesive to the compound semiconductor material film 70 and another substrate 10 at the same time, specifically, a bonding machine is used to perform the above-mentioned bonding process , those skilled in the art can select the material of the other substrate 10 according to needs, and are not limited to the examples described here.

As shown in FIG. 2C , the semiconductor single crystal substrate 60 is selectively removed to expose the backside of the compound semiconductor material film 70 , that is, to expose the first portion 71 of the compound semiconductor material film 70 . In one example, mechanical grinding or chemical etching may be used. The mechanical grinding described here can be traditional semiconductor grinding equipment, and the chemical etching solution can be a mixed solution of phosphoric acid and hydrogen peroxide, or a hydrochloric acid solution. Those skilled in the art can understand that other alternative methods known in the art can be used for mechanical grinding or chemical etching.

As shown in FIG. 2D , the exposed first portion 71 of the compound semiconductor material film 70 is removed to leave a second portion 72 of the high-quality compound semiconductor material film 70 . In one example, the exposed first portion 71 of the compound semiconductor material film 70 can be removed by dry or wet etching, that is, the first portion 71 previously grown on the semiconductor single crystal substrate 60 is removed. Removed, the first portion 71 is of poor quality due to lattice mismatch, so the second portion 72 of the compound semiconductor material film 70 of high quality (eg, high mobility) can be retained. The dry etching mentioned here can be ion beam etching, etc., and the wet etching can be etching using any suitable solution.

Those skilled in the art should understand that the mobility and thickness of the compound semiconductor material film 70 can be selected according to the design requirements of the device by adopting the method described in the present invention, thereby providing a great deal of flexibility for the mobility and thickness of the compound semiconductor material film 70 The flexibility is selected so that the compound semiconductor material film 70 having higher mobility and thinner thickness (higher sheet resistance) can be obtained at the same time.

As shown in FIG. 2E , the etched second portion 72 of the compound semiconductor material film 70 is patterned, thereby forming the magnetic induction portion 30 . In one example, the mesa pattern of the magnetic induction part 30 of the compound semiconductor Hall element can be prepared by photolithography, specifically, the area not protected by the photoresist is removed by dry or wet etching, so that Form the mesa pattern of the compound semiconductor Hall element. The mesa pattern of the compound semiconductor Hall element described here may be a step shape, or a rectangle or a cross shape in a top view.

In one example, the magnetic induction part is formed by a photolithography process. First, a photolithography process is used to form a photoresist pattern covering the second portion 72 of the compound semiconductor material film 70 by coating a photoresist material, exposing and developing. Then, using the pattern as a mask, the area of the second portion 72 of the compound semiconductor material film 70 not covered by the photoresist pattern is removed by wet or dry process. Finally, the photoresist pattern is removed. Thus, for example, a cross-shaped magnetic induction portion 30 is formed.

As shown in FIG. 2F , electrode parts 40 are prepared at the four corners of the magnetic induction part 30 . In one example, the metal electrode layer is first formed by deposition methods such as electron beam evaporation or magnetron sputtering, and the material of the metal electrode layer may include Au, Ge, Ni, Ti, Cr, Cu or their alloys; The electrode portion 40 is formed from a metal electrode layer by means of etching or etching; an annealing process is optionally performed on the electrode portion 40 to form a better ohmic contact between the electrode portion 40 and the magnetic induction portion 30 .

The electrode portion 40 forming an ohmic contact can be formed around the magnetic induction portion 30 by metal lift off (lift off) or etching. The four electrode parts 40 are formed by thermal evaporation, electron beam evaporation, sputtering plating or electroless plating.

In some examples, a photolithography process is firstly used to form a photoresist pattern exposing the end of the magnetic induction part by coating a photoresist material and exposing and developing processes. Then, using the pattern as a mask, a metal electrode material layer is deposited, and the photoresist pattern and the metal electrode material layer on it are peeled off by a metal lift-off process to obtain the electrode part 40 covering the end of the magnetic induction part 30 .

In other examples, the metal electrode layer is deposited first, and then a photoresist pattern is formed covering the end of the magnetic induction part 30 by applying a photoresist material and exposing and developing processes by using a photolithography process. The pattern is used as a mask, and the photoresist material is stripped by an etching process, and the metal electrode layer exposed by the resist pattern is removed to obtain the electrode portion 40 covering the end of the magnetic induction portion 30 .

Of course, those skilled in the art can set the shape and height of the electrode part as desired, not limited to the illustrated situation, for example, the shape of the electrode part can be set as square, circular, oval, stepped or trapezoidal.

As shown in FIG. 2G, a protective layer 50 is prepared on at least a part of the surface (for example, the entire surface) of the magnetic induction part 30 and the electrode part 40 of the compound semiconductor Hall element 100, and the metal contact region 41 of the electrode part 40 is exposed. , which is convenient for subsequent packaging and wire connection.

The protective layer 50 can prevent the magnetic induction part 30 of the compound semiconductor Hall element 100 from being damaged in subsequent manufacturing processes, and prevent moisture, impurity particles, etc. from entering the magnetic induction part 30 of the compound semiconductor Hall element 100 . The protective layer 50 includes any one of silicon nitride film, silicon oxide film, aluminum oxide film, silicon oxynitride film, epoxy resin, silica gel, silicon dioxide and polyimide film. The photoresist pattern can be used as a mask by PECVD, sputtering or other conventional film forming methods to form on the magnetic induction part 30 and the part outside the exposed area of the electrode part 40, so as to obtain the The compound semiconductor Hall element 100 with high sensitivity and low power consumption.

2A-2G of the present invention to prepare the compound semiconductor Hall element 100, if the compound semiconductor material film of the magnetic induction part 30 is made of InSb material, the mobility of the compound semiconductor material film can exceed ^60000cm2 / Vs, at the same time, the sheet resistance of the compound semiconductor material film can be designed to a desired value, so that an InSb compound semiconductor Hall element with high sensitivity and low power consumption can be finally obtained.

Referring to Table 1, it shows the performance comparison of the InSb compound semiconductor Hall element 100 prepared by the process shown in the embodiment of the present invention (as shown in FIGS. 2A-2G ) and the comparative example and the commercial InSb Hall element. The difference between the comparative example and the embodiment of the present invention is that the first part 71 of the compound semiconductor material film 70 is not removed, but the thickness of the compound semiconductor material film 70 used to form the magnetic induction part is the same (for example, the thickness is about 600nm). , the mobility of the compound semiconductor Hall element of the embodiment of the present invention reaches 65,000 cm ² /Vs, which is more than twice that of the commercial InSb Hall element under the same sheet resistance condition, showing significantly excellent magnetic induction sensitivity performance.

The performance comparison of the InSb compound semiconductor Hall element and the commercial InSb Hall element prepared by the embodiments of the present invention and comparative examples in Table 1

	迁移率(cm ²/Vs) Mobility (cm ² /Vs)	方块电阻(Ω/SQ)Sheet resistance (Ω/SQ)
本发明的实施例Embodiments of the invention	6500065000	200200
对比例comparative example	4730047300	8787
商用InSb霍尔元件Commercial InSb Hall Elements	3000030000	200200

To sum up, the compound semiconductor Hall element and the manufacturing method of the compound semiconductor Hall element provided by the embodiment of the present invention solve the technical problems raised in the background technology section. Specifically, the obtained compound semiconductor material film and the present Compared with those manufactured by existing technologies, the crystal lattice quality is better, the mobility is higher, and the overall film thickness is reduced, so that the compound semiconductor Hall element 100 has high sensitivity and low power consumption.

While certain embodiments of the present general inventive concept have been shown and described, it will be understood by those of ordinary skill in the art that changes may be made to these embodiments without departing from the principles and spirit of the present general inventive concept. The scope is defined by the claims and their equivalents.

Claims

A compound semiconductor Hall element, comprising:

Substrate;

an adhesive layer on the surface of the substrate;

a magnetic induction part bonded to the substrate through an adhesive layer; and

An electrode part, the electrode part is located at the periphery of the magnetic induction part and forms an ohmic contact with the magnetic induction part.
The compound semiconductor Hall element according to claim 1, wherein the magnetic induction part is prepared by the following steps:

Epitaxial growth of a compound semiconductor material film on a semiconductor single crystal substrate as the magnetic induction functional layer of the compound semiconductor Hall;

Coating an adhesive layer on at least one surface of the compound semiconductor material film and the substrate, and bonding the compound semiconductor material film and the substrate face-to-face through the adhesive layer;

The semiconductor single crystal substrate and a part of the compound semiconductor material film are selectively removed, and the magnetic induction part is formed through a patterning process.
The compound semiconductor Hall element according to claim 2, wherein the semiconductor single crystal substrate comprises a GaAs, InP, GaN or Si single crystal substrate.
The compound semiconductor Hall element according to any one of claims 1-2, wherein,

The magnetic induction part includes InSb, GaAs, InAs, InGaAs or InGaP.
The compound semiconductor Hall element according to claim 4, wherein the mobility of the magnetic sensing part with only the semiconductor single crystal substrate removed is greater than 40000 cm 2 /Vs, and the thickness of the magnetic sensing part is 500 nm-10 μm.
The compound semiconductor Hall element according to claim 5, wherein the mobility of the magnetic induction portion from which the semiconductor single crystal substrate and a part of the compound semiconductor material film are simultaneously removed is greater than 50000 cm 2 /Vs and less than 78000 cm 2 /Vs, and the magnetic induction The thickness of the part is 10nm-9μm.
The compound semiconductor Hall element according to any one of claims 1-2, wherein,

The substrate includes a magnetic gathering substrate, a ceramic substrate, a semiconductor substrate, a glass substrate or a plastic substrate.
The compound semiconductor Hall element according to any one of claims 1-2, wherein,

The bonding layer includes polyimide or epoxy.
The compound semiconductor Hall element according to any one of claims 1-2, wherein,

The compound semiconductor Hall element further includes a protective layer covering the entirety of the magnetic induction part and the adhesive layer, but exposing at least a part of the electrode part.
The compound semiconductor Hall element according to claim 9, wherein,

The protective layer includes any one of silicon nitride film, silicon oxide film, aluminum oxide film, silicon oxynitride film, epoxy resin, silica gel, silicon dioxide and polyimide film.
A method of manufacturing a compound semiconductor Hall element, comprising:

Epitaxially growing a compound semiconductor material film on a semiconductor single crystal substrate as a magnetic induction functional layer of the compound semiconductor Hall element;

Coating an adhesive layer on at least one surface of the compound semiconductor material film and the substrate, and bonding the compound semiconductor material film and the substrate face-to-face through the adhesive layer;

Selectively removing a part of the semiconductor single crystal substrate and the compound semiconductor material film, and forming a magnetic induction part through a patterning process;

forming an electrode portion around the magnetic induction portion;

A protective layer is formed on at least a part of the magnetic induction part and the electrode part and exposes the metal contact area of the electrode part.
The method of claim 11, wherein,

The epitaxially grown film of compound semiconductor material includes a first portion and a second portion overlying the first portion, wherein the mobility of the second portion is greater than that of the first portion.
The method of claim 12, wherein,

Removing a portion of the film of compound semiconductor material includes removing a first portion of the film of compound semiconductor material.
The method according to any one of claims 11-13, wherein,

The face-to-face bonding of the compound semiconductor material film and the substrate through the adhesive layer includes: bonding the substrate and the compound semiconductor material film together by means of the adhesive in the adhesive layer through a bonding machine.
The method of claim 11, wherein,

Selectively removing the semiconductor single crystal substrate includes removing the semiconductor single crystal substrate by means of mechanical grinding or chemical etching.
The method of claim 15, wherein,

The chemical corrosion solution includes a mixed solution of phosphoric acid and hydrogen peroxide or a hydrochloric acid solution.
The method of claim 13, wherein,

Selectively removing the first portion of the compound semiconductor material film includes removing the first portion by dry or wet etching.
The method of claim 11, wherein,

The mobility of the magnetic induction part where only the semiconductor single crystal substrate is removed is greater than 40000 cm 2 /Vs, and the thickness of the magnetic induction part is 500nm-10μm.
The method of claim 18, wherein,

The mobility of the magnetic induction part where the semiconductor single crystal substrate and a part of the compound semiconductor material film are removed simultaneously is greater than 50000 cm 2 /Vs and less than 78000 cm 2 /Vs, and the thickness of the magnetic induction part is 10 nm-9 μm.
The method of claim 11, wherein,

The bonding layer includes polyimide or epoxy.