CN113594260A - 一种igzo薄膜晶体管及其制造方法 - Google Patents
一种igzo薄膜晶体管及其制造方法 Download PDFInfo
- Publication number
- CN113594260A CN113594260A CN202110828889.2A CN202110828889A CN113594260A CN 113594260 A CN113594260 A CN 113594260A CN 202110828889 A CN202110828889 A CN 202110828889A CN 113594260 A CN113594260 A CN 113594260A
- Authority
- CN
- China
- Prior art keywords
- layer
- electrode
- dielectric layer
- gate dielectric
- igzo
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 54
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims description 38
- 238000004528 spin coating Methods 0.000 claims description 19
- 239000010408 film Substances 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 5
- 229910052593 corundum Inorganic materials 0.000 claims description 5
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 5
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 10
- 230000000052 comparative effect Effects 0.000 description 15
- 239000002243 precursor Substances 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- CHPZKNULDCNCBW-UHFFFAOYSA-N gallium nitrate Chemical compound [Ga+3].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O CHPZKNULDCNCBW-UHFFFAOYSA-N 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- YZZFBYAKINKKFM-UHFFFAOYSA-N dinitrooxyindiganyl nitrate;hydrate Chemical compound O.[In+3].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O YZZFBYAKINKKFM-UHFFFAOYSA-N 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- DJWUNCQRNNEAKC-UHFFFAOYSA-L zinc acetate Chemical compound [Zn+2].CC([O-])=O.CC([O-])=O DJWUNCQRNNEAKC-UHFFFAOYSA-L 0.000 description 4
- HZAXFHJVJLSVMW-UHFFFAOYSA-N 2-Aminoethan-1-ol Chemical compound NCCO HZAXFHJVJLSVMW-UHFFFAOYSA-N 0.000 description 3
- XNWFRZJHXBZDAG-UHFFFAOYSA-N 2-METHOXYETHANOL Chemical compound COCCO XNWFRZJHXBZDAG-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000008186 active pharmaceutical agent Substances 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 229940044658 gallium nitrate Drugs 0.000 description 3
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 3
- 239000004810 polytetrafluoroethylene Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- 229910009112 xH2O Inorganic materials 0.000 description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- -1 polytetrafluoroethylene Polymers 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 239000003381 stabilizer Substances 0.000 description 2
- 241001391944 Commicarpus scandens Species 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- YVFORYDECCQDAW-UHFFFAOYSA-N gallium;trinitrate;hydrate Chemical compound O.[Ga+3].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O YVFORYDECCQDAW-UHFFFAOYSA-N 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
- H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
一种IGZO薄膜晶体管及其制造方法,所述创新型结构IGZO薄膜晶体管包括:基底、背栅、背栅介电层、源极、漏极、IGZO层、顶栅介电层、顶栅极。所述背栅电极层水平位置上与漏区电极具有0.2μm的交叠长度,水平位置上距离源区电极18μm的长度;所述的IGZO有源层分为栅控区域的沟道区和非栅控区域的偏移区,沟道区长度20μm,偏移区长度0.1μm;所述的顶栅电极层水平位置上距离漏区电极0.1μm的长度,水平位置上与源区电极具有1μm的交叠长度。本发明制作的非对称双栅极IGZO薄膜晶体管,顶栅处偏移区的引入能够降低顶栅介电层中的峰值电场,提高器件的耐压特性。
Description
技术领域
本发明主要涉及薄膜晶体管技术领域,特别是涉及一种创新型结构IGZO薄膜晶体管。
背景技术
非晶氧化物半导体铟镓锌氧(ɑ-IGZO)薄膜因具有柔性、透明以及大面积制造等特点备受学术界与产业界的广泛关注。基于IGZO薄膜制备的晶体管具有高迁移率、高开关电流比、低关态漏电流等优点。以结构划分,传统IGZO薄膜晶体管结构可分为顶栅共面、顶栅交错、底栅共面、底栅交错四种基础结构。在传统结构的基础上,根据实际应用需求衍生出多种新型结构。从2004年首次报道以来,IGZO薄膜晶体管的研究主要关于如何提升器件的迁移率、开关比、电流密度等。例如,采用双栅极结构可有效提升器件电流能力。然而关于提升IGZO薄膜晶体管耐压能力的研究鲜有报道。
现有提升IGZO薄膜晶体管耐压的方法主要包括:1)采用原子层沉积(ALD)工艺制备的高介电常数、高质量绝缘介电层;2)偏移薄膜晶体管的栅极与漏极距离。采用ALD工艺制备具有成本高、不适合大规模生产等缺点;偏移栅极、漏极距离则会显著增加导通电阻,降低器件的电流密度。Si基半导体器件的导通电阻正比于击穿电压的2.5次方,存在折中关系。IGZO薄膜晶体管必然存在类似的折中关系,提升耐压与提升电流密度不能同时实现。因此有必要提出一种新型IGZO薄膜晶体管结构,提升器件耐压能力的同时减小器件电流密度的牺牲。
发明内容
鉴于现有提升IGZO薄膜晶体管耐压方法中的不足,本发明提出一种非对称双栅极IGZO薄膜晶体管及其制作方法,提升器件耐压能力,降低电流密度损失,有效提高功率密度。
为了实现上述的IGZO薄膜晶体管功能,本发明采用如下技术方案:
一种非对称双栅极IGZO薄膜晶体管,包括基底、背栅电极层、背栅介电层、源区电极和漏区电极、IGZO有源层、顶栅介电层以及顶栅电极层,所述背栅电极层设于所述基底上一侧,所述背栅介电层覆盖在所述背栅电极与基底之上,所述源区电极与漏区电极设于所述背栅介电层上相对的两侧,所述IGZO有源层设于所述源区电极、漏区电极以及背栅介电层之上,所述顶栅介电层和所述顶栅电极层依次层叠在所述IGZO有源层上。
在本实施例中,所述基底包括半导体衬底和所述半导体衬底上的绝缘氧化层。
在本实施例中,所述背栅电极层位于背栅介电层下方,水平方向上位于靠近所述漏区电极一侧,水平位置上与漏区电极具有0.2μm的交叠长度,水平位置上距离源区电极18μm的长度。
在本实施例中,所述源、漏电极均为ITO电极。
在本实施例中,所述的IGZO有源层分为栅控区域的沟道区和非栅控区域的偏移区,沟道区长度和宽度均为为20μm,偏移区长度为0.1μm。
在本实施例中,所述顶栅介电层覆盖在IGZO有源层和源、漏电极上,材质为Al2O3。
在本实施例中,所述顶栅电极层设于顶栅介电层上,水平位置上距离漏区电极0.1μm的偏移长度,水平位置上与源区电极具有1μm的交叠长度。
一种非对称双栅极IGZO薄膜晶体管的制造方法,包括:获取基底;采用溶液旋涂工艺在所述基底上形成背栅电极层;采用溶胶凝胶旋涂工艺制作背栅介电层覆盖在所述背栅电极上;在所述背栅介电层的一侧形成源极、另一侧形成漏极;通过溶液工艺在所述背栅介电层上形成IGZO有源层,并在所述的IGZO层上利用溶胶凝胶旋涂工艺形成顶栅介电层;在所述顶栅介电层上形成顶栅极。
在本实施例中,通过溶液旋涂工艺在所述基底上形成背栅电极。
在本实施例中,通过溶胶凝胶旋涂工艺形成背栅介电层。
在本实施例中,通过溶液工艺在所述背栅介电层上形成IGZO层的步骤包括:制作IGZO前体溶液;将所述IGZO前体溶液旋涂于所述背栅介电层上。
在本实施例中,对旋涂了所述IGZO前体溶液的背栅介电层在空气环境下退火处理,退火温度为400℃,退火时间为1h。
在本实施例中,所述制作IGZO前体溶液的步骤包括:将醋酸锌水合物、硝酸铟水合物、硝酸镓水合物溶解于2-甲氧基乙醇溶剂中并在超声发生器中振荡60分钟,得到透明溶液后,在室温下保存48小时;将得到的液体进行过滤得到所述IGZO前体溶液。
在本实施例中,所述过滤是使用0.45μm厚的聚四氟乙烯滤膜进行。
在本实施例中,所述将硝酸铟水合物、醋酸锌水合物、硝酸镓水合物溶解于2-甲氧基乙醇溶剂中的步骤中,硝酸铟水合物、醋酸锌水合物、硝酸镓水合物的摩尔比是2:1:1,并添加单乙醇胺(MEA)作为稳定剂。
在本实施例中,通过溶胶凝胶旋涂工艺形成顶栅介电层。
在本实施例中,通过溶液旋涂工艺形成顶栅电极层。
传统对称双栅极IGZO薄膜晶体管栅极均与源、漏极存在交叠,高压工作状态下交叠区内的电场较高,是易击穿区域,降低了IGZO薄膜晶体管的耐压能力,本实施例通过偏移顶栅极与漏极之间的距离,减小非栅控顶栅介电层内峰值电场,提升器件耐压能力,进一步通过背栅电压提升非栅控IGZO有源层内的载流子密度,降低沟道导通电阻,有效提高IGZO薄膜晶体管的功率密度。
附图说明
为了更好地描述和说明本发明的实施例,本发明提供了多幅附图。用于描述附图的附加细节或示例不应当被认为是对所公开的发明、目前描述的实施例和/或示例以及目前理解的这些发明的最佳模式中的任何一者的范围的限制。
图1是本发明实施例中非对称双栅IGZO薄膜晶体管的结构示意图;
图2是本发明对比例1传统双栅IGZO薄膜晶体管的结构示意图;
图3是本发明对比例2传统顶栅IGZO薄膜晶体管的结构示意图;
图4是本发明实施例中非对称双栅IGZO薄膜晶体管的制造方法流程图;
图5是本发明实施例中步骤S005的子步骤流程图;
图6是本发明实施例与对比例1和2的电场分布图。
具体实施方式
为了便于理解本发明,下面将参照相关附图对本发明进行更全面的描述。
附图1中给出了本发明的实施例。但是,本发明可以以许多不同的形式来实现,并不限于本文所描述的实施例。相反地,提供这些实施例的目的是使读者对本发明的公开内容理解得更加透彻全面。除非另有定义,本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。
发明人认为可以采用新型结构提升器件耐压能力,同时降低电流密度牺牲,提升功率密度。本发明提出了一种创新型的非对称双栅极IGZO薄膜晶体管,创新结构中顶栅起主栅调控作用,水平方向顶栅与源端电极交叠1μm长度,而与漏端电极不存在交叠,且相距0.1μm,该长度下的非栅控沟道区域称为偏移区,偏移长度为0.1μm。偏移区可以降低漏极附近的顶栅介电层中的峰值电场,有效提升器件的耐压能力,同时通过背栅提升偏移区中载流子浓度,降低电流密度的损失,提高IGZO薄膜晶体管的功率密度。
图1是本实施例中IGZO薄膜晶体管的示意图,图4是本实施例中IGZO薄膜晶体管的制造方法流程图,该方法可以用于制造图1所示的IGZO薄膜晶体管,包括如下步骤:
S001,获取基底。
基底可以是本领域习知的刚性基底(例如玻璃)或柔性基底。在本实施例中,基底为硅衬底。
S002,通过溶液旋涂工艺在基底上形成背栅电极层。
在本实施例中,在硅衬底上氧化形成二氧化硅层,然后再于二氧化硅层上通过溶液旋涂工艺形成背栅电极层,电极材质为ITO,在其他实施例中也可以采用其他材料,这都在本发明的保护范围内。背栅电极(2)水平位置上与漏区电极(4b)具有0.2μm的交叠长度,水平位置上距离源区电极(4a)18μm的长度。
S003,通过溶胶凝胶旋涂工艺在背栅电极层及基底上形成背栅介电层。
在本实施例中,可以在二氧化硅层和形成的背栅电极层上覆盖背栅介电层,介电层材质为Al2O3。
S004,在背栅介电层的一侧形成源极、另一侧形成漏极。
在本实施例中,是在步骤S003后于背栅介电层两侧通过溶液旋涂工艺分别形成ITO源极、ITO漏极,在其他实施例中,也可以采用本领域习知的其他源漏材质作为源极和漏极。
S005,通过溶液工艺在背栅介电层和源、漏电极上形成IGZO层。
在本实施例中,通过溶液工艺在背栅介电层上和源、漏电极上形成IGZO层。
S006,在IGZO层上形成顶栅介电层。
在本实施例中,顶栅介电层覆盖IGZO层的沟道区并延伸至与两侧的ITO源极和ITO漏极有交叠。在本实施例中,顶栅介电层的材质为Al2O3。
S007,在顶栅介电层上形成顶栅极。
在本实施例中,顶栅极为溶液工艺制备的ITO栅极,在其他实施例中也可以采用其他本领域习知的其他材质作为顶栅极。顶栅极与漏电极存在0.1μm的偏移长度,与源电极存在1μm的交叠长度。
在本实施例中,上述方法形成的IGZO层为ɑ-IGZO(非晶IGZO)薄膜。
在本实施例中,步骤S002至S007采用溶液工艺进行制备,从而使得IGZO薄膜晶体管可实现全溶液工艺制备,操作简单、成本低.。
参见图5,在本实施例中,步骤S005包括:
S5a,制作IGZO前体溶液。
在本实施例中,步骤S5a具体是在室内环境下将硝酸铟(III)水合物(In(NO3)3·xH2O)、醋酸锌水合物(Zn(OAc)2·xH2O)、硝酸镓(III)水合物(Ga(NO3)3·xH2O)按照2:1:1的摩尔比溶解于2-甲氧基乙醇(CH3OCH2CH2OH)溶剂中,并添加单乙醇胺(MEA)作为稳定剂;在超声发生器中振荡60分钟后,得到的透明溶液在室温下保存48小时,通过0.45μm厚的聚四氟乙烯(PTFE)过滤器过滤以此完成IGZO前体溶液的制备。
S5b,将IGZO前体溶液旋涂于背栅介电层上。
在本实施例中,是将IGZO前体溶液旋涂于背栅介电层上并以4500RPM(转/分)的速度旋转30秒。
S5c,进行热退火处理。
在本实施例中,是将旋涂有IGZO前体溶液的背栅介电层在空气氛围下退火,退火温度为400℃,退火时间为1小时。
本申请还提供了一种IGZO薄膜晶体管的制备方法。如图1所示,IGZO薄膜晶体管包括基底1、背栅2、背栅介电层3、源极4a、漏极4b、IGZO层5、顶栅介电层6、顶栅极7。基底1可以是本领域习知的刚性基底(例如玻璃)或柔性基底。在本实施例中,基底为半导体衬底,例如硅衬底。在图1所示的实施例中,IGZO薄膜晶体管采用双栅顶栅主控(Dual-Gate)结构。需要指出的是,各膜层在图1中的尺寸只是一个示意,并不代表其实际尺寸。
在图1所示的实施例中,背栅电极层2设于基底之上,材质为ITO,含括偏移区长度b,之后是背栅介电层3。
源极4a形成于背栅介电层3的一侧、漏极4b形成于背栅介电层3的另一侧。在图1所示的实施例中,源极4a为ITO源极、漏极4b为ITO漏极。在其他实施例中,也可以采用本领域习知的其他源漏材质作为源极和漏极。
IGZO层5包括沟道区a和偏移区b,背栅电极负责调控偏移区。IGZO层5通过溶液工艺形成。
顶栅介电层6形成于IGZO层5上。在图1所示的实施例中,顶栅介电层6覆盖沟道区a和偏移区b,并延伸至源极4a和漏极4b上。顶栅极7形成于顶栅介电层6上。
在本实施例中,顶栅介电层6材质为Al2O3。在本实施例中,顶栅极7为ITO栅极。
在本实施例中,IGZO层5为ɑ-IGZO薄膜。在IGZO薄膜晶体管工作时,顶栅极7接正电压,在IGZO薄膜沟道中积累电子,通过对漏极4b加电进行载流子输运形成电流。
在图1所示的实施例中,IGZO薄膜晶体管还包括设于基底1上的绝缘氧化层1a。在本实施例中,绝缘氧化层1a的材质为二氧化硅。
在图1所示的实施例中,背栅电极层2的厚度为5nm,背栅长度为2.2μm,背栅介电层3厚度为200nm,源极4a和漏极4b的厚度皆为25nm(背栅介电层层3上的源/漏极厚度),IGZO层5的厚度为20nm,沟道区a的长度为20μm,偏移区长度b为0.1μm,顶栅介电层6的厚度为30nm,栅极7的厚度为50nm。
图6是本申请实施例与对比例1和2的电场分布图,纵坐标为电场,由于高电场区域主要分布在栅、漏附近,所以横坐标为以距漏极左边缘向左2μm处为起点向右取2.5μm的长度。对比例1为传统双栅IGZO薄膜晶体管;对比例2为传统顶栅IGZO薄膜晶体管,无背栅电极;两个对比例均与实施例采用相同工艺步骤,相同工艺尺寸。E1、E2和E3分别表示本实施例、对比例1和对比例2的电场分布曲线。可以看出,当背栅电压VBG=10V,顶栅电压VTG=10V,实施例和对比例1分别施加漏端电压VDS=75V、VDS=40V时,顶栅介电层中峰值电场达到文献报道的Al2O3膜极限场强6MV/cm,即发生击穿,此时的电流分别为0.495mA,0.45mA;对比例2顶栅电压VTG=10V,漏端电压VDS=40V时,顶栅介电层达到击穿条件,此时的电流为0.425mA。当顶栅压为10V时,本发明实施例功率密度为16.875W/cm,而对比例1和对比例2的功率密度分别为9.9W/cm,8.5W/cm,实施例相较于对比例1功率密度同比提高了41.3%,实施例相较于对比例2功率密度同比提高了49.6%。具体数据如表1所示。
表1 结果参数表
以上所述实施例描述较为具体和详细,但不能因此而理解为对发明专利范围的限制。应当指出的是,对于本领域的技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些都属于本发明的保护范围。
Claims (10)
1.一种IGZO薄膜晶体管,其特征在于,包括基底(1)、背栅电极层(2)、背栅介电层(3)、源区电极(4a)和漏区电极(4b)、IGZO有源层(5)、顶栅介电层(6)以及顶栅电极层(7),所述背栅电极层(2)设于所述基底(1)上表面一侧,所述背栅介电层(3)旋涂覆盖于所述基底(1)与所述背栅电极层(2)上,所述源区电极(4a)和漏区电极(4b)间隔地设在所述背栅介电层(3)上表面两侧,所述IGZO有源层(5)形成于背栅介电层(3)与源区电极(4a)和漏区电极(4b)上,所述顶栅介电层(6)以及顶栅电极层(7)依次层叠在所述IGZO有源层(5)上。
2.根据权利要求1所述的IGZO薄膜晶体管,其特征在于,所述背栅电极层(2)位于背栅介电层(3)下方,水平位置上与漏区电极(4b)具有0.2μm的交叠长度,水平位置上距离源区电极(4a)18μm的长度。
3.根据权利要求1所述的IGZO薄膜晶体管,其特征在于,所述的IGZO有源层水平方向上分为栅控区域的沟道区和非栅控区域的偏移区,沟道区长度和宽度均为为20μm,偏移区长度为0.1μm。
4.根据权利要求1所述的IGZO薄膜晶体管,其特征在于,所述的顶栅电极层(7)位于顶栅介电层(6)上方,水平位置上距离漏区电极(4b)0.1μm的长度,水平位置上与源区电极(4a)具有1μm的交叠长度。
5.一种IGZO薄膜晶体管的制造方法,,包括:
获取基底;
在所述基底上形成背栅电极;
采用溶胶凝胶旋涂工艺制作背栅介电层;
在所述背栅介电层的一侧形成源极,另一侧形成漏极;
通过溶液工艺在所述背栅介电层和源、漏电极上形成IGZO层;
采用溶胶凝胶旋涂工艺制作顶栅介电层;
在所述顶栅介电层上形成顶栅电极。
6.根据权利要求5所述的IGZO薄膜晶体管,其特征在于,所述背栅电极层为导电性优的ITO膜层,制作时优先采用溶液旋涂工艺,背栅电极层水平长度为2.2μm。
7.根据权利要求5所述的IGZO薄膜晶体管的制造方法,其特征在于,所述背栅介电层材质为氧化铝膜层,制作时采用溶胶凝胶旋涂工艺,旋涂厚度为200nm。
8.根据权利要求5所述的IGZO薄膜晶体管,其特征在于,所述的源电极层、漏电极层、顶栅电极层材质均为导电性优的ITO膜层,制作时优先采用溶液旋涂工艺。
9.根据权利要求5所述的IGZO薄膜晶体管的制造方法,其特征在于,所述IGZO有源层通过溶液工艺制备,旋涂厚度为20nm。
10.根据权利要求5所述的IGZO薄膜晶体管的制造方法,其特征在于,所述顶栅介电层材质为Al2O3膜层,制作时采用溶胶凝胶旋涂工艺,旋涂厚度为30nm。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110828889.2A CN113594260A (zh) | 2021-07-22 | 2021-07-22 | 一种igzo薄膜晶体管及其制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110828889.2A CN113594260A (zh) | 2021-07-22 | 2021-07-22 | 一种igzo薄膜晶体管及其制造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN113594260A true CN113594260A (zh) | 2021-11-02 |
Family
ID=78249106
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110828889.2A Pending CN113594260A (zh) | 2021-07-22 | 2021-07-22 | 一种igzo薄膜晶体管及其制造方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN113594260A (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115132848A (zh) * | 2022-06-15 | 2022-09-30 | 南京邮电大学 | 一种高功率密度igzo薄膜晶体管及其制造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5475238A (en) * | 1991-09-30 | 1995-12-12 | Nec Corporation | Thin film transistor with a sub-gate structure and a drain offset region |
US20100244017A1 (en) * | 2009-03-31 | 2010-09-30 | Randy Hoffman | Thin-film transistor (tft) with an extended oxide channel |
CN102280489A (zh) * | 2010-06-08 | 2011-12-14 | 三星移动显示器株式会社 | 具有偏移结构的薄膜晶体管 |
-
2021
- 2021-07-22 CN CN202110828889.2A patent/CN113594260A/zh active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5475238A (en) * | 1991-09-30 | 1995-12-12 | Nec Corporation | Thin film transistor with a sub-gate structure and a drain offset region |
US20100244017A1 (en) * | 2009-03-31 | 2010-09-30 | Randy Hoffman | Thin-film transistor (tft) with an extended oxide channel |
CN102280489A (zh) * | 2010-06-08 | 2011-12-14 | 三星移动显示器株式会社 | 具有偏移结构的薄膜晶体管 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115132848A (zh) * | 2022-06-15 | 2022-09-30 | 南京邮电大学 | 一种高功率密度igzo薄膜晶体管及其制造方法 |
CN115132848B (zh) * | 2022-06-15 | 2024-06-14 | 南京邮电大学 | 一种高功率密度igzo薄膜晶体管及其制造方法 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Xu et al. | The role of solution-processed high-κ gate dielectrics in electrical performance of oxide thin-film transistors | |
KR101660142B1 (ko) | 채널 이동도가 증가한 반도체 소자 및 이를 제조하기 위한 건식 화학 공정 | |
KR101963226B1 (ko) | 트랜지스터와 그 제조방법 및 트랜지스터를 포함하는 전자소자 | |
JP6543869B2 (ja) | 半導体素子及びその製造方法 | |
CN113270501A (zh) | 一种功率igzo薄膜晶体管及其制备方法 | |
CN107170828B (zh) | 一种铁电场效应晶体管及其制备方法 | |
CN108091693B (zh) | 铁电场效应晶体管及其制备方法 | |
KR20130140002A (ko) | 안정성이 향상된 금속산화물 tft | |
WO2017071661A1 (zh) | 一种薄膜晶体管及制造方法和显示器面板 | |
US11881515B2 (en) | Vertical thin film transistor with single gate electrode with micro-perforations | |
CN105118854A (zh) | 金属氧化物半导体薄膜、薄膜晶体管、制备方法及装置 | |
CN113594260A (zh) | 一种igzo薄膜晶体管及其制造方法 | |
Lee et al. | Heterojunction oxide thin film transistors: a review of recent advances | |
WO2017036025A1 (zh) | Iii族氮化物增强型hemt及其制备方法 | |
CN109690786B (zh) | 异质结遂穿场效应晶体管及其制备方法 | |
CN103839821A (zh) | 晶体管及其制造方法 | |
CN102646719A (zh) | 氧化物薄膜、薄膜晶体管及其制备方法 | |
CN105789222A (zh) | 阵列基板、液晶显示面板及阵列基板制作方法 | |
KR101231724B1 (ko) | 박막 트랜지스터 및 그의 제조 방법 | |
KR20150060034A (ko) | 이중 게이트 전극을 가진 박막 트랜지스터 | |
US10797149B2 (en) | Thin film transistor including high-dielectric insulating thin film and method of fabricating the same | |
CN209947842U (zh) | 一种含有多层高k栅绝缘层的mos-hemt器件 | |
CN109888019B (zh) | 一种基于准调制掺杂效应的异质结构氧化物薄膜晶体管 | |
CN107452810B (zh) | 一种金属氧化物薄膜晶体管及其制备方法 | |
US20220367722A1 (en) | Igzo thin-film transistor and method for manufacturing same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20211102 |
|
RJ01 | Rejection of invention patent application after publication |