CN113517396A - Phase change memory and manufacturing method thereof - Google Patents
Phase change memory and manufacturing method thereof Download PDFInfo
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/861—Thermal details
Abstract
The embodiment of the application discloses a phase change memory and a manufacturing method thereof, wherein the phase change memory comprises: the phase change memory unit comprises a first conductive line, a phase change memory unit and a second conductive line which are sequentially stacked from bottom to top; wherein the first and second conductive lines are parallel to the same plane and perpendicular to each other, the phase change memory cell being perpendicular to both the first and second conductive lines; the phase change memory unit comprises a gating layer and a phase change memory layer which are arranged in a stacked mode; the phase change memory layer comprises a plurality of phase change material layers and a heat conduction material layer positioned between the phase change material layers.
Description
Technical Field
The embodiment of the application relates to the field of semiconductor manufacturing, in particular to a phase change memory and a manufacturing method thereof.
Background
The phase change memory is a new nonvolatile memory device, and has great advantages for a flash memory in the aspects of read-write speed, read-write times, data retention time, unit area, multi-value realization and the like.
The phase change memory performs state transition between a crystalline state and an amorphous state according to a thermal effect, and a complicated thermal process is accompanied in an operation process of the phase change memory. As the integration level of the phase change memory is increased, the driving capability is also decreased, and therefore, how to reduce the operation power consumption of the phase change memory and increase the operation speed of the phase change memory becomes an urgent problem to be solved.
Disclosure of Invention
Embodiments of the present disclosure provide a phase change memory and a method for manufacturing the same to solve at least one of the problems of the prior art.
In order to achieve the above purpose, the technical solution of the embodiment of the present application is implemented as follows:
in a first aspect, an embodiment of the present application provides a phase change memory, including:
the phase change memory unit comprises a first conductive line, a phase change memory unit and a second conductive line which are sequentially stacked from bottom to top; wherein the first and second conductive lines are parallel to the same plane and perpendicular to each other, the phase change memory cell being perpendicular to both the first and second conductive lines; the phase change memory unit comprises a gating layer and a phase change memory layer which are arranged in a stacked mode;
the phase change memory layer comprises a plurality of phase change material layers and a heat conduction material layer positioned between the phase change material layers.
In an alternative embodiment, in the case that the heat conductive material layer is a plurality of layers, the phase change material layer and the heat conductive material layer are alternately stacked.
In an alternative embodiment, the thickness of the phase change material layer is greater than the thickness of the thermal conductive material layer.
In an alternative embodiment, the number of layers of the phase change material layer is greater than the number of layers of the thermal conductive material layer.
In an alternative embodiment, the layer of thermally conductive material has a thickness in the range of 1-5 nm.
In an alternative embodiment, the material of the layer of thermally conductive material comprises at least one of: metal nitrogen compound, titanium tungsten alloy.
In an alternative embodiment, the phase change memory cell further comprises: a first electrode layer, a second electrode layer, and a third electrode layer;
the first electrode layer is in electrical contact with the first conductive line, the second electrode layer is located between the gate layer and the phase change memory layer, and the third electrode layer is in electrical contact with the second conductive line; the layer of thermally conductive material is not in electrical contact with the second electrode layer and the third electrode layer.
In a second aspect, an embodiment of the present application provides a method for manufacturing a phase change memory, where the method includes:
sequentially forming a first conductive line, a phase change memory unit and a second conductive line which are arranged in a stacked mode; wherein the first and second conductive lines are parallel to the same plane and perpendicular to each other, the phase change memory cell being perpendicular to both the first and second conductive lines; the phase change memory unit comprises a gating layer and a phase change memory layer which are arranged in a stacked mode;
the phase change memory layer comprises a plurality of phase change material layers and a heat conduction material layer positioned between the phase change material layers.
In an alternative embodiment, in the case that the heat conductive material layer is a plurality of layers, the phase change material layer and the heat conductive material layer are alternately stacked.
In an alternative embodiment, the thickness of the phase change material layer is greater than the thickness of the thermal conductive material layer.
In an alternative embodiment, the number of layers of the phase change material layer is greater than the number of layers of the thermal conductive material layer.
In an alternative embodiment, the layer of thermally conductive material has a thickness in the range of 1-5 nm.
In an alternative embodiment, the material of the layer of thermally conductive material comprises at least one of: metal nitrogen compound, titanium tungsten alloy.
In an alternative embodiment, the forming a phase change memory cell includes:
forming a first electrode layer on the first conductive line;
forming a gate layer on the first electrode layer, and forming a second electrode layer on the gate layer;
and forming the phase change memory layer on the second electrode layer, and forming a third electrode layer on the phase change memory layer.
The embodiment of the application discloses a phase change memory and a manufacturing method thereof, wherein the phase change memory comprises: the phase change memory unit comprises a first conductive line, a phase change memory unit and a second conductive line which are sequentially stacked from bottom to top; wherein the first and second conductive lines are parallel to the same plane and perpendicular to each other, the phase change memory cell being perpendicular to both the first and second conductive lines; the phase change memory unit comprises a gating layer and a phase change memory layer which are arranged in a stacked mode; the phase change memory layer comprises a plurality of phase change material layers and a heat conduction material layer positioned between the phase change material layers. Set up the heat conduction material layer in the phase change storage layer in this application, and the heat conduction material layer in this application sets up between the phase change material layer, because the heat conduction material layer has good heat conductivity and structural stability, consequently the heat conductivity and the stability of phase change material layer can be increased in the insertion of heat conduction material layer to can reduce the operation consumption of phase change material layer, promote phase change material layer's operating speed.
Drawings
Fig. 1 is a cross-sectional view of a phase change memory according to an embodiment of the present disclosure;
fig. 2 is a schematic flow chart illustrating an implementation of a method for manufacturing a phase change memory according to an embodiment of the present disclosure;
fig. 3a to 3f are schematic structural diagrams of a method for manufacturing a phase change memory according to an embodiment of the present application.
Detailed Description
Exemplary embodiments disclosed in the present application will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art, that the present application may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the present application; that is, not all features of an actual embodiment are described herein, and well-known functions and structures are not described in detail.
In the drawings, the size of layers, regions, elements, and relative sizes may be exaggerated for clarity. Like reference numerals refer to like elements throughout.
It will be understood that when an element or layer is referred to as being "on" … …, "adjacent to … …," "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on … …," "directly adjacent to … …," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application. And the discussion of a second element, component, region, layer or section does not imply that a first element, component, region, layer or section is necessarily present in the application.
Spatial relationship terms such as "under … …", "under … …", "below", "under … …", "above … …", "above", and the like, may be used herein for ease of description to describe the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "below … …" and "below … …" can encompass both an orientation of up and down. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
The phase change memory is a new nonvolatile memory device, and has great advantages for a flash memory in the aspects of read-write speed, read-write times, data retention time, unit area, multi-value realization and the like. The phase change memory cell includes a bottom electrode layer, a gate layer, a middle electrode layer, a phase change material layer, and a top electrode layer. The phase-change material layer is transformed between a crystalline state and an amorphous state according to a thermal effect. However, as the process nodes are continuously reduced, and the size of the phase change memory is continuously reduced, the performance of the phase change memory, such as the operation power consumption and the operation speed, may be affected by the following problems: 1) because the central position of the phase-change material layer is far away from the upper electrode layer and the lower electrode layer (the middle electrode layer and the top electrode layer), the temperature distribution of the whole phase-change material layer can have difference, so that the crystallization degrees of the phase-change material layer at different positions in the erasing process can be different, and the erasing stability of the whole device can be influenced; 2) due to the poor heat conductivity of the phase-change material layer, the temperature of the phase-change material is too high in the operation process, heat dissipation of the phase-change material is not facilitated, the thermal stability of the phase-change material is influenced, and adjacent phase-change storage units are influenced, so that erasing and writing are influenced; 3) because the elements in the phase change material layer are easy to diffuse and segregate in the repeated erasing and writing process of the device, the stability of the phase change material is affected in the operation process of the device, and the fatigue times of the device are further affected. Therefore, how to improve the performance of the phase change memory becomes an urgent problem to be solved.
Therefore, the following technical scheme of the embodiment of the application is provided.
An embodiment of the present application provides a phase change memory, and fig. 1 is a cross-sectional view of the phase change memory provided in the embodiment of the present application, and as shown in fig. 1, the phase change memory includes: a first conductive line 160, a phase change memory cell 100, and a second conductive line 170 stacked in this order from bottom to top; wherein the first and second conductive lines 160 and 170 are parallel to the same plane and perpendicular to each other, the phase change memory cell 100 is perpendicular to both the first and second conductive lines 160 and 170; the phase change memory cell 100 comprises a gate layer 120 and a phase change memory layer 140 which are stacked;
the phase change memory layer 140 includes a plurality of phase change material layers 141 and a thermally conductive material layer 142 between the phase change material layers 141.
In embodiments of the present application, the phase change memory cell can be switched between a high resistance state and a low resistance state in direct or indirect response to a control pulse (e.g., a voltage or current pulse). These phase change memory cells may be referred to as variable resistance memory cells. In some variable resistance memory cells, the change in resistance during read and write operations is at least partially associated with the heat generated by the control pulse. The read and write operations may be program or erase operations. For a variable resistance memory cell, the programming operation may also be referred to as a reset operation, which may change the resistance state of the phase change memory cell from a low resistance state to a high resistance state. Similarly, an erase operation (which may also be referred to as a set operation) may change the resistance state of a phase change memory cell from a high resistance state to a low resistance state.
As shown in fig. 1, the phase change memory cell extends along a z-axis, an axial direction of the phase change memory cell is a z-axis direction, and the phase change memory includes: the phase change memory device includes a first conductive line 160, a phase change memory cell 100, and a second conductive line 170 stacked in this order in an axial direction. The phase change memory cell 100 includes a gate layer 120 and a phase change memory layer 140 stacked in an axial direction.
In the embodiment of the present application, the phase change material layer 141 is capable of reversibly transforming between a crystalline state and an amorphous state. The material of the phase change material layer 141 may be a chalcogenide compound, such as any one of a germanium-antimony-tellurium alloy, an antimony-tellurium alloy, a germanium-tellurium alloy, a titanium-antimony-tellurium alloy, a tantalum-antimony-tellurium alloy, or other chalcogenide compounds, and certainly, the material of the phase change material layer 141 may also be other suitable phase change materials, which is not limited herein.
In the embodiment of the present application, the gate layer 120 can perform state transition between the on state and the off state under the action of the control pulse (greater than the threshold pulse of the switching material layer) of the gate layer 120. The gating layer 120 may also be referred to as an Ovonic Threshold Switching (OTS). The material of the gate layer 120 may be an OTS material, such as ZnTe, GeTe, NbO, or SiAsTe.
In the present embodiment, the material of the first and second conductive lines 160 and 170 includes a conductive material. The conductive material includes, but is not limited to, tungsten (W), cobalt (Co), copper (Cu), aluminum (Al), or polysilicon, etc.
In the embodiment of the present application, the first conductive line 160 and the second conductive line 170 may also be referred to as a word line and a bit line, for example, in one embodiment, the first conductive line 160 is a word line, and the second conductive line 170 is a bit line; in another embodiment, the second conductive line 170 is a word line, and the first conductive line 160 is a bit line, which is only the difference between the first conductive line 160 and the second conductive line 170 named by those skilled in the art.
Because the central position of the single-layer phase-change material layer is far away from the upper electrode layer and the lower electrode layer, the temperature distribution of the whole phase-change material layer can have difference, and therefore the crystallization degrees of the phase-change material layer at different positions in the erasing process can be different, so that the erasing stability of the whole device can be influenced. And phase change memory layer in this application includes multilayer phase change material layer and is located heat conduction material layer between the phase change material layer, in other words, heat conduction material layer in this application sets up between phase change material layer, because heat conduction material layer can form the heating center in phase change memory layer inside, reduces the temperature distribution difference of phase change material layer in the operation process for whole phase change material layer's heat distribution is comparatively even, reduces the stability problem of erasing that causes because crystallization degree's difference, thereby promotes the performance of device. Therefore, the operation power consumption of the phase change material layer can be reduced, and the operation speed of the phase change material layer is improved.
Due to the fact that the heat conductivity of the pure phase-change material layer is poor, the temperature of the phase-change material is too high in the operation process, heat dissipation of the phase-change material is not facilitated, the thermal stability of the phase-change material is affected, the influence is caused to adjacent phase-change storage units, and erasing and writing are affected. And phase change memory layer in this application includes multilayer phase change material layer and is located heat conduction material layer between the phase change material layer, in other words, heat conduction material layer in this application sets up between the phase change material layer, because heat conduction material layer's heat conductivity is better, is favorable to phase change material to dispel the heat at the in-process of operation for the phase change material temperature can not be too high, thereby to adjacent phase change memory cell's influence when having reduced the device operation, has promoted phase change material layer stability of generating heat and the operating stability of device. Therefore, the operation power consumption of the phase change material layer can be reduced, and the operation speed of the phase change material layer is improved.
Because the element in the phase change material layer is easy to diffuse and segregate in the repeated erasing and writing process of the device, the stability of the phase change material is affected in the operation process of the device, and the fatigue times of the device are further affected. And the phase change storage layer in this application includes multilayer phase change material layer and is located the heat conduction material layer between the phase change material layer, in other words, the heat conduction material layer in this application sets up between the phase change material layer, therefore in the device repeated operation in-process, can prevent the component segregation that leads to because of the arbitrary diffusion of element in the phase change material layer to promote the material stability in the device operation process, promoted the fatigue number of times of device.
In addition, under the condition that the overall structure of the phase change memory unit is not changed, the performance of the device is improved only by adding the heat conduction material layer in the phase change memory layer without adding an additional photomask, the process development cost is low, and the economic applicability is good.
In the embodiment of the present application, in the case that the heat conductive material layer is a plurality of layers, the phase change material layer 141 and the heat conductive material layer 142 are alternately stacked in the axial direction. In other words, the thermal conductive material layer 142 is disposed between the adjacent phase change material layers 141. Here, a projection pattern of the thermal conductive material layer 142 in the axial direction is the same as a projection pattern of the phase change material layer 141 in the axial direction.
The heat conducting material layer is used for preventing diffusion and segregation of phase change materials in the phase change material layer, helping the phase change material layer to dissipate heat in the operation process, forming a heating center between adjacent phase change material layers and reducing the difference of temperature distribution of the phase change material layer in the operation process.
In the embodiment of the present application, the thickness of the phase change material layer 141 is much greater than that of the thermal conductive material layer 142. The thickness of the thermal conductive material layer 142 along the axial direction is in the range of 1 to 5 nm. In some embodiments, the thickness of the thermal conductive material layer 142 along the axial direction is preferably in the range of 1-3 nm. In the embodiment of the present application, the thickness of the thermal conductive material layer is very small compared to the thickness of the phase change material layer, so that the overall structure of the phase change memory cell is hardly affected.
In the embodiment of the present application, when the thermal conductive material layer is a plurality of layers, the thickness of each layer of the thermal conductive material layer may be the same or different. The thickness of each phase change material layer can be the same or different. In practical application, the thickness of each layer of the heat conducting material layer can be adjusted according to the thicknesses of the two adjacent phase change material layers.
In some embodiments, the more the number of layers of the thermal conductive material layer is provided, the thinner the thickness of the thermal conductive material layer is.
In the embodiment of the present application, the number of layers of the phase change material layer 141 is greater than the number of layers of the thermal conductive material layer 142. In other words, the thermal conductive material layer 142 is disposed between the adjacent phase change material layers 141. In some embodiments, the thermal conductive material layer 142 may also be located inside the phase change material layer 141. As such, the projected pattern of the thermal conductive material layer 142 in the axial direction is located inside the projected pattern of the phase change material layer 141 in the axial direction. In practical applications, a projected area of the thermal conductive material layer 142 in the axial direction may be smaller than a projected area of the phase change material layer 141 in the axial direction.
In an embodiment of the present application, the material of the thermal conductive material layer 142 includes at least one of the following: metal nitrogen compound, titanium tungsten alloy. In practical applications, when the thermal conductive material layer is a plurality of layers, the material of each layer may be the same or different.
In some embodiments, the material of the thermal conductive material layer is preferably titanium nitride, tantalum nitride, or tungsten nitride. Because the materials of titanium nitride, tantalum nitride and tungsten nitride have stable structures and large heat conductivity coefficients, a heating center can be stably formed in the phase change storage layer in the repeated operation process of the device, so that the heat distribution of the whole phase change material layer is uniform, the problem of erasing stability caused by different crystallization degrees is reduced, and the performance of the device is improved; because the heat distribution of the whole phase change material layer is uniform, the condition that the adjacent phase change memory units are influenced due to heat radiation caused by heat concentration can be avoided. Furthermore, component segregation caused by random diffusion of elements in the phase change material layer can be prevented, so that the material stability in the operation process of the device is improved, and the fatigue times of the device are improved.
In an embodiment of the present application, the phase change memory cell further includes: a first electrode layer 110, a second electrode layer 130, and a third electrode layer 150; the first electrode layer 110 is in electrical contact with the first conductive line 160, the second electrode layer 130 is located between the gate layer 120 and the phase change memory layer 140, and the third electrode layer 150 is in electrical contact with the second conductive line 170; the layer of thermally conductive material 142 is not in electrical contact with the second electrode layer 130 and the third electrode layer 150.
In the embodiment, the material of the thermal conductive material layer 142 may be the same as the material of the first electrode layer 110, the second electrode layer 130, and the third electrode layer 150. In some embodiments, the material of the thermal conductive material layer 142 may also be different from the materials of the first electrode layer 110, the second electrode layer 130, and the third electrode layer 150. The material of the heat conducting material layer can be the same as that of the first electrode layer, the second electrode layer and the third electrode layer, so that the heat conducting material layer can be formed without adding an additional process machine, the process development cost is low, and the economic applicability is good.
In the embodiment, the materials of the first electrode layer 110, the second electrode layer 130, and the third electrode layer 150 may include: metal nitrides such as titanium nitride, tantalum nitride, and tungsten nitride; amorphous carbon, such as alpha phase carbon.
In the embodiment of the present application, the phase change memory cell 100 is located at the crossing region between the first conductive line 160 and the second conductive line 170.
In some embodiments, the phase change memory cell 100 further comprises: a first encapsulation layer and a second encapsulation layer (not shown), the first encapsulation layer covering the second conductive line 170, the third electrode layer 150, and the side of the phase change memory layer 140, that is, the first encapsulation layer covering the side of the second conductive line 170, the side of the third electrode layer 150, and the side of the phase change memory layer 140, in a specific embodiment, the first encapsulation layer covering all sides of the second conductive line 170, all sides of the third electrode layer 150, and all sides of the phase change memory layer 140; the second encapsulation layer covers the surface of the first encapsulation layer, the second electrode layer 130, the gate layer 120, the first electrode layer 110, and the side of the first conductive line 160, that is, the second encapsulation layer covers the surface of the first encapsulation layer, the side of the second electrode layer 130, the side of the gate layer 120, the side of the first electrode layer 110, and the side of the first conductive line 160, and in a specific embodiment, the second encapsulation layer 50 covers the surface of the first encapsulation layer, all sides of the second electrode layer 130, all sides of the gate layer 120, all sides of the first electrode layer 110, and all sides of the first conductive line 160. The first encapsulation layer can protect the side of the second conductive line 170, the side of the third electrode layer 150, and the side of the phase change memory layer 140, prevent contamination and performance change caused by diffusion of the material of the phase change material layer 141 and the material of the gate layer 120, and reduce thermal crosstalk between two adjacent phase change memory cells 100. The second packaging layer can protect the surface of the first packaging layer, the side surface of the second electrode layer 130, the side surface of the gate layer 120, the side surface of the first electrode layer 110, and the side surface of the first conductive line 160, further avoid contamination and performance change caused by diffusion of the material of the phase change material layer 141 and the material of the gate layer 120, and further reduce thermal crosstalk between two adjacent phase change memory cells 100.
In this embodiment, the phase change memory may include a plurality of phase change memory cells arranged in an array to form a phase change memory array.
In an embodiment of the present application, the phase change memory further includes: a third conductive line (not shown) parallel to the first conductive line, the first conductive line and the third conductive line being located on opposite sides of the second conductive line; the phase change memory cells include an upper phase change memory cell at an intersection region between the first and second conductive lines and a lower phase change memory cell at an intersection region between the second and third conductive lines. In the embodiment of the application, the three-dimensional phase change memory is formed by stacking the upper phase change memory cell and the lower phase change memory cell. The upper phase change memory cell and the lower phase change memory cell are formed by the same process and material.
The embodiment of the application discloses a phase change memory and a manufacturing method thereof, wherein the phase change memory comprises: the phase change memory unit comprises a first conductive line, a phase change memory unit and a second conductive line which are sequentially stacked from bottom to top; wherein the first and second conductive lines are parallel to the same plane and perpendicular to each other, the phase change memory cell being perpendicular to both the first and second conductive lines; the phase change memory unit comprises a gating layer and a phase change memory layer which are stacked in the axial direction; the phase change memory layer comprises a plurality of phase change material layers and a heat conduction material layer positioned between the phase change material layers. Set up the heat conduction material layer in the phase change storage layer in this application, and the heat conduction material layer in this application sets up between the phase change material layer, because the heat conduction material layer has good heat conductivity and structural stability, consequently the heat conductivity and the stability of phase change material layer can be increased in the insertion of heat conduction material layer to can reduce the operation consumption of phase change material layer, promote phase change material layer's operating speed.
Fig. 2 is a schematic flow chart illustrating an implementation of a method for manufacturing a phase change memory according to an embodiment of the present disclosure, where the method is used to manufacture the phase change memory according to the embodiment of the present disclosure. Referring to fig. 2, the method includes the steps of:
In some embodiments, a first conductive line, a phase change memory cell, and a second conductive line are sequentially formed on a surface of a substrate. The first conductive line extends in a first direction parallel to a surface of a substrate.
In an embodiment of the present application, the second conductive line extends in a second direction parallel to the substrate surface, the second direction being perpendicular to the first direction.
In some embodiments, in the case that the heat conductive material layer is a plurality of layers, the phase change material layer and the heat conductive material layer are alternately stacked.
In an embodiment of the present application, the thickness of the phase change material layer is greater than the thickness of the thermal conductive material layer.
In an embodiment of the present application, the number of layers of the phase change material layer is greater than the number of layers of the thermal conductive material layer.
In the embodiment of the present application, the thickness of the thermal conductive material layer is in the range of 1 to 5 nm.
In an embodiment of the present application, the material of the thermal conductive material layer includes at least one of: metal nitrogen compound, titanium tungsten alloy.
In an embodiment of the present application, the method further includes: forming a first electrode layer on the first conductive line; forming a gate layer on the first electrode layer, and forming a second electrode layer on the gate layer; and forming the phase change memory layer on the second electrode layer, and forming a third electrode layer on the phase change memory layer.
The heat conducting material layer is used for preventing diffusion and segregation of phase change materials in the phase change material layer, helping the phase change material layer to dissipate heat in the operation process, forming a heating center between adjacent phase change material layers and reducing the difference of temperature distribution of the phase change material layer in the operation process.
In addition, in the embodiment of the application, under the condition that the overall structure of the phase change memory unit is not changed, the performance of the device is improved only by adding the heat conducting material layer in the phase change memory layer, and the material of the heat conducting material layer can be the same as that of the first electrode layer, the second electrode layer and the third electrode layer, so that the heat conducting material layer can be formed without adding extra photomasks and process machines, the process development cost is low, and the economic applicability is good.
The embodiment of the application discloses a manufacturing method of a phase change memory, which comprises the following steps: sequentially forming a first conductive line and a gate layer; forming a plurality of phase change material layers and heat conduction material layers on the gating layer; wherein the heat conducting material layer is positioned between the phase change material layers; the phase change material layers and the heat conduction material layer form a phase change storage layer; a second conductive line is formed on the phase change memory layer. Set up the heat conduction material layer in the phase change storage layer in this application, and the heat conduction material layer in this application sets up between the phase change material layer, because the heat conduction material layer has good heat conductivity and structural stability, consequently the heat conductivity and the stability of phase change material layer can be increased in the insertion of heat conduction material layer to can reduce the operation consumption of phase change material layer, promote phase change material layer's operating speed.
Specific examples are provided below in connection with any of the embodiments described above:
fig. 3a to 3f are schematic structural diagrams of a method for manufacturing a phase change memory according to an embodiment of the present application. It should be noted that fig. 3a to 3f illustrate examples in which the phase change memory layer includes three phase change material layers and two thermal conductive material layers. Referring to fig. 3a, a first conductive line layer 1600, a first electrode layer 110 ", a gate layer 120", and a second electrode layer 130 "are sequentially formed on a substrate 1100 in a stacked arrangement. Methods of forming the first conductive line Layer, the first electrode Layer, the gate Layer, and the second electrode Layer include, but are not limited to, a Chemical Vapor Deposition (CVD) process, a Physical Vapor Deposition (PVD) process, an Atomic Layer Deposition (ALD) process.
Referring to fig. 3b, a phase change material layer 141 "-a thermal conductive material layer 142" -a phase change material layer 141 "are sequentially formed on the second electrode layer 130". The phase change material layer 141 "-heat conductive material layer 142" -phase change material layer 141 "arranged in a stack constitutes the phase change memory layer 140". Each layer of thermally conductive material 142 "has a thickness in the axial direction in the range of 1-5 nm. In some embodiments, each layer of thermally conductive material 142 "preferably has a thickness in the axial direction in the range of 1-3 nm. Here, the number of layers of the phase change material layer 141 "is three, the number of layers of the heat conductive material layer 142" is two, and the number of layers of the phase change material layer 141 "is greater than the number of layers of the heat conductive material layer 142". Methods of forming the phase change material layer and the thermally conductive material layer include, but are not limited to, CVD processes, PVD processes, ALD processes.
In an embodiment of the present application, the material of the thermal conductive material layer 142 "includes at least one of: metal nitrogen compound, titanium tungsten alloy. In some embodiments, the material of the thermal conductive material layer 142 "is preferably titanium nitride, tantalum nitride, or tungsten nitride. Because the materials of titanium nitride, tantalum nitride and tungsten nitride have stable structures, the component segregation caused by the random diffusion of elements in the phase change material layer can be prevented in the repeated operation process of the device, so that the material stability in the operation process of the device is improved, and the fatigue frequency of the device is improved.
Referring to fig. 3c, a third electrode layer 150 "is formed on the phase-change memory layer 140". Here, the first electrode layer 110 ", the gate layer 120", the second electrode layer 130 ", the phase change memory layer 140", and the third electrode layer 150 "constitute a memory stack layer 1000.
Referring to fig. 3d, the memory stack layer 1000 and the first conductive line layer 1600 are etched in a first direction of the two perpendicular directions to form the first conductive line 160 and the etched memory stack layer. The etched memory stack layer includes a third electrode layer 150', a phase change memory layer 140', a second electrode layer 130', a gate layer 120', and a first electrode layer 110 '. The phase change memory layer 140 'includes a phase change material layer 141' -a thermal conductive material layer 142 '-a phase change material layer 141' formed in a stacked arrangement. The first conductive line 160 extends in a first direction. It will be appreciated that the direction parallel to the y-axis is the first direction.
Figure 3e shows a cross-section at position AA' in figure 3d, i.e. in the yoz plane. It will be appreciated that the yoz plane is parallel to the y-axis and z-axis, and perpendicular to the x-axis. Referring to fig. 3e, a second conductive line layer 1700 is formed on the third electrode layer 150'.
Referring to fig. 3f, the etched memory stack layer and the second conductive line layer 1700 are etched in a second direction of the two perpendicular directions to form a second conductive line 170 and a phase change memory cell 100 at an intersection region between the first conductive line 160 and the second conductive line 170. The phase change memory cell 100 includes a third electrode layer 150, a phase change memory layer 140, a second electrode layer 130, a gate layer 120, and a first electrode layer 110. The phase change memory layer 140 includes a phase change material layer 141, a thermal conductive material layer 142, and a phase change material layer 141, which are stacked. The second conductive line extends in a second direction. It will be appreciated that the direction parallel to the x-axis is the second direction.
In the embodiment of the present application, a projected pattern of the heat conductive material layer 142 in the z-axis direction in the phase change memory cell 100 is the same as a projected pattern of the phase change material layer 141 in the z-axis direction. In some embodiments, the thermal conductive material layer 142 may also be located inside the phase change material layer 141. As such, the projected pattern of the thermal conductive material layer 142 along the z-axis direction is located inside the projected pattern of the phase change material layer 141 along the z-axis direction. In practical applications, when the thermal conductive material layer 142 is located inside the phase change material layer 141, a projected area of the thermal conductive material layer 142 along the z-axis direction is smaller than a projected area of the phase change material layer 141 along the z-axis direction.
In this embodiment, a memory stack layer may be further formed on the second conductive line, the memory stack layer is etched in a first direction of the two vertical directions, a third conductive line layer is formed on the etched memory stack layer, and the etched memory stack layer and the third conductive line layer are etched in a second direction of the two vertical directions to form a third conductive line and a phase change memory cell located at an intersection region between the second conductive line and the third conductive line. The three-dimensional phase change memory is formed in the embodiments of the present application by stacking a phase change memory cell located at an intersection region between a first conductive line and a second conductive line and a phase change memory cell located at an intersection region between the second conductive line and a third conductive line. It should be noted that the phase change memory cell located at the intersection region between the first conductive line and the second conductive line and the phase change memory cell located at the intersection region between the second conductive line and the third conductive line are formed by the same process and material.
The heat conducting material layer is used for preventing diffusion and segregation of phase change materials in the phase change material layer, helping the phase change material layer to dissipate heat in the operation process, forming a heating center between adjacent phase change material layers and reducing the difference of temperature distribution of the phase change material layer in the operation process.
In addition, in the embodiment of the application, under the condition that the overall structure of the phase change memory unit is not changed, the performance of the device is improved only by adding the heat conducting material layer in the phase change memory layer, and the material of the heat conducting material layer can be the same as that of the first electrode layer, the second electrode layer and the third electrode layer, so that the heat conducting material layer can be formed without adding extra photomasks and process machines, the process development cost is low, and the economic applicability is good.
It should be appreciated that reference throughout this specification to "in an embodiment" or "in some embodiments" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrase "in an embodiment of the present application" or "in some embodiments" in various places throughout this specification are not necessarily all referring to the same embodiments. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.
The methods disclosed in the several method embodiments provided in the present application may be combined arbitrarily without conflict to obtain new method embodiments.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (14)
1. A phase change memory, comprising:
the phase change memory unit comprises a first conductive line, a phase change memory unit and a second conductive line which are sequentially stacked from bottom to top; wherein the first and second conductive lines are parallel to the same plane and perpendicular to each other, the phase change memory cell being perpendicular to both the first and second conductive lines; the phase change memory unit comprises a gating layer and a phase change memory layer which are arranged in a stacked mode;
the phase change memory layer comprises a plurality of phase change material layers and a heat conduction material layer positioned between the phase change material layers.
2. The phase change memory according to claim 1,
and under the condition that the heat conduction material layers are multiple layers, the phase change material layers and the heat conduction material layers are alternately stacked.
3. The phase change memory according to claim 1,
the thickness of the phase change material layer is larger than that of the heat conduction material layer.
4. The phase change memory according to claim 1,
the number of layers of the phase-change material layer is greater than that of the heat conduction material layer.
5. The phase change memory according to claim 1,
the thickness range of the heat conducting material layer is 1-5 nm.
6. The phase change memory according to claim 1,
the material of the heat conducting material layer comprises at least one of the following materials: metal nitrogen compound, titanium tungsten alloy.
7. The phase change memory of claim 1, wherein the phase change memory cell further comprises: a first electrode layer, a second electrode layer, and a third electrode layer;
the first electrode layer is in electrical contact with the first conductive line, the second electrode layer is located between the gate layer and the phase change memory layer, and the third electrode layer is in electrical contact with the second conductive line;
the layer of thermally conductive material is not in electrical contact with the second electrode layer and the third electrode layer.
8. A method of fabricating a phase change memory, the method comprising:
sequentially forming a first conductive line, a phase change memory unit and a second conductive line which are arranged in a stacked mode;
wherein the first and second conductive lines are parallel to the same plane and perpendicular to each other, the phase change memory cell being perpendicular to both the first and second conductive lines; the phase change memory unit comprises a gating layer and a phase change memory layer which are arranged in a stacked mode;
the phase change memory layer comprises a plurality of phase change material layers and a heat conduction material layer positioned between the phase change material layers.
9. The method of manufacturing a phase change memory according to claim 8, wherein in the case where the heat conductive material layer is a plurality of layers, the phase change material layer and the heat conductive material layer are alternately stacked.
10. The method of manufacturing a phase change memory according to claim 8, wherein a thickness of the phase change material layer is greater than a thickness of the thermal conductive material layer.
11. The method of manufacturing a phase change memory according to claim 8, wherein the number of layers of the phase change material layer is greater than the number of layers of the heat conductive material layer.
12. The method of manufacturing a phase change memory according to claim 8,
the thickness range of the heat conducting material layer is 1-5 nm.
13. The method of manufacturing a phase change memory according to claim 8,
the material of the heat conducting material layer comprises at least one of the following materials: metal nitrogen compound, titanium tungsten alloy.
14. The method of manufacturing a phase change memory according to claim 8, wherein the forming a phase change memory cell comprises:
forming a first electrode layer on the first conductive line;
forming a gate layer on the first electrode layer, and forming a second electrode layer on the gate layer;
and forming the phase change memory layer on the second electrode layer, and forming a third electrode layer on the phase change memory layer.
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