CN113489287A - Active parallel current sharing control method for SiCMOS MOSFET module - Google Patents

Abstract

The invention discloses an active parallel current sharing control method for SiC MOSFET modules, which comprises the steps that two SiC MOSFET modules are connected in parallel, four different driving voltages are set, the SiC MOSFET modules are driven by the different driving voltages in the switching-on and switching-off processes, voltage values in proportion to the switch transient current values of the SiC MOSFET modules are obtained and input into a window comparator, whether the current edges and the current slopes of the two parallel SiC MOSFET modules are consistent at the switch instant or not is judged, the current edges and the current slopes of the two SiC MOSFET modules are adjusted, and finally the consistency of the current edges and the current slopes of the two SiC MOSFET modules at the switch instant is realized. The invention improves the parallel current sharing effect of the SiC MOSFET module and prolongs the service life of the parallel SiC MOSFET module.

Description

Active parallel current sharing control method for SiCMOS MOSFET module

Technical Field

The invention belongs to the technical field of SiC MOSFET parallel current sharing, and particularly relates to an active parallel current sharing control method for SiC MOSFET modules.

Background

At present, the maximum current capacity of a commercial SiC MOSFET module is 300A, and in order to meet the application requirement of a larger current capacity, there are two methods to solve the problem: and a plurality of power modules in a single device are connected in parallel for output, and a plurality of devices are connected in parallel for output. In the method for outputting the multiple devices in parallel, the devices need to be used in a derating way, so that the volume and the cost of the devices are increased, the system efficiency is reduced, and the advantages of the SiC MOSFET module are not favorably exerted. Therefore, it is the first choice for SiC MOSFET module applications to increase current capacity by connecting multiple SiC MOSFET modules in parallel in a single device. However, the power circuit asymmetry, the parameter difference of the gate driving circuit, and the parameter difference of the power module itself may cause the dynamic and static unbalanced currents of the parallel SiC MOSFET module, and cause unnecessary system failure. In recent years, various current sharing methods such as a derating method, a power loop impedance balancing method, a grid resistance compensation method, a pulse transformer method and the like appear, but the methods all belong to passive current sharing, and on one hand, the methods are accompanied by higher cost and larger device loss, and on the other hand, current sharing parameters need to be artificially set in advance through experience, so that the current sharing effect in the operation of parallel modules is general.

Disclosure of Invention

The invention aims to provide an active parallel current sharing control method for SiC MOSFET modules, which solves the problem of poor current sharing effect of a passive current sharing method in the existing SiC MOSFET parallel application.

The invention adopts the technical scheme that an active parallel current sharing control method of a SiC MOSFET module comprises the following steps:

step 1: two SiC MOSFET modules are connected in parallel, and the driving voltage of the grid driving unit of the SiC MOSFET modules is set to four different voltages V_GG1、V_GG2、V_GG3、V_GG4Forward voltage V_GG1、 V_GG2Satisfy V_GG1>V_GG2Negative voltage V_GG3、V_GG4Satisfy V_GG3>V_GG4；

Step 2: in the turn-on process of the SiC MOSFET module, V is adopted in stages_GG1And V_GG2Driving, in the turn-off process of SiC MOSFET, using V in stages_GG3And V_GG4Driving;

and step 3: respectively integrating the induced voltages on the parasitic inductors of the source electrodes of the two SiC MOSFET modules by using an RC integrating circuit to obtain a voltage value proportional to the switch transient current value of the SiC MOSFET modules;

and 4, step 4: inputting the voltage values corresponding to the two SiC MOSFET modules obtained in the step 3 into a window comparator respectively to obtain T current rising moments in the process of opening the two SiC MOSFET modules₁,T₂And the time T when the current rises to the same value in the turn-on process of the two SiC MOSFET modules₃,T₄And similarly, respectively inputting the voltage values obtained in the step 3 into another window comparator to obtain the time T of the current starting to decline respectively in the turn-off process of the two SiC MOSFET modules₅,T₆And the time T when the current rises to the same value in the turn-off process of the two SiC MOSFET modules₇,T₈；

And 5: selecting one SiC MOSFET module as a master module and the other SiC MOSFET module as a slave module, transmitting the time result obtained in the step 4 to a control chip CPLD, and judging whether the current edges and the current slopes of the two parallel SiC MOSFET modules at the switching moment are consistent by the CPLD through calculating the signal turning time difference delta T obtained in the step 4;

step 6: the two parallel SiC MOSFET modules are consistent in current edge and current slope at the moment of switching, and the two parallel SiC MOSFET modules realize current sharing; and (3) the current edges and the current slopes of the two parallel SiC MOSFET modules are not consistent at the switching instant, the CPLD adjusts the applying time of different driving voltages in stages according to the judgment result obtained in the step (5) in combination with the step (2), firstly, the current edges of the slave modules are adjusted to be consistent with the master module, then, the current slopes of the slave modules are adjusted to be consistent with the master module, and finally, the current edges and the current slopes of the two SiC MOSFET modules are consistent at the switching instant.

The present invention is also characterized in that,

the step 2 specifically comprises the following steps:

before the opening signal comes, the CPLD controls the output voltage of the grid driving unit to be kept at V_GG4Ensuring the reliable turn-off of the SiC MOSFET;

at the time of arrival of the ON signal, a delay time t_delay1Post CPLD control gate drive unit output V_GG1；

When the current of the SiC MOSFET module starts to rise, the CPLD controls the output V of the gate drive unit_GG2At a delay time t_delay2Then, CPLD controls the output V of the gate driving unit_GG1Until the SiC MOSFET module is completely turned on;

before a turn-off signal comes, the CPLD controls the grid driveThe cell output voltage is held at V_GG1Ensuring the SiC MOSFET to be turned on;

at the time of arrival of the shutdown signal, at the lapse of a delay time t_delay3Post CPLD control gate drive unit output V_GG4；

When the SiC MOSFET current begins to drop, the CPLD controls the output V of the gate drive unit_GG3At a delay time t_delay4Then, CPLD controls the output V of the gate driving unit_GG4Until the SiC MOSFET module is completely turned off.

The step 5) of judging whether the current edges and the current slopes of the two parallel SiC MOSFET modules at the switching moment are consistent specifically comprises the following steps:

setting the oscillation period of the CPLD as T, and calculating the difference value delta T of the rising time of the current obtained in the step 4 by the CPLD in the opening process_d,on＝T₁-T₂If Δ T_d,onIf the value is less than T, the slave module is switched on; if Δ T_d,onIf the voltage is more than T, the slave module is firstly switched on; if-T is less than or equal to Δ T_d,onIf the current edge of the two SiC MOSFET modules is not more than T, the current edges of the two SiC MOSFET modules are consistent; CPLD calculates the time difference value Delta T of the current obtained in step 4 rising to the same value_s,on＝T₃-T₄If Δ T_s,onIf the value is less than T, the current slope of the slave module is smaller; if Δ T_s,onIf the current slope of the slave module is larger than T; if-T is less than or equal to Δ T_s,onIf the current slope of the two SiC MOSFET modules is less than or equal to T, the current slopes of the two SiC MOSFET modules are consistent;

in the turn-off process, the CPLD calculates the difference value delta T of the current rising starting time obtained in the step 4_d,off＝T₅-T₆If Δ T_d,offIf the value is less than T, the slave module is switched on; if Δ T_d,offIf the voltage is more than T, the slave module is firstly switched on; if-T is less than or equal to Δ T_d,offIf the current edge of the two SiC MOSFET modules is not more than T, the current edges of the two SiC MOSFET modules are consistent; CPLD calculates the time difference value Delta T of the current obtained in step 4 rising to the same value_slope＝T₇-T₈If Δ T_slopeIf < -T, the current slope of the slave module is smaller; if Δ T_slopeWhen the current is greater than T, the current slope of the slave module is larger; if-T is less than or equal to Δ T_slopeWhen the current slope is less than or equal to T, the current slopes of the two SiC MOSFET modules are consistent.

In step 6, the step of adjusting the current edge of the slave module to be consistent with that of the master module specifically comprises the following steps:

when the delta T is in the process of turning on two SiC MOSFET modules_d,on< -T, will be Δ T_d,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay1Decrease of DeltaT_d,onOutputting the time; when Δ T_d,onWhen > T, will be Δ T_d,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay1Increase of Δ T_d,onOutputting the time; when-T is less than or equal to delta T_d,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay1And (4) adjusting.

When the two SiC MOSFET modules are turned off, the time is delta T_d,offWhen < -T, will be Δ T_d,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay2Decrease of DeltaT_d,offOutputting the time; when Δ T_d,offWhen > T, will be Δ T_d,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay2Increase of DeltaT_d,offOutputting the time; when-T is less than or equal to delta T_d,offWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay2And (4) adjusting.

In step 6, the step of adjusting the current slope of the slave module to be consistent with that of the master module specifically includes:

when the delta T is in the process of turning on two SiC MOSFET modules_s,onWhen < -T, will be Δ T_s,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay3Decrease of DeltaT_s,onOutputting the time; when Δ T_s,onWhen > T, the delay time T from the SiC MOSFET_delay3Increase of DeltaT_s,onOutputting the time; when-T is less than or equal to delta T_s,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay3And (4) adjusting.

When the two SiC MOSFET modules are turned off, the time is delta T_s,offWhen < -T, will be Δ T_s,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay4Decrease of DeltaT_s,onOutputting the time; when Δ T_s,onWhen > T, the delay time T from the SiC MOSFET_delay4Increase of DeltaT_s,onOutputting the time; when-T is less than or equal to delta T_s,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay4And (4) adjusting.

The invention has the beneficial effects that:

according to the active parallel current sharing control method for the SiC MOSFET modules, in the switching transient process of the two parallel SiC MOSFET modules, the current edge synchronization and the current slope synchronization of the two parallel SiC MOSFET modules are realized by dynamically adjusting the grid driving voltage of the parallel slave SiC MOSFET modules according to the current information comparison result of the master SiC MOSFET module and the slave SiC MOSFET modules, so that the parallel current sharing effect of the SiC MOSFET modules is improved, and the service life of the parallel SiC MOSFET modules is prolonged.

Drawings

Fig. 1 is a flowchart of an active parallel current sharing control method for SiC MOSFET modules according to the present invention.

Detailed Description

The present invention will be described in detail with reference to the following embodiments.

The invention discloses an active parallel current sharing control method of a SiC MOSFET module, which comprises the following steps as shown in figure 1:

step 1: two SiC MOSFET modules are connected in parallel, and the driving voltage of the grid driving unit of the SiC MOSFET modules is set to four different voltages V_GG1、V_GG2、V_GG3、V_GG4Forward voltage V_GG1、 V_GG2Satisfy V_GG1>V_GG2Negative voltage V_GG3、V_GG4Satisfy V_GG3>V_GG4。

Step 2: in the turn-on process of the SiC MOSFET module, V is adopted in stages_GG1And V_GG2Driving, in the turn-off process of SiC MOSFET, using V in stages_GG3And V_GG4Driving;

the step 2 specifically comprises the following steps:

before the opening signal comes, the CPLD controls the output voltage of the grid driving unit to be kept atV_GG4Ensuring the reliable turn-off of the SiC MOSFET;

at the time of arrival of the ON signal, a delay time t_delay1Post CPLD control gate drive unit output V_GG1；

When the current of the SiC MOSFET module starts to rise, the CPLD controls the output V of the gate drive unit_GG2At a delay time t_delay2Then, CPLD controls the output V of the gate driving unit_GG1Until the SiC MOSFET module is completely turned on;

before the cut-off signal comes, the CPLD controls the output voltage of the grid drive unit to be kept at V_GG1Ensuring the SiC MOSFET to be turned on;

at the time of arrival of the shutdown signal, at the lapse of a delay time t_delay3Post CPLD control gate drive unit output V_GG4；

When the SiC MOSFET current begins to drop, the CPLD controls the output V of the gate drive unit_GG3At a delay time t_delay4Then, CPLD controls the output V of the gate driving unit_GG4Until the SiC MOSFET module is completely turned off.

And step 3: and respectively integrating the induced voltages on the parasitic inductors of the source electrodes of the two SiC MOSFET modules by using an RC integrating circuit to obtain a voltage value proportional to the switch transient current value of the SiC MOSFET modules.

And 4, step 4: inputting the voltage values corresponding to the two SiC MOSFET modules obtained in the step 3 into a window comparator respectively to obtain T current rising moments in the process of opening the two SiC MOSFET modules₁,T₂And the time T when the current rises to the same value in the turn-on process of the two SiC MOSFET modules₃,T₄And similarly, respectively inputting the voltage values obtained in the step 3 into another window comparator to obtain the time T of the current starting to decline respectively in the turn-off process of the two SiC MOSFET modules₅,T₆And the time T when the current rises to the same value in the turn-off process of the two SiC MOSFET modules₇,T₈。

And 5: selecting one SiC MOSFET module as a master module and the other SiC MOSFET module as a slave module, transmitting the time result obtained in the step 4 to a control chip CPLD, and judging whether the current edges and the current slopes of the two parallel SiC MOSFET modules at the switching moment are consistent by the CPLD through calculating the signal turning time difference delta T obtained in the step 4;

the step 5) of judging whether the current edges and the current slopes of the two parallel SiC MOSFET modules at the switching moment are consistent specifically comprises the following steps:

setting the oscillation period of the CPLD as T, and calculating the difference value delta T of the rising time of the current obtained in the step 4 by the CPLD in the opening process_d,on＝T₁-T₂If Δ T_d,onIf the value is less than T, the slave module is switched on; if Δ T_d,onIf the voltage is more than T, the slave module is firstly switched on; if-T is less than or equal to Δ T_d,onIf the current edge of the two SiC MOSFET modules is not more than T, the current edges of the two SiC MOSFET modules are consistent; CPLD calculates the time difference value Delta T of the current obtained in step 4 rising to the same value_s,on＝T₃-T₄If Δ T_s,onIf the value is less than T, the current slope of the slave module is smaller; if Δ T_s,onIf the current slope of the slave module is larger than T; if-T is less than or equal to Δ T_s,onIf the current slope of the two SiC MOSFET modules is less than or equal to T, the current slopes of the two SiC MOSFET modules are consistent;

in the turn-off process, the CPLD calculates the difference value delta T of the current rising starting time obtained in the step 4_d,off＝T₅-T₆If Δ T_d,offIf the value is less than T, the slave module is switched on; if Δ T_d,offIf the voltage is more than T, the slave module is firstly switched on; if-T is less than or equal to Δ T_d,offIf the current edge of the two SiC MOSFET modules is not more than T, the current edges of the two SiC MOSFET modules are consistent; CPLD calculates the time difference value Delta T of the current obtained in step 4 rising to the same value_slope＝T₇-T₈If Δ T_slopeIf < -T, the current slope of the slave module is smaller; if Δ T_slopeWhen the current is greater than T, the current slope of the slave module is larger; if-T is less than or equal to Δ T_slopeWhen the current slope is less than or equal to T, the current slopes of the two SiC MOSFET modules are consistent.

Step 6: the two parallel SiC MOSFET modules are consistent in current edge and current slope at the moment of switching, and the two parallel SiC MOSFET modules realize current sharing; the current edges and the current slopes of the two parallel SiC MOSFET modules at the switching instant are inconsistent, the CPLD adjusts the applying time of different driving voltages in stages according to the judgment result obtained in the step 5 by combining with the step 2, firstly, the current edges of the slave modules are adjusted to be consistent with the master module, then, the current slopes of the slave modules are adjusted to be consistent with the master module, and finally, the current edges and the current slopes of the two SiC MOSFET modules at the switching instant are consistent;

the regulation of the current edge of the slave module is consistent with that of the master module, and specifically comprises the following steps:

when the delta T is in the process of turning on two SiC MOSFET modules_d,on< -T, will be Δ T_d,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay1Decrease of DeltaT_d,onOutputting the time; when Δ T_d,onWhen > T, will be Δ T_d,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay1Increase of Δ T_d,onOutputting the time; when-T is less than or equal to delta T_d,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay1And (4) adjusting.

When the two SiC MOSFET modules are turned off, the time is delta T_d,offWhen < -T, will be Δ T_d,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay2Decrease of DeltaT_d,offOutputting the time; when Δ T_d,offWhen > T, will be Δ T_d,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay2Increase of DeltaT_d,offOutputting the time; when-T is less than or equal to delta T_d,offWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay2And (4) adjusting.

The specific steps for adjusting the current slope of the slave module to be consistent with that of the master module are as follows:

when the delta T is in the process of turning on two SiC MOSFET modules_s,onWhen < -T, will be Δ T_s,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay3Decrease of DeltaT_s,onOutputting the time; when Δ T_s,onWhen > T, the delay time T from the SiC MOSFET_delay3Increase of DeltaT_s,onOutputting the time; when-T is less than or equal to delta T_s,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay3And (4) adjusting.

When the two SiC MOSFET modules are turned off, the time is delta T_s,offWhen < -T, will be Δ T_s,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay4Decrease of DeltaT_s,onOutputting the time; when Δ T_s,onWhen > T, the delay time T from the SiC MOSFET_delay4Increase of DeltaT_s,onOutputting the time; when-T is less than or equal to delta T_s,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay4And (4) adjusting.

Claims (5)

1. An active parallel current sharing control method for SiC MOSFET modules is characterized by comprising the following steps:

step 1: two SiC MOSFET modules are connected in parallel, and the driving voltage of the grid driving unit of the SiC MOSFET modules is set to four different voltages V_GG1、V_GG2、V_GG3、V_GG4Forward voltage V_GG1、V_GG2Satisfy V_GG1>V_GG2Negative voltage V_GG3、V_GG4Satisfy V_GG3>V_GG4；

Step 2: in the turn-on process of the SiC MOSFET module, V is adopted in stages_GG1And V_GG2Driving, in the turn-off process of SiC MOSFET, using V in stages_GG3And V_GG4Driving;

and step 3: respectively integrating the induced voltages on the parasitic inductors of the source electrodes of the two SiC MOSFET modules by using an RC integrating circuit to obtain a voltage value proportional to the switch transient current value of the SiC MOSFET modules;

and 4, step 4: inputting the voltage values corresponding to the two SiC MOSFET modules obtained in the step 3 into a window comparator respectively to obtain T current rising moments in the process of opening the two SiC MOSFET modules₁,T₂And the time T when the current rises to the same value in the turn-on process of the two SiC MOSFET modules₃,T₄And similarly, respectively inputting the voltage values obtained in the step 3 into another window comparator to obtain the time T of the current starting to decline respectively in the turn-off process of the two SiC MOSFET modules₅,T₆And two SiCMoment T when current rises to the same value in the turn-off process of MOSFET module₇,T₈；

And 5: selecting one SiC MOSFET module as a master module and the other SiC MOSFET module as a slave module, transmitting the time result obtained in the step 4 to a control chip CPLD, and judging whether the current edges and the current slopes of the two parallel SiC MOSFET modules at the switching moment are consistent by the CPLD through calculating the signal turning time difference delta T obtained in the step 4;

step 6: the two parallel SiC MOSFET modules are consistent in current edge and current slope at the moment of switching, and the two parallel SiC MOSFET modules realize current sharing; and (3) the current edges and the current slopes of the two parallel SiC MOSFET modules are not consistent at the switching instant, the CPLD adjusts the applying time of different driving voltages in stages according to the judgment result obtained in the step (5) in combination with the step (2), firstly, the current edges of the slave modules are adjusted to be consistent with the master module, then, the current slopes of the slave modules are adjusted to be consistent with the master module, and finally, the current edges and the current slopes of the two SiC MOSFET modules are consistent at the switching instant.

2. The active parallel current sharing control method for the SiC MOSFET modules according to claim 1, wherein the step 2 specifically comprises:

before the opening signal comes, the CPLD controls the output voltage of the grid driving unit to be kept at V_GG4Ensuring the reliable turn-off of the SiC MOSFET;

at the time of arrival of the ON signal, a delay time t_delay1Post CPLD control gate drive unit output V_GG1；

When the current of the SiC MOSFET module starts to rise, the CPLD controls the output V of the gate drive unit_GG2At a delay time t_delay2Then, CPLD controls the output V of the gate driving unit_GG1Until the SiC MOSFET module is completely turned on;

before the cut-off signal comes, the CPLD controls the output voltage of the grid drive unit to be kept at V_GG1Ensuring the SiC MOSFET to be turned on;

at the time of arrival of the shutdown signal, at the lapse of a delay time t_delay3Post CPLD control gate drive unit output V_GG4；

When the SiC MOSFET current begins to drop, the CPLD controls the output V of the gate drive unit_GG3At a delay time t_delay4Then, CPLD controls the output V of the gate driving unit_GG4Until the SiC MOSFET module is completely turned off.

3. The active parallel current sharing control method for the SiC MOSFET modules according to claim 2, wherein the step 5) of determining whether the current edges and current slopes of the two parallel SiC MOSFET modules at the switching instant are consistent specifically includes:

setting the oscillation period of the CPLD as T, and calculating the difference value delta T of the rising time of the current obtained in the step 4 by the CPLD in the opening process_d,on＝T₁-T₂If Δ T_d,onIf the value is less than T, the slave module is switched on; if Δ T_d,onIf the voltage is more than T, the slave module is firstly switched on; if-T is less than or equal to Δ T_d,onIf the current edge of the two SiC MOSFET modules is not more than T, the current edges of the two SiC MOSFET modules are consistent; CPLD calculates the time difference value Delta T of the current obtained in step 4 rising to the same value_s,on＝T₃-T₄If Δ T_s,onIf the value is less than T, the current slope of the slave module is smaller; if Δ T_s,onIf the current slope of the slave module is larger than T; if-T is less than or equal to Δ T_s,onIf the current slope of the two SiC MOSFET modules is less than or equal to T, the current slopes of the two SiC MOSFET modules are consistent;

in the turn-off process, the CPLD calculates the difference value delta T of the current rising starting time obtained in the step 4_d,off＝T₅-T₆If Δ T_d,offIf the value is less than T, the slave module is switched on; if Δ T_d,offIf the voltage is more than T, the slave module is firstly switched on; if-T is less than or equal to Δ T_d,offIf the current edge of the two SiC MOSFET modules is not more than T, the current edges of the two SiC MOSFET modules are consistent; CPLD calculates the time difference value Delta T of the current obtained in step 4 rising to the same value_slope＝T₇-T₈If Δ T_slopeIf the value is less than T, the current slope of the slave module is smaller; if Δ T_slopeWhen the current is greater than T, the current slope of the slave module is larger; if-T is less than or equal to Δ T_slopeWhen the current slope is less than or equal to T, the current slopes of the two SiC MOSFET modules are consistent.

4. The active parallel current sharing control method for the SiC MOSFET modules according to claim 3, wherein the step 6 of adjusting the current edge of the slave module to be consistent with that of the master module specifically comprises:

when the delta T is in the process of turning on two SiC MOSFET modules_d,on< -T, will be Δ T_d,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay1Decrease of DeltaT_d,onOutputting the time; when Δ T_d,onWhen > T, will be Δ T_d,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay1Increase of Δ T_d,onOutputting the time; when-T is less than or equal to delta T_d,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay1And (4) adjusting.

When the two SiC MOSFET modules are turned off, the time is delta T_d,offWhen < -T, will be Δ T_d,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay2Decrease of DeltaT_d,offOutputting the time; when Δ T_d,offWhen > T, will be Δ T_d,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay2Increase of DeltaT_d,offOutputting the time; when-T is less than or equal to delta T_d,offWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay2And (4) adjusting.

5. The active parallel current sharing control method for the SiC MOSFET modules according to claim 3, wherein the step 6 of adjusting the current slope of the slave module to be consistent with that of the master module specifically comprises:

when the delta T is in the process of turning on two SiC MOSFET modules_s,onWhen < -T, will be Δ T_s,onStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay3Decrease of DeltaT_s,onOutputting the time; when Δ T_s,onWhen > T, the delay time T from the SiC MOSFET_delay3Increase of DeltaT_s,onOutputting the time; when-T is less than or equal to delta T_s,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay3And (4) adjusting.

When the two SiC MOSFET modules are turned off, the time is delta T_s,offWhen < -T, will be Δ T_s,offStored in a register of the CPLD, and will be delayed for a time t from the SiC MOSFET when the next switching period comes_delay4Decrease of DeltaT_s,onOutputting the time; when Δ T_s,onWhen > T, the delay time T from the SiC MOSFET_delay4Increase of DeltaT_s,onOutputting the time; when-T is less than or equal to delta T_s,onWhen the delay time T is less than or equal to T, the CPLD stops delaying the delay time T_delay4And (4) adjusting.

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