CN105790583A - Coupling inductor based SiC metal-oxide-semiconductor field effect transistor (MOSFET) parallel current sharing control method - Google Patents

Abstract

The invention provides a coupling inductor based SiC metal-oxide-semiconductor field effect transistor (MOSFET) parallel current sharing control method. An induction coil is connected in series to each branch of SiC MOSFETs in parallel, and the induction coil of each branch is coupled to a common magnetic core. By the method, unbalanced current containing dynamic unbalanced current and static unbalanced current can be suppressed, so that the current equilibrium of each branch of the SiC MOSFETs in parallel is ensured; and moreover, the difference between on loss and off loss of a SiC MOSFET device is effectively reduced, the unbalanced stress is effectively prevented, each SiC MOSFET device is effectively protected, the service lifetime is prolonged, and the electrical performance and the durability of the parallel device are improved.

Description

SiC MOSFET current sharing control method based on coupling inductance

Technical field

The present invention relates to a kind of current balance method of SiCMOSFET in parallel, particularly relate to a kind of SiCMOSFET current sharing control method based on coupling inductance.

Background technology

SiCMOSFET and sic filed effect transistors, owing to the performance of its excellence uses more and more extensive；Owing to SiCMOSFET is subject to the restriction of manufacturing process and yield rate, the through-current capability of single SiCMOSFET is limited, in commercial Application, generally require that multiple discrete device is used in parallel or multi-chip parallel-connection structure power model is to reach Industry Control purpose, owing to the parameter between each device exists dispersibility, the loop parasitic parameter of different components can't be accomplished completely the same, current-unbalance problem will be produced during many SiCMOSFET parallel connection, dynamic current in and switching process unbalanced including: the quiescent current after conducting is unbalanced, unbalanced electric current makes device produce not reciprocity loss, switching speed, voltage and current stress, it is particularly susceptible on the weakest device, forms higher mistake blow stress, thus jeopardizing the safety of device.

It is, therefore, desirable to provide a kind of new method, it is possible to ensure the current balance on each branch road of SiCMOSFET in parallel; the phenomenon being prevented effectively from unbalanced stress weighing apparatus occurs; each SiCMOSFET device is effectively protected, increases the service life, promote electric property and the ruggedness of devices in parallel.

Summary of the invention

In view of this; it is an object of the invention to provide a kind of SiCMOSFET current balance method in parallel based on coupling inductance; ensure that the current balance on each branch road of SiCMOSFET in parallel; the phenomenon being prevented effectively from unbalanced stress weighing apparatus occurs; each SiCMOSFET device is effectively protected; increase the service life, promote electric property and the ruggedness of devices in parallel.

A kind of SiCMOSFET current balance method in parallel based on coupling inductance provided by the invention, an inductance coil of all connecting on each branch road of SiCMOSFET in parallel, and the inductance coil of each branch road are coupled on a public magnetic core.

Further, the equal turn numbers of the inductance coil of each branch road.

Further, according to the coupling inductance electric current according to the balanced each branch road of following method:

According to Ampere circuital theorem:Wherein, n is coil turn, and i is the electric current flowing through coil, and H is magnetic field intensity, and R is the radius of coil；When two coil turns are equal, differential mode inductance L_diffWith the induction electromotive force u produced by differential-mode current_diffMeet:

ΔΦ=Δ BS is different mode flux, and S is the cross-sectional area of magnetic core, and Δ B is magnetic field intensity, it may be assumed that

Δ B=μ_rμ₀(H₁-H₂) (11),

Wherein, μ₀For air permeability, μ_rFor the relative permeability of magnetic core, H₁And H₂Respectively by electric current i_d1And i_d2The magnetic field intensity produced, therefore, by (11) Shi Ke get:

$\mathrm{\Δ}B={\mathrm{n\μ}}_r{\mathrm{\μ}}_0\frac{i_{d1}-i_{d2}}{2\mathrm{\π}R}---\left(12\right);$

Induction electromotive force u can be obtained by (10) and (12) formula_diffFor:

$u_{diff}=L_{diff}\frac{{\mathrm{d\Δi}}_d}{dt}={\mathrm{\μ}}_r{\mathrm{\μ}}_0\frac{n^{2}S}{2\mathrm{\π}R}\frac{{\mathrm{d\Δi}}_d}{dt}---\left(13\right);$

Differential mode inductance can be expressed as:

When stable state, id1=id2, the electric current flowing through coil is equal, and cancelling out each other in the magnetic field produced in magnetic core, does not have coupling between coil；Now, the magnetic flux in coil is and the leakage magnetic flux of air hinge, and coupling inductance is equivalent in loop of power circuit stray inductance:

$L_{\mathrm{\σ}}=n^2{\mathrm{\μ}}_0\frac{S}{l}---\left(15\right);$

Now, DUT1 and DUT2 total current i_dpWith out-of-balance current i_dn=Δ i_d, have:

$I=\left[\begin{array}{c}{i}_{dp}\\ i_{dn}\end{array}\right]=\left[\begin{array}{cc}1& 1\\ 1& -1\end{array}\right]\left[\begin{array}{c}{i}_{d1}\\ i_{d2}\end{array}\right]---\left(16\right);$

Corresponding impedance loop Z_pAnd Z_n, have:

$\left[\begin{array}{c}{Z}_p\\ Z_n\end{array}\right]=\left[\begin{array}{cc}1& 1\\ 1& -1\end{array}\right]\left[\begin{array}{c}{Z}_1\\ Z_2\end{array}\right]+\left[\begin{array}{c}{L}_{\mathrm{\σ}}\\ L_{diff}\end{array}\right]---\left(17\right)$

The impedance loop of balanced balanced current and out-of-balance current component when Section 1 is do not adopt coupling inductance on the right of equation, Section 2 is introduced by coupling inductance；Wherein,

$Z=\left[\begin{array}{c}{Z}_1\\ Z_2\end{array}\right]=\left[\begin{array}{c}{R}_1+{\mathrm{sL}}_1+R_{ds1}\\ R_1+{\mathrm{sL}}_1+R_{ds2}\end{array}\right]---\left(18\right)$

The voltage of DUT1 and DUT2 parallel connected end

$v_{ds}=Z^{T}I=\left[\begin{array}{cc}{Z}_p& Z_n\end{array}\right]\left[\begin{array}{c}{i}_{dp}\\ i_{dn}\end{array}\right]=Z_p{i}_{dp}+Z_n{i}_{dn}---\left(19\right)$

Due to v_dsFixed for limited constant, and L_diff>>L_σ, when device is in non-off state, have | Z_n|>>|Z_p|, the out-of-balance current i of devices in parallel_dnGo to zero.

Beneficial effects of the present invention: the SiCMOSFET current balance method in parallel based on coupling inductance provided by the invention; the out-of-balance current including dynamic unbalance electric current and static unbalance electric current can be suppressed; thus ensureing the current balance of each branch road of SiCMOSFET in parallel; and that effectively reduces each SiCMOSFET device turns on and off loss; the phenomenon being prevented effectively from unbalanced stress weighing apparatus occurs; each SiCMOSFET device is effectively protected; increase the service life, promote electric property and the ruggedness of devices in parallel.

Accompanying drawing explanation

Below in conjunction with drawings and Examples, the invention will be further described:

Fig. 1 is the equivalent schematic of traditional structure.

Fig. 2 is the structural representation of the present invention.

Fig. 3 is the current stress experimental result of traditional structure double impulse test.

Fig. 4 is the current stress experimental result of double impulse test after employing this method.

Fig. 5 is the experimental result in the SiCMOSFET device opening process of traditional structure.

Fig. 6 is the experimental result after employing this method in SiCMOSFET device opening process.

Fig. 7 is the experimental result in the SiCMOSFET device turn off process of traditional structure.

Fig. 8 is the experimental result after the employing present invention in SiCMOSFET device turn off process.

Fig. 9 is the loss waveform in the opening process after adopting before the present invention and adopting the present invention.

Detailed description of the invention

nullFig. 1 is the equivalent schematic of traditional structure，Fig. 2 is the structural representation of the present invention，As shown in the figure，A kind of SiCMOSFET current balance method in parallel based on coupling inductance provided by the invention，Each branch road of SiCMOSFET in parallel is all connected an inductance coil，And the inductance coil of each branch road is coupled on a public magnetic core，Pass through this method，The out-of-balance current including dynamic unbalance electric current and static unbalance electric current can be suppressed，Thus ensureing the current balance of each branch road of SiCMOSFET in parallel，And that effectively reduces each SiCMOSFET device turns on and off loss，The phenomenon being prevented effectively from unbalanced stress weighing apparatus occurs，Each SiCMOSFET device is effectively protected，Increase the service life，Promote electric property and the ruggedness of devices in parallel.

In the present embodiment, the equal turn numbers of the inductance coil of each branch road, by this structure, it is possible to effectively suppresses the out-of-balance current of each branch road of SiCMOSFET device, promotes the current balance of each branch road.

In using below for tradition, the principle of current-unbalance and the balanced each branch current of this method is described in further detail:

Traditional structure: as shown in Figure 1, three measured devices DUT1, DUT2 and DUT3 in Fig. 1 represent each SiCMOSFET device respectively, and wherein, DUT3 is turned off by the reversed bias voltage of grid, wherein DUT1 and DUT2 parallel running and one drive circuit of function drive, and driving resistance is R_G, driving voltage is V_GS, the operational factor of each device in Fig. 2 includes: inner grid resistance R_g, gate leakage capacitance C_gd, gate-source capacitance C_gs, drain source capacitance C_ds, stray inductance L that package lead introduces respectively at grid, leakage, source electrode_g、L_dAnd L_s, L_dp1、L_dp2And R_dp1、R_dp2Outside for device, drain electrode wiring the stray inductance caused and resistance, in like manner L_gn1、L_gn2And R_gn1、R_gn2For the outer stray inductance introduced by source connection of device and resistance；L_g12And R_g12The stray inductance introduced for driver circuit between DUT1 and DUT2 and resistance.L is load inductance, C_dcFor dc-link capacitance, U_dcFor DC bus-bar voltage, in Fig. 1, equivalent parasitic inductance and resistance are respectively as follows:

$\left\{\begin{array}{c}{L}_1=L_{dp1}+L_{gn1}+L_{d1}+L_{s1}\\ R_1=R_{dp1}+R_{gn1}\\ L_2=L_{dp2}+L_{gn2}+L_{d2}+L_{s2}\\ R_2=R_{dp2}+R_{gn2}\end{array}\right.---\left(1\right);$

The drain-source resistance Rds of SiCMOSFET device is subject to the control of device gate source voltage vgs, it may be assumed that

$R_{ds}=\frac{v_{ds}\left(t\right)}{i_d}=\left\{\begin{array}{cc}\mathrm{\&infin;}& v_{gs}<V_{th}\\ \frac{U_{dc}}{i_d}& V_{th}<v_{gs}<V_{GP}\\ \frac{U_{dc}-\frac{(V_{GS}-V_{GP})t}{C_{gd,av}(R_G+R_g)}}{I_L}& V_{GP}<v_{gs}<V_{GS}\\ R_{ds,on}& v_{gs}=V_{GS}\end{array}\right.---\left(2\right);$

v_dsT drain-source voltage that () is device, gate source voltage V_thFor the threshold voltage of device, V_GPFor the platform voltage produced by the Miller effect, C_gd,avFor device gate-drain capacitance meansigma methods；Drain current id meets relation:

$i_d=\left\{\begin{array}{cc}0& v_{gs}<V_{th}\\ g_m\&lsqb;v_{gs}\left(t\right)-V_{th}\&rsqb;& V_{th}<v_{gs}<V_{GP}\\ I_L& v_{gs}>V_{GP}\end{array}\right.---\left(3\right);$

Wherein, g_mFor mutual conductance, and

$g_m=\frac{{\mathrm{\&mu;C}}_{OX}W}{L_{CH}}\&lsqb;v_{gs}\left(t\right)-V_{th}\&rsqb;=\mathrm{\&beta;}\&lsqb;v_{gs}\left(t\right)-V_{th}\&rsqb;---\left(4\right);$

v_gsT () is the device gate source voltage in t, μ is carrier effective mobility, C_OXFor the unit-area capacitance of gate oxide, W and L_CHRespectively channel width and length, factor beta is:

I_LCan be expressed as:Δ t is the service time of device.

From above-mentioned: the drain current of device is directly decided by several key parameters of device: mutual conductance g_m, threshold voltage V_th, conducting resistance R_ds,on, input capacitance C_iss.Meanwhile, resistance R is driven_GThe same climbing determining drain current, the stray inductance that device encapsulation introduces also can affect the dynamic characteristic of electric current.In the process that multi-chip or device are in parallel, it is very easy to introduce these unbalanced factors.

For conducting state, the main consideration road impact by resistance, it is assumed that the conducting resistance of two devices (DUT1 and DUT2) respectively maximum R_dsonmaxWith minima R_dsonmin, then maximum electric current got by the minimum device of conducting resistance:

$\begin{array}{c}{I}_{\max }=\frac{R_{dson\max }}{R_{dson\min }+R_{dson\max }}{I}_{dp}\\ =\frac{1}{1+R_{dson\min }/R_{dson\max }}{I}_{dp}\end{array}---\left(7\right);$

Wherein, I_dpIt it is the output electric current sum of two devices.Visible, the current-sharing ability of device, it is subject to the impact of conducting resistance distribution.Device fabrication is more ripe, and conducting resistance is more balanced, coefficients R_dsonmin/R_dsonmaxBeing closer to 1, the current-sharing effect of device is more good.

For on off state, by formula (3) and (4) it can be seen that drain current is controlled by gate source voltage v_gs(t) and threshold voltage V_th, i.e. i_d=β [v_gs(t)-V_th]²(8),

From the foregoing, it will be observed that the device that threshold voltage is little, first turn in opening process, share more electric current；Turn off process but ends afterwards, shares less electric current.

To sum up stating, there is unbalanced electric current in SiCMOSFET device in parallel, and is from source, it cannot be solved in prior art.

And in this method, as shown in Figure 1, example is operated to two SiCMOSFET devices in parallel, the this method effect by coupling inductance, the electric current of parallel branch is equal, and the flow direction that both produce in magnetic core is contrary, equal in magnitude, and the magnetic flux of synthesis is close to zero, thus electric current is inoperative, and then reach the generation of active suppression out-of-balance current.

This method realizes as follows:

According to Ampere circuital theorem:Wherein, n is coil turn, and i is the electric current flowing through coil, and H is magnetic field intensity, and R is the radius of coil；When two coil turns are equal, the differential mode inductance in the loop out-of-balance current to two branch roads, namely differential-mode current Δ i_d=i_d1–i_d2Inhibited, differential mode inductance L_diffWith the induction electromotive force u produced by differential-mode current_diffMeet:

ΔΦ=Δ BS is different mode flux, and S is the cross-sectional area of magnetic core, and Δ B is magnetic field intensity, it may be assumed that

Δ B=μ_rμ₀(H₁-H₂) (11),

Wherein, μ₀For air permeability, μ_rFor the relative permeability of magnetic core, H₁And H₂Respectively by the electric current i flowing through DUT1_d1With the i flowing through DUT2_d2The magnetic field intensity produced, therefore, by (11) Shi Ke get:

Induction electromotive force u can be obtained by (10) and (12) formula_diffFor:

$u_{diff}=L_{diff}\frac{{\mathrm{d\&Delta;i}}_d}{dt}={\mathrm{\&mu;}}_r{\mathrm{\&mu;}}_0\frac{n^{2}S}{2\mathrm{\&pi;}R}\frac{{\mathrm{d\&Delta;i}}_d}{dt}---\left(13\right);$

Differential mode inductance can be expressed as:Thus, differential-mode current is subject to differential mode inductance L in coupling inductance_diffRestriction, its size is by core material μ_r, size S and coil turn n together decides on；

When stable state, id1=id2, the electric current flowing through coil is equal, and cancelling out each other in the magnetic field produced in magnetic core, does not have coupling between coil.Now, the magnetic flux in coil is and the leakage magnetic flux of air hinge, and coupling inductance is equivalent in loop of power circuit stray inductance

$L_{\mathrm{\&sigma;}}=n^2{\mathrm{\&mu;}}_0\frac{S}{l}---\left(15\right);$

Coupling inductance suppresses the essence of out-of-balance current to be in that: the inductance that out-of-balance current Δ id runs into is the mutual inductance between two coils, relatively larger；What the electric current of each branch road ran into is the leakage inductance of coil, smaller；

Now, DUT1 and DUT2 total current i_dpWith out-of-balance current i_dn=Δ i_d, have:

$I=\left[\begin{array}{c}{i}_{dp}\\ i_{dn}\end{array}\right]=\left[\begin{array}{cc}1& 1\\ 1& -1\end{array}\right]\left[\begin{array}{c}{i}_{d1}\\ i_{d2}\end{array}\right]---\left(16\right);$

Corresponding impedance loop Z_pAnd Z_n, have:

$\left[\begin{array}{c}{Z}_p\\ Z_n\end{array}\right]=\left[\begin{array}{cc}1& 1\\ 1& -1\end{array}\right]\left[\begin{array}{c}{Z}_1\\ Z_2\end{array}\right]+\left[\begin{array}{c}{L}_{\mathrm{\&sigma;}}\\ L_{diff}\end{array}\right]---\left(17\right)$

The impedance loop of balanced balanced current and out-of-balance current component when Section 1 is do not adopt coupling inductance on the right of equation, Section 2 is introduced by coupling inductance；Wherein,

$Z=\left[\begin{array}{c}{Z}_1\\ Z_2\end{array}\right]=\left[\begin{array}{c}{R}_1+{\mathrm{sL}}_1+R_{ds1}\\ R_1+{\mathrm{sL}}_1+R_{ds2}\end{array}\right]---\left(18\right)$

The voltage of DUT1 and DUT2 parallel connected end

$v_{ds}=Z^{T}I=\left[\begin{array}{cc}{Z}_p& Z_n\end{array}\right]\left[\begin{array}{c}{i}_{dp}\\ i_{dn}\end{array}\right]=Z_p{i}_{dp}+Z_n{i}_{dn}---\left(19\right)$

Due to v_dsFixed for limited constant, and L_diff>>L_σ, when device is in non-off state, have | Z_n|>>|Z_p|, the out-of-balance current i of devices in parallel_dnCan go to zero, thus reaching the purpose of current balance.

In an experiment, load inductance L is 580 μ H, DUT is the second filial generation SiCMOSFET device C2M0080120D of Cree company, and the loop of power circuit of two devices in parallel DUT1 and DUT2 layout on PCB is balanced as far as possible；Oscillograph adopts the DPO3054, bandwidth 500MHz of Tektronix company；Current sensor adopts the 2877 of Pearson company；Voltage probe adopts the P6139A, bandwidth 500MHz of Tektronix company；The driving pulse of test is obtained by DSP28335 programming；It will be seen that this method can effective current stress between two devices in parallel of active balancing in Fig. 3 and Fig. 4, say, that in Fig. 4, the current curve of DUT1 and DUT2 overlaps, and has reached stress equilibrium.

As shown in Figure 5 and Figure 6, all there is bigger current-unbalance phenomenon in two SiCMOSFET devices in parallel, particularly in dynamic process, maximum imbalance current is about 4A, and the maximum degree of unbalancedness of electric current reaches 40% before and after conducting.When opening dynamic, electric current is inconsistent, and to be because the threshold voltage of two devices inconsistent.Calculate and find: when not having coupling inductance, the turn-on consumption of DUT1 and DUT2 respectively 76.09 μ J and 119.62 μ J, total turn-on consumption is 195.72 μ J；After adopting coupling inductance, turn-on consumption is reduced to 46.15 μ J and 46.40 μ J respectively, and total losses are 92.55 μ J.Visible, after adopting coupling inductance, the loss between device is more uniform, and respective value during relatively without coupling inductance is lower.In addition, when there is no coupling inductance, the peak point current of two DUT respectively 10.56A and 14.16A, there is bigger gap in maximum current stress, after adopting coupling inductance, peak current stresses is reduced to 9.76A and 9.92A respectively, more balanced, as shown in Figure 6, turn on process essentially coincides before and after the electric current id peak of curve of DUT1 and DUT2, and Fig. 9 can be seen that, curve respectively DUT1 and the DUT2 that two peak values are bigger does not adopt the turn-on consumption during method of the present invention, the turn-on consumption that curve is use latter two devices in parallel of the present invention that amplitude is minimum, after adopting the present invention, the loss of two devices in parallel is basically identical, wear leveling, thus ensure that stability in use.

As shown in Figure 7 and Figure 8, in the disconnected journey of switch, before shutoff, there is the difference between current of 1A in two SiCMOSFET device DUT1 and DUT2 in parallel between two DUT, be because the conducting resistance of two devices and loop dead resistance there are differences and causes.After adopting the method for the present invention, this out-of-balance current still had rejection ability.Degree of unbalancedness is reduced to 8% from 21%.When there is no coupling inductance, the turn-off power loss of two DUT respectively 71.32 μ J and 80.40 μ J；After introducing coupling inductance, turn-off power loss is reduced in 79.08 μ J and 81.68 μ J, Fig. 8 respectively it can be seen that DUT1 and the DUT2 current curve in turn off process overlaps, it is achieved that balanced.

What finally illustrate is, above example is only in order to illustrate technical scheme and unrestricted, although the present invention being described in detail with reference to preferred embodiment, it will be understood by those within the art that, technical scheme can be modified or equivalent replacement, without deviating from objective and the scope of technical solution of the present invention, it all should be encompassed in the middle of scope of the presently claimed invention.

Claims (3)

1. the SiCMOSFET current sharing control method based on coupling inductance, it is characterised in that: an inductance coil of all connecting on each branch road of two SiCMOSFET in parallel, and the inductance coil of each branch road is coupled on a public magnetic core.

2. according to claim 1 based on the SiCMOSFET current sharing control method of coupling inductance, it is characterised in that: the equal turn numbers of the inductance coil of each branch road.

3. according to claim 2 based on the SiCMOSFET current sharing control method of coupling inductance, it is characterised in that: according to the coupling inductance electric current according to the balanced each branch road of following method:

According to Ampere circuital theorem:

Wherein, n is coil turn, and i is the electric current flowing through coil, and H is magnetic field intensity, and R is the radius of coil；When two coil turns are equal, differential mode inductance L_diffWith the induction electromotive force u produced by differential-mode current_diffMeet:

ΔΦ=Δ BS is different mode flux, and S is the cross-sectional area of magnetic core, and Δ B is magnetic field intensity:

△ B=μ_rμ₀(H₁-H₂) (11), wherein, μ₀For air permeability, μ_rFor the relative permeability of magnetic core, H₁And H₂Respectively by electric current i_d1And i_d2The magnetic field intensity produced, therefore, by (11) Shi Ke get:

$\mathrm{\&Delta;}B={\mathrm{n\&mu;}}_r{\mathrm{\&mu;}}_0\frac{i_{d1}-i_{d2}}{2\mathrm{\&pi;}R}---\left(12\right);$

Induction electromotive force u can be obtained by (10) and (12) formula_diffFor:

$u_{diff}=L_{diff}\frac{{\mathrm{d\&Delta;i}}_d}{dt}={\mathrm{\&mu;}}_r{\mathrm{\&mu;}}_0\frac{n^{2}S}{2\mathrm{\&pi;}R}\frac{{\mathrm{d\&Delta;i}}_d}{dt}---\left(13\right);$

Differential mode inductance can be expressed as:

When stable state, id1=id2, the electric current flowing through coil is equal, and cancelling out each other in the magnetic field produced in magnetic core, does not have coupling between coil；Now, the magnetic flux in coil is and the leakage magnetic flux of air hinge, and coupling inductance is equivalent in loop of power circuit stray inductance:

Now, DUT1 and DUT2 total current i_dpWith out-of-balance current i_dn=Δ i_d, have:

$I=\left[\begin{array}{c}{i}_{dp}\\ i_{dn}\end{array}\right]=\left[\begin{array}{cc}1& 1\\ 1& -1\end{array}\right]\left[\begin{array}{c}{i}_{d1}\\ i_{d2}\end{array}\right]---\left(16\right);$

Corresponding impedance loop Z_pAnd Z_n, have:

$\left[\begin{array}{c}{Z}_p\\ Z_n\end{array}\right]=\left[\begin{array}{cc}1& 1\\ 1& -1\end{array}\right]\left[\begin{array}{c}{Z}_1\\ Z_2\end{array}\right]+\left[\begin{array}{c}{L}_{\mathrm{\&sigma;}}\\ L_{diff}\end{array}\right]---\left(17\right)$

The impedance loop of balanced balanced current and out-of-balance current component when Section 1 is do not adopt coupling inductance on the right of equation, Section 2 is introduced by coupling inductance；Wherein,

$Z=\left[\begin{array}{c}{Z}_1\\ Z_2\end{array}\right]=\left[\begin{array}{c}{R}_1+s{L}_1+R_{ds1}\\ R_1+{\mathrm{sL}}_1+R_{ds2}\end{array}\right]---\left(18\right)$

The voltage of DUT1 and DUT2 parallel connected end

$v_{ds}=Z^{T}I=\left[\begin{array}{cc}{Z}_p& Z_n\end{array}\right]\left[\begin{array}{c}{i}_{dp}\\ i_{dn}\end{array}\right]=Z_p{i}_{dp}+Z_n{i}_{dn}---\left(19\right)$

Due to v_dsFixed for limited constant, and L_diff>>L_σ, when device is in non-off state, have | Z_n|>>|Z_p|, the out-of-balance current i of devices in parallel_dnGo to zero.