CN113485183A - Serial signal acquisition output control device based on PCI bus protocol - Google Patents
Serial signal acquisition output control device based on PCI bus protocol Download PDFInfo
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Abstract
The invention discloses a serial signal acquisition output control device based on a PCI bus protocol, which comprises an analog signal acquisition output device, a digital signal input output device, a main control unit, a PCI communication device and an upper computer, wherein the analog signal acquisition output device is connected with the host computer; the PCI communication device realizes the connection of an analog signal acquisition output device and a digital signal input output device through a main control unit; the analog signal acquisition output device and the digital signal input output device are directly connected with an external interface; the host computer and the PCI communication device use a PCI9054 chip to simplify a PCI bus protocol for data control, and a PCI interface is needed for hardware connection. The device improves the portability and the applicability of the acquisition device under the condition of ensuring high precision and high acquisition speed, ensures the plug-and-play characteristic of the acquisition device by using the design of the PCI interface, has simpler connection, expands the applicable range of the whole device, is easier to match with personal computers, industrial personal computers and other equipment, and reduces the equipment cost.
Description
Technical Field
The invention relates to a data acquisition output control device in the field of industrial measurement and control, in particular to a serial signal acquisition output control device based on a PCI bus protocol.
Background
Data acquisition is a crucial link in modern signal processing, the quality of acquired signals directly affects the actual effect of subsequent signal processing, and in many industrial measurement control applications, external analog signals or digital signals need to be continuously converted into electric signals to be transmitted to a personal computer or an industrial control computer, and meanwhile, the electric signals can be output to control other modules. In industrial applications such as production lines and mechanical arms, monitoring of positional information such as displacement and angle is particularly important, and the information is generally analog signals, so that the information needs to be processed into digital signals and then processed by an upper computer. Meanwhile, the data acquisition rate is also the key in practical application, and the signal acquisition control device which uses the PCI bus protocol for transmission can meet the practical requirements.
The PCI (peripheral Component interconnect) bus protocol is currently the most convenient interface used in personal computers and industrial control computers, the maximum data transmission rate is 132MB/s, and when the data width is upgraded to 64 bits, the data transmission rate can reach 264MB/s, which is incomparable with other buses. The method greatly relieves the bottleneck of data I/O, meets the requirement of data transmission of high-speed equipment, can realize plug and play, automatic identification and convenient use for users. The PCI bus protocol is used for a data acquisition device and has the advantages of high transmission rate, wide application range, convenience in connection, low maintenance cost and the like.
Therefore, the serial signal acquisition output control device based on the PCI bus protocol is designed, can accurately acquire and upload acquired analog or digital signals at high speed, can output various analog quantities and digital quantities simultaneously, improves the portability and flexibility of the device, is not limited to an industrial personal computer in application occasions, can be connected with personal PCs and other any equipment with PCI slots, greatly reduces the signal acquisition cost, expands the use scene of the data acquisition device, and has positive promotion effect on automation and control in industrial production.
Disclosure of Invention
The invention provides a serial signal acquisition output control device based on a PCI bus protocol, aiming at the problem that an industrial personal computer is difficult to directly acquire analog signals.
The purpose of the invention is realized by the following technical scheme: a serial signal acquisition output control device based on PCI bus protocol comprises an analog signal acquisition output device, a digital signal input output device, a main control unit, a PCI communication device and an upper computer;
analog signal gathers output device and contains collection mode and output mode, can gather the analog signal data of sixteen at most ways and carry out serial transmission to the main control unit with the data of gathering under the collection mode, analog signal gathers output device and can select arbitrary passageway and select the analog signal maximum voltage input scope of gathering to have overvoltage protection function, specifically do: when the signal voltage transmitted by the analog signal acquisition and output device received by the upper computer through the main control unit exceeds the set maximum voltage input range, the upper computer sends a control instruction, and the analog signal acquisition and output device stops data acquisition; in the output mode, the analog signal acquisition and output device can output two paths of analog signal quantities simultaneously, so that the actual application requirements can be met;
the digital signal input and output device comprises an acquisition mode and an output mode, can acquire digital quantity input of sixteen paths at most simultaneously in the acquisition mode and serially transmit the digital quantity input to the main control unit, has the same overvoltage protection function as the analog signal acquisition and output device, can output the digital quantity of sixteen paths at most simultaneously in the output mode, and can independently work for thirty-two paths of digital quantity input and output;
the main control unit is used as a core module of the serial signal acquisition output control device and is used for realizing the functions and time sequence control of the whole device, the resources of the main control unit are divided into three parts, one part of the resources are mainly used for signal acquisition time sequence, a control instruction sent by an upper computer is transmitted to the main control unit through a PCI communication device to carry out specific time sequence skip, the control instruction is accurately sent to the analog signal acquisition output device and returns acquired data, the other part of the resources are used for signal output time sequence, the upper computer sends the control instruction to the main control unit through the PCI communication device, then the main control unit controls the signal output time sequence to output a set signal to the analog signal acquisition output device and the digital signal input output device, and the last part is used for communication control time sequence, the resources of the part are mainly used for completing the analog signal acquisition output device, the digital signal output device and the digital signal input output device, The digital signal input and output device, the main control unit, the PCI communication device and each module of the upper computer work cooperatively;
the PCI communication device comprises a PCI protocol chip and a PCI interface socket; the PCI protocol chip is connected with a PCI interface and a PCI bus of the main control unit and is used for realizing real-time transmission of data;
the host computer includes two parts of control panel and display panel, and control panel mainly used sets up each item parameter of gathering and output, each item parameter corresponds specific control command and transmits the main control unit through PCI communication device, is analyzed and is handled control command by the main control unit, and display panel is used for showing the data that the main control unit uploaded the collection.
Furthermore, the main control unit is based on FPGA, the model of the chip is FPGA chip XC6SLX9FTG256 of SPARTAN series of Xilinx company, and the hardware configuration is carried out by adopting an AS configuration mode, namely an active serial configuration mode, the adopted PROM chip is XCF04SVO20C chip of Xilinx company, and meanwhile, a JTAG interface is reserved for debugging, and the main clock frequency is 100 MHz; the main control unit is in a standby mode after being electrified until receiving an acquisition or output control instruction sent by the upper computer.
Furthermore, when the analog signal acquisition output device or the digital signal input output device is in an acquisition mode, the main control unit configures parameters and starts a signal acquisition control time sequence according to a control command to control the analog signal acquisition device or the digital signal input output device to acquire signals, and simultaneously, once sixteen-channel data acquisition is completed, the main control unit starts a data uploading process and sends the acquired data to the upper computer through a PCI bus protocol, and if the upper computer issues a stop command, the main control unit immediately stops the acquisition and uploading process and enters a standby state; when the analog signal acquisition output device or the digital signal input output device is in an output mode, the main control unit configures parameters and starts a signal output control time sequence according to a control command to control the analog signal output device or the digital signal input output device to output signals, when one-time output is finished, the main control unit starts the next signal output time sequence, and if the upper computer issues a stop instruction, the main control unit immediately stops the signal output control time sequence to enter a standby state.
Further, analog signal gathers output device and includes digital-to-analog conversion module, analog-to-digital conversion module and voltage amplifier module, and digital-to-analog conversion module adopts ADS8668IDBT chip, can be 12 bit's digital signal with the signal conversion of input to transmit to the main control unit through the SPI protocol, and analog-to-digital conversion module has adopted AD5687RBRUZ chip, can be through the analog signal of main control unit control output 12bit, and voltage amplifier module adopts the AD8421 chip.
Further, the digital signal input/output device includes a digital output module and a digital input module, the digital output module uses a transistor L2SC4617RT1G to perform voltage stabilization operation and voltage output control, and the digital input module selects a TLP785 chip to perform voltage protection on an input digital signal.
Furthermore, the PCI communication device chip adopts a PCI9054 chip of NXP company, adopts an 8MHz crystal oscillator and is configured into a mode of multiplexing an address and a signal line.
Furthermore, the serial signal acquisition output control device is powered by a power management chip of TI company, and the models of the chips used are TPS54325PWP, TPS56321 and TPS7A8300RGRR respectively. The input voltage of the device is +12V, the main control unit adopts independent digital +3.3V and digital +1.2V power supplies, and the rest modules also need to provide one path of digital +3.3V and one path of analog +5V power supplies.
Further, the acquisition control process adopted by the device comprises the following steps:
step 1-1, a user sets acquisition parameters through an upper computer control panel, wherein the acquisition parameters comprise acquisition clock frequency and acquisition channel number;
step 1-2, an upper computer issues a starting instruction and a control instruction to a main control unit through a PCI bus protocol, the main control unit receives the instruction, and configures acquisition clock frequency and acquisition channel number according to the instruction and starts a serial signal acquisition time sequence;
1-3, starting the work of the analog signal acquisition and output device and/or the digital signal input and output device and transmitting acquired data to a main control unit, and storing the data in sections by the main control unit and uploading the data to an upper computer in real time according to a PCI bus protocol to realize the real-time uploading of the data;
step 1-4, the upper computer processes the data segment received by the PCI bus protocol, analyzes the content of the data segment, performs format conversion on the received data and displays the data on a display panel of the upper computer in a decimal format;
and 1-5, when the data acquisition is finished, the user sends an acquisition finishing stop instruction to the main control unit through the upper computer, and the acquisition time sequence is stopped.
The output control flow adopted by the serial signal acquisition control device comprises the following steps:
step 2-1, a user sets output parameters through an upper computer control panel, wherein the output parameters comprise output clock frequency and output channel number;
2-2, the upper computer issues a starting instruction and a control instruction to the main control unit through a PCI bus protocol, the main control unit receives the instruction, configures output clock frequency and output channel number according to the instruction and starts a signal output time sequence;
step 2-3, the main control unit stores the clock frequency and the output channel number, and controls the analog signal acquisition and output device and/or the digital signal input and output device to work, so as to realize data output to external equipment;
and 2-4, when the data output is finished, the user issues a data output stop instruction to the main control unit through the upper computer, and the output time sequence is stopped.
The invention has the beneficial effects that: the invention designs and realizes the acquisition and output of the industrial personal computer to the multi-channel analog signal and the input and output of the multi-channel digital signal, and has the characteristics of high precision and high speed; the analog signal acquisition and output device with the selectable input range can realize accurate and stable acquisition and output of analog signals; compared with the traditional data transmission mode, the PCI bus protocol transmission mode has higher data throughput rate, can realize the plug and play function and greatly reduces the complexity of equipment use; the device using the PCI interface is more suitable for the complex requirements in the field of industrial measurement and control, and the cost of the whole acquisition control equipment is also reduced. The PCI interface socket is connected with a PCI protocol chip, so that the design cost is greatly reduced, and the designed transmission speed also meets the actual application requirement.
Drawings
FIG. 1 is a block diagram of the present invention;
FIGS. 2(A), 2(B), 2(C), 2(D), 2(E) are schematic diagrams of the master control unit of the present invention;
FIG. 3 is a schematic diagram of a PCI communication device of the present invention;
FIGS. 4(A), 4(B), 4(C) are schematic diagrams of the power module of the present invention;
FIG. 5 is a schematic diagram of analog signal acquisition in the analog signal acquisition output device of the present invention;
FIG. 6 is a schematic diagram of the analog signal output in the analog signal acquisition and output device of the present invention;
FIG. 7 is a schematic diagram of the interface of the present invention;
fig. 8 is a schematic diagram of digital output in the digital signal input-output device of the present invention;
fig. 9 is a schematic diagram of digital input in the digital signal input/output device of the present invention.
Detailed Description
The invention will be further described with reference to the accompanying drawings.
As shown in fig. 1, the present invention provides a serial signal acquisition and output control device based on PCI bus protocol, which includes an analog signal acquisition and output device, a digital signal input and output device, a main control unit, a PCI communication device and an upper computer; the PCI communication device realizes the connection of an analog signal acquisition output device and a digital signal input output device through a main control unit; the analog signal acquisition output device and the digital signal input output device are directly connected with an external interface; the host computer and the PCI communication device use a PCI9054 chip to simplify a PCI bus protocol for data control, and a PCI interface is needed for hardware connection.
The connection of the main control unit is complex, the analog signal acquisition and output device comprises an acquisition mode and an output mode, the analog signal acquisition and output device can select any channel to select the maximum voltage input range of the acquired analog signal, the analog signal acquisition and output device has twelve signal lines and respectively controls two ADS8668IDBT chips to acquire data, and each ADS8668IDBT chip can simultaneously sample the analog signal data of eight channels; the analog signal acquisition and output device is provided with five signal lines, controls an AD5687RBRUZ chip to output analog signals, can independently control the output of double channels or single channel output, and can meet the actual application requirements; the digital signal input/output device has sixteen signal control lines to control the output of sixteen channels when collecting, can be controlled independently or simultaneously, and the voltage of an output pin is +3.3V, and can be changed according to the practical application condition; possess sixteen signal control lines and control the collection of sixteen passageways during digital signal input output device output, can control alone or simultaneously, analog signal acquisition output device and digital signal input output device have still designed signal input overvoltage protection module simultaneously, specifically do: when the signal voltage transmitted by the analog signal acquisition and output device and received by the upper computer through the main control unit exceeds the set maximum voltage input range, the upper computer sends a stop instruction; the PCI communication device and the FPGA are provided with fifteen signal lines, high-speed communication with a PCI9054 chip can be completed, and eight address/signal lines are used, so that the design requirement can be met.
The main control unit is used as a core module of the serial signal acquisition output control device and is used for realizing the functions and time sequence control of the whole device, the resources of the main control unit are divided into three parts, one part of the resources are mainly used for signal acquisition time sequence, a control instruction sent by an upper computer is transmitted to the main control unit through a PCI communication device to carry out specific time sequence skip, the control instruction is accurately sent to the analog signal acquisition output device and returns acquired data, the other part of the resources are used for signal output time sequence, the upper computer sends the control instruction to the main control unit through the PCI communication device, then the main control unit controls the signal output time sequence to output a set signal to the analog signal acquisition output device and the digital signal input output device, and the last part is used for communication control time sequence, the resources of the part are mainly used for completing the analog signal acquisition output device, the digital signal output device and the digital signal input output device, The digital signal input and output device, the main control unit, the PCI communication device and each module of the upper computer work cooperatively;
when the analog signal acquisition output device or the digital signal input output device is in an acquisition mode, the main control unit configures parameters and starts a signal acquisition control time sequence according to a control command to control the analog signal acquisition device or the digital signal input output device to acquire signals, meanwhile, once sixteen-channel data acquisition is completed, the main control unit starts a data uploading process and sends the acquired data to the upper computer through a PCI bus protocol, and if the upper computer issues a stop command, the main control unit immediately stops the acquisition and uploading process and enters a standby state; when the analog signal acquisition output device or the digital signal input output device is in an output mode, the main control unit configures parameters and starts a signal output control time sequence according to a control command to control the analog signal output device or the digital signal input output device to output signals, when one-time output is finished, the main control unit starts the next signal output time sequence, and if the upper computer issues a stop instruction, the main control unit immediately stops the signal output control time sequence to enter a standby state.
AS shown in fig. 2(a), 2(B), 2(C), 2(D), and 2(E), the main control unit is based on FPGA, takes an FPGA chip XC6SLX9FTG256 of SPARTAN6 series of Xilinx corporation AS a core, and performs hardware configuration in an AS configuration mode, that is, an active serial configuration mode, and configures an employed PROM chip AS an XCF04SVO20C chip of Xilinx corporation, while retaining a JTAG interface for debugging, and a main clock frequency is 100 MHz; the main control unit is in a standby mode after being electrified until receiving an acquisition or output control instruction sent by the upper computer. The analog signal acquisition part of the analog signal acquisition and output device is provided with twelve control lines which are connected with the FPGA and respectively control the work of two ADS8668IDBT chips, and the control lines are RST _ A, SDI _ A, CS _ A, SCLK _ A, SDO _ A, ALARM _ A, RST _ B, SDI _ B, CS _ B, SCLK _ B, SDO _ B, ALARM _ B; the signal lines FD 1-FD 8 are connected to the PCI communication device, and seven control lines FRD, FREET, FADS, FWR, LCLK, READY, and 1DIR are provided; the signal lines SDIN _ DA, SDO _ DA, SCLK _ DA, LDAC _ DA, SYNC _ DA and RESER _ DA are connected with an analog signal output part of the analog signal acquisition and output device; the input and output of the digital input/output device are controlled by signals DIN0_ FPGA to DIN15_ FPGA and DOUT0_ FPGA to DOUT15_ FPGA, respectively.
The PCI communication device comprises a PCI protocol chip and a PCI interface socket; the PCI protocol chip is connected with a PCI interface and a PCI bus of the main control unit and is used for realizing real-time transmission of data;
as shown in fig. 3, the PCI communication device employs a PCI9054 chip of NXP corporation, employs an 8MHz crystal oscillator, and is configured in a mode in which addresses and signal lines are multiplexed. The level conversion chip plays a role of an intermediate bridge, and the conversion chip can convert a digital +5V voltage signal into a digital +3.3V voltage signal. The PCI9054 chip uses an 8MHz crystal oscillator as a control clock, and is matched with an EEPROM 93CS46L chip to carry out initialization configuration on the PCI9054, a configuration register of the PCI9054 can directly work after being electrified, the purpose of plug and play is achieved, the configuration is simple, and programming can be repeated. The PCI9054 chip is connected to the gold finger and powered using a +5V digital voltage on the gold finger.
The host computer includes two parts of control panel and display panel, and control panel mainly used sets up each item parameter of gathering and output, each item parameter corresponds specific control command and transmits the main control unit through PCI communication device, is analyzed and is handled control command by the main control unit, and display panel is used for showing the data that the main control unit uploaded the collection.
As shown in fig. 4(a), 4(B), and 4(C), the power module supplies power to other devices, and the voltage required by the acquisition output control device includes a digital +5V voltage, a digital +1.2V voltage, a digital +3.3V voltage, and an analog +5V voltage. Wherein, a part of digital +3.3V is an auxiliary I/O driving power supply of the FPGA chip in the main control unit, the digital +1.2V is the core voltage of the FPGA chip, the analog +5V voltage is the power supply voltage of the analog signal acquisition output device, and the other part of digital +3.3V voltage provides the working voltage for other interface circuits and digital signal input and output devices. The input of the power supply module is digital +12V direct current voltage, and the voltage is provided by the upper computer. The TPS54325PWP chip can convert a digital +5V voltage into a digital +1.2V and a digital +3.3V voltage, and the TPS 563260 chip and the TPS7a8300RGRR chip can convert a digital +12V voltage into an analog +5V voltage.
As shown in fig. 5, the analog signal acquisition and output device includes a digital-to-analog conversion module, an analog-to-digital conversion module, and a voltage amplifier module, and the voltage amplifier module employs an AD8421 chip. Digital-to-analog conversion module among the analog signal acquisition output device has used TI company's ADS8668IDBT chip, eight passageway real-time acquisitions can be accomplished to this chip, can convert the signal of input into 12 bit's digital signal, the main control unit controls the chip through six signal lines, can set up the rate of gathering through the SCLK signal, the data of gathering will be transmitted the FPGA chip in the main control unit through the SPI protocol and handle, wherein AI0 goes out to AI15 signal line with the interface of lug connection to the device, and link to each other with peripheral equipment.
As shown in fig. 6, the analog-to-digital conversion module in the analog signal acquisition and output device uses AD5687BRUZ chip of ADI company, 12bit analog signal can be output through the control of the main control unit, the upper computer can set the initial state of the chip through the FPGA chip in the main control unit, the SDIN _ DA signal line transmits the data in the FPGA to the AD5687BRUZ chip for analog output, and reads back the data of the SDO _ DA signal line in real time for correct judgment of output, and the AO0 and the AO1 at the output end are directly connected with the interface of the device.
As shown in fig. 7, the total number of the interfaces in the board interface is seventy, wherein sixteen analog signal input interfaces, two analog signal output interfaces, sixteen digital acquisition interfaces, two clock output interfaces, and two counter output interfaces are mainly provided.
As shown in fig. 8, the digital output module in the digital signal input/output device uses a transistor L2SC4617RT1G to perform voltage stabilization and voltage output control, so as to form a cascode circuit, which can design the output voltage and has a certain adjustability.
As shown in fig. 9, the digital input module in the digital signal input/output device uses the optical coupling device TLP785 for input isolation, and the front-end circuit is provided with a circuit protection module composed of diodes D7 and D8, so that the input digital signal can be voltage-protected.
The specific implementation process of the invention is as follows:
the device is built and installed, the device is inserted into equipment with a PCI interface, and a collection output interface on the device is connected with peripheral equipment. The upper computer communicates with the serial signal acquisition and output control device of the PCI bus protocol, and sends an instruction to the serial signal acquisition and output control device in an acquisition mode or an output mode, the serial signal acquisition and output control device receives the instruction and then converts the instruction into a control instruction which can be read by the main control unit, and the FPGA chip in the main control unit feeds back the state information of the serial signal acquisition and output control device to the upper computer according to the corresponding instruction, so that the initialization configuration is completed.
When a signal needs to be acquired, a user sets acquisition parameters through an upper computer control panel, wherein the acquisition parameters comprise acquisition clock frequency and acquisition channel number; then, the upper computer sends out a corresponding instruction, the instruction is transmitted to the main control unit through a PCI bus protocol, and the main control unit configures acquisition clock frequency and acquisition channel number according to the instruction and starts a serial signal acquisition time sequence; the method comprises the following steps of correspondingly controlling an analog signal acquisition and output device and/or a digital signal input and output device, including the setting of acquisition rate and the like, starting to work at the same time, transmitting acquired data to a main control unit, storing the data in sections by the main control unit, transmitting the data to an upper computer by using a PCI bus protocol, processing a data section received by the PCI bus protocol by the upper computer, analyzing the content of the data section, performing format conversion on the received data, and displaying the data in a decimal format on a display panel of the upper computer; and finally, completing the acquisition of the signal. When the data acquisition is finished, the user sends an acquisition finishing stop instruction to the main control unit through the upper computer, and the acquisition time sequence is stopped.
When the signal is required to be output, a user sets output parameters through the upper computer control panel, wherein the output parameters comprise output clock frequency and output channel number; then the upper computer sends out a corresponding instruction, the instruction is transmitted to the main control unit through a PCI bus protocol, and the main control unit configures output clock frequency and output channel number according to the instruction and starts a signal output time sequence; and correspondingly controlling the analog signal acquisition and output device and/or the digital signal input and output device to realize data output to external equipment to finish signal output. When the data output is finished, the user issues a data output stop instruction to the main control unit through the upper computer, and the output time sequence is stopped.
The above-described embodiments are intended to illustrate rather than to limit the invention, and any modifications and variations of the present invention are within the spirit of the invention and the scope of the appended claims.
Claims (8)
1. A serial signal acquisition output control device based on PCI bus protocol is characterized in that: the device comprises an analog signal acquisition and output device, a digital signal input and output device, a main control unit, a PCI communication device and an upper computer;
analog signal gathers output device and contains collection mode and output mode, can gather the analog signal data of sixteen at most ways and carry out serial transmission to the main control unit with the data of gathering under the collection mode, analog signal gathers output device and can select arbitrary passageway and select the analog signal maximum voltage input scope of gathering to have overvoltage protection function, specifically do: when the signal voltage transmitted by the analog signal acquisition and output device received by the upper computer through the main control unit exceeds the set maximum voltage input range, the upper computer sends a control instruction, and the analog signal acquisition and output device stops data acquisition; in the output mode, the analog signal acquisition and output device can output two paths of analog signal quantities simultaneously, so that the actual application requirements can be met;
the digital signal input and output device comprises an acquisition mode and an output mode, can acquire digital quantity input of sixteen paths at most simultaneously in the acquisition mode and serially transmit the digital quantity input to the main control unit, has the same overvoltage protection function as the analog signal acquisition and output device, can output the digital quantity of sixteen paths at most simultaneously in the output mode, and can independently work for thirty-two paths of digital quantity input and output;
the main control unit is used as a core module of the serial signal acquisition output control device and is used for realizing the functions and time sequence control of the whole device, the resources of the main control unit are divided into three parts, one part of the resources are mainly used for signal acquisition time sequence, a control instruction sent by an upper computer is transmitted to the main control unit through a PCI communication device to carry out specific time sequence skip, the control instruction is accurately sent to the analog signal acquisition output device and returns acquired data, the other part of the resources are used for signal output time sequence, the upper computer sends the control instruction to the main control unit through the PCI communication device, then the main control unit controls the signal output time sequence to output a set signal to the analog signal acquisition output device and the digital signal input output device, and the last part is used for communication control time sequence, the resources of the part are mainly used for completing the analog signal acquisition output device, the digital signal output device and the digital signal input output device, The digital signal input and output device, the main control unit, the PCI communication device and each module of the upper computer work cooperatively;
the PCI communication device comprises a PCI protocol chip and a PCI interface socket; the PCI protocol chip is connected with a PCI interface and a PCI bus of the main control unit and is used for realizing real-time transmission of data;
the host computer includes two parts of control panel and display panel, and control panel mainly used sets up each item parameter of gathering and output, each item parameter corresponds specific control command and transmits the main control unit through PCI communication device, is analyzed and is handled control command by the main control unit, and display panel is used for showing the data that the main control unit uploaded the collection.
2. The serial signal acquisition output control device based on the PCI bus protocol as claimed in claim 1, wherein: the main control unit is based on FPGA, the model of the chip is XC6SLX9FTG256 of an FPGA chip of SPARTAN series of Xilinx company, an AS configuration mode, namely an active serial configuration mode, is adopted for hardware configuration, the adopted PROM chip is XCF04SVO20C chip of the Xilinx company, a JTAG interface is reserved for debugging at the same time, and the main clock frequency is 100 MHz; the main control unit is in a standby mode after being electrified until receiving an acquisition or output control instruction sent by the upper computer.
3. The serial signal acquisition output control device based on the PCI bus protocol as claimed in claim 1, wherein: when the analog signal acquisition output device or the digital signal input output device is in an acquisition mode, the main control unit configures parameters and starts a signal acquisition control time sequence according to a control command to control the analog signal acquisition device or the digital signal input output device to acquire signals, meanwhile, once sixteen-channel data acquisition is completed, the main control unit starts a data uploading process and sends the acquired data to the upper computer through a PCI bus protocol, and if the upper computer issues a stop command, the main control unit immediately stops the acquisition and uploading process and enters a standby state; when the analog signal acquisition output device or the digital signal input output device is in an output mode, the main control unit configures parameters and starts a signal output control time sequence according to a control command to control the analog signal output device or the digital signal input output device to output signals, when one-time output is finished, the main control unit starts the next signal output time sequence, and if the upper computer issues a stop instruction, the main control unit immediately stops the signal output control time sequence to enter a standby state.
4. The serial signal acquisition output control device based on the PCI bus protocol as claimed in claim 1, wherein: analog signal gathers output device and includes digital analog conversion module, analog-to-digital conversion module and voltage amplifier module, and digital analog conversion module adopts ADS8668IDBT chip, can be 12 bit's digital signal with the signal conversion of input to transmit the main control unit through the SPI protocol, analog-to-digital conversion module has adopted AD5687RBRUZ chip, can export 12 bit's analog signal through the main control unit control, and the voltage amplifier module adopts the AD8421 chip.
5. The serial signal acquisition output control device based on the PCI bus protocol as claimed in claim 1, wherein: the digital signal input and output device comprises a digital output module and a digital input module, wherein the digital output module uses a triode L2SC4617RT1G to perform voltage stabilizing operation and voltage output control, and the digital input module selects a TLP785 chip and can perform voltage protection on an input digital signal.
6. The serial signal acquisition output control device based on the PCI bus protocol as claimed in claim 1, wherein: the PCI communication device chip adopts a PCI9054 chip of NXP company, adopts an 8MHz crystal oscillator and is configured into a mode of multiplexing an address and a signal line.
7. The serial signal acquisition output control device based on the PCI bus protocol as claimed in claim 1, wherein: the serial signal acquisition output control device is powered by a power management chip of TI company, and the used chip models are TPS54325PWP, TPS 563264 and TPS7A8300RGRR respectively. The input voltage of the device is +12V, the main control unit adopts independent digital +3.3V and digital +1.2V power supplies, and the rest modules also need to provide one path of digital +3.3V and one path of analog +5V power supplies.
8. The serial signal acquisition output control device based on the PCI bus protocol as claimed in claim 1, wherein: the acquisition control process adopted by the device comprises the following steps:
step 1-1, a user sets acquisition parameters through an upper computer control panel, wherein the acquisition parameters comprise acquisition clock frequency and acquisition channel number;
step 1-2, an upper computer issues a starting instruction and a control instruction to a main control unit through a PCI bus protocol, the main control unit receives the instruction, and configures acquisition clock frequency and acquisition channel number according to the instruction and starts a serial signal acquisition time sequence;
1-3, starting the work of the analog signal acquisition and output device and/or the digital signal input and output device and transmitting acquired data to a main control unit, and storing the data in sections by the main control unit and uploading the data to an upper computer in real time according to a PCI bus protocol to realize the real-time uploading of the data;
step 1-4, the upper computer processes the data segment received by the PCI bus protocol, analyzes the content of the data segment, performs format conversion on the received data and displays the data on a display panel of the upper computer in a decimal format;
and 1-5, when the data acquisition is finished, the user sends an acquisition finishing stop instruction to the main control unit through the upper computer, and the acquisition time sequence is stopped.
The output control flow adopted by the serial signal acquisition control device comprises the following steps:
step 2-1, a user sets output parameters through an upper computer control panel, wherein the output parameters comprise output clock frequency and output channel number;
2-2, the upper computer issues a starting instruction and a control instruction to the main control unit through a PCI bus protocol, the main control unit receives the instruction, configures output clock frequency and output channel number according to the instruction and starts a signal output time sequence;
step 2-3, the main control unit stores the clock frequency and the output channel number, and controls the analog signal acquisition and output device and/or the digital signal input and output device to work, so as to realize data output to external equipment;
and 2-4, when the data output is finished, the user issues a data output stop instruction to the main control unit through the upper computer, and the output time sequence is stopped.
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