CN102806683A - Special PCI (Peripheral Component Interconnect)-based hydraulic machine motion control method and controller - Google Patents

Abstract

The invention relates to motion control of a hydraulic press. In order to provide a low-cost, high-reliability, easy-to-use and maintain control board that can form a control system with an industrial computer and a controller that can directly match the signal of an actuator, the technical solution adopted by the present invention is based on PCI hydraulic machine special motion controller, including analog input module, analog output module, TMS320F2812 digital signal processing module, EQ2C8Q208 logic circuit conversion module, PCI9054 bus data communication module, switch input circuit module, switch output circuit module; Q2C8Q208 The logic conversion circuit module is respectively connected with the aforementioned modules. The invention is mainly applied to the motion control of hydraulic presses.

Description

A special motion control method and controller for hydraulic press based on PCI

technical field

The invention relates to motion control of a hydraulic press, in particular to a PCI-based special motion controller for a hydraulic press.

Background technique

At present, my country's industrial production has entered a stage of rapid development. At the same time, the demand for various controllers has greatly increased in today's increasingly automated production. In high-tech fields such as aerospace, large-scale equipment manufacturing, and electronic information, higher requirements are put forward for the controller's stability, anti-interference, precision, speed and other indicators. But now the domestic motion controller market is still dominated by foreign products, and the high-level controller market is almost monopolized by several foreign companies, which means that our country now lacks a low-cost, high-reliability motion controller with independent intellectual property rights. controller.

In the large-scale hydraulic machine production industry, on the one hand, subject to the technical monopoly of foreign-produced motion controllers, domestic hydraulic machines in my country have not been able to have complete independent intellectual property rights; It is unique, but in practical applications, general-purpose motion controllers are often used, which will bring a lot of inconvenience to producers due to the mismatch of signal characteristics and specification requirements, and will also cause unnecessary waste of resources.

Therefore, it is meaningful to develop a motion controller with independent intellectual property rights that can match the hydraulic press control system to the greatest extent.

Composition and Realization of Hydraulic System

The multi-cylinder hydraulic press mainly includes the host computer, hydraulic cylinder group, slide block, frame, oil pump group, oil tank, detection device and control system. When the hydraulic machine is working, the oil pump pumps high-pressure hydraulic oil from the oil tank into the oil circuit; the hydraulic oil enters the hydraulic cylinder group through the proportional servo valve to drive the slider to run. The speed and leveling control of the slider is achieved by continuously adjusting the opening of the proportional servo valve in the oil circuit, thereby changing the flow of hydraulic oil in the hydraulic cylinder.

Taking the 80MN multi-cylinder forging hydraulic press as an example, the composition of the hydraulic system is described as shown in Figure 1.

The detailed description of each part is shown in the table below:

The key to controlling the multi-cylinder hydraulic press is the multi-cylinder hydraulic servo control system. First, the position information (SSI format) of the slider output by the grating ruler and the pressure information (voltage signal) in the hydraulic cylinder collected by the pressure sensor are converted into parallel binary information that the main control chip can recognize through the FPGA and the A/D chip respectively. . Then the main control chip calculates the proper opening of the proportional servo valve according to the information and control algorithm, and then outputs it to the proportional servo valve through the D/A chip and the drive amplifier circuit, so as to achieve the control goal. The schematic diagram of the multi-cylinder hydraulic press control system is shown in Figure 2.

Contents of the invention

The present invention aims to overcome the deficiencies of the prior art and provide a control board with low cost, high reliability, simple use and maintenance, and which can form a control system together with an industrial computer and a controller that can directly match the signal of the actuator , in order to achieve the above object, the technical solution adopted by the present invention is that the special motion controller for hydraulic press based on PCI includes analog input module, analog output module, TMS320F2812 digital signal processing module, EQ2C8Q208 logic circuit conversion module, PCI9054 bus data communication Module, switch value input circuit module, switch value output circuit module; Q2C8Q208 logic conversion circuit module is connected with the aforementioned modules respectively;

The EQ2C8Q208 logic conversion circuit module is connected with the TMS320F2812 digital signal processing module, and the data exchange between the two is realized through the interrupt control method;

The EQ2C8Q208 logic conversion circuit module is connected with the corresponding PCI slot of the industrial computer through the PCI9054 bus data communication module to realize the parallel data exchange between the industrial computer and the EQ2C8Q208 logic conversion circuit.

The structure of the analog input module is as follows: EQ2C8Q208 writes the control word into AD7928 through the SPI bus, and conducts electrical isolation through the chip TLP117 during the period; the external terminal receives the 0-10V voltage signal input by the transmitter, and obtains the 0-5V standard voltage through resistor division The signal is converted into a 12-bit high-precision digital signal by the A/D conversion chip AD7928, and then the digital signal is electrically isolated by the digital isolation chip IOS721, and the isolated serial digital signal is transmitted to the EQ2C8Q208 through the SPI bus.

The structure of the analog output module is: the digital signal is transmitted from the EQ2C8Q208 to the digital isolation chip TLP117 through the SPI bus, where the electrical isolation of the digital signal is carried out, and the serial digital signal is converted into a 12-bit high-precision digital signal through the D/A conversion chip A/D5628. The signal is converted into an analog signal, and then converted into a standard 0-10 voltage signal output through a voltage signal amplification circuit.

The EQ2C8Q208 logic circuit conversion module further includes: high-speed position (SSI) acquisition module, M method and T method speed calculation module, SPI serial data communication module, TMS320F2812 interrupt control and arbitration module, PCI parallel bus data communication module, TMS320F2812 interrupt control and The arbitration module and the PCI parallel bus data communication module are included in the dual-port RAM.

TMS320F2812 digital signal processing module further includes: AD data acquisition and format conversion module, DA data format conversion and output module, control algorithm operation module and DSP and FPGA interrupt data communication module

The AD data acquisition and format conversion module is used to: convert the input analog signal into a 12-bit high-precision digital signal, input it into the EQ2C8Q208 logic circuit conversion module in the form of an SPI serial bus, and then convert it into a parallel data signal; by interrupting the data communication The subroutine obtains the data in the FPGA storage area, and transforms it into a data format available for the operation of the control algorithm according to the specified number system transformation;

The DA data format conversion and output module is used to: convert the control signal into a 12-bit digital quantity corresponding to the DA chip through the specified numerical conversion, and transmit it to the DA conversion chip through the SPI serial bus of the FPGA to obtain the desired analog quantity;

The control algorithm operation module is used for: the judgment of the working mode, the switching of the speed calculation method, the switching of the output valve, the calculation of the deviation, and the calculation of the control amount;

(4) Interrupt data communication module between DSP and FPGA.

Technical characteristics and effects of the present invention:

In terms of controller hardware: the control board can be directly plugged into the PC, and forms a complete control system with the PC, realizing the integration of the control system. Users can expand different PCI boards according to different control requirements. The function of the control system is more perfect. And the external conditioning board in the present invention is connected with Field Programmable Gate Array (FPGA), and different conditioning boards can be exchanged according to different requirements to achieve different performances (such as changing the precision of D/A, etc.). The present invention can also separate from the main body of the PC, adopt a separate power supply mode, and can be used as an independent control device.

In terms of controller software: write and solidify 8 high-speed position (SSI) interfaces on the field programmable gate array EQ2C8Q208, and corresponding speed calculation algorithms (M method and T method) to achieve high-speed position and speed detection , which saves the running cycle of the motion control algorithm on the DSP; on the digital signal processor TMS320F2812, an interrupt running subroutine communicating with the field programmable gate array EQ2C8Q208 is written to realize the fast data exchange between the two.

Description of drawings

Fig. 1 Working principle diagram of the multi-cylinder forging hydraulic press (the oil circuit diagram is on the left, and the frame diagram is on the right).

Figure 2 Schematic diagram of the multi-cylinder hydraulic press control system.

Figure 3 Controller block diagram.

Figure 4FPGA pin definition.

Figure 5 FPGA internal logic function diagram.

Figure 6 is a schematic diagram of a high-speed SSI communication interface module.

Figure 7 DSP parameter read and write interrupt subroutine flow chart.

Figure 8 Schematic diagram of the multi-cylinder hydraulic press control system.

Figure 9 DSP main program flow chart.

Figure 10DSP control program flow chart.

Detailed ways

The purpose of the present invention is to provide a low-cost, high-reliability, easy-to-use and maintain control board that can form a control system with an industrial computer and a conditioning board that can directly match the signal of an actuator.

The feature of the present invention is that the motion control board can be directly plugged into the industrial computer through the PCI interface, and form a complete control system with the industrial computer, signal conditioning board, and the controlled object, realizing the integration of the control system. The control requirements to expand the different performance of the PCI board to make the function of the control system more perfect. Moreover, the external conditioning board in the present invention is connected to the FPGA, and different conditioning boards can be exchanged according to different requirements to achieve different performances. 8 high-speed position (SSI) interfaces and corresponding speed calculation methods (M method and T method) are programmed on FPGA to realize high-speed position and speed detection, reduce the running cycle of motion control algorithms on DSP, and improve control The overall responsiveness of the system.

The technical solution adopted by the present invention to solve the problems of the technologies described above is as follows:

1. Hardware implementation

According to the requirements of multi-axis motion control indicators, the functional circuit of this dedicated controller includes digital input and output modules, analog output modules, TMS320F2812 digital signal processing modules, EQ2C8Q208 logic circuit conversion modules, PCI9054 bus data communication modules, SSI synchronous serial Line bus data acquisition module. In the invention, SSI collection, digital input and output and analog output are all set to 8 channels, and the analog output is converted into 0-10V analog signal output through an amplifying circuit.

(1) JTAG debugging interface module: field programmable gate array EQ2C8Q208 configures pins TCK, TDO, TMS, TDI, VCC, GND as JTAG debugging interface. The definition of JTAG pin is: TCK is the test clock input. TMS is the test mode selection, and TMS is used to set the JTAG interface in a specific test mode. TDI is the test data input, and the data is input to the JTAG interface through the TDI pin; TDO is the test data output, and the data is output from the JTAG interface through the TDO pin.

When using a PC for online debugging, on the one hand, the data in the controller is transmitted to the control board through the JTAG debugging interface, and the board transmits the data to the computer through the parallel port. On the other hand, debugging commands and data are sent to the control board through the parallel port.

(2) Analog input circuit module: The analog input signal is a 0-10V voltage signal, which is converted into a 0-5V voltage signal through resistor division, and the converted signal is sent to the A/D conversion in the A/D conversion circuit Chip A/D7928, get 12-bit serial digital voltage value. This serial digital quantity is transmitted to the isolation chip IOS721. IOS721 electrically isolates the received digital signal and outputs the SPI serial bus signal matching the level of EQ2C8Q208. EQ2C8Q208 receives the SPI bus signal for processing. In addition, the working mode of the A/D conversion chip is controlled by the control word from EQ2C8Q208. During the transmission of the control word, it is electrically isolated by the isolation chip TLP117, and the transmission method is the same as the SPI serial bus transmission.

(3) Analog output circuit module: EQ2C8Q208 corresponds the analog output variable to 0~4095, and transmits it to the isolation chip TLP117 of the D/A isolation circuit through the SPI bus, and the isolation chip performs level conversion on the received SPI bus data Isolation, the converted digital signal is sent to the D/A conversion chip AD5628.

The analog voltage conversion circuit includes eight voltage conversion circuits with the same structure. The first to eighth inputs of the analog voltage conversion circuit are simultaneously connected to the 0-5V voltage signal output channels of the D/A conversion chip. The analog voltage conversion circuit converts the 0-5V voltage signal of the corresponding channel into a 0-10V voltage signal. The eight 0-10V voltage signals of the analog voltage conversion circuit are output to the corresponding channels of the analog output terminal, and the analog output signal is 0-10V.

(4) Digital input circuit module: 0V or 5V voltage signal from the outside is input from the digital input port. The switching value conditioning circuit includes 8 circuits with the same function. The 0V or 5V voltage signal of the first to the eighth channel of the switching value input port is used for voltage conversion and isolation through the chip ADuM1400ARW, and the 0V or 5V voltage signal is converted into 0V or 3.3V voltage signal output. , the outputs of the first to eighth switching value conditioning circuits are connected to the corresponding pins of the first to eighth switching values of the EQ2C8Q208. If the corresponding pin is high, read the corresponding bit as 1; if the corresponding pin is low, read the corresponding bit as 0.

(5) Digital output circuit module: EQ2C8Q208 sets eight general-purpose I/O interface pins as digital functions, and outputs the value 0 or 1 of the corresponding registers of the first to eighth channels to the first to eighth channel switches Quantity corresponds to the function pin. If the register value is 1, then output 3.3V; if the register value is 0, then output 0V. The voltage signals on the pins corresponding to the first to eighth switching quantities are converted and isolated through the chip ADuM1400ARW, and the 0V or 3.3V voltage signal is converted into a 0V or 5V voltage signal for output.

(6) PCI interface circuit driver module: PCI interface driver chip PCI9054 configures BTERM, READY, ADS, BLAST, WAIT, LRESET, LINT, USERi/DACK0/LLOCKi, USERo/DACK0/LLOCKo pins as PCI communication control interface, LA2 ~ LA30 pins are configured as 29 address bits, and LD0 ~ LD31 pins are configured as 32 data bits. After the control board is connected to the industrial computer through the PCI interface, through the API function of the industrial computer operating system, the data value corresponding to the corresponding address of the PCI interface driver chip PCI9054 can be read and written. The general-purpose I/O pins are connected, and the data value can be reflected in the EQ2C8Q208 in real time for subsequent processing.

GPIIOE0_XINT1引脚实现TMS320F2812与EQ2C8Q208的16位数并行通信，XA[0]～XA[13]引脚配置为14位地址位，XD[0]～XD[15]引脚配置为16位数据位。为实现EQ2C8Q208与TMS320F2812的数据传输，在以上硬件连接的基础上，定制了基于中断控制字的中断读写模式，EQ2C8Q208产生外部中断信号，通过TMS320F2812识别EQ2C8Q208中读写标志位来实现相应的读写控制。(7) DSP data processor module: data processing unit TMS320F2812 through XREADY, XR/W,

The GPIIOE0_XINT1 pin realizes the 16-bit parallel communication between TMS320F2812 and EQ2C8Q208, XA[0]~XA[13] pins are configured as 14-bit address bits, and XD[0]~XD[15] pins are configured as 16-bit data bits. In order to realize the data transmission between EQ2C8Q208 and TMS320F2812, on the basis of the above hardware connection, the interrupt read and write mode based on the interrupt control word is customized, EQ2C8Q208 generates an external interrupt signal, and the corresponding read and write is realized by identifying the read and write flag bits in EQ2C8Q208 by TMS320F2812 control.

The EQ2C8Q208 logic conversion circuit module is connected with the TMS320F2812 digital signal processing module, and the data exchange between the two is realized through an interrupt control mode. Write and monitor the algorithm program of the processing module.

The EQ2C8Q208 logic conversion circuit module is connected to the 8-way SSI synchronous serial data acquisition module, and the level conversion chip MAX3490 is used to convert the differential signal input by the sensor into a TTL level signal of 0-3.3V, and the 8-way SSI synchronous The serial data acquisition module is connected with external terminals, and a resistor is added between the two differential signals to ensure voltage stability.

The EQ2C8Q208 logic conversion circuit module is connected with the PCI interface circuit module of PCI9054, adopts parallel data transmission mode, the data bit can reach 32 bits at most, and the address bit can reach 29 bits at most. The bus plug is connected, through which the plug is connected with the corresponding PCI slot of the industrial computer to realize the parallel data exchange between the industrial computer and the motion control board.

The EQ2C8Q208 logic conversion circuit module is connected with the digital circuit isolation chip TLP117, and the two perform unidirectional data transmission from the EQ2C8Q208 logic conversion circuit module to the TLP117 through the SPI serial bus to realize electrical isolation and up to 10M serial data Communication, the digital circuit isolation chip TLP117 is connected with the D/A conversion chip AD5628, the D/A conversion chip AD5628 is connected with the analog output voltage amplification circuit module LM224J, and the analog output voltage amplification circuit module LM224J is connected with the The external terminals are connected, and its output can drive the actuator.

The EQ2C8Q208 logic conversion circuit module is connected with the digital circuit isolation chip TLP117, and the two perform unidirectional data transmission from the EQ2C8Q208 logic conversion circuit module to the TLP117 through the SPI serial bus to realize electrical isolation and up to 10M serial data Communication; the A/D conversion chip AD7928 is connected with the isolation chip IOS721, and the isolation chip IOS721 is connected with the EQ2C8Q208, and the serial digital signal is transmitted unidirectionally by the AD conversion circuit to the EQ2C8Q208, and realizes electrical isolation; The digital circuit isolation chip TLP117 is connected with the A/D conversion chip AD7928, and the A/D conversion chip AD7928 is connected with an external terminal as an analog data interface.

The EQ2C8Q208 logic conversion circuit module is connected with the JTAG program download interface module, and can complete the program download of the EQ2C8Q208 logic conversion circuit module.

The EQ2C8Q208 logic conversion circuit module is connected with the digital isolation chip ADuM1400ARW to realize isolation between electrical appliances, and the digital isolation chip ADuM1400ARW is connected with external terminals to realize digital input and output. 2 Description of the signal direction of the motion control board and the conditioning board

A PCI-based special motion controller for hydraulic presses includes digital signal processor TMS320F2812, field programmable gate array EQ2C8Q208, PCI interface circuit based on PCI9054, 8-way high-speed SSI bus level conversion circuit, 8-way D/A conversion circuit (conditioning on board), 8-way magnetic coupling isolation digital input circuit (conditioning board), 8-way A/D conversion circuit (conditioning board), 8-way magnetic coupling isolation digital output circuit (conditioning board), field programmable gate array Multi-interface fusion logic compiled on EQ2C8Q208, independent power supply circuit.

Analog input signal direction: EQ2C8Q208 writes the control word into AD7928 through SPI bus, and conducts electrical isolation through chip TLP117 during this period. The external terminal receives the 0-10V voltage signal input by the transmitter, and obtains a 0-5V standard voltage signal through resistance division, which is converted into a 12-bit high-precision digital signal by the A/D conversion chip AD7928, and then passed through the digital isolation chip IOS721 The electrical isolation of the digital signal is carried out, and the isolated serial digital signal is transmitted to the EQ2C8Q208 through the SPI bus.

Analog output signal direction: the digital signal is transmitted from the EQ2C8Q208 to the digital isolation chip TLP117 through the SPI bus, where the electrical isolation of the digital signal is performed, and the serial digital signal is converted into a 12-bit high-precision digital signal by the D/A conversion chip A/D5628 It is converted into an analog signal, and then converted into a standard 0-10 voltage signal output through a voltage signal amplification circuit.

Digital input signal direction: through the digital isolation chip ADuM1400ARW, it is transmitted from the external terminal to EQ2C8Q208.

Direction of switching output signal: through the digital isolation chip ADuM1400ARW, it is transmitted from EQ2C8Q208 to the external terminal.

Parallel digital quantity and address signal direction: Field Programmable Gate Array EQ2C8Q208 is used as a relay module of various digital quantity signals to complete the two-way data exchange with the 32-bit digital quantity and 29-bit address quantity of the PCI bus interface chip PCI9054, and at the same time, complete the communication with the Two-way data exchange of 16-bit digital quantity and 14-bit address quantity of digital signal processor TMS320F2812.

3 Logic Design and Data Communication

3.1 FPGA internal control logic design

The present invention has solidified the high-speed position (SSI) acquisition module, M method and T method speed calculation module, SPI serial data communication module, TMS320F2812 interrupt control and arbitration module, PCI parallel bus data communication module in EQ2C8Q208 (the latter two modules include In the dual-port RAM) to ensure the smooth communication of each part of the system, and to carry out effective control, the specific logic design is shown in Figure 5.

The SSI communication protocol is an abbreviation, and its full name is Synchronous Serial Interface. The SSI adopts the host active read method, that is, the master controller sends a clock pulse to the slave device, and the slave device outputs one bit of data, and the data is transmitted from the most significant bit (MSB). According to the timing requirements of the input SSI signal, the SSI acquisition module is divided into a clock generation module, a data receiving module and a data conversion module. Its structural diagram is shown in Figure 6. This module can actively output clock signals to peripherals according to the grating scale format (binary and gray code) of the selected hydraulic press, and convert the serial position data from the grating scale into 32-bit parallel data. This design uses continuous sampling, the sampling period is T, and T is a settable value (from 1M to 10K). Utilizing the characteristics of FPGA, 8-way parallel SSI sampling is realized in it, and the same system clock is used, so as to ensure the real-time and synchronization of position sampling.

The speed measurement module calculates the speed according to the T method and the M method respectively according to the parallel data converted by the SSI communication module and the sampling clock, so as to realize fast speed calculation and reduce the resources required for subsequent control algorithms. Because this design uses continuous sampling, and the sampling frequency is high, so the sampling period T can be used as the unit time of the system timing.

In this design, a 68*16-bit dual-port RAM is implemented on the FPGA, which is the carrier of the SPI bus module and the data transfer module. The two ends of the dual-port RAM are mainly based on the PCI9054 local bus protocol and the DSP peripheral 16-bit bus protocol to write read and write control. It communicates with the DSP using the DSP's 16-bit external bus, and the physical address corresponds to the 0 area of the DSP. (The starting address is 0X2000). The data interaction between the upper computer and the main control chip DSP is through the PCI bus, and then converted to the local bus through the PCI9054, and then transmitted to the DSP through the dual-port RAM implemented in the FPGA, and vice versa. Both PCI9054 and DSP are designed as master devices, and dual-port RAMs are slave devices.

According to actual needs, different storage areas of dual-port RAM are divided into different functional areas, and different restrictions are made according to the needs of different areas. Among them, the size of the fast shared area is 16*16 bits, which is set to be readable and writable by both the PCI9054 and the DSP. This part of the storage area is shared by the PCI9054 and the DSP, and the data transmission efficiency is the fastest. , and require fast data transfer.

Because the amount of data between the host computer and DSP will exceed the size of the fast shared area, but the required transmission rate is not fast, and all of them are actively read and written by the host computer. So set the data read and write area. It is set to be readable and writable by both PCI9054 and DSP, and the size is 16*16 bits. The first 32 bits of the data read and write area are read and write control words, defined as follows: 31-16 bits: offset address, used to distinguish the address area for reading and writing after interruption. Bit 15-8: read/write interrupt flag. When these eight bits are FF, it means that the write program is executed after entering the interrupt. When these eight bits are 00, it means that the read interrupt is entered, and the read program is executed after entering the interrupt. Bit 7-0: These eight bits represent the number of read/write at a time. The last 32 bits in the data read and write area are the interrupt enable control word, when all of them are 1, the INT signal becomes low to make the DSP enter the interrupt. When it is all 0, the INT signal goes high. Write corresponding interrupt program in DSP to realize data conversion.

The position and speed area, with a size of 32*16 bits, is used to store the position signal and speed signal generated by the SSI acquisition module and the speed measurement module. It is read-only for both PCI9054 and DSP.

The SPI area is divided into two SPIs, each with a size of 2*16 bits, of which the first 32 bits are used to control D/A, and the last two 16-bit storage areas are A/D control registers and data registers. This area has a parallel-to-serial function. When SPI_CS_DA is low, the first 32 parallel data are converted into SPI data and output to the DA on the conditioning board. When SPI_CS_AD is low level, the parallel data of the control register data register is converted into SPI data and output to the AD on the conditioning board, and the data from the receiver is converted into parallel data and stored in the data register. This area is only open to DSP, and the last 16 bits are read-only [10-11].

Since reading and writing to dual-port RAM may be performed on the same 16-bit storage unit, it is necessary to shield each other and set priorities. In order to solve the above problems, the delay reading and writing function of DSP and PCI9054 is used in this design. When one port is operating on the dual-port RAM, the READY signal of the port other than this port is set to an invalid state, indicating that the dual-port RAM is in an invalid state. 'busy' status. And the speed measurement module and the SSI detection module can store data in the dual-port RAM only when the dual-port RAM is in the 'idle' state.

3.2 DSP program design

TMS320F2812 is the core processor of the operation control algorithm. Various control algorithms can be written and implemented in C language. The industrial computer mainly runs the user monitoring interface to realize the real-time monitoring and parameter rewriting of the current system state by the user. Therefore, the DSP program design embodies the present invention. The heart of the control scheme. The invention writes modularized data transmission protocol, D/A output function and general I/O function for users on TMS320F2812. The invention writes the driver program for the communication between the industrial computer and the motion control board for the user, which is convenient for the user to write the control program in the TMS320F2812 and the monitoring program of the industrial computer.

The DSP main program is shown in Figure 9.

Figure 9 shows the program flow chart of DSP, including the initialization of each function module and the main loop. The main loop also includes four main functional modules, namely: AD data acquisition and format conversion module, DA data format conversion and output module, control algorithm operation module and DSP and FPGA interrupt data communication module. Each functional module is described as follows:

(1) AD data acquisition and format conversion module

The AD data acquisition circuit converts the analog signal of the input system into a 12-bit high-precision digital signal, which is input into the FPGA in the same way as the SPI serial bus, and then converted into a parallel data signal. The DSP obtains the data in the FPGA storage area by interrupting the data communication subroutine. Data, and transform it into a usable data format for the operation of the control algorithm according to the prescribed number system transformation.

(2) DA data format conversion and output module

The size of the analog output signal required by the control system comes from the operation output of the control algorithm. The control algorithm running in the DSP outputs the corresponding control signal according to the control requirements of the actual system, as shown in Figure 9. Usually the result of the operation is floating The points are converted into 12-bit digital quantities corresponding to the DA chip through the specified numerical conversion, and then transmitted to the DA conversion chip through the SPI serial bus of the FPGA to obtain the desired analog quantity.

(3) Control algorithm operation module

In this system, the control algorithm operation module is the core of program design. Usually, the tasks to be completed by the main control program include: judgment of working mode, switching of speed calculation method, switching of output valve, deviation calculation, control amount calculation. The specific process is shown in Figure 10.

When the forging hydraulic press is running at a low speed, the oil flow required by the single-rod piston cylinder is very small. At this time, if the caliber of the proportional directional valve is too large, the opening will be closed very small during actual operation, the forging hydraulic machine will produce strong and harsh noise, and the temperature of the hydraulic oil will also rise rapidly. On the contrary, the flow diameter of the proportional directional valve is too small, and it cannot meet the requirements of large flow when the forging hydraulic machine works at high speed; at the same time, in order to match the dual oil supply circuit, the control system has designed two sets of proportional directional valve systems: large diameter valve system and small bore valve system.

In Figure 10, the switching part of the large and small valves needs to control the large valve and the small valve at the same time. One path is for the calculation of the control amount of the large valve, and the other path is for the calculation of the control amount of the small valve. In other cases, only the large valve or the small valve is used. It is necessary to calculate the corresponding control quantity.

(4) Interrupt data communication module between DSP and FPGA. When the industrial computer sends an instruction to read or write the parameters of a certain axis, first write the interrupt control word, FPGA generates an interrupt signal according to the control word, and DSP enters the external interrupt program. The DSP internal and external interrupt program recognizes the interrupt control word, realizes the data exchange between the FPGA and the external storage at the same time, and then reads and writes the relevant data to read and write a specific parameter value. The interrupt control word is set as follows:

31 30 29 28 27 26 25 twenty four twenty three twenty two twenty one 20 19 18 17 16

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

It is defined as follows:

①Bit 31-16: Offset address, used to distinguish the address area for reading and writing after interruption.

②Bit 15-8: read/write interrupt flag, when these eight bits are FF, execute the write program after entering the interrupt, when these eight bits are 00, enter the read interrupt, and execute the read program after entering the interrupt.

③7-0 bit: These eight bits are the number of read/write at one time.

4 Examples of Control Algorithms

In the aforementioned 80MN hydraulic control system design example, the control algorithm is realized on DSP by using double closed-loop synchronous PID control. An independent double closed-loop control algorithm is designed for each cylinder. The input of the outer loop PID controller is the difference between the slider speed and the set given speed, and the given pressure difference is calculated through the PID control law, which is used as the given pressure of the inner loop. fixed input; the input of the inner loop PID controller is the difference between the given pressure and the actual pressure, and the opening of the valve is calculated through the PID control law as the control input of the controlled object. Since the resistance torque suffered by the hydraulic press is asymmetrical when it is running again, a large synchronization error will be generated when the multi-cylinder is running, the system will not work normally, and high-precision machining cannot be realized. In order to solve the above problems, the method of synchronous compensation is used for control, that is, the given speed is set according to the position information of the slider before calculating the speed deviation, and the position corresponding to a specific hydraulic cylinder is used as the reference position. For the position If the position is greater than this reference position, the given speed will be appropriately reduced; if the position is smaller than this reference position, the given speed will be appropriately increased. The block diagram of double closed-loop synchronous PID control algorithm is shown in Figure 8. Among them, the weight of the reference cylinder is 0, and the rest depends on the position of the cylinder. The double-closed-loop synchronous PID control algorithm requires that the sampling of each slider position must be real-time and synchronous.

5 summary

The PCI-based hydraulic machine-specific motion control method is realized by means of the aforementioned PCI-based hydraulic machine-specific motion controller, and includes the following functions:

On the TMS320F2812 digital signal processing module, the functions performed are: mainly used to send instructions, receive data and complete some complex algorithm control and connect to FPGA through its 16-bit parallel bus. This chip is specially designed for industrial control. With a variety of external interfaces, its internal clock is as high as 150MHZ, and the calculation speed is fast, which can reduce the running time of the control program and improve the control effect;

On the EQ2C8Q208 logic conversion circuit module, the functions performed are: mainly complete the acquisition and timing control of 8-way SSI signals, M method and T method speed measurement, realize two SPI buses for data interaction between the main board and the conditioning board, and in It realizes data transfer and control with dual-port RAM as the core, and completes the integration of various parts of data.

The invention solves the problems that the existing large-scale hydraulic machine control system controller relies too much on several foreign general-purpose controllers, has poor special-purpose performance, wastes hardware resources, and the like. The invention provides a low-cost, high-reliability, easy-to-use and maintenance-friendly controller dedicated to the movement of large hydraulic presses. The present invention can not only use an independent control board to realize the leveling and speed regulation control of a single hydraulic machine, but also can be combined with an industrial computer to form a complete control system, which not only realizes basic performance control, but also can be built to satisfy users The necessary friendly interface provides users with a simple and easy-to-operate environment, and has good economic and social benefits.

Claims (5)

1. A special motion controller for hydraulic machines based on PCI, characterized in that it includes an analog input module, an analog output module, a TMS320F2812 digital signal processing module, an EQ2C8Q208 logic circuit conversion module, a PCI9054 bus data communication module, and a switch input circuit module, switching value output circuit module; the Q2C8Q208 logic conversion circuit module is connected to the aforementioned modules respectively; The EQ2C8Q208 logic conversion circuit module is connected with the TMS320F2812 digital signal processing module, and the data exchange between the two is realized through the interrupt control method; The EQ2C8Q208 logic conversion circuit module is connected with the corresponding PCI slot of the industrial computer through the PCI9054 bus data communication module to realize the parallel data exchange between the industrial computer and the EQ2C8Q208 logic conversion circuit. 2. The special motion controller based on PCI for hydraulic presses as claimed in claim 1 is characterized in that the structure of the analog input module is: EQ2C8Q208 writes the control word into AD7928 through the SPI bus, during which the electrical isolation is carried out by the chip TLP117; the external terminal Receive the 0-10V voltage signal input by the transmitter, and obtain the 0-5V standard voltage signal through resistance division, and then convert it into a 12-bit high-precision digital signal through the A/D conversion chip AD7928, and then carry out the digital signal through the digital isolation chip IOS721. The electrical isolation of the signal, the isolated serial digital signal is transmitted to the EQ2C8Q208 through the SPI bus. 3. The special motion controller based on PCI for hydraulic presses as claimed in claim 1 is characterized in that, the structure of the analog output module is: the digital signal is transmitted to the digital quantity isolation chip TLP117 by the EQ2C8Q208 through the SPI bus, and the digital signal is processed here. Electrically isolated, the serial digital signal converts the 12-bit high-precision digital signal into an analog signal through the D/A conversion chip A/D5628, and then converts it into a standard 0-10 voltage signal output through a voltage signal amplification circuit. 4. the special-purpose motion controller based on PCI for hydraulic press as claimed in claim 1, is characterized in that, realizes by means of described each module and interconnection relation thereof, wherein EQ2C8Q208 logic circuit conversion module further comprises: high-speed position (SSI) acquisition Module, M method and T method speed calculation module, SPI serial data communication module, TMS320F2812 interrupt control and arbitration module, PCI parallel bus data communication module, TMS320F2812 interrupt control and arbitration module and PCI parallel bus data communication module are included in the dual-port RAM middle. 5. The special-purpose motion controller for hydraulic press based on PCI as claimed in claim 4, is characterized in that, TMS320F2812 digital signal processing module further comprises: AD data acquisition and format conversion module, DA data format conversion and output module, control algorithm operation module Interrupt data communication module with DSP and FPGA: The AD data acquisition and format conversion module is used to: convert the input analog signal into a 12-bit high-precision digital signal, input it into the EQ2C8Q208 logic circuit conversion module in the form of an SPI serial bus, and then convert it into a parallel data signal; by interrupting the data communication The subroutine obtains the data in the FPGA storage area, and transforms it into a data format available for the operation of the control algorithm according to the specified number system transformation; The DA data format conversion and output module is used to: convert the control signal into a 12-bit digital quantity corresponding to the DA chip through the specified numerical conversion, and transmit it to the DA conversion chip through the SPI serial bus of the FPGA to obtain the desired analog quantity; The control algorithm operation module is used for: the judgment of the working mode, the switching of the speed calculation method, the switching of the output valve, the calculation of the deviation, and the calculation of the control amount; Interrupt data communication module between DSP and FPGA.

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