CN202066742U

CN202066742U - Dynamic test card

Info

Publication number: CN202066742U
Application number: CN2011201114158U
Authority: CN
Inventors: 沈波
Original assignee: Hangzhou Langjie Measuring And Control Technology Development Co Ltd
Current assignee: Hangzhou Langjie Measuring And Control Technology Development Co Ltd
Priority date: 2011-04-15
Filing date: 2011-04-15
Publication date: 2011-12-07
Anticipated expiration: 2021-04-15

Abstract

The utility model discloses a dynamic test card, which comprises a board card provided with a golden finger. A digital signal processor (DSP) micro-processing module, a double-port random access memory (RAM) and a peripheral component interconnect (PCI) bus bridge are sequentially and electrically connected on a board surface of the board card. A plurality of signal interfaces which are used for connecting a test machine are arranged at edges of the board card. The DSP micro-processing module is connected on an electrically erasable programmable read-only memory (EEPROM) which is used for storing control parameters of the test machine. The DSP micro-processing module is electrically connected with the plurality of signal interfaces and the PCI bus bridge is electrically connected with the golden finger. A sequential control module which is electrically connected with the DSP micro-processing module, the double-port RAM and the PCI bus bridge respectively is further arranged on the board surface of the board card. The dynamic test card can be directly inserted on a microcomputer and realize automatic measurement and control of the microcomputer by being connected onto the test machine through simple wire distribution.

Description

A kind of dynamic test card

Technical field

The utility model relates to a kind of test card that is used on the dynamic electro-hydraulic servo static/dynamic universal testing machine.

Background technology

Dynamic electro-hydraulic servo static/dynamic universal testing machine, can carry out dynamic low cycle fatigue test, programmed control torture test, also can carry out the test under static constant speed, constant strain, the constant stress control and the mechanical property test of various routines, therefore have other kind testing machine the advantage that can not compare, be the material test equipment that the international material performance test is praised highly most.Can be widely used in industries such as space flight, aviation, naval vessel, vehicle, military project, engineering machinery.

The physical construction of the static/dynamic universal testing machine of home and abroad finalizes the design almost at present, and the major technique difficulty of development concentrates on the TT﹠C system.Domestic testing machine manufacturer mainly adopts simulating signal to control testing machine, and there are bigger gap in properties of product and offshore company, the TT﹠C system of testing machine production firm regardless of expense buying external (as American MTS); In addition, existing TT﹠C system mainly adopts the control case structure, and system wiring is more, inconvenient maintenance.

Summary of the invention

Technical problem to be solved in the utility model just provides a kind of dynamic test card, can directly be plugged on the microcomputer, is connected to testing machine by simple wiring, can realize microcomputer measurement and control automatically.

For solving the problems of the technologies described above, the utility model adopts following technical scheme: a kind of dynamic test card, it is characterized in that: comprise the integrated circuit board that has golden finger, be electrically connected with DSP micro treatment module, dual port RAM storer and pci bus bridge successively on the described integrated circuit board plate face, described integrated circuit board edge is provided with the signaling interface that some connection testing machines are used, and is connected with the eeprom memory that is used to store the testing machine controlled variable on the described DSP micro treatment module; The DSP micro treatment module is electrically connected with described some signaling interfaces, and the pci bus bridge is electrically connected with golden finger; Also be provided with the time-sequence control module that is electrically connected respectively with DSP micro treatment module, dual port RAM storer, pci bus bridge on the described integrated circuit board plate face.

Further, described some signaling interfaces include first signaling interface, the secondary signal interface that is used to receive the deformation simulative signal that is used for the reception simulating signal, the 3rd signaling interface that is used to receive the shift simulation signal; Described first signaling interface, secondary signal interface and the 3rd signaling interface pass through independently separately, and the A/D change-over circuit connects the DSP micro treatment module.

Further exist, connect first signaling interface and DSP micro treatment module and be connected the secondary signal interface and the two-way A/D change-over circuit of DSP micro treatment module in be equipped with precision amplifier.

Further, described the 3rd signaling interface is an integrated interface, includes the shift simulation signaling interface that is connected by the A/D change-over circuit with the DSP micro treatment module, the displacement digital signal interface that is connected with the DSP micro treatment module, is communicated with D/A translation interface, the digital signal output interface that is connected with the DSP micro treatment module and the digital signal input interface that the D/A change-over circuit is connected with the DSP micro treatment module.

Further, also be connected with on the described DSP micro treatment module and extend out the RAM storer.When equipment operation, the program in the DSP micro treatment module copied to extend out in the RAM storer and move, improve program run efficient, also can be used for the buffer memory of DSP micro treatment module internal task data.

Further, described time-sequence control module is the FPGA programmable gate array.

The beneficial effects of the utility model:

1, the utility model knot will be measured functions such as amplification, AD conversion, calculation control and concentrate on the printed circuit board, devices such as the needed power supply of the box testing machine controller of existing control, keyboard interface, digital demonstration have been cancelled, relevant line is cancellation in the lump also, makes system succinctly reliable;

2, the utility model possesses good intelligent characteristic, DSP can the autonomous high speed observing and controlling function that realizes testing machine, also can respond the order from microcomputer, EEPROM can write down the TT﹠C system correlation parameter, and test can be carried out high speed communication with microcomputer by dual port RAM and PCI chip.

Description of drawings

Below in conjunction with accompanying drawing the utility model is described further:

Fig. 1 is a structural representation of the present utility model.

Embodiment

With reference to Fig. 1, a kind of dynamic test card, comprise the integrated circuit board 1 that has golden finger 13, be electrically connected with DSP micro treatment module 2, dual port RAM storer 3 and pci bus bridge 4 successively on the described integrated circuit board 1 plate face, described integrated circuit board 1 edge is provided with first signaling interface 10, the secondary signal interface 11 that is used to receive the deformation simulative signal that is used for the reception simulating signal, the 3rd signaling interface 12 that is used to receive the shift simulation signal; Described first signaling interface 10, secondary signal interface 11 and the 3rd signaling interface 12 pass through independently separately, and A/D change-over circuit 6 connects DSP micro treatment modules 2; Connect first signaling interface 10 and DSP micro treatment module 2 and be connected in the two-way A/D change-over circuit of secondary signal interface 11 and DSP micro treatment module 2 and be equipped with precision amplifier 61, by precision amplifier 61 power simulating signal and deformation simulative signal are amplified and carry out A/D again and change; Be connected with the eeprom memory 21 that is used to store the testing machine controlled variable on the DSP micro treatment module 2; Pci bus bridge 4 is electrically connected with golden finger 13; Also be provided with the time-sequence control module 5 that is electrically connected respectively with DSP micro treatment module 2, dual port RAM storer 3, pci bus bridge 4 on the described integrated circuit board 1 plate face.

Above-mentioned the 3rd signaling interface 12 is an integrated interface, the D/A translation interface 123 that includes the shift simulation signaling interface 121 that is connected by A/D change-over circuit 6 with DSP micro treatment module 2, the displacement digital signal interface 122 that is connected with DSP micro treatment module 2, is connected by D/A change-over circuit 7 with DSP micro treatment module 2, digital signal output interface 124 and the digital signal input interface 125 that is connected with DSP micro treatment module 2 adopt integrated interface can simplify integrated circuit board 1 structure.

On DSP micro treatment module 2, also be connected with and extend out RAM storer 22.When equipment operation, the program in the DSP micro treatment module 2 copied to and extend out 22 operations in the RAM storer, improve program run efficient, also can be used for the buffer memory of DSP micro treatment module 2 internal task data.

Time-sequence control module 5 is the FPGA programmable gate array.

The course of work:

1, after the testing machine operation, DSP micro treatment module 2 copies internal processes to earlier and extends out in the RAM storer 22, and DSP micro treatment module 2 obtains the relevant controlled variable in the eeprom memory 21 then;

2, DSP micro treatment module 2 is gathered the data of computing from the testing machine sensor, by the conversion to digital quantity of three road A/D change-over circuits, 6 realizable force simulating signals, deformation simulative signal and shift simulation signal imitation amount; Wherein power simulating signal and deformation simulative signal need to be changed by precision amplifier 61 amplifications again;

3, DSP micro treatment module 2 is sent to the data of finishing dealing with in the dual port RAM storer 3, and pci bus bridge 4 is reading corresponding data from dual port RAM storer 3, uploads to then in the microcomputer; Data in the microcomputer are cached in the dual port RAM storer 3 by pci bus bridge 4 equally, DSP micro treatment module 2 reading corresponding data from dual port RAM;

4, the FPGA programmable gate array is being controlled the sequential of DSP micro treatment module 2, dual port RAM storer 3, pci bus bridge 4 when work.

The foregoing description only is a preferred embodiment of the present utility model, those skilled in the art can make various changes and distortion according to the utility model, only otherwise break away from spirit of the present utility model, all should belong to the defined scope of the utility model claims.

Claims

1. dynamic test card, it is characterized in that: comprise the integrated circuit board (1) that has golden finger (13), be electrically connected with DSP micro treatment module (2), dual port RAM storer (3) and pci bus bridge (4) on described integrated circuit board (1) the plate face successively, described integrated circuit board (1) edge is provided with the signaling interface that some connection testing machines are used, and is connected with the eeprom memory (21) that is used to store the testing machine controlled variable on the described DSP micro treatment module (2); DSP micro treatment module (2) is electrically connected with described some signaling interfaces, and pci bus bridge (4) is electrically connected with golden finger (13); Also be provided with the time-sequence control module (5) that is electrically connected respectively with DSP micro treatment module (2), dual port RAM storer (3), pci bus bridge (4) on described integrated circuit board (1) the plate face.

2. a kind of dynamic test card according to claim 1 is characterized in that: described some signaling interfaces include first signaling interface (10), the secondary signal interface (11) that is used to receive the deformation simulative signal that is used for the reception simulating signal, the 3rd signaling interface (12) that is used to receive the shift simulation signal; Described first signaling interface (10), secondary signal interface (11) and the 3rd signaling interface (12) pass through independently separately, and A/D change-over circuit (6) connects DSP micro treatment module (2).

3. a kind of dynamic test card according to claim 2 is characterized in that: connect first signaling interface (10) and DSP micro treatment module (2) and be connected in the two-way A/D change-over circuit of secondary signal interface (11) and DSP micro treatment module (2) and be equipped with precision amplifier (61).

4. a kind of dynamic test card according to claim 2, it is characterized in that: described the 3rd signaling interface (12) is an integrated interface, includes the shift simulation signaling interface (121) that is connected by A/D change-over circuit (6) with DSP micro treatment module (2), the displacement digital signal interface (122) that is connected with DSP micro treatment module (2), is communicated with D/A translation interface (123), the digital signal output interface (124) that is connected with DSP micro treatment module (2) and the digital signal input interface (125) that D/A change-over circuit (7) is connected with DSP micro treatment module (2).

5. a kind of dynamic test card according to claim 1 is characterized in that: also be connected with on the described DSP micro treatment module (2) and extend out RAM storer (22).

6. a kind of dynamic test card according to claim 1 is characterized in that: described time-sequence control module (5) is the FPGA programmable gate array.