CN113437942A - Broadband power divider and broadband power amplifier - Google Patents
Broadband power divider and broadband power amplifier Download PDFInfo
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- H—ELECTRICITY
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
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Abstract
The invention relates to a broadband power divider and a broadband power amplifier, belongs to the technical field of communication, and particularly relates to a broadband power divider and a broadband power amplifier, which solve the problems of poor working efficiency caused by narrow bandwidth and cost consumption caused by large area of the conventional power divider. The broadband power divider comprises a first capacitor connected between an input port and a first output port of the broadband power divider; the second capacitor is connected in parallel with the first capacitor and is connected between the input port and the second output port of the broadband power divider; a first inductor connected between an input port of the broadband power divider and a first power supply voltage; and a second inductor and the isolation resistor connected in parallel and connected between the first output port and the second output port. The number of the inductors is reduced, the area of the power divider is further reduced, and the bandwidth of the power divider is effectively expanded.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a broadband power divider and a broadband power amplifier.
Background
With the continuous evolution of mobile communication technology, the requirements of communication systems on the transmission coefficient of the power divider and the linearity and efficiency of the power amplifier including the power divider are continuously increased. In order to meet the requirement, new structures are continuously proposed in the radio frequency IC industry to improve the transmission coefficient of the power divider and improve the linearity and efficiency of the power amplifier. Among them, the Doherty structure has high power back-off efficiency, good linearity and simple structure, and thus has attracted attention in the field of mobile communication.
Fig. 1 is a structural diagram of a conventional power divider, which has a narrow bandwidth, a large number of inductors, and a large area, resulting in high cost. Fig. 2 is a structural diagram of a conventional Doherty power amplifier manufactured by using a conventional power divider, which has a narrow bandwidth and a large area, so that the Doherty power amplifier has a narrow application range and a high cost, and is far from meeting the development requirements of the current mobile communication system.
Disclosure of Invention
In view of the foregoing analysis, embodiments of the present invention provide a wideband power divider and a wideband power amplifier, so as to solve the problems of poor working efficiency caused by a narrow bandwidth of the conventional power divider and cost consumption caused by a large area.
In one aspect, an embodiment of the present invention provides a wideband power divider, including a first capacitor, a second capacitor, a first inductor, a second inductor, and an isolation resistor, where the first capacitor is connected between an input port and a first output port of the wideband power divider; the second capacitor is connected in parallel with the first capacitor and is connected between the input port and the second output port of the broadband power divider; the first inductor is connected between the input port of the broadband power divider and a first power supply voltage; and the second inductor and the isolation resistor connected in parallel and connected between the first output port and the second output port.
The beneficial effects of the above technical scheme are as follows: according to the broadband power divider provided by the embodiment of the invention, the isolation resistor and the second inductor form the isolation network, and the first output port and the second output port of the broadband power divider are isolated, so that the number of the inductors is reduced, and further, compared with the traditional power divider, the area of the power divider is reduced. And when the bandwidth is between 4.0 and 7.0GHz, the transmission coefficient of the broadband power divider can be controlled within the range of-3.2 to-3.0. Therefore, compared with the traditional power divider, the bandwidth of the power divider is effectively expanded, and the application range of the power divider is further expanded.
Based on a further improvement of the above apparatus, when the broadband power divider is an equal-dividing power divider, the input port impedance, the first output port impedance, and the second output port impedance are all impedance values Z0; the capacitance value of the first capacitor is the same as the capacitance value of the second capacitor; the impedance value of the first inductor is half of the impedance value of the second inductor; and the isolation resistor has a resistance value of 2 xZ 0.
Based on the further improvement of the above device, when the wideband power divider is an unequal power divider, and the output power of the second output port is K of the output power of the first output port2At times, the input port impedance is at an impedance value of Z0, and the first output port impedance is at
And the second output port impedance is
The second inductor has a resistance value of L2 ═ 1+ K) L1, where L1 is the resistance value of the first inductor; the isolation resistor has a resistance value of R-Z0 (K)2+1)/K, wherein K is a normal number.
Based on the further improvement of the device, the first inductor is a microstrip line.
On the other hand, an embodiment of the present invention provides a broadband power amplifier, including a driving stage power amplifying circuit, the broadband power divider, a carrier power amplifying circuit, and a peak power amplifying circuit, where an input port of the broadband power divider is connected to an output end of a driving stage power output matching network of the driving stage power amplifying circuit, and an input end of the driving stage power amplifying circuit is an input end of the broadband power amplifier; a first output port of the broadband power divider is connected with an input end of a carrier power input matching network of the carrier power amplifying circuit; and a second output port of the broadband power divider is connected with an input end of a peak power input matching network of the peak power amplifying circuit, wherein an output end of the carrier power amplifying circuit is connected with an output end of the peak power amplifying circuit and serves as an output end of the broadband power amplifier.
The beneficial effects of the above technical scheme are as follows: in the broadband power amplifier according to the embodiment of the invention, the impedance transformation ratio of the carrier power input matching network, the peak power input matching network and the drive level power output matching network is reduced through the low characteristic impedance compact broadband power divider (i.e., the above-mentioned broadband power divider), the bandwidth of the power amplifier is effectively expanded, and the application range of the Doherty power amplifier is expanded.
Based on further improvement of the above device, the driver stage power amplifying circuit further includes a driver stage power input matching network and a driver stage power transistor, wherein an input end of the driver stage power input matching network is an input end of the driver stage power amplifying circuit, and an output end of the driver stage power input matching network is connected to a gate of the driver stage power transistor; the source electrode of the driving stage power transistor is grounded; and the input end of the driving stage power output matching network is connected to the drain electrode of the driving stage power transistor, and the output end of the driving stage power output matching network is the output end of the driving stage power amplifying circuit.
Based on the further improvement of the device, the carrier power amplifying circuit further comprises a carrier power transistor and a carrier power output matching network, wherein the input end of the carrier power input matching network is the input end of the carrier power amplifying circuit, and the output end of the carrier power input matching network is connected with the grid electrode of the carrier power transistor; the source electrode of the carrier power transistor is grounded; and the input end of the carrier power output matching network is connected with the drain electrode of the carrier power transistor, and the output end of the carrier power output matching network is the output end of the carrier power amplifying circuit.
Based on the further improvement of the device, the peak power amplifying circuit further comprises a peak power transistor and a peak power output matching network, wherein the input end of the peak power input matching network is the input end of the peak power amplifying circuit, and the output end of the peak power input matching network is connected with the grid electrode of the peak power transistor; the source of the peak power transistor is grounded; and the input end of the peak power output matching network is connected with the drain electrode of the peak power transistor, and the output end of the peak power output matching network is the output end of the peak power amplifying circuit.
Based on a further improvement of the above apparatus, the gate of the driver stage power transistor, the gate and the drain of the carrier power transistor, and the gate and the drain of the peak power transistor are connected to the respective power supply voltages via microstrip lines.
Based on the further improvement of the device, the driving stage power transistor and the carrier power transistor are AB type power amplifiers; and the peak power transistor is a class C power amplifier.
Compared with the prior art, the invention can realize at least one of the following beneficial effects:
1. the isolation resistor and the second inductor form an isolation network, and the first output port and the second output port of the broadband power divider are isolated, so that the number of the inductors is reduced, and the area of the power divider is reduced compared with that of a traditional power divider. And when the bandwidth is between 4.0 and 7.0GHz, the transmission coefficient of the broadband power divider can be controlled within the range of-3.2 to-3.0. Therefore, compared with the traditional power divider, the bandwidth of the power divider is effectively expanded, and the application range of the power divider is further expanded.
2. By the low-characteristic-impedance compact-type broadband power divider (namely, the broadband power divider), the impedance transformation ratio of the carrier power input matching network, the peak power input matching network and the drive-level power output matching network is reduced, the bandwidth of the power amplifier is effectively expanded, and the application range of the Doherty power amplifier is expanded.
3. By adopting the passive element and not using a microstrip line, the area of the final layout is reduced, and the cost is saved.
4. By the driving stage power amplification circuit, the overall Doherty power amplifier can obtain larger output power under smaller input power.
In the invention, the technical schemes can be combined with each other to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
Fig. 1 is a structural diagram of a conventional power divider.
Fig. 2 is a block diagram of a conventional Doherty power amplifier made with a conventional power divider.
Fig. 3 is a block diagram of a wideband power divider according to an embodiment of the present invention.
Fig. 4 is a graph comparing transmission coefficients of a wideband power divider according to an embodiment of the present invention and a conventional power divider with frequency.
Fig. 5 is a block diagram of a wideband power amplifier according to an embodiment of the present invention.
Fig. 6 is a graph comparing back-off point efficiency with frequency for a wideband power amplifier and a conventional Doherty power amplifier according to an embodiment of the present invention.
Detailed Description
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate preferred embodiments of the invention and together with the description, serve to explain the principles of the invention and not to limit the scope of the invention.
The invention discloses a broadband power divider. Referring to fig. 3, the broadband power divider includes a first capacitor, a second capacitor, a first inductor, a second inductor, and an isolation resistor. The first capacitor is connected between the input port and the first output port of the broadband power divider. The second capacitor is connected in parallel with the first capacitor and is connected between the input port and the second output port of the broadband power divider. The first inductor is connected between the input port of the wideband power divider and a first supply voltage. And a second inductor and an isolation resistor connected in parallel and connected between the first output port and the second output port.
Referring to fig. 4, the abscissa is frequency (GHz) and the ordinate is the transmission coefficient of the power divider (taking an equal power divider as an example), the closer the transmission coefficient is to-3, the better. The transmission coefficient of the conventional power divider (refer to the square curve 402 in fig. 4) varies in the range of-3.97 to-3.25 when the bandwidth is between 4.0 and 7.0 GHz. However, the transmission coefficient of the wideband power divider according to the embodiment of the present invention (refer to curve 404 in fig. 4) can be controlled to vary from-3.2 to-3.0 when the bandwidth is between 4.0 and 7.0 GHz. Therefore, compared with the traditional power divider, the bandwidth of the power divider is effectively expanded.
Compared with the prior art, the broadband power divider provided by the embodiment is a low-characteristic-impedance compact broadband power divider, the isolation resistor and the second inductor form an isolation network, the first output port and the second output port of the broadband power divider are isolated, the number of inductors is reduced, and further compared with a traditional power divider, the area of the power divider is reduced. Referring to fig. 4, the transmission coefficient of the broadband power divider can be controlled in the range of-3.2 to-3.0 when the bandwidth is between 4.0 and 7.0 GHz. Therefore, compared with the traditional power divider, the bandwidth of the power divider is effectively expanded, and the application range of the power divider is further expanded.
Hereinafter, the broadband power divider will be described in detail with reference to fig. 3.
Referring to fig. 3, the broadband power divider includes a first capacitor, a second capacitor, a first inductor, a second inductor, and an isolation resistor. The first capacitor is connected between the input port and the first output port of the broadband power divider. The second capacitor is connected in parallel with the first capacitor and is connected between the input port and the second output port of the broadband power divider. The first inductor is connected between the input port of the broadband power divider and a first power supply voltage, and specifically, the first inductor is a microstrip line. And a second inductor and an isolation resistor connected in parallel and connected between the first output port and the second output port. The broadband power divider can be set as an equal power divider and a non-equal power divider. Hereinafter, the two power dividers will be described in detail, respectively.
When the broadband power divider is an equal-division power divider, the impedance of the input port, the impedance of the first output port and the impedance of the second output port are all impedance values Z0; the capacitance value C1 of the first capacitor is the same as the capacitance value C2 of the second capacitor; the impedance value of the first inductor L1 is half the impedance value of the second inductor L2; and the isolation resistor has a resistance value R of 2 × Z0. When the broadband power divider is a non-equal power divider, and the output power of the second output port is K of the output power of the first output port2At times, the input port impedance is at an impedance value of Z0, and the first output port impedance is at
And a second output port impedance of
The second inductor has a resistance value of L2 ═ 1+ K) L1, where L1 is the resistance value of the first inductor; the isolation resistor has a resistance value of R-Z0 (K)2+1)/K, wherein K is a normal number.
In a specific example, as shown in fig. 3, a schematic diagram of a compact wideband power divider designed in the present invention is shown, wherein the inductance L1 is given by the following formula:
for the power divider with equal power distribution, the impedances of the port 1, the port 2 and the port 3 are Z0, and then L11-L12-L2, C1-C2, and R-2Z 0, where L11 and C1, L12 and C2 complete the impedance transformation from 2Z0 to Z0 in the form of parallel inductance and series capacitance. For a non-equal division power divider, it is assumed that the output power of the second output port is K of the first output port2The impedance of the input port is Z0, and the impedance of the first output port is Z0
The impedance of the second output port is
Then, R ═ Z0 (K)2+1)/K, L2 ═ 1+ K) L1 where L11 and C1 complete Z0 (K) in the form of a parallel inductance, series capacitance2+1) to Z2, L12 and C2 complete Z0 (K) in the form of a parallel inductor, series capacitor2+1)/K2Impedance transformation to Z3. With Z0 and operating frequency determination, L11, L12, C1, C2 have unique values.
In another embodiment of the invention, a wideband power amplifier is disclosed. Referring to fig. 5, the wideband power amplifier includes a driving stage power amplifying circuit, the wideband power divider described in the above embodiment, a carrier power amplifying circuit, and a peak power amplifying circuit. The input port of the broadband power divider is connected with the output end of a driving stage power output matching network of a driving stage power amplification circuit, wherein the input end of the driving stage power amplification circuit is the input end of a broadband power amplifier. And a first output port of the broadband power divider is connected with an input end of a carrier power input matching network of the carrier power amplifying circuit. And the second output port of the broadband power divider is connected with the input end of a peak power input matching network of the peak power amplifying circuit, wherein the output end of the carrier power amplifying circuit is connected with the output end of the peak power amplifying circuit and serves as the output end of the broadband power amplifier. The gate of the driver-stage power transistor, the gate and the drain of the carrier-power transistor, and the gate and the drain of the peak-power transistor are connected to the respective power supply voltages via microstrip lines. The drive stage power transistor and the carrier power transistor are AB type power amplifiers, wherein the AB type power amplifiers can ensure the efficiency and the linearity; and the peak power transistor is a class C power amplifier, wherein the class C power amplifier can be turned on with delay.
Hereinafter, the driver-stage power amplifying circuit, the wideband power divider, the carrier power amplifying circuit, and the peak power amplifying circuit according to the above embodiments will be described in detail with reference to fig. 5.
Referring to fig. 3 and 5, the broadband power divider includes a first capacitor, a second capacitor, a first inductor, a second inductor, and an isolation resistor. The first capacitor is connected between the input port and the first output port of the broadband power divider. The second capacitor is connected in parallel with the first capacitor and is connected between the input port and the second output port of the broadband power divider. The first microstrip line is connected between the input port of the wideband power divider and a first power supply voltage Vd1 (e.g., 28V), that is, the first inductor is connected between the input port of the wideband power divider and a power supply voltage Vd1 (e.g., 28V). Specifically, the first inductor is a microstrip line. The second inductor and the isolation resistor are connected in parallel and between the first output port and the second output port. The broadband power divider can be set as an equal power divider and a non-equal power divider.
Referring to fig. 5, the driver stage power amplification circuit includes a driver stage power input matching network, a driver stage power output matching network, and a driver stage power transistor. The input end of the driving-stage power input matching network is the input end of the driving-stage power amplifying circuit, and the output end of the driving-stage power input matching network is connected to the grid electrode of the driving-stage power transistor; the source electrode of the driving stage power transistor is grounded; and the input end of the driving-stage power output matching network is connected to the drain electrode of the driving-stage power transistor, and the output end of the driving-stage power output matching network is the output end of the driving-stage power amplifying circuit.
Referring to fig. 5, the driver stage power input matching network includes a capacitor C21, a capacitor C22, and a capacitor C23, an inductor L21, an inductor L22, and an inductor L23 (also referred to as a second microstrip line). Specifically, one capacitor C21 and two inductors L21 and L22 are connected in series in this order, the node between the capacitor C21 and the inductor L21 is grounded via one capacitor C22, and the node between the two inductors L21 and L22 is grounded via the other capacitor C23. The other end of the capacitor C21 of the series connection of a capacitor C21 and two inductors L21 and L22 receives the signal RFin, where the other end of the inductor L22 is connected to the gate of the driver stage power transistor. The second microstrip line is connected between the gate of the driver stage power transistor and the second supply voltage, i.e. the inductor L23 is connected between the gate of the driver stage power transistor and the supply voltage Vg1 (e.g., -2.39V). For example, in an equal power divider, the impedance value of the driver stage power input matching network is matched to 50 Ω.
Referring to fig. 5, the driver stage power output matching network includes one capacitor C24, two inductors L24 and L25. Specifically, two inductors L24 and L25 are connected in series, and the node between the two inductors L24 and L25 is grounded via the inductor C24. The other end of the inductor L24 of the series-connected inductors L24 and L25 is connected to the drain of the driver stage power transistor, wherein the other end of the inductor L25 is connected to the input port of the broadband power divider. For example, in the equal power divider, the impedance value of the driver-stage power output matching network is matched to be in the range of 5 Ω to 25 Ω, and preferably, the impedance value of the driver-stage power output matching network is matched to be 10 Ω.
Referring to fig. 5, the carrier power amplifying circuit includes a carrier power input matching network, a carrier power transistor, and a carrier power output matching network. The input end of the carrier power input matching network is the input end of the carrier power amplifying circuit, and the output end of the carrier power input matching network is connected with the grid electrode of the carrier power transistor; the source electrode of the carrier power transistor is grounded; and the input end of the carrier power output matching network is connected with the drain electrode of the carrier power transistor, and the output end of the carrier power output matching network is the output end of the carrier power amplifying circuit.
The carrier power input matching network includes a capacitor C31 and a capacitor C32, an inductor L31, and an inductor L32 (also referred to as a third microstrip line). The capacitor C31 is connected in series with the inductor L31, and the node between the capacitor C31 and the inductor L31 is grounded via the capacitor C32. The other end of the capacitor C31 and the capacitor C31 in the inductor L31 connected in series is connected to the first output port of the wideband power divider, wherein the other end of the inductor L31 is connected to the gate of the carrier power transistor. The third microstrip line is connected between the gate of the carrier power transistor and the third supply voltage, i.e. the inductor L32 is connected between the gate of the carrier power transistor and the supply voltage Vg2 (e.g., -2.39V). For example, in the equal power divider, the impedance value of the carrier power input matching network is matched to be in the range of 5 Ω to 25 Ω, and preferably, the impedance value of the carrier power input matching network is matched to be 10 Ω.
Referring to fig. 5, the carrier power output matching network includes an inductor L33 (also called a fourth microstrip line), an inductor L34, a capacitor C33, and a capacitor C34. Capacitors C33 and C34 are connected in series, and the node between capacitors C33 and C34 is connected to ground via inductor L34. The other end of the capacitor C33 in the series of the capacitor C33 and the capacitor C34 is connected with the drain of the carrier power transistor, wherein the other end of the capacitor C34 is the output of the carrier power amplifying circuit. The fourth microstrip line is connected between the drain of the carrier power transistor and a fourth supply voltage, i.e., the inductor L33 is connected between the drain of the carrier power transistor and a supply voltage Vd2 (e.g., 28V). For example, in an equal power divider, the impedance value of the carrier power output matching network is matched to 100 Ω.
Referring to fig. 5, the peak power amplifying circuit further includes a peak power input matching network, a peak power transistor, and a peak power output matching network. Specifically, the input end of the peak power input matching network is the input end of the peak power amplifying circuit, and the output end of the peak power input matching network is connected with the grid electrode of the peak power transistor; the source electrode of the peak power transistor is grounded; and the input end of the peak power output matching network is connected with the drain electrode of the peak power transistor, and the output end of the peak power output matching network is the output end of the peak power amplifying circuit.
Referring to fig. 5, the peak power input matching network includes a capacitor C41 and an inductor L41 (also referred to as a fifth microstrip line). Specifically, one end of the capacitor C41 is connected to the second output port of the broadband power divider, and the other end is connected to the gate of the peak power transistor. The fifth microstrip line is connected between the gate of the peak power transistor and the fifth supply voltage, i.e. the inductor L41 is connected between the gate of the driver stage power transistor and the supply voltage Vg3 (e.g., -5V). For example, in the equal power divider, the impedance value of the peak power input matching network is matched to be in the range of 5 Ω to 25 Ω, and preferably, the impedance value of the carrier power input matching network is matched to be 10 Ω.
Referring to fig. 5, the peak power output matching network includes a capacitor C42, an inductor L42 (also referred to as a sixth microstrip line), and an inductor L43. One end of the capacitor C42 is connected to the drain of the peak power transistor, the other end is the output of the peak power amplifier circuit, and the output of the peak power amplifier circuit is grounded via the inductor L43. The sixth microstrip line is connected between the drain of the peak power transistor and a sixth supply voltage, i.e. the inductor L42 is connected between the drain of the peak power transistor and the supply voltage Vd3 (e.g. 28V). For example, in an equal power divider, the impedance value of the peak power output matching network is matched to 100 Ω.
Hereinafter, referring to fig. 5 and 6, a detailed description will be made of a broadband power amplifier by way of specific examples.
The structure diagram of the conventional Doherty power amplifier has a narrow bandwidth, which results in a poor application range of the Doherty power amplifier, and the conventional Doherty power amplifier has a large area, which results in a high cost, and is far from meeting the development requirements of the current mobile communication system. Therefore, the application provides a compact broadband Doherty power amplifier, which reduces the impedance transformation ratio of a carrier power input matching network, a peak power input matching network and a driving-level power output matching network through a low-characteristic-impedance compact broadband power divider, effectively expands the bandwidth of the Doherty power amplifier, has a simple structure, is easy to implement, has a deeper backoff interval, and simultaneously improves the amplification efficiency of input signals.
Referring to fig. 5, the compact broadband power amplifier includes: the device comprises a driving stage power amplifying circuit, a low characteristic impedance compact broadband power divider, a carrier power amplifying circuit and a peak power amplifying circuit. The input end of the drive-level power amplifier serves as the input end of the integral power amplifier, the output end of the drive-level power amplifier is connected with the input port of the low-characteristic-impedance compact-type broadband power divider, the first output end of the low-characteristic-impedance compact-type broadband power divider is connected with the input end of the carrier power amplification circuit, the second output end of the low-characteristic-impedance compact-type broadband power divider is connected with the input end of the peak power amplification circuit, and the output end of the carrier power amplifier is connected with the output end of the peak power amplifier. In the present embodiment, Vd1 to Vd3 are manufacturer's data manual recommendations, for example, 28V. For example, Vg1 to Vg3 are-2.39, -5V, respectively.
Specifically, the function of the driving stage power amplifying circuit is to amplify the power signal input from the input port of the driving stage power amplifying circuit and output the amplified power signal to the input port of the low-characteristic-impedance compact broadband power divider. The driving stage power amplification circuit comprises a driving stage power input matching network, a driving stage power transistor and a driving stage power output matching network; the input end of the driving stage power input matching network is the input end of the driving stage power amplifying circuit, the output end of the driving stage power input matching network is connected with the grid electrode of the driving stage power transistor, the source electrode of the driving stage power transistor is grounded, the drain electrode of the driving stage power transistor is connected with the input end of the driving stage power output matching network, and the output end of the driving stage power output matching network is the output end of the driving stage power amplifying circuit.
Specifically, the driver stage power output matching network completes the matching of the load impedance of the driver stage transistor to 10 Ω, and the load impedance is obtained by the ADS software performing loadPull on the driver stage transistor; the driving stage power input matching network is used for completing the matching of the source impedance of the driving stage transistor to 50 omega, and the source impedance is obtained by performing SourcPull on the driving stage transistor by ADS software.
The low-characteristic-impedance compact broadband power divider structure comprises a first capacitor C1, a second capacitor C2, a first inductor L1, a second inductor L2 and an isolation resistor R.
Specifically, the characteristic impedance, the input port impedance, the first output port impedance and the second output port impedance of the low characteristic impedance compact broadband power divider are all 10 ohms.
When a power signal is input to the input end of the driving-stage power amplification circuit, the driving-stage power amplification circuit amplifies the power signal, and the power signal is output through the output end of the driving-stage power amplification circuit and transmitted to the input end of the low-characteristic-impedance compact broadband power divider; when a first power signal is input to the input end of the low-characteristic-impedance compact broadband power divider, the carrier power amplification circuit completes amplification of the first power signal; when a second power signal is input to the input end of the low-characteristic-impedance compact-type broadband power divider, when an input signal of the peak power amplifying circuit reaches a starting threshold value, the carrier power amplifying circuit and the peak power amplifying circuit jointly realize amplification of the second power signal. Specifically, for a power signal input at an input end of the first power divider, when the power signal is smaller than a turn-on threshold of a peak power transistor in the peak power amplifying circuit, the power signal is the first power signal and is also a low-power signal; when the power signal input to the input end of the first power divider is greater than the opening threshold of the peak power transistor in the peak power amplifying circuit, the power signal is the second power signal and is also a high power signal.
Compared with the prior art, the compact broadband Doherty power amplifier provided by the embodiment reduces the impedance transformation ratio of the carrier power input matching network, the peak power input matching network and the drive-level power output matching network through the low-characteristic-impedance compact broadband power divider, effectively expands the bandwidth of the Doherty power amplifier, and expands the application range of the Doherty power amplifier.
The peak power amplifying circuit comprises a peak power input matching network, a peak power transistor and a peak power output matching network; the input end of the peak power input matching network is the input end of the peak power amplifying circuit, the output end of the peak power input matching network is connected with the grid electrode of the peak power transistor, the source electrode of the peak power transistor is grounded, the drain electrode of the peak power transistor is connected with the input end of the peak power output matching network, and the output end of the peak power output matching network is the output end of the peak power amplifying circuit.
The peak power amplifying circuit is composed of a peak power input matching network, a peak power transistor and a peak power output matching network. The input end of the peak power input matching network is used as the input end of the peak power amplifier circuit and is connected with the second output port of the low-characteristic-impedance compact broadband power divider. The peak power transistor is biased in a C type and is a C type power amplifier, and the gate width of the peak power transistor is the same as that of the carrier power transistor in the carrier power amplifying circuit. The peak power input matching network is used for completing the matching of the source impedance of the peak power transistor to 10 omega, and the source impedance is obtained by the Source Pull function of ADS software; the peak power output matching network is used for completing the matching of the load impedance of the peak power transistor to 100 omega, and the load impedance is obtained by the Loadpull function of ADS software.
The carrier power amplifying circuit comprises a carrier power input matching network, a carrier power transistor and a carrier power output matching network; the input end of the carrier power input matching network is the input end of the carrier power amplifying circuit, the output end of the carrier power input matching network is connected with the grid electrode of the carrier power transistor, the source electrode of the carrier power transistor is grounded, the drain electrode of the carrier power transistor is connected with the input end of the carrier power output matching network, and the output end of the carrier power output matching network is the output end of the carrier power amplifying circuit.
Specifically, the carrier power amplification circuit is composed of a carrier power input matching network, a carrier power transistor and a carrier power output matching network. The input end of the carrier power input matching network is used as the input end of the carrier power amplifying circuit and is connected with the first output port of the first power divider. The carrier power transistor is biased in class AB and is a class AB power amplifier. The carrier power input matching network is used for completing the matching of the source impedance of the carrier power transistor to 10 omega, and the source impedance is obtained by the Source Pull function of ADS software; the carrier power output matching network is used for completing the matching of the load impedance of the carrier power transistor to 100 omega, and the load impedance is obtained through the Loadpull function of ADS software. Wherein, the carrier power output matching network can also realize that: when the peak power transistor in the peak power amplifying circuit is not turned on, the carrier power amplifying circuit is caused to saturate in advance at a 3dB back-off of its own saturation power.
Fig. 6 is a graph comparing back-off point efficiency with frequency for the compact wideband Doherty power amplifier of the present application and the conventional Doherty power amplifier, where the abscissa is frequency in GHz and the ordinate is Power Added Efficiency (PAE) in%, the power amplifier operates at a frequency of 4.7-6.5 GHz. Compared with the traditional Doherty power amplifier, the Doherty power amplifier has the advantages that the broadband efficiency is obviously improved, and the Doherty power amplifier has wide application prospect in the background of the development of the current communication system.
Compared with the prior art, the invention can realize at least one of the following beneficial effects:
1. the isolation resistor and the second inductor form an isolation network, and the first output port and the second output port of the broadband power divider are isolated, so that the number of the inductors is reduced, and the area of the power divider is reduced compared with that of a traditional power divider. And when the bandwidth is between 4.0 and 7.0GHz, the transmission coefficient of the broadband power divider can be controlled within the range of-3.2 to-3.0. Therefore, compared with the traditional power divider, the bandwidth of the power divider is effectively expanded, and the application range of the power divider is further expanded.
2. By the low-characteristic-impedance compact-type broadband power divider (namely, the broadband power divider), the impedance transformation ratio of the carrier power input matching network, the peak power input matching network and the drive-level power output matching network is reduced, the bandwidth of the power amplifier is effectively expanded, and the application range of the Doherty power amplifier is expanded.
3. By adopting the passive element and not using a microstrip line, the area of the final layout is reduced, and the cost is saved.
4. By the driving stage power amplification circuit, the overall Doherty power amplifier can obtain larger output power under smaller input power.
Those skilled in the art will appreciate that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program, which is stored in a computer readable storage medium, to instruct related hardware. The computer readable storage medium is a magnetic disk, an optical disk, a read-only memory or a random access memory.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.
Claims (10)
1. A broadband power divider is characterized by comprising a first capacitor, a second capacitor, a first inductor, a second inductor and an isolation resistor, wherein,
the first capacitor is connected between the input port and the first output port of the broadband power divider;
the second capacitor is connected in parallel with the first capacitor and is connected between the input port and the second output port of the broadband power divider;
the first inductor is connected between the input port of the broadband power divider and a first power supply voltage; and
the second inductor and the isolation resistor are connected in parallel and connected between the first output port and the second output port.
2. The wideband power divider of claim 1, wherein when the wideband power divider is an equal division power divider,
the input port impedance, the first output port impedance, and the second output port impedance are all impedance values Z0;
the capacitance value of the first capacitor is the same as the capacitance value of the second capacitor;
the impedance value of the first inductor is half of the impedance value of the second inductor; and
the isolation resistor has a resistance value of 2 × Z0.
3. The wideband power divider of claim 1,
when the broadband power divider is an unequal power divider, and the output power of the second output port is K of the output power of the first output port2When the time is doubled, the number of the screws is doubled,
the input port impedance is an impedance value Z0, and the first output port impedance is
And the second output port impedance is
The second inductor has a resistance value of L2 ═ 1+ K) L1, where L1 is the resistance value of the first inductor;
the isolation resistor has a resistance value of R-Z0 (K)2+1)/K, wherein K is a normal number.
4. The broadband power divider of claim 1, wherein the first inductor is a microstrip line.
5. A wideband power amplifier comprising a driver stage power amplification circuit, a wideband power divider according to any one of claims 1 to 4, a carrier power amplification circuit and a peak power amplification circuit, wherein,
an input port of the broadband power divider is connected with an output end of a driving stage power output matching network of the driving stage power amplifying circuit, wherein an input end of the driving stage power amplifying circuit is an input end of the broadband power amplifier;
a first output port of the broadband power divider is connected with an input end of a carrier power input matching network of the carrier power amplifying circuit; and
and a second output port of the broadband power divider is connected with an input end of a peak power input matching network of the peak power amplifying circuit, wherein an output end of the carrier power amplifying circuit is connected with an output end of the peak power amplifying circuit and serves as an output end of the broadband power amplifier.
6. The wideband power amplifier of claim 5, where the driver stage power amplification circuit further comprises a driver stage power input matching network and a driver stage power transistor, where,
the input end of the driving stage power input matching network is the input end of the driving stage power amplifying circuit, and the output end of the driving stage power input matching network is connected to the grid electrode of the driving stage power transistor;
the source electrode of the driving stage power transistor is grounded; and
the input end of the driving stage power output matching network is connected to the drain electrode of the driving stage power transistor, and the output end of the driving stage power output matching network is the output end of the driving stage power amplifying circuit.
7. The wideband power amplifier of claim 5, where the carrier power amplification circuit further comprises a carrier power transistor and a carrier power output matching network, where,
the input end of the carrier power input matching network is the input end of the carrier power amplifying circuit, and the output end of the carrier power input matching network is connected with the grid electrode of the carrier power transistor;
the source electrode of the carrier power transistor is grounded; and
the input end of the carrier power output matching network is connected with the drain electrode of the carrier power transistor, and the output end of the carrier power output matching network is the output end of the carrier power amplifying circuit.
8. The wideband power amplifier of claim 5, where the peak power amplification circuit further comprises a peak power transistor and a peak power output matching network, where,
the input end of the peak power input matching network is the input end of the peak power amplifying circuit, and the output end of the peak power input matching network is connected with the grid electrode of the peak power transistor;
the source of the peak power transistor is grounded; and
the input end of the peak power output matching network is connected with the drain electrode of the peak power transistor, and the output end of the peak power output matching network is the output end of the peak power amplifying circuit.
9. The wideband power amplifier according to any of claims 6 to 8, where the gate of the driver stage power transistor, the gate and drain of the carrier power transistor and the gate and drain of the peak power transistor are connected to the respective supply voltages via microstrip lines.
10. The wideband power amplifier according to any of claims 6 to 8,
the driving stage power transistor and the carrier power transistor are AB type power amplifiers; and
the peak power transistor is a class C power amplifier.
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