CN114826164A - Doherty power amplifier based on improved interstage matching - Google Patents
Doherty power amplifier based on improved interstage matching Download PDFInfo
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/04—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers
- H03F1/06—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers to raise the efficiency of amplifying modulated radio frequency waves; to raise the efficiency of amplifiers acting also as modulators
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Abstract
The invention relates to a Doherty power amplifier based on improved interstage matching, belongs to the technical field of radio frequency power amplifiers, and solves the problems of large amplifier size and low working efficiency caused by separation of a driving output matching network and a power divider of the conventional Doherty power amplifier. The driving power amplifying circuit comprises a driving power transistor and an improved interstage matching network, and the improved interstage matching network is connected to the drain electrode of the driving power transistor; the carrier power amplifying circuit is connected with one output end of the improved interstage matching network and comprises a carrier output matching network; and the peak power amplifying circuit is connected to the other output end of the improved interstage matching network and comprises a peak output matching network and a pi-shaped microstrip compensation line. A compact layout is achieved, the size of the whole amplifier is reduced and the working efficiency is improved.
Description
Technical Field
The invention relates to the technical field of radio frequency power amplifiers, in particular to a Doherty power amplifier based on improved interstage matching.
Background
Currently, 5G technology has become a hot spot for countless research workers, however, the implementation of 5G technology requires an excessively hard hardware infrastructure. A small base station is one of the hardware infrastructures implementing the 5G technology. The radio frequency power amplifier is a core component in a 5G small base station and plays an important role in the small base station. In order to find a radio frequency power amplifier architecture capable of meeting the current requirements of the 5G small base station, a radio frequency power amplifier based on a Doherty architecture gradually appears in the visual field of people. The power amplifier with the framework has higher efficiency and better linearity at a backspacing working point, so that the Doherty power amplifier becomes a hot spot of current research.
The conventional Doherty power amplifier separates the driving output matching network from the power divider, which results in a large size, low working efficiency and resource waste of the Doherty power amplifier, so that a compact Doherty power amplifier with high gain and high efficiency based on the integrated output matching network and the power divider is needed to be provided.
Disclosure of Invention
In view of the foregoing analysis, embodiments of the present invention provide an improved interstage matching-based Doherty power amplifier to solve the problem of a conventional Doherty power amplifier that the size of the amplifier is large and the operating efficiency is low due to the separation of the driving output matching network and the power divider.
In one aspect, an embodiment of the present invention provides an improved interstage matching-based Doherty power amplifier, including:
a drive power amplification circuit comprising a drive power transistor and an improved interstage matching network connected at a drain of the drive power transistor;
a carrier power amplifier circuit connected to an output of the improved interstage matching network, the carrier power amplifier circuit comprising a carrier output matching network;
and the peak power amplifying circuit is connected to the other output end of the improved interstage matching network and comprises a peak output matching network and a pi-type microstrip compensation line.
Further, when a first power signal is input to the driving power amplification circuit, the carrier output matching network matches the load impedance of the carrier power transistor to the combining point impedance, the pi-type microstrip compensation line matches the load impedance of the peak power transistor to infinity, and the carrier power amplification circuit amplifies the first power signal;
when a second power signal is input to the driving power amplification circuit, the carrier output matching network matches the load impedance of the carrier power transistor to 150 ohms, the peak output matching network matches the load impedance of the peak power transistor to 75 ohms, and the carrier power amplification circuit and the peak power amplification circuit jointly achieve amplification of the second power signal.
Further, the improved interstage matching network comprises a first microstrip line, a first capacitor, a second capacitor, a first resistor, a first inductor and a second inductor;
one end of the first microstrip line is an input end of the improved interstage matching network and is connected with a drain electrode of the driving power transistor, the other end of the first microstrip line is simultaneously connected with one end of a first capacitor and one end of a second capacitor, the other end of the first capacitor is an output end of the improved interstage matching network, the other end of the second capacitor is the other output end of the improved interstage matching network, the first inductor is connected between one output end of the improved interstage matching network and the ground, the second inductor is connected between the other output end of the improved interstage matching network and the ground, and the first resistor is connected between one output end of the improved interstage matching network and the other output end in series.
Further, the carrier power amplifying circuit further comprises a carrier input matching network connected between one output terminal of the improved interstage matching network and the carrier power transistor;
the carrier input matching network comprises a third inductor, a third capacitor and a fourth capacitor; one end of the third inductor is connected with one end of the third capacitor and one end of the fourth capacitor at the same time, the other end of the third inductor is connected with the grid electrode of the carrier power transistor, the other end of the third capacitor is the input end of the carrier input matching network, and the other end of the fourth capacitor is grounded.
Further, the carrier output matching network is connected between the carrier power transistor and the combining point and comprises a second microstrip line, a fifth capacitor and a sixth capacitor, one end of the second microstrip line is connected with one end of the fifth capacitor, the other end of the second microstrip line is the output end of the carrier output matching network, the other end of the fifth capacitor is connected with the drain electrode of the carrier power transistor, and the sixth capacitor is connected between the output end of the carrier output matching network and the ground.
Furthermore, the carrier power amplifying circuit also comprises a pi-type phase shifting network connected between one output end of the improved interstage matching network and the carrier input matching network;
the pi-type phase compensation network comprises a seventh capacitor, a fourth inductor and a fifth inductor, wherein the fourth inductor and the fifth inductor are respectively connected to two ends of the seventh capacitor; and the two ends of the seventh capacitor are respectively an input end and an output end of the pi-type phase-shifting network.
Further, the peak power amplifying circuit further comprises a peak input matching network;
the peak value input matching network comprises a third microstrip line, an eighth capacitor and a ninth capacitor, one end of the third microstrip line is simultaneously connected with one end of the eighth capacitor and one end of the ninth capacitor, the other end of the eighth capacitor is an input end of the peak value input matching network, the other end of the ninth capacitor is grounded, and the other end of the third microstrip line is an output end of the peak value input matching network.
Further, the peak output matching network comprises a fourth microstrip line, a tenth capacitor and an eleventh capacitor, one end of the fourth microstrip line is connected with one end of the tenth capacitor, the other end of the fourth microstrip line is the output end of the peak output matching network, the other end of the tenth capacitor is the input end of the peak output matching network, and the eleventh capacitor is connected in series between the output end of the peak output matching network and the ground.
Furthermore, the pi-type microstrip compensation line comprises a fifth microstrip line and a twelfth capacitor, and shares an eleventh capacitor with the peak output matching network; the eleventh capacitor and the twelfth capacitor are respectively connected to two ends of a fifth microstrip line, and the two ends of the fifth microstrip line are respectively an input end and an output end of the pi-type microstrip compensation line.
Further, the driving power transistor, the carrier power transistor and the peak power transistor are all GaN HEMT transistors.
Compared with the prior art, the invention can realize at least one of the following beneficial effects:
1. a Doherty power amplifier based on improved interstage matching provides driving power for a carrier power amplifying circuit and a peak power amplifying circuit through a driving power amplifying circuit, and the gain of the whole circuit is improved. The improved interstage matching network has the functions of driving the output matching network and the power divider at the same time, the problem that the size of the Doherty power amplifier is large due to the fact that the existing Doherty power amplifier separates the driving output matching network from the power divider is solved, the size of the Doherty power amplifier is reduced, and the compactness of the whole power amplifier is improved. Meanwhile, through the mutual matching of the carrier output matching network, the peak output matching network and the pi-shaped microstrip compensation line, the double-impedance point matching of the carrier power amplifier is realized, and the working efficiency of the carrier power amplifier working at a backspacing power point and a saturation working point is improved. When a low-power signal is input, the carrier output matching network matches the load impedance of the carrier power amplifier to the combining point impedance, and when a high-power signal is input, the carrier output matching network and the peak output matching network are matched with each other, so that the effect of matching the parallel load impedance of the carrier power amplifying circuit and the peak power amplifying circuit to the combining point impedance is realized, the matching network is not needed after the combining point is set, the size of the whole amplifier is reduced, and the compact layout is realized.
2. The pi-type phase-shifting network is formed by connecting a capacitor and two grounding inductors, wherein the two grounding inductors have the same value. The pi-type phase-shifting network in the carrier power amplifying circuit is used for compensating the phase difference between the carrier power amplifying circuit and the peak power amplifying circuit, so that the whole amplifier circuit is more stable, and the gain of the whole circuit is improved.
3. The output power of the carrier power amplifying circuit is ensured not to leak when the peak power amplifier is not started through the pi-shaped microstrip compensation line, namely, when the carrier power amplifier works at a backspacing point, the load impedance of the peak power transistor is in a high-impedance state. Meanwhile, the pi-type microstrip compensation line and the peak output matching network share the capacitor C13, so that the circuit size can be reduced, and the cost is saved.
In the invention, the technical schemes can be combined with each other to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
Fig. 1 is a schematic diagram of the overall structure of a Doherty power amplifier based on improved interstage matching in one embodiment;
fig. 2 is a schematic diagram of the internal structure of the Doherty power amplifier based on the improved interstage matching in one embodiment.
Detailed Description
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate preferred embodiments of the invention and together with the description, serve to explain the principles of the invention and not to limit the scope of the invention.
The conventional Doherty power amplifier separates a driving output matching network from a power divider, so that the Doherty power amplifier has large size and wastes resources. The present application therefore proposes a Doherty power amplifier based on improved interstage matching. The Doherty power amplifier comprises a driving power amplifying circuit, a carrier power amplifying circuit and a peak power amplifying circuit, wherein the driving power amplifying circuit comprises a driving power transistor and an improved interstage matching network, the improved interstage matching network has the functions of driving an output matching network and a power divider at the same time, the problem that the size of the Doherty power amplifier is large due to the fact that the driving output matching network and the power divider are separated by the existing Doherty power amplifier is solved, the size of the Doherty power amplifier is reduced, and the compactness of the whole power amplifier is improved.
A specific embodiment of the present invention discloses a Doherty power amplifier based on improved interstage matching, as shown in fig. 1, including: the driving power amplifying circuit comprises a driving power transistor and an improved interstage matching network, and the improved interstage matching network is connected to the drain electrode of the driving power transistor;
the carrier power amplifying circuit is connected with one output end of the improved interstage matching network and comprises a carrier output matching network;
and the peak power amplifying circuit is connected to the other output end of the improved interstage matching network and comprises a peak output matching network and a pi-shaped microstrip compensation line.
When a first power signal is input to the drive power amplification circuit, the carrier output matching network matches the load impedance of the carrier power transistor to the combining point impedance, the pi-type microstrip compensation line matches the load impedance of the peak power transistor to infinity, and the carrier power amplification circuit amplifies the first power signal;
when a second power signal is input to the driving power amplification circuit, the load impedance of the carrier power transistor is matched to 150 ohms by the carrier output matching network, the load impedance of the peak power transistor is matched to 75 ohms by the peak output matching network, and the amplification of the second power signal is realized by the carrier power amplification circuit and the peak power amplification circuit together.
In implementation, the driving power transistor, the carrier power transistor and the peak power transistor are all GaN HEMT transistors, wherein the carrier power transistor works in AB class, and the peak power transistor works in C class.
Specifically, the power of the first power signal is lower than the power of the second power signal. The first power signal is a low power signal, so that the signal when the carrier power transistor is turned on is a low power signal. The second power signal is a high power signal, so that the signal when the peak power transistor is turned on is a high power signal. When a low-power signal is input into the driving power amplifying circuit, the carrier power amplifying circuit works at a power back-off point, at the moment, the carrier output matching network matches the load impedance of the carrier power transistor to 50 ohms, the pi-type microstrip compensation line matches the load impedance of the peak power transistor to infinity, and the carrier power amplifying circuit amplifies the first power signal. When a high-power signal is input into the driving power amplifying circuit, the carrier power amplifying circuit works at a power saturation point, the carrier output matching network matches the load impedance of the carrier power transistor to 150 ohms, the peak output matching network matches the load impedance of the peak power transistor to 75 ohms, the parallel load impedance of the carrier power amplifying circuit and the peak power amplifying circuit is 50 ohms, and the carrier power amplifying circuit and the peak power amplifying circuit jointly achieve amplification of a second power signal.
Compared with the prior art, the Doherty power amplifier based on the improved interstage matching provided by the embodiment provides driving power for the carrier power amplifying circuit and the peak power amplifying circuit through the driving power amplifying circuit, and the gain of the whole circuit is improved. Meanwhile, through the mutual matching of the carrier output matching network, the peak output matching network and the pi-type microstrip compensation line, the double-impedance point matching of the carrier power amplifier is realized, and the working efficiency of the carrier power amplifier working at a backspacing power point and a saturation working point is improved. When a low-power signal is input, the carrier output matching network matches the load impedance of the carrier power amplifier to the combining point impedance, and when a high-power signal is input, the carrier output matching network and the peak output matching network are matched with each other, so that the effect of matching the parallel load impedance of the carrier power amplifying circuit and the peak power amplifying circuit to the combining point impedance is realized, the matching network is not needed after the combining point is set, the size of the whole amplifier is reduced, and the compact layout is realized.
Preferably, as shown in fig. 2, the improved interstage matching network includes a first microstrip line Z1, a first capacitor C3, a second capacitor C4, a first resistor R2, a first inductor L1, and a second inductor L2; one end of a first microstrip line Z1 is an input end of the improved interstage matching network and is connected with a drain electrode of the driving power transistor, the other end of the first microstrip line Z1 is simultaneously connected with one end of a first capacitor C3 and one end of a second capacitor C4, the other end of the first capacitor C3 is an output end of the improved interstage matching network, the other end of the second capacitor C4 is another output end of the improved interstage matching network, a first inductor L1 is connected between one output end of the improved interstage matching network and the ground, a second inductor L2 is connected between the other output end of the improved interstage matching network and the ground, and a first resistor R2 is connected between one output end of the improved interstage matching network and the other output end of the improved interstage matching network in series.
In particular, the entire improved interstage matching network may act as a drive output matching network that drives the power transistor. Meanwhile, the combination of the capacitor C3, the capacitor C4, the resistor R2, the inductor L1 and the inductor L2 in the improved interstage matching network is equivalent to a power divider, wherein the capacitance values of the capacitor C3 and the capacitor C4 are equal, and the inductance values of the inductor L1 and the inductor L2 are also equal. Thus, the power ratio of two output ports of the improved interstage matching network is 1: 1. The improved interstage matching network has the functions of driving the output matching network and the power divider at the same time, the problem that the size of the Doherty power amplifier is large due to the fact that the existing Doherty power amplifier separates the driving output matching network from the power divider is solved, the size of the Doherty power amplifier is reduced, and the compactness of the whole power amplifier is improved.
Preferably, the carrier power amplifier circuit further comprises a carrier input matching network IMN2 connected between an output of the improved interstage matching network and the carrier power transistor. The carrier input matching network IMN2 includes a third inductor L5, a third capacitor C5, and a fourth capacitor C6; one end of the third inductor L5 is connected to one end of the third capacitor C5 and one end of the fourth capacitor C6, the other end of the third inductor L5 is connected to the gate of the carrier power transistor, the other end of the third capacitor C5 is the input end of the carrier input matching network, and the other end of the fourth capacitor C6 is grounded.
The carrier output matching network OMN2 is connected between the carrier power transistor and the combining point and comprises a second microstrip line Z2, a fifth capacitor C7 and a sixth capacitor C8, one end of the second microstrip line Z2 is connected with one end of the fifth capacitor C7, the other end of the second microstrip line Z2 is an output end of the carrier output matching network, the other end of the fifth capacitor C7 is connected with a drain electrode of the carrier power transistor, and the sixth capacitor C8 is connected between the output end of the carrier output matching network and the ground.
Specifically, the capacitor C7 in the carrier output matching network is a dc blocking capacitor, and has the function of blocking dc signals and allowing rf signals to pass through. The load impedances corresponding to the carrier power transistor at the back-off operating point and the saturation operating point are different. When the carrier power transistor works at a backspacing working point, the load impedance of the carrier power transistor can be matched to 50 ohms by adjusting the values of a microstrip line Z2 and a capacitor C8 in the carrier output matching network; when the carrier power transistor works at a saturated working point, the load impedance of the carrier power transistor can be matched to 150 ohms by adjusting the values of the microstrip line Z2 and the capacitor C8 in the carrier output matching network, so that the working efficiency of the carrier power transistor at different working points is improved on the premise of not influencing the saturated output power of the Doherty power amplifier.
Preferably, the carrier power amplifying circuit further comprises a pi-type phase shift network connected between an output terminal of the improved interstage matching network and the carrier input matching network. The pi-type phase compensation network comprises a seventh capacitor C9, a fourth inductor L3 and a fifth inductor L4, wherein the fourth inductor L3 and the fifth inductor L4 are respectively connected to two ends of the seventh capacitor C9; two ends of the seventh capacitor C9 are respectively an input end and an output end of the pi-type phase shift network.
Specifically, the pi-type phase shift network is formed by connecting a capacitor and two grounding inductors, wherein the two grounding inductors have the same value. The pi-type phase-shifting network in the carrier power amplifying circuit is used for compensating the phase difference between the carrier power amplifying circuit and the peak power amplifying circuit, so that the whole amplifier circuit is more stable, and the gain of the whole circuit is improved.
Preferably, the peak power amplifying circuit further comprises a peak input matching network IMN 3. The peak input matching network IMN3 includes a third microstrip line Z3, an eighth capacitor C10, and a ninth capacitor C11, one end of the third microstrip line Z3 is simultaneously connected to one end of the eighth capacitor C10 and one end of the ninth capacitor C11, the other end of the eighth capacitor C10 is an input end of the peak input matching network, the other end of the ninth capacitor C11 is grounded, and the other end of the third microstrip line Z3 is an output end of the peak input matching network.
The peak output matching network OMN3 includes a fourth microstrip line Z4, a tenth capacitor C12, and an eleventh capacitor C13, one end of the fourth microstrip line Z4 is connected to one end of the tenth capacitor C12, the other end of the fourth microstrip line Z4 is an output end of the peak output matching network, the other end of the tenth capacitor C12 is an input end of the peak output matching network, and the eleventh capacitor C13 is connected in series between the output end of the peak output matching network and ground.
Specifically, the capacitor C12 in the peak output matching network is a dc blocking capacitor, and has the function of blocking dc signals and rf signals. When the drive power amplifying circuit inputs a high-power signal, the load impedance of the carrier power transistor can be matched to 150 ohms by adjusting the values of the microstrip line Z2 and the capacitor C8 in the carrier output matching network, the load impedance of the peak power transistor can be matched to 75 ohms by adjusting the values of the microstrip line Z4 and the capacitor C13 in the peak output matching network, so that the parallel load impedance of the carrier power amplifying circuit and the peak power amplifying circuit is 50 ohms and can be directly connected to a combined load, and the amplification of the input high-power signal is realized by the carrier power amplifying circuit and the peak power amplifying circuit together.
Preferably, the pi-type microstrip compensation line includes a fifth microstrip line Z5 and a twelfth capacitor C14, and shares an eleventh capacitor C13 with the peak output matching network. An eleventh capacitor C13 and a twelfth capacitor C14 are respectively connected to two ends of the fifth microstrip line Z5, and two ends of the fifth microstrip line Z5 are respectively an input end and an output end of the pi-type microstrip compensation line.
Specifically, the output end of the peak output matching network is connected with the pi-shaped microstrip compensation line, so that the output power of the carrier power amplification circuit is ensured not to leak when the peak power amplifier is not started, namely, when the carrier power amplifier works at a backspacing point, the load impedance of the peak power transistor is in a high-impedance state. The pi-type microstrip compensation line is formed by combining a section of microstrip line and two grounding capacitors with the same capacitance value, in addition, the grounding capacitor in the pi-type microstrip compensation line can be combined with the grounding capacitor in the matching network close to the peak output, namely, the pi-type microstrip compensation line and the matching network share the capacitor C13 in the attached figure 2, so that the circuit size can be reduced, and the cost can be saved.
In detail, the input bias circuit is arranged on the grid electrodes of the carrier power transistor, the peak power transistor and the driving power transistor, so that a stable direct current voltage is provided for the grid electrode of each transistor, and the interference of a radio frequency input signal to a direct current power supply is prevented. Meanwhile, the output bias circuits are arranged on the drains of the carrier power transistor, the peak power transistor and the driving power transistor, so that stable direct-current voltage is provided for the drain of each transistor, interference of radio-frequency output signals to a direct-current power supply is prevented, and the stability of the whole circuit is improved.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.
Claims (10)
1. A Doherty power amplifier based on improved interstage matching, comprising:
a drive power amplification circuit comprising a drive power transistor and an improved interstage matching network connected at a drain of the drive power transistor;
a carrier power amplifier circuit connected to an output of the improved interstage matching network, the carrier power amplifier circuit comprising a carrier output matching network;
and the peak power amplifying circuit is connected to the other output end of the improved interstage matching network and comprises a peak output matching network and a pi-type microstrip compensation line.
2. The Doherty power amplifier based on improved interstage matching according to claim 1, wherein when a first power signal is input to a driving power amplifying circuit, the carrier output matching network matches a load impedance of a carrier power transistor to a combining point impedance, the pi-type microstrip compensation line matches a load impedance of a peak power transistor to infinity, and amplification of the first power signal is achieved by the carrier power amplifying circuit;
when a second power signal is input to the driving power amplification circuit, the carrier output matching network matches the load impedance of the carrier power transistor to 150 ohms, the peak output matching network matches the load impedance of the peak power transistor to 75 ohms, and the carrier power amplification circuit and the peak power amplification circuit jointly achieve amplification of the second power signal.
3. The Doherty power amplifier based on improved interstage matching according to claim 2, wherein the improved interstage matching network comprises a first microstrip line, a first capacitor, a second capacitor, a first resistor, a first inductor and a second inductor;
one end of the first microstrip line is an input end of the improved interstage matching network and is connected with a drain electrode of the driving power transistor, the other end of the first microstrip line is simultaneously connected with one end of a first capacitor and one end of a second capacitor, the other end of the first capacitor is an output end of the improved interstage matching network, the other end of the second capacitor is the other output end of the improved interstage matching network, the first inductor is connected between one output end of the improved interstage matching network and the ground, the second inductor is connected between the other output end of the improved interstage matching network and the ground, and the first resistor is connected between one output end of the improved interstage matching network and the other output end of the improved interstage matching network in series.
4. The Doherty power amplifier based on improved interstage matching of claim 1 wherein the carrier power amplifying circuit further comprises a carrier input matching network connected between one output of the improved interstage matching network and a carrier power transistor;
the carrier input matching network comprises a third inductor, a third capacitor and a fourth capacitor; one end of the third inductor is connected with one end of the third capacitor and one end of the fourth capacitor at the same time, the other end of the third inductor is connected with the grid electrode of the carrier power transistor, the other end of the third capacitor is the input end of the carrier input matching network, and the other end of the fourth capacitor is grounded.
5. The Doherty power amplifier based on improved interstage matching according to claim 4, wherein the carrier output matching network is connected between the carrier power transistor and the combining point and comprises a second microstrip line, a fifth capacitor and a sixth capacitor, one end of the second microstrip line is connected with one end of the fifth capacitor, the other end of the second microstrip line is an output end of the carrier output matching network, the other end of the fifth capacitor is connected with a drain electrode of the carrier power transistor, and the sixth capacitor is connected between the output end of the carrier output matching network and ground.
6. The Doherty power amplifier based on improved interstage matching according to claim 5, wherein the carrier power amplifying circuit further comprises a pi-type phase shifting network connected between one output terminal of the improved interstage matching network and a carrier input matching network;
the pi-type phase compensation network comprises a seventh capacitor, a fourth inductor and a fifth inductor, wherein the fourth inductor and the fifth inductor are respectively connected to two ends of the seventh capacitor; and the two ends of the seventh capacitor are respectively an input end and an output end of the pi-type phase-shifting network.
7. The Doherty power amplifier based on improved interstage matching according to claim 1, wherein the peak power amplifying circuit further comprises a peak input matching network;
the peak value input matching network comprises a third microstrip line, an eighth capacitor and a ninth capacitor, one end of the third microstrip line is simultaneously connected with one end of the eighth capacitor and one end of the ninth capacitor, the other end of the eighth capacitor is an input end of the peak value input matching network, the other end of the ninth capacitor is grounded, and the other end of the third microstrip line is an output end of the peak value input matching network.
8. The Doherty power amplifier based on improved interstage matching according to claim 7, wherein the peak output matching network comprises a fourth microstrip line, a tenth capacitor and an eleventh capacitor, one end of the fourth microstrip line is connected with one end of the tenth capacitor, the other end of the fourth microstrip line is an output end of the peak output matching network, the other end of the tenth capacitor is an input end of the peak output matching network, and the eleventh capacitor is connected in series between the output end of the peak output matching network and ground.
9. The Doherty power amplifier based on improved interstage matching according to claim 8, wherein the pi-type microstrip compensation line comprises a fifth microstrip line and a twelfth capacitor, and shares an eleventh capacitor with the peak output matching network; the eleventh capacitor and the twelfth capacitor are respectively connected to two ends of a fifth microstrip line, and the two ends of the fifth microstrip line are respectively an input end and an output end of the pi-type microstrip compensation line.
10. The Doherty power amplifier based on improved interstage matching according to claim 3, wherein the driving power transistor, the carrier power transistor and the peak power transistor are all GaN HEMT transistors.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115800936A (en) * | 2022-12-08 | 2023-03-14 | 康希通信科技（上海）有限公司 | Amplifying circuit, wireless communication module, and electronic device |
| CN117353672A (en) * | 2023-10-16 | 2024-01-05 | 北京无线电测量研究所 | Power amplifier circuit |
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2021
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115800936A (en) * | 2022-12-08 | 2023-03-14 | 康希通信科技（上海）有限公司 | Amplifying circuit, wireless communication module, and electronic device |
| CN117353672A (en) * | 2023-10-16 | 2024-01-05 | 北京无线电测量研究所 | Power amplifier circuit |
| CN117353672B (en) * | 2023-10-16 | 2024-04-02 | 北京无线电测量研究所 | Power amplifier circuit |
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