WO2023078062A1 - Doherty radio frequency power amplifier - Google Patents

Doherty radio frequency power amplifier Download PDF

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Publication number
WO2023078062A1
WO2023078062A1 PCT/CN2022/125438 CN2022125438W WO2023078062A1 WO 2023078062 A1 WO2023078062 A1 WO 2023078062A1 CN 2022125438 W CN2022125438 W CN 2022125438W WO 2023078062 A1 WO2023078062 A1 WO 2023078062A1
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WO
WIPO (PCT)
Prior art keywords
power amplifier
matching network
capacitor
input
output
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PCT/CN2022/125438
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French (fr)
Chinese (zh)
Inventor
彭艳军
宣凯
郭嘉帅
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深圳飞骧科技股份有限公司
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Publication of WO2023078062A1 publication Critical patent/WO2023078062A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56Modifications of input or output impedances, not otherwise provided for
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/213Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits

Definitions

  • the utility model relates to the technical field of radio frequency integrated circuits, in particular to a Doherty radio frequency power amplifier.
  • the peak-to-average ratio (PAPR) signal format is adopted for modulation signals.
  • High peak-to-average ratio signals impose strict requirements on the linearity of RF power amplifiers.
  • the wireless communication system requires the RF power amplifier to work in a power back-off state far away from the power compression point, so as to ensure the linear amplification of the RF signal.
  • the efficiency of RF power amplifiers is often designed to have the highest efficiency near the saturation region, and the efficiency at the power back-off point is significantly reduced.
  • the Doherty structure is a common method for designing RF power amplifiers.
  • a Doherty radio frequency power amplifier in the related art generally includes a driver amplifier, a power divider, a main power amplifier, an auxiliary power amplifier, a power combiner and a quarter-wavelength transmission line.
  • Figure 1 is a schematic diagram of the circuit structure of a Doherty RF power amplifier in the related art, wherein, after the input signal is amplified by the drive amplifier, the input power is divided into two through the power divider, and one road is input to the main power amplifier. The other is connected to the input of the auxiliary power amplifier after passing through a quarter-wavelength transmission line.
  • the output of the main power amplifier is connected to the first input of the power combiner through a quarter-wavelength transmission line, the output of the auxiliary power amplifier is directly connected to the second input of the power combiner, and the output of the power combiner is connected to the output load .
  • the working principle of the Doherty RF power amplifier in the related art is: the main power amplifier is biased at Class AB or Class B, and the auxiliary power amplifier is biased at Class C. In the low output power state, the auxiliary power amplifier is turned off, and the load impedance of the main power amplifier is 2Ropt.
  • the auxiliary power amplifier In the state of high output power, the auxiliary power amplifier is turned on, the load impedance of the main power amplifier changes from 2Ropt to Ropt with the increase of input power, and the load impedance of the auxiliary power amplifier also gradually decreases from infinite value to Ropt with the increase of input power, The outputs of the two amplifiers are combined by a power combiner. Due to this change in load modulation, the Doherty RF power amplifier exhibits higher efficiency when power is backed off.
  • the size of the power splitter and the quarter-wavelength transmission line of the Doherty RF power amplifier in the related art is too large to be implemented on a chip, especially in the Sub-6GHz frequency band. longer.
  • the small-scale characteristics of monolithic microwave integrated circuits require that small-sized passive devices must be used when designing Doherty RF power amplifiers using integrated circuit technology.
  • the utility model proposes a Doherty radio frequency power amplifier with small layout area and high power added efficiency.
  • the embodiment of the present utility model provides a kind of Doherty radio frequency power amplifier, it comprises driver amplifier, carrier input matching network, carrier power amplifier, peak input matching network, peak power amplifier, first output matching network and a second output matching network;
  • the input end of described driving amplifier is used as the input end of described Doherty radio frequency power amplifier
  • the output end of the drive amplifier is respectively connected to the input end of the carrier input matching network and the input end of the peak input matching network;
  • the output terminal of the carrier input matching network is connected to the input terminal of the carrier power amplifier
  • the output terminal of the carrier power amplifier is connected to the input terminal of the first output matching network
  • the output terminal of the peak input matching network is connected to the input terminal of the peak power amplifier
  • the output end of the peak power amplifier is respectively connected to the input end of the second output matching network and the output end of the first output matching network;
  • the output end of the second output matching network is used as the output end of the Doherty radio frequency power amplifier for connecting the system load;
  • both the carrier input matching network and the first output matching network include a phase compensation network for 90-degree phase shift and impedance transformation
  • the phase compensation network is any one of a high-pass T-type network, a high-pass ⁇ -type network, a low-pass T-type network and a low-pass ⁇ -type network.
  • the carrier input matching network is a high-pass T-type network or a high-pass ⁇ -type network
  • the first output matching network is a low-pass T-type network or a low-pass ⁇ -type network.
  • the carrier input matching network is a high-pass T-type network
  • the first output matching network is a low-pass ⁇ -type network.
  • the driving amplifier, the carrier power amplifier and the peak power amplifier are all implemented by transistors.
  • the carrier input matching network includes a third inductor, a second capacitor and a third capacitor; the first end of the second capacitor serves as the input end of the carrier input matching network, and the first end of the second capacitor One end is connected to the collector of the first transistor; the second end of the second capacitor is respectively connected to the first end of the third capacitor and the first end of the third inductor; the third inductor The second end of the third capacitor is connected to the ground; the second end of the third capacitor is used as the output end of the carrier input matching network;
  • the first output matching network includes a fifth capacitor, a sixth capacitor, and a fourth inductor; the first end of the fourth inductor serves as an input end of the first output matching network, and the first end of the fourth inductor terminals are respectively connected to the collector of the second transistor and the first terminal of the fifth capacitor; the second terminal of the fourth inductance is used as the output terminal of the peak power amplifier, and the first terminal of the fourth inductance
  • the two terminals are connected to the first terminal of the sixth capacitor; the second terminal of the fifth capacitor is connected to the ground; the second terminal of the sixth capacitor is connected to the ground.
  • the drive amplifier includes a first inductor, a second inductor, a first capacitor, a first transistor, and a first bias circuit; the first end of the first capacitor is used as the input end of the drive amplifier, and the The first terminal of the first capacitor is connected to ground after being connected in series with the first inductor, and the second terminal of the first capacitor is respectively connected to the base of the first transistor and the output of the first bias circuit terminal, the emitter of the first transistor is connected to ground, the collector of the first transistor is used as the output terminal of the drive amplifier, and the collectors of the first transistor are respectively connected to the second end, the input end of the carrier input matching network and the input end of the peak input matching network; the first end of the second inductance is connected to the power supply voltage; the input end of the first bias circuit is connected to the reference voltage .
  • the carrier power amplifier includes a second bias circuit and a second transistor; the base of the second transistor is used as the input terminal of the carrier power amplifier, and the bases of the second transistor are respectively connected to the The second terminal of the third capacitor and the output terminal of the second bias circuit; the emitter of the second transistor is connected to ground; the collector of the second transistor is used as the output terminal of the carrier power amplifier; The input end of the second bias circuit is connected to a reference voltage.
  • the peak input matching network includes a fourth capacitor; the first end of the fourth capacitor is used as the input end of the peak input matching network, and the first end of the fourth capacitor is connected to the first The collector of the transistor; the second terminal of the fourth capacitor is used as the output terminal of the peak input matching network;
  • the peak power amplifier includes a third bias circuit and a third transistor; the base of the third transistor is used as the input of the peak power amplifier, and the base of the third transistor is connected to the fourth capacitor The second terminal of the second terminal and the output terminal of the third bias circuit; the emitter of the third transistor is connected to the ground; the collector of the third transistor is used as the output terminal of the peak power amplifier; the third The input terminal of the bias circuit is connected to a reference voltage.
  • the second output matching network includes a fifth inductor, a sixth inductor, a seventh inductor, a seventh capacitor, and an eighth capacitor; the first end of the fifth inductor is used as an input of the second output matching network end, and the first end of the fifth inductance is respectively connected to the collector of the third transistor and the second end of the sixth inductance; the first end of the sixth inductance is connected to a power supply voltage; the The second end of the fifth inductor is respectively connected to the first end of the seventh capacitor and the first end of the eighth capacitor; the second end of the seventh capacitor is connected to ground; the first end of the eighth capacitor The two terminals serve as the output terminals of the second output matching network, and the second terminal of the eighth capacitor is connected to the first terminal of the seventh inductor; the second terminal of the seventh inductor is connected to ground.
  • the carrier input matching network, the peak input matching network, the first output matching network and the second output matching network are all lumped parameter circuits.
  • the Doherty radio frequency power amplifier of the present utility model removes the larger power divider of the related art, the carrier input matching network is set in front of the input end of the carrier power amplifier, and the peak input is set in front of the input end of the peak power amplifier. matching network.
  • This setting enables uniform or non-uniform power distribution of the input power through the impedance value of the carrier input matching network and the impedance value of the peak input matching network, thereby replacing a power divider with a large size.
  • the output terminal of the carrier power amplifier is connected to the input terminal of the first output matching network, and both the carrier input matching network and the first output matching network include a phase compensation network for 90-degree phase shift and impedance transformation.
  • the carrier input matching network includes a phase compensation network to ensure that the combined power of the carrier power amplifier and the peak power amplifier is the largest when the output power is high, so that the power added efficiency of the Doherty radio frequency power amplifier of the present invention is high.
  • the above-mentioned circuit replaces the quarter-wavelength impedance transformation line of the related art, so that the layout area of the Doherty radio frequency power amplifier is small.
  • Fig. 1 is the schematic diagram of the circuit structure of the Doherty radio frequency power amplifier of related art
  • Fig. 2 is the schematic diagram of the circuit structure of the utility model Doherty radio frequency power amplifier
  • Fig. 3 is the application circuit structural representation of a kind of embodiment of Doherty radio frequency power amplifier of the present invention.
  • Fig. 4 is the circuit diagram of the Qualcomm T-type network of the utility model Doherty radio frequency power amplifier
  • Fig. 5 is the circuit diagram of the low-pass T-type network of Doherty radio frequency power amplifier of the present invention.
  • Fig. 6 is the circuit diagram of the Qualcomm ⁇ -type network of the utility model Doherty radio frequency power amplifier
  • Fig. 7 is the circuit diagram of the low-pass ⁇ -type network of Doherty radio frequency power amplifier of the present invention.
  • Fig. 8 is the application circuit structure diagram of another embodiment of the Doherty radio frequency power amplifier that the utility model embodiment provides;
  • Fig. 9 is a schematic diagram comparing the amplitude gain curves of the Doherty radio frequency power amplifier provided by the embodiment of the present invention and the Class AB radio frequency power amplifier of the related art.
  • the embodiment of the utility model provides a Doherty radio frequency power amplifier 100 .
  • Fig. 2 is the application circuit structure diagram of Doherty radio frequency power amplifier 100 of the present invention
  • Fig. 3 is the application circuit structure diagram of a kind of embodiment of Doherty radio frequency power amplifier 100 of the present invention .
  • the Doherty radio frequency power amplifier 100 of the present invention includes a driver amplifier 1 , a carrier input matching network 2 , a carrier power amplifier 3 , a peak input matching network 4 , a peak power amplifier 5 , a first output matching network 6 and a second output matching network 7 .
  • the drive amplifier 1 is used to amplify external input signals.
  • the carrier input matching network 2 is used to realize 90-degree phase shift and input impedance matching.
  • the carrier power amplifier 3 is used to realize signal power amplification.
  • the peak input matching network 4 is used for input impedance matching.
  • the peak power amplifier 5 is used to realize signal power amplification.
  • the first output matching network 6 is used to realize 90-degree phase shift and output impedance matching.
  • the second output matching network 7 is used for output impedance matching.
  • the input terminal of the driving amplifier 1 is used as the input terminal RFin of the Doherty RF power amplifier 100 .
  • the output terminal of the driving amplifier 1 is respectively connected to the input terminal of the carrier input matching network 2 and the input terminal of the peak input matching network 4 .
  • the output end of the carrier input matching network 2 is connected to the input end of the carrier power amplifier 3 .
  • the output terminal of the carrier power amplifier 3 is connected to the input terminal of the first output matching network 6 .
  • the output end of the peak input matching network 4 is connected to the input end of the peak power amplifier 5 .
  • the output terminal of the peak power amplifier 5 is respectively connected to the input terminal of the second output matching network 7 and the output terminal of the first output matching network 6 .
  • the output terminal of the second output matching network 7 is used as the output terminal RFout of the Doherty radio frequency power amplifier 100 for connecting to the system load R.
  • the carrier input matching network 2 is arranged in front of the input end of the carrier power amplifier 3
  • the peak input matching network 4 is arranged in front of the input end of the peak power amplifier 5 .
  • This setting enables uniform or non-uniform power distribution of the input power through the impedance value of the carrier input matching network 2 and the impedance value of the peak input matching network 4, thereby replacing the larger power divider in the related art, Therefore, the layout area of the Doherty radio frequency power amplifier 100 is small, and it is easy to be integrated on a chip of GaAs HBT process.
  • the carrier input matching network 2 and the first output matching network 6 both include a phase compensation network for 90-degree phase shift and impedance transformation.
  • This structure enables the first output matching network to simultaneously function as a quarter-wavelength impedance transformation line to achieve a 90-degree phase shift.
  • the carrier input matching network includes a phase compensation network to ensure that the combined power of the carrier power amplifier and the peak power amplifier is the largest when the output power is high. Therefore, the power added efficiency of the Doherty radio frequency power amplifier of the present invention is high.
  • the above-mentioned circuit replaces the quarter-wavelength impedance transformation line of the related art, so that the layout area of the Doherty RF power amplifier 100 is small, and it is easy to be integrated on a chip of GaAs HBT process.
  • the phase compensation network is any one of a high-pass T-type network, a high-pass ⁇ -type network, a low-pass T-type network, and a low-pass ⁇ -type network.
  • the Qualcomm T-type network and the search Qualcomm ⁇ -type network realize a phase shift of +90 degrees.
  • the low-pass T-network and the low-pass ⁇ -network implement a phase shift of -90 degrees.
  • FIG. 4 is a circuit diagram of a Qualcomm T-shaped network of a Doherty radio frequency power amplifier of the present invention.
  • the Qualcomm T-type network includes a capacitor CA1, a capacitor CA2 and an inductor LA.
  • the capacitor CA1 and the capacitor CA2 are sequentially connected in series from the input end of the Qualcomm T-type network to the output end of the Qualcomm T-type network, and the inductance LA is connected across the capacitor CA1 and the capacitor Between the endpoints between CA2 and ground.
  • FIG. 5 is a circuit diagram of the low-pass T-shaped network of the Doherty radio frequency power amplifier of the present invention.
  • the low-pass T-type network includes an inductor LB1, an inductor LB2, and a capacitor CB.
  • the inductance LB1 and the inductance LB2 are sequentially connected in series from the input end of the low-pass T-type network to the output end of the low-pass T-type network, and the capacitor CB is connected across the inductance LB1 and the inductance LB1. Between the terminals between the inductor LB2 and the ground.
  • FIG. 6 is a circuit diagram of a high-pass ⁇ -type network of the Doherty radio frequency power amplifier of the present invention.
  • the Qualcomm ⁇ -type network includes an inductor LC1, an inductor LC2, and a capacitor CC.
  • the capacitor CC is set between the input end of the high-pass ⁇ -type network and the output end of the high-pass ⁇ -type network
  • the inductor LC1 is connected between the input end of the high-pass ⁇ -type network and ground
  • the inductor LC2 is connected between the output terminal of the high-pass ⁇ -type network and the ground.
  • FIG. 7 is a circuit diagram of a low-pass ⁇ -type network of a Doherty radio frequency power amplifier of the present invention.
  • the low-pass ⁇ -type network includes an inductor LD, a capacitor CD1 and a capacitor CD2.
  • the inductor LD is set between the input end of the low-pass ⁇ -type network and the output end of the low-pass ⁇ -type network
  • the capacitor CD1 is connected across the input end of the low-pass ⁇ -type network and Between the ground, the capacitor CD2 is connected between the output terminal of the low-pass ⁇ -type network and the ground.
  • the type of matching network is selected according to the input and output impedance characteristics of the carrier power amplifier 3 and the peak power amplifier 5 .
  • the carrier input matching network 2 is a Qualcomm T-type network or a Qualcomm ⁇ -type network.
  • the first output matching network 6 is a low-pass T-type network or a low-pass ⁇ -type network.
  • the carrier input matching network 2 is a high-pass T-type network, so as to suppress low-frequency clutter signal interference.
  • the first output matching network 6 is a low-pass ⁇ -type network to suppress high-order harmonics.
  • the carrier input matching network 2 , the peak input matching network 4 , the first output matching network 6 and the second output matching network 7 are all lumped parameter circuits.
  • the lumped parameter circuit is divided by the size of the circuit electrical device and the wavelength of the working signal.
  • the actual circuit can be divided into a distributed parameter circuit and a lumped parameter circuit.
  • a circuit that satisfies the d ⁇ condition is called a lumped parameter circuit. Its characteristic is that the voltage between any two terminals in the circuit and the current flowing into any device port are completely determined, regardless of the geometric size and spatial position of the device.
  • a circuit that does not satisfy the d ⁇ condition is called a distributed parameter circuit.
  • the voltage and current in the circuit are a function of time and are related to the geometric size and spatial position of the device.
  • the use of lumped parameter circuits facilitates implementation using MMIC technology.
  • the utility model Doherty radio frequency power amplifier 100 is easy to be integrated on the chip of a GaAs HBT process.
  • Embodiment 2 provides a Doherty radio frequency power amplifier 200 .
  • FIG. 8 is a schematic structural diagram of an application circuit of another embodiment of a Doherty radio frequency power amplifier provided by an embodiment of the present invention.
  • the Doherty radio frequency power amplifier 200 provides a specific circuit for the circuit integration of the Doherty radio frequency power amplifier 100 . Therefore, the Doherty radio frequency power amplifier 200 is a specific technical solution with a small layout area and high power added efficiency.
  • the driving amplifier 1, the carrier power amplifier 3 and the peak power amplifier 5 are all realized by transistors.
  • the concrete circuit structure of Doherty RF power amplifier 101 is:
  • the driving amplifier 1 includes a first inductor L1, a second inductor L2, a first capacitor C1, a first transistor Q1 and a first bias circuit M1.
  • the first terminal of the first capacitor C1 is used as the input terminal of the driving amplifier 1, and the first terminal of the first capacitor C1 is connected to the ground GND after being connected in series with the first inductor L1.
  • the second terminal of the first capacitor C1 is respectively connected to the base of the first transistor Q1 and the output terminal of the first bias circuit M1.
  • the emitter of the first transistor Q1 is connected to the ground GND.
  • the collector of the first transistor Q1 is used as the output terminal of the driving amplifier 1, and the collector of the first transistor Q1 is respectively connected to the second end of the second inductor L2, the carrier input matching network 2 The input terminal of and the input terminal of the peak input matching network 4.
  • the first terminal of the second inductor L2 is connected to the power supply voltage Vcc.
  • the input terminal of the first bias circuit M1 is connected to the reference voltage Vreg.
  • the carrier input matching network 2 includes a third inductor L3, a second capacitor C2 and a third capacitor C3.
  • the first terminal of the second capacitor C2 is used as the input terminal of the carrier input matching network 2, and the first terminal of the second capacitor C2 is connected to the collector of the first transistor Q1.
  • the second terminal of the second capacitor C2 is respectively connected to the first terminal of the third capacitor C3 and the first terminal of the third inductor L3.
  • the second end of the third inductor L3 is connected to the ground GND.
  • the second terminal of the third capacitor C3 is used as the output terminal of the carrier input matching network 2 .
  • the carrier power amplifier 3 includes a second bias circuit M2 and a second transistor Q2.
  • the base of the second transistor Q2 is used as the input end of the carrier power amplifier 3, and the base of the second transistor Q2 is respectively connected to the second end of the third capacitor C3 and the second bias output of circuit M2.
  • the emitter of the second transistor Q2 is connected to the ground GND.
  • the collector of the second transistor Q2 serves as the output terminal of the carrier power amplifier 3 .
  • the input terminal of the second bias circuit M2 is connected to the reference voltage Vreg.
  • the peak input matching network 4 includes a fourth capacitor C4.
  • the first terminal of the fourth capacitor C4 is used as the input terminal of the peak input matching network 4, and the first terminal of the fourth capacitor C4 is connected to the collector of the first transistor Q1.
  • the second terminal of the fourth capacitor C4 is used as the output terminal of the peak input matching network 4 .
  • the peak power amplifier 5 includes a third bias circuit M3 and a third transistor Q3.
  • the base of the third transistor Q3 is used as the input terminal of the peak power amplifier 5, and the base of the third transistor Q3 is connected to the second terminal of the fourth capacitor C4 and the third bias circuit output of M3.
  • the emitter of the third transistor Q3 is connected to the ground GND.
  • the collector of the third transistor Q3 is used as the output terminal of the peak power amplifier 5 .
  • the input end of the third bias circuit M3 is connected to the reference voltage Vreg.
  • the first output matching network 6 includes a fifth capacitor C5, a sixth capacitor C6 and a fourth inductor L4.
  • the first end of the fourth inductor L4 is used as the input end of the first output matching network 6, and the first end of the fourth inductor L4 is respectively connected to the collector of the second transistor Q2 and the second transistor Q2.
  • the second terminal of the fourth inductor L4 is used as the output terminal of the peak power amplifier 5, and the second terminal of the fourth inductor L4 is connected to the first terminal of the sixth capacitor C6.
  • the second terminal of the fifth capacitor C5 is connected to the ground GND.
  • the second terminal of the sixth capacitor C6 is connected to the ground GND.
  • the second output matching network 7 includes a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, a seventh capacitor C7 and an eighth capacitor C8.
  • the first terminal of the fifth inductor L5 is used as the input terminal of the second output matching network 7, and the first terminal of the fifth inductor L5 is respectively connected to the collector of the third transistor Q3 and the first terminal of the second transistor Q3.
  • the second terminal of the six inductors L6 A first end of the sixth inductor L6 is connected to the power supply voltage Vcc.
  • the second terminal of the fifth inductor L5 is respectively connected to the first terminal of the seventh capacitor C7 and the first terminal of the eighth capacitor C8.
  • the second end of the seventh capacitor C7 is connected to the ground GND.
  • the second end of the eighth capacitor C8 is used as the output end of the second output matching network 7, and the second end of the eighth capacitor C8 is connected to the first end of the seventh inductor L7.
  • the second end of the seventh inductor L7 is connected to the ground GND.
  • both the carrier input matching network 2 and the first output matching network 6 include a phase compensation network for 90-degree phase shift and impedance transformation.
  • This structure enables the first output matching network to simultaneously function as a quarter-wavelength impedance transformation line to achieve a 90-degree phase shift.
  • the carrier input matching network includes a phase compensation network to ensure that the combined power of the carrier power amplifier and the peak power amplifier is the largest when the output power is high. Therefore, the power added efficiency of the Doherty radio frequency power amplifier of the present invention is high.
  • the above-mentioned circuit replaces the quarter-wavelength impedance transformation line of the related art, so that the layout area of the Doherty RF power amplifier 100 is small, and it is easy to be integrated on a chip of GaAs HBT process.
  • FIG. 9 is a schematic diagram of the comparison of the amplitude gain curves of the Doherty radio frequency power amplifier provided by the embodiment of the present invention and the Class AB radio frequency power amplifier of the related art.
  • the Doherty radio frequency power amplifier 200 has fewer circuit components, high circuit performance, and is easy to be integrated on a GaAs HBT process chip.
  • the Doherty radio frequency power amplifier of the present utility model removes the larger power divider of the related art, the carrier input matching network is set in front of the input end of the carrier power amplifier, and the peak input is set in front of the input end of the peak power amplifier. matching network.
  • This setting enables uniform or non-uniform power distribution of the input power through the impedance value of the carrier input matching network and the impedance value of the peak input matching network, thereby replacing a power divider with a large size.
  • the output terminal of the carrier power amplifier is connected to the input terminal of the first output matching network, and both the carrier input matching network and the first output matching network include a phase compensation network for 90-degree phase shift and impedance transformation.
  • the carrier input matching network includes a phase compensation network to ensure that the combined power of the carrier power amplifier and the peak power amplifier is the largest when the output power is high, so that the power added efficiency of the Doherty radio frequency power amplifier of the present invention is high.
  • the above-mentioned circuit replaces the quarter-wavelength impedance transformation line of the related art, so that the layout area of the Doherty radio frequency power amplifier is small.

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Abstract

Provided in the embodiments of the present utility model is a Doherty radio frequency power amplifier, comprising a drive amplifier, a carrier input matching network, a carrier power amplifier, a peak input matching network, a peak power amplifier, a first output matching network and a second output matching network. The carrier input matching network and the first output matching network each comprise a phase compensation network for 90-degree phase shift and impedance transformation; and the phase compensation network comprises a high-pass T-type network, a high-pass π-type network, a low-pass T-type network and a low-pass π-type network. The Doherty radio frequency power amplifier of the present utility model is small in layout area and high in power added efficiency.

Description

Doherty射频功率放大器Doherty RF Power Amplifier 技术领域technical field
本实用新型涉及射频集成电路技术领域,尤其涉及一种Doherty射频功率放大器。The utility model relates to the technical field of radio frequency integrated circuits, in particular to a Doherty radio frequency power amplifier.
背景技术Background technique
现代无线通信系统为了充分利用频谱资源,提高数据传输速率,调制信号采用了高峰均比(PAPR)的信号制式。高峰均比信号对射频功率放大器的线性提出了严格的要求。为了保证信号的不失真传输,无线通信系统要求射频功率放大器工作在远离功率压缩点的功率回退状态,以保证射频信号的线性放大。但是射频功率放大器的效率往往设计在接近饱和区域时效率最高,功率回退点的效率显著降低了。为了提高功率回退时射频功率放大器的效率,Doherty结构是射频功率放大器设计的一种常用方法。In order to make full use of spectrum resources and increase the data transmission rate in modern wireless communication systems, the peak-to-average ratio (PAPR) signal format is adopted for modulation signals. High peak-to-average ratio signals impose strict requirements on the linearity of RF power amplifiers. In order to ensure the undistorted transmission of the signal, the wireless communication system requires the RF power amplifier to work in a power back-off state far away from the power compression point, so as to ensure the linear amplification of the RF signal. However, the efficiency of RF power amplifiers is often designed to have the highest efficiency near the saturation region, and the efficiency at the power back-off point is significantly reduced. In order to improve the efficiency of RF power amplifiers during power back-off, the Doherty structure is a common method for designing RF power amplifiers.
相关技术的Doherty射频功率放大器一般包括驱动放大器、功率分配器、主功放、辅助功放、功率合成器以及四分之一波长传输线。请参考图1所示,图1为相关技术的Doherty射频功率放大器的电路结构示意图,其中,输入信号通过驱动放大器放大后,通过功率分配器将输入功率一分为二,一路输入到主功放的输入端,另一路通过四分之一波长传输线后连接到辅助功放的输入端。主功放的输出端通过四分之一波长传输线连接至功率合成器的第一输入端,辅助功放的输出端直接连接至功率合成器的第二输入端,功率合成器的输出端连接至输出负载。相关技术的Doherty射频功率放大器的工作原理为:主功放偏置在Class AB或Class B,辅助功放偏置在Class C。在低输出功率状态下,辅助功放处于关闭状态,主功放的负载阻抗为2Ropt。在高输出功率状态下,辅助功放打开,主功放的负载阻抗随着输入功率的增加从2Ropt变化到Ropt,辅助功放的负载阻抗也随着输入功率的增加从无限大值逐步减小到Ropt,两个放大器的输出由功率合成器完成功率合成。由于这种负 载调制的变化,Doherty射频功率放大器在功率回退时呈现出了较高的效率。A Doherty radio frequency power amplifier in the related art generally includes a driver amplifier, a power divider, a main power amplifier, an auxiliary power amplifier, a power combiner and a quarter-wavelength transmission line. Please refer to Figure 1, which is a schematic diagram of the circuit structure of a Doherty RF power amplifier in the related art, wherein, after the input signal is amplified by the drive amplifier, the input power is divided into two through the power divider, and one road is input to the main power amplifier. The other is connected to the input of the auxiliary power amplifier after passing through a quarter-wavelength transmission line. The output of the main power amplifier is connected to the first input of the power combiner through a quarter-wavelength transmission line, the output of the auxiliary power amplifier is directly connected to the second input of the power combiner, and the output of the power combiner is connected to the output load . The working principle of the Doherty RF power amplifier in the related art is: the main power amplifier is biased at Class AB or Class B, and the auxiliary power amplifier is biased at Class C. In the low output power state, the auxiliary power amplifier is turned off, and the load impedance of the main power amplifier is 2Ropt. In the state of high output power, the auxiliary power amplifier is turned on, the load impedance of the main power amplifier changes from 2Ropt to Ropt with the increase of input power, and the load impedance of the auxiliary power amplifier also gradually decreases from infinite value to Ropt with the increase of input power, The outputs of the two amplifiers are combined by a power combiner. Due to this change in load modulation, the Doherty RF power amplifier exhibits higher efficiency when power is backed off.
然而,相关技术的Doherty射频功率放大器的功分器和四分之一波长传输线,尺寸都过于庞大,难以在芯片上实现,尤其是Sub-6GHz频段,频率越低,四分之一波长传输线就越长。单片微波集成电路的小尺寸特性要求采用集成电路工艺设计Doherty射频功率放大器时必须采用小尺寸的无源器件。However, the size of the power splitter and the quarter-wavelength transmission line of the Doherty RF power amplifier in the related art is too large to be implemented on a chip, especially in the Sub-6GHz frequency band. longer. The small-scale characteristics of monolithic microwave integrated circuits require that small-sized passive devices must be used when designing Doherty RF power amplifiers using integrated circuit technology.
因此,实有必要提供一种尺寸紧凑、集成电路工艺可实现的新型的宽带Doherty射频功率放大器解决上述问题。Therefore, it is necessary to provide a novel broadband Doherty radio frequency power amplifier with compact size and achievable integrated circuit technology to solve the above problems.
实用新型内容Utility model content
针对以上现有技术的不足,本实用新型提出一种版图面积小且功率附加效率高的Doherty射频功率放大器。Aiming at the above deficiencies in the prior art, the utility model proposes a Doherty radio frequency power amplifier with small layout area and high power added efficiency.
为了解决上述技术问题,本实用新型的实施例提供了一种Doherty射频功率放大器,其包括驱动放大器、载波输入匹配网络、载波功率放大器、峰值输入匹配网络、峰值功率放大器、第一输出匹配网络以及第二输出匹配网络;In order to solve the above-mentioned technical problem, the embodiment of the present utility model provides a kind of Doherty radio frequency power amplifier, it comprises driver amplifier, carrier input matching network, carrier power amplifier, peak input matching network, peak power amplifier, first output matching network and a second output matching network;
所述驱动放大器的输入端作为所述Doherty射频功率放大器的输入端;The input end of described driving amplifier is used as the input end of described Doherty radio frequency power amplifier;
所述驱动放大器的输出端分别连接所述载波输入匹配网络的输入端和所述峰值输入匹配网络的输入端;The output end of the drive amplifier is respectively connected to the input end of the carrier input matching network and the input end of the peak input matching network;
所述载波输入匹配网络的输出端连接至所述载波功率放大器的输入端;The output terminal of the carrier input matching network is connected to the input terminal of the carrier power amplifier;
所述载波功率放大器的输出端连接至所述第一输出匹配网络的输入端;The output terminal of the carrier power amplifier is connected to the input terminal of the first output matching network;
所述峰值输入匹配网络的输出端连接至所述峰值功率放大器的输入端;The output terminal of the peak input matching network is connected to the input terminal of the peak power amplifier;
所述峰值功率放大器的输出端分别连接至所述第二输出匹配网络的输入端和所述第一输出匹配网络的输出端;The output end of the peak power amplifier is respectively connected to the input end of the second output matching network and the output end of the first output matching network;
所述第二输出匹配网络的输出端作为所述Doherty射频功率放大器的输出端,以用于连接系统负载;The output end of the second output matching network is used as the output end of the Doherty radio frequency power amplifier for connecting the system load;
其中,所述载波输入匹配网络和所述第一输出匹配网络均包括用于90度相移和阻抗变换的相位补偿网络;Wherein, both the carrier input matching network and the first output matching network include a phase compensation network for 90-degree phase shift and impedance transformation;
所述相位补偿网络为高通T型网络、高通π型网络、低通T型网络以及低通π型网络中的任意一种。The phase compensation network is any one of a high-pass T-type network, a high-pass π-type network, a low-pass T-type network and a low-pass π-type network.
优选的,所述载波输入匹配网络为高通T型网络或高通π型网络;所述第一输出匹配网络为低通T型网络或低通π型网络。Preferably, the carrier input matching network is a high-pass T-type network or a high-pass π-type network; the first output matching network is a low-pass T-type network or a low-pass π-type network.
优选的,所述载波输入匹配网络为高通T型网络;所述第一输出匹配网络为低通π型网络。Preferably, the carrier input matching network is a high-pass T-type network; the first output matching network is a low-pass π-type network.
优选的,所述驱动放大器、所述载波功率放大器以及所述峰值功率放大器均采用晶体管实现。Preferably, the driving amplifier, the carrier power amplifier and the peak power amplifier are all implemented by transistors.
优选的,所述载波输入匹配网络包括第三电感、第二电容以及第三电容;所述第二电容的第一端作为所述载波输入匹配网络的输入端,且所述第二电容的第一端连接至所述第一晶体管的集电极;所述第二电容的第二端分别连接至所述第三电容的第一端和所述第三电感的第一端;所述第三电感的第二端连接至接地;所述第三电容的第二端作为所述载波输入匹配网络的输出端;Preferably, the carrier input matching network includes a third inductor, a second capacitor and a third capacitor; the first end of the second capacitor serves as the input end of the carrier input matching network, and the first end of the second capacitor One end is connected to the collector of the first transistor; the second end of the second capacitor is respectively connected to the first end of the third capacitor and the first end of the third inductor; the third inductor The second end of the third capacitor is connected to the ground; the second end of the third capacitor is used as the output end of the carrier input matching network;
所述第一输出匹配网络包括第五电容、第六电容以及第四电感;所述第四电感的第一端作为所述第一输出匹配网络的输入端,且所述第四电感的第一端分别连接至所述第二晶体管的集电极和所述第五电容的第一端;所述第四电感的第二端作为所述峰值功率放大器的输出端,且所述第四电感的第二端连接至所述第六电容的第一端;所述第五电容的第二端连接至接地;所述第六电容的第二端连接至接地。The first output matching network includes a fifth capacitor, a sixth capacitor, and a fourth inductor; the first end of the fourth inductor serves as an input end of the first output matching network, and the first end of the fourth inductor terminals are respectively connected to the collector of the second transistor and the first terminal of the fifth capacitor; the second terminal of the fourth inductance is used as the output terminal of the peak power amplifier, and the first terminal of the fourth inductance The two terminals are connected to the first terminal of the sixth capacitor; the second terminal of the fifth capacitor is connected to the ground; the second terminal of the sixth capacitor is connected to the ground.
优选的,所述驱动放大器包括第一电感、第二电感、第一电容、第一晶体管以及第一偏置电路;所述第一电容的第一端作为所述驱动放大器的输入端,且所述第一电容的第一端通过串联所述第一电感后连接至接地,所述第一电容的第二端分别连接至所述第一晶体管的基极和所述第一偏置电路的输出端,所述第一晶体管的发射极连接至接地,所述第一晶体管的集电极作为所述驱动放大器的输出端,所述第一晶体管的集电极分别连接至所述第二电感的第二端、 所述载波输入匹配网络的输入端和所述峰值输入匹配网络的输入端;所述第二电感的第一端连接至电源电压;所述第一偏置电路的输入端连接至参考电压。Preferably, the drive amplifier includes a first inductor, a second inductor, a first capacitor, a first transistor, and a first bias circuit; the first end of the first capacitor is used as the input end of the drive amplifier, and the The first terminal of the first capacitor is connected to ground after being connected in series with the first inductor, and the second terminal of the first capacitor is respectively connected to the base of the first transistor and the output of the first bias circuit terminal, the emitter of the first transistor is connected to ground, the collector of the first transistor is used as the output terminal of the drive amplifier, and the collectors of the first transistor are respectively connected to the second end, the input end of the carrier input matching network and the input end of the peak input matching network; the first end of the second inductance is connected to the power supply voltage; the input end of the first bias circuit is connected to the reference voltage .
优选的,所述载波功率放大器包括第二偏置电路和第二晶体管;所述第二晶体管的基极作为所述载波功率放大器的输入端,且所述第二晶体管的基极分别连接至所述第三电容的第二端和所述第二偏置电路的输出端;所述第二晶体管的发射极连接至接地;所述第二晶体管的集电极作为所述载波功率放大器的输出端;所述第二偏置电路的输入端连接至参考电压。Preferably, the carrier power amplifier includes a second bias circuit and a second transistor; the base of the second transistor is used as the input terminal of the carrier power amplifier, and the bases of the second transistor are respectively connected to the The second terminal of the third capacitor and the output terminal of the second bias circuit; the emitter of the second transistor is connected to ground; the collector of the second transistor is used as the output terminal of the carrier power amplifier; The input end of the second bias circuit is connected to a reference voltage.
优选的,所述峰值输入匹配网络包括第四电容;所述第四电容的第一端作为所述峰值输入匹配网络的输入端,且所述第四电容的第一端连接至所述第一晶体管的集电极;所述第四电容的第二端作为所述峰值输入匹配网络的输出端;Preferably, the peak input matching network includes a fourth capacitor; the first end of the fourth capacitor is used as the input end of the peak input matching network, and the first end of the fourth capacitor is connected to the first The collector of the transistor; the second terminal of the fourth capacitor is used as the output terminal of the peak input matching network;
所述峰值功率放大器包括第三偏置电路和第三晶体管;所述第三晶体管的基极作为所述峰值功率放大器的输入端,且所述第三晶体管的基极连接至所述第四电容的第二端和所述第三偏置电路的输出端;所述第三晶体管的发射极连接至接地;所述第三晶体管的集电极作为所述峰值功率放大器的输出端;所述第三偏置电路的输入端连接至参考电压。The peak power amplifier includes a third bias circuit and a third transistor; the base of the third transistor is used as the input of the peak power amplifier, and the base of the third transistor is connected to the fourth capacitor The second terminal of the second terminal and the output terminal of the third bias circuit; the emitter of the third transistor is connected to the ground; the collector of the third transistor is used as the output terminal of the peak power amplifier; the third The input terminal of the bias circuit is connected to a reference voltage.
优选的,所述第二输出匹配网络包括第五电感、第六电感、第七电感、第七电容以及第八电容;所述第五电感的第一端作为所述第二输出匹配网络的输入端,且所述第五电感的第一端分别连接至所述第三晶体管的集电极和所述第六电感的第二端;所述第六电感的第一端连接至电源电压;所述第五电感的第二端分别连接至所述第七电容的第一端和所述第八电容的第一端;所述第七电容的第二端连接至接地;所述第八电容的第二端作为所述第二输出匹配网络的输出端,且所述第八电容的第二端连接至所述第七电感的第一端;所述第七电感的第二端连接至接地。Preferably, the second output matching network includes a fifth inductor, a sixth inductor, a seventh inductor, a seventh capacitor, and an eighth capacitor; the first end of the fifth inductor is used as an input of the second output matching network end, and the first end of the fifth inductance is respectively connected to the collector of the third transistor and the second end of the sixth inductance; the first end of the sixth inductance is connected to a power supply voltage; the The second end of the fifth inductor is respectively connected to the first end of the seventh capacitor and the first end of the eighth capacitor; the second end of the seventh capacitor is connected to ground; the first end of the eighth capacitor The two terminals serve as the output terminals of the second output matching network, and the second terminal of the eighth capacitor is connected to the first terminal of the seventh inductor; the second terminal of the seventh inductor is connected to ground.
优选的,所述载波输入匹配网络、所述峰值输入匹配网络、所述第一输出匹配网络以及所述第二输出匹配网络均为集总参数电 路。Preferably, the carrier input matching network, the peak input matching network, the first output matching network and the second output matching network are all lumped parameter circuits.
与相关技术相比,本实用新型的Doherty射频功率放大器通过去掉相关技术的尺寸较大的功率分配器,载波功率放大器的输入端前面设置载波输入匹配网络,峰值功率放大器的输入端前面设置峰值输入匹配网络。该设置使得通过载波输入匹配网络的阻抗值大小和峰值输入匹配网络的阻抗值大小实现对输入功率的均匀或非均匀功率分配,从而可以替代尺寸较大的功率分配器。载波功率放大器的输出端连接至第一输出匹配网络的输入端,所述载波输入匹配网络和所述第一输出匹配网络均包括用于90度相移和阻抗变换的相位补偿网络。该结构使得第一输出匹配网络同时起到了四分之一波长阻抗变换线的作用,实现90度的相移。同时载波输入匹配网络包含了相位补偿网络,以保证高输出功率时载波功率放大器和峰值功率放大器的合成功率最大,从而使得本实用新型的Doherty射频功率放大器的功率附加效率高。另外,上述电路替代了相关技术的四分之一波长阻抗变换线,从而使得Doherty射频功率放大器的版图面积小。Compared with the related art, the Doherty radio frequency power amplifier of the present utility model removes the larger power divider of the related art, the carrier input matching network is set in front of the input end of the carrier power amplifier, and the peak input is set in front of the input end of the peak power amplifier. matching network. This setting enables uniform or non-uniform power distribution of the input power through the impedance value of the carrier input matching network and the impedance value of the peak input matching network, thereby replacing a power divider with a large size. The output terminal of the carrier power amplifier is connected to the input terminal of the first output matching network, and both the carrier input matching network and the first output matching network include a phase compensation network for 90-degree phase shift and impedance transformation. This structure enables the first output matching network to simultaneously function as a quarter-wavelength impedance transformation line to achieve a 90-degree phase shift. At the same time, the carrier input matching network includes a phase compensation network to ensure that the combined power of the carrier power amplifier and the peak power amplifier is the largest when the output power is high, so that the power added efficiency of the Doherty radio frequency power amplifier of the present invention is high. In addition, the above-mentioned circuit replaces the quarter-wavelength impedance transformation line of the related art, so that the layout area of the Doherty radio frequency power amplifier is small.
附图说明Description of drawings
下面结合附图详细说明本实用新型。通过结合以下附图所作的详细描述,本实用新型的上述或其他方面的内容将变得更清楚和更容易理解。附图中,Below in conjunction with accompanying drawing, describe the utility model in detail. Through the detailed description in conjunction with the following drawings, the content of the above or other aspects of the present invention will become clearer and easier to understand. In the attached picture,
图1为相关技术的Doherty射频功率放大器的电路结构示意图;Fig. 1 is the schematic diagram of the circuit structure of the Doherty radio frequency power amplifier of related art;
图2为本实用新型Doherty射频功率放大器的电路结构示意图;Fig. 2 is the schematic diagram of the circuit structure of the utility model Doherty radio frequency power amplifier;
图3为本实用新型Doherty射频功率放大器的一种实施例的应用电路结构示意图;Fig. 3 is the application circuit structural representation of a kind of embodiment of Doherty radio frequency power amplifier of the present invention;
图4为本实用新型Doherty射频功率放大器的高通T型网络的电路图;Fig. 4 is the circuit diagram of the Qualcomm T-type network of the utility model Doherty radio frequency power amplifier;
图5为本实用新型Doherty射频功率放大器的低通T型网络的 电路图;Fig. 5 is the circuit diagram of the low-pass T-type network of Doherty radio frequency power amplifier of the present invention;
图6为本实用新型Doherty射频功率放大器的高通π型网络的电路图;Fig. 6 is the circuit diagram of the Qualcomm π-type network of the utility model Doherty radio frequency power amplifier;
图7为本实用新型Doherty射频功率放大器的低通π型网络的电路图;Fig. 7 is the circuit diagram of the low-pass π-type network of Doherty radio frequency power amplifier of the present invention;
图8为本实用新型实施例提供的Doherty射频功率放大器的另一种实施例的应用电路结构示意图;Fig. 8 is the application circuit structure diagram of another embodiment of the Doherty radio frequency power amplifier that the utility model embodiment provides;
图9为本实用新型实施例提供的Doherty射频功率放大器与相关技术的Class AB射频功率放大器的幅度增益曲线对比示意图。Fig. 9 is a schematic diagram comparing the amplitude gain curves of the Doherty radio frequency power amplifier provided by the embodiment of the present invention and the Class AB radio frequency power amplifier of the related art.
具体实施方式Detailed ways
下面结合附图详细说明本实用新型的具体实施方式。The specific embodiment of the utility model will be described in detail below in conjunction with the accompanying drawings.
在此记载的具体实施方式/实施例为本实用新型的特定的具体实施方式,用于说明本实用新型的构思,均是解释性和示例性的,不应解释为对本实用新型实施方式及本实用新型范围的限制。除在此记载的实施例外,本领域技术人员还能够基于本申请权利要求书和说明书所公开的内容采用显而易见的其它技术方案,这些技术方案包括采用对在此记载的实施例的做出任何显而易见的替换和修改的技术方案,都在本实用新型的保护范围之内。The specific implementations/embodiments described here are specific specific implementations of the present utility model, and are used to illustrate the concept of the present utility model. Limitations on the scope of utility models. In addition to the embodiments described here, those skilled in the art can also adopt other obvious technical solutions based on the claims of the application and the contents disclosed in the description, and these technical solutions include adopting any obvious changes made to the embodiments described here. The replacement and modified technical solutions are all within the protection scope of the present utility model.
(实施例一)(Embodiment 1)
本实用新型实施例提供一种Doherty射频功率放大器100。The embodiment of the utility model provides a Doherty radio frequency power amplifier 100 .
请同时参考图2-3所示,其中,图2为本实用新型Doherty射频功率放大器100的应用电路结构示意图;图3为本实用新型Doherty射频功率放大器100的一种实施例的应用电路结构示意图。Please refer to shown in Fig. 2-3 at the same time, wherein, Fig. 2 is the application circuit structure diagram of Doherty radio frequency power amplifier 100 of the present invention; Fig. 3 is the application circuit structure diagram of a kind of embodiment of Doherty radio frequency power amplifier 100 of the present invention .
本实用新型Doherty射频功率放大器100包括驱动放大器1、载波输入匹配网络2、载波功率放大器3、峰值输入匹配网络4、峰值功率放大器5、第一输出匹配网络6以及第二输出匹配网络7。The Doherty radio frequency power amplifier 100 of the present invention includes a driver amplifier 1 , a carrier input matching network 2 , a carrier power amplifier 3 , a peak input matching network 4 , a peak power amplifier 5 , a first output matching network 6 and a second output matching network 7 .
所述驱动放大器1用于将外部输入信号放大。The drive amplifier 1 is used to amplify external input signals.
所述载波输入匹配网络2用于实现90度的相移和输入阻抗匹配。The carrier input matching network 2 is used to realize 90-degree phase shift and input impedance matching.
所述载波功率放大器3用于实现信号的功率放大。The carrier power amplifier 3 is used to realize signal power amplification.
所述峰值输入匹配网络4用于输入阻抗匹配。The peak input matching network 4 is used for input impedance matching.
所述峰值功率放大器5用于实现信号的功率放大。The peak power amplifier 5 is used to realize signal power amplification.
所述第一输出匹配网络6用于实现90度的相移和输出阻抗匹配。The first output matching network 6 is used to realize 90-degree phase shift and output impedance matching.
所述第二输出匹配网络7用于输出阻抗匹配。The second output matching network 7 is used for output impedance matching.
其中,本实用新型Doherty射频功率放大器100的具体电路结构为:Wherein, the specific circuit structure of the utility model Doherty radio frequency power amplifier 100 is:
所述驱动放大器1的输入端作为所述Doherty射频功率放大器100的输入端RFin。The input terminal of the driving amplifier 1 is used as the input terminal RFin of the Doherty RF power amplifier 100 .
所述驱动放大器1的输出端分别连接所述载波输入匹配网络2的输入端和所述峰值输入匹配网络4的输入端。The output terminal of the driving amplifier 1 is respectively connected to the input terminal of the carrier input matching network 2 and the input terminal of the peak input matching network 4 .
所述载波输入匹配网络2的输出端连接至所述载波功率放大器3的输入端。The output end of the carrier input matching network 2 is connected to the input end of the carrier power amplifier 3 .
所述载波功率放大器3的输出端连接至所述第一输出匹配网络6的输入端。The output terminal of the carrier power amplifier 3 is connected to the input terminal of the first output matching network 6 .
所述峰值输入匹配网络4的输出端连接至所述峰值功率放大器5的输入端。The output end of the peak input matching network 4 is connected to the input end of the peak power amplifier 5 .
所述峰值功率放大器5的输出端分别连接至所述第二输出匹配网络7的输入端和所述第一输出匹配网络6的输出端。The output terminal of the peak power amplifier 5 is respectively connected to the input terminal of the second output matching network 7 and the output terminal of the first output matching network 6 .
所述第二输出匹配网络7的输出端作为所述Doherty射频功率放大器100的输出端RFout,以用于连接系统负载R。The output terminal of the second output matching network 7 is used as the output terminal RFout of the Doherty radio frequency power amplifier 100 for connecting to the system load R.
上述结构通过载波功率放大器3的输入端前面设置载波输入匹配网络2,峰值功率放大器5的输入端前面设置峰值输入匹配网络4。该设置使得通过载波输入匹配网络2的阻抗值大小和峰值输入匹配网络4的阻抗值大小实现对输入功率的均匀或非均匀功率分配,从而可以替代相关技术中的尺寸较大的功率分配器,从而使得Doherty射频功率放大器100的版图面积小,易于集成在一个GaAs HBT工艺的芯片上。In the above structure, the carrier input matching network 2 is arranged in front of the input end of the carrier power amplifier 3 , and the peak input matching network 4 is arranged in front of the input end of the peak power amplifier 5 . This setting enables uniform or non-uniform power distribution of the input power through the impedance value of the carrier input matching network 2 and the impedance value of the peak input matching network 4, thereby replacing the larger power divider in the related art, Therefore, the layout area of the Doherty radio frequency power amplifier 100 is small, and it is easy to be integrated on a chip of GaAs HBT process.
其中,所述载波输入匹配网络2和所述第一输出匹配网络6均 包括用于90度相移和阻抗变换的相位补偿网络。该结构使得第一输出匹配网络同时起到了四分之一波长阻抗变换线的作用,实现90度的相移。同时载波输入匹配网络包含了相位补偿网络,以保证高输出功率时载波功率放大器和峰值功率放大器的合成功率最大。从而使得本实用新型的Doherty射频功率放大器的功率附加效率高。另外,上述电路替代了相关技术的四分之一波长阻抗变换线,从而使得Doherty射频功率放大器100的版图面积小,易于集成在一个GaAs HBT工艺的芯片上。Wherein, the carrier input matching network 2 and the first output matching network 6 both include a phase compensation network for 90-degree phase shift and impedance transformation. This structure enables the first output matching network to simultaneously function as a quarter-wavelength impedance transformation line to achieve a 90-degree phase shift. At the same time, the carrier input matching network includes a phase compensation network to ensure that the combined power of the carrier power amplifier and the peak power amplifier is the largest when the output power is high. Therefore, the power added efficiency of the Doherty radio frequency power amplifier of the present invention is high. In addition, the above-mentioned circuit replaces the quarter-wavelength impedance transformation line of the related art, so that the layout area of the Doherty RF power amplifier 100 is small, and it is easy to be integrated on a chip of GaAs HBT process.
本实施方式中,所述相位补偿网络为高通T型网络、高通π型网络、低通T型网络以及低通π型网络中的任意一种。In this embodiment, the phase compensation network is any one of a high-pass T-type network, a high-pass π-type network, a low-pass T-type network, and a low-pass π-type network.
其中,所述高通T型网络和搜索高通π型网络实现+90度相移。所述低通T型网络和所述低通π型网络实现-90度相移。Wherein, the Qualcomm T-type network and the search Qualcomm π-type network realize a phase shift of +90 degrees. The low-pass T-network and the low-pass π-network implement a phase shift of -90 degrees.
请参考图4所示,图4为本实用新型Doherty射频功率放大器的高通T型网络的电路图。Please refer to FIG. 4 . FIG. 4 is a circuit diagram of a Qualcomm T-shaped network of a Doherty radio frequency power amplifier of the present invention.
所述高通T型网络包括电容CA1、电容CA2及电感LA。其中,从所述高通T型网络的输入端至所述高通T型网络的输出端依次串流所述电容CA1和所述电容CA2,所述电感LA跨接于所述电容CA1和所述电容CA2之间的端点与地之间。The Qualcomm T-type network includes a capacitor CA1, a capacitor CA2 and an inductor LA. Wherein, the capacitor CA1 and the capacitor CA2 are sequentially connected in series from the input end of the Qualcomm T-type network to the output end of the Qualcomm T-type network, and the inductance LA is connected across the capacitor CA1 and the capacitor Between the endpoints between CA2 and ground.
请参考图5所示,图5为本实用新型Doherty射频功率放大器的低通T型网络的电路图。Please refer to FIG. 5, which is a circuit diagram of the low-pass T-shaped network of the Doherty radio frequency power amplifier of the present invention.
所述低通T型网络包括电感LB1、电感LB2及电容CB。其中,从所述低通T型网络的输入端至所述低通T型网络的输出端依次串流所述电感LB1和所述电感LB2,所述电容CB跨接于所述电感LB1和所述电感LB2之间的端点与地之间。The low-pass T-type network includes an inductor LB1, an inductor LB2, and a capacitor CB. Wherein, the inductance LB1 and the inductance LB2 are sequentially connected in series from the input end of the low-pass T-type network to the output end of the low-pass T-type network, and the capacitor CB is connected across the inductance LB1 and the inductance LB1. Between the terminals between the inductor LB2 and the ground.
请参考图6所示,图6为本实用新型Doherty射频功率放大器的高通π型网络的电路图。Please refer to FIG. 6, which is a circuit diagram of a high-pass π-type network of the Doherty radio frequency power amplifier of the present invention.
所述高通π型网络包括电感LC1、电感LC2及电容CC。其中,所述电容CC设置于所述高通π型网络的输入端至所述高通π型网络的输出端之间,所述电感LC1跨接于所述高通π型网络的输入端与地之间,所述电感LC2跨接于所述高通π型网络的输出端与 地之间。The Qualcomm π-type network includes an inductor LC1, an inductor LC2, and a capacitor CC. Wherein, the capacitor CC is set between the input end of the high-pass π-type network and the output end of the high-pass π-type network, and the inductor LC1 is connected between the input end of the high-pass π-type network and ground , the inductor LC2 is connected between the output terminal of the high-pass π-type network and the ground.
请参考图7所示,图7为本实用新型Doherty射频功率放大器的低通π型网络的电路图。Please refer to FIG. 7 , which is a circuit diagram of a low-pass π-type network of a Doherty radio frequency power amplifier of the present invention.
所述低通π型网络包括电感LD、电容CD1及电容CD2。其中,所述电感LD设置于所述低通π型网络的输入端至所述低通π型网络的输出端之间,所述电容CD1跨接于所述低通π型网络的输入端与地之间,所述电容CD2跨接于所述低通π型网络的输出端与地之间。The low-pass π-type network includes an inductor LD, a capacitor CD1 and a capacitor CD2. Wherein, the inductor LD is set between the input end of the low-pass π-type network and the output end of the low-pass π-type network, and the capacitor CD1 is connected across the input end of the low-pass π-type network and Between the ground, the capacitor CD2 is connected between the output terminal of the low-pass π-type network and the ground.
实际应用中,根据所述载波功率放大器3和所述峰值功率放大器5的输入输出阻抗特性,选择匹配网络的类型。所述载波输入匹配网络2为高通T型网络或高通π型网络。所述第一输出匹配网络6为低通T型网络或低通π型网络。本实施例一中,所述载波输入匹配网络2为高通T型网络,以利于抑制低频杂波信号干扰。所述第一输出匹配网络6为低通π型网络,抑制高次谐波。In practical applications, the type of matching network is selected according to the input and output impedance characteristics of the carrier power amplifier 3 and the peak power amplifier 5 . The carrier input matching network 2 is a Qualcomm T-type network or a Qualcomm π-type network. The first output matching network 6 is a low-pass T-type network or a low-pass π-type network. In the first embodiment, the carrier input matching network 2 is a high-pass T-type network, so as to suppress low-frequency clutter signal interference. The first output matching network 6 is a low-pass π-type network to suppress high-order harmonics.
本实施例一中,所述载波输入匹配网络2、所述峰值输入匹配网络4、所述第一输出匹配网络6以及所述第二输出匹配网络7均为集总参数电路。集总参数电路是由电路电气器件的尺寸和工作信号的波长来做标准划分的,实际电路有可分为分布参数电路和集总参数电路。满足d<<λ条件的电路称为集总参数电路。其特点是电路中任意两个端点间的电压和流入任一器件端口的电流完全确定,与器件的几何尺寸和空间位置无关。不满足d<<λ条件的电路称为分布参数电路。其特点是电路中的电压和电流是时间的函数而且与器件的几何尺寸和空间位置有关。采用集总参数电路的以便于采用MMIC工艺实现。从而本实用新型Doherty射频功率放大器100易于集成在一个GaAs HBT工艺的芯片上。In the first embodiment, the carrier input matching network 2 , the peak input matching network 4 , the first output matching network 6 and the second output matching network 7 are all lumped parameter circuits. The lumped parameter circuit is divided by the size of the circuit electrical device and the wavelength of the working signal. The actual circuit can be divided into a distributed parameter circuit and a lumped parameter circuit. A circuit that satisfies the d<<λ condition is called a lumped parameter circuit. Its characteristic is that the voltage between any two terminals in the circuit and the current flowing into any device port are completely determined, regardless of the geometric size and spatial position of the device. A circuit that does not satisfy the d<<λ condition is called a distributed parameter circuit. Its characteristic is that the voltage and current in the circuit are a function of time and are related to the geometric size and spatial position of the device. The use of lumped parameter circuits facilitates implementation using MMIC technology. Thereby the utility model Doherty radio frequency power amplifier 100 is easy to be integrated on the chip of a GaAs HBT process.
(实施例二)(Example 2)
实施例二提供一种Doherty射频功率放大器200。请参考图8所示,图8为本实用新型实施例提供的Doherty射频功率放大器的另一种实施例的应用电路结构示意图。 Embodiment 2 provides a Doherty radio frequency power amplifier 200 . Please refer to FIG. 8 , which is a schematic structural diagram of an application circuit of another embodiment of a Doherty radio frequency power amplifier provided by an embodiment of the present invention.
Doherty射频功率放大器200为在Doherty射频功率放大器100的电路集成上,提供了具体电路。从而使得Doherty射频功率放大器200为一个版图面积下且功率附加效率高的具体技术方案。其中,在实施例二中,所述驱动放大器1、所述载波功率放大器3以及所述峰值功率放大器5均采用晶体管实现。The Doherty radio frequency power amplifier 200 provides a specific circuit for the circuit integration of the Doherty radio frequency power amplifier 100 . Therefore, the Doherty radio frequency power amplifier 200 is a specific technical solution with a small layout area and high power added efficiency. Wherein, in the second embodiment, the driving amplifier 1, the carrier power amplifier 3 and the peak power amplifier 5 are all realized by transistors.
Doherty射频功率放大器101的具体电路结构为:The concrete circuit structure of Doherty RF power amplifier 101 is:
所述驱动放大器1包括第一电感L1、第二电感L2、第一电容C1、第一晶体管Q1以及第一偏置电路M1。所述第一电容C1的第一端作为所述驱动放大器1的输入端,且所述第一电容C1的第一端通过串联所述第一电感L1后连接至接地GND。所述第一电容C1的第二端分别连接至所述第一晶体管Q1的基极和所述第一偏置电路M1的输出端。所述第一晶体管Q1的发射极连接至接地GND。所述第一晶体管Q1的集电极作为所述驱动放大器1的输出端,且所述第一晶体管Q1的集电极分别连接至所述第二电感L2的第二端、所述载波输入匹配网络2的输入端和所述峰值输入匹配网络4的输入端。所述第二电感L2的第一端连接至电源电压Vcc。所述第一偏置电路M1的输入端连接至参考电压Vreg。The driving amplifier 1 includes a first inductor L1, a second inductor L2, a first capacitor C1, a first transistor Q1 and a first bias circuit M1. The first terminal of the first capacitor C1 is used as the input terminal of the driving amplifier 1, and the first terminal of the first capacitor C1 is connected to the ground GND after being connected in series with the first inductor L1. The second terminal of the first capacitor C1 is respectively connected to the base of the first transistor Q1 and the output terminal of the first bias circuit M1. The emitter of the first transistor Q1 is connected to the ground GND. The collector of the first transistor Q1 is used as the output terminal of the driving amplifier 1, and the collector of the first transistor Q1 is respectively connected to the second end of the second inductor L2, the carrier input matching network 2 The input terminal of and the input terminal of the peak input matching network 4. The first terminal of the second inductor L2 is connected to the power supply voltage Vcc. The input terminal of the first bias circuit M1 is connected to the reference voltage Vreg.
所述载波输入匹配网络2包括第三电感L3、第二电容C2以及第三电容C3。所述第二电容C2的第一端作为所述载波输入匹配网络2的输入端,且所述第二电容C2的第一端连接至所述第一晶体管Q1的集电极。所述第二电容C2的第二端分别连接至所述第三电容C3的第一端和所述第三电感L3的第一端。所述第三电感L3的第二端连接至接地GND。所述第三电容C3的第二端作为所述载波输入匹配网络2的输出端。The carrier input matching network 2 includes a third inductor L3, a second capacitor C2 and a third capacitor C3. The first terminal of the second capacitor C2 is used as the input terminal of the carrier input matching network 2, and the first terminal of the second capacitor C2 is connected to the collector of the first transistor Q1. The second terminal of the second capacitor C2 is respectively connected to the first terminal of the third capacitor C3 and the first terminal of the third inductor L3. The second end of the third inductor L3 is connected to the ground GND. The second terminal of the third capacitor C3 is used as the output terminal of the carrier input matching network 2 .
所述载波功率放大器3包括第二偏置电路M2和第二晶体管Q2。所述第二晶体管Q2的基极作为所述载波功率放大器3的输入端,且所述第二晶体管Q2的基极分别连接至所述第三电容C3的第二端和所述第二偏置电路M2的输出端。所述第二晶体管Q2的发射极连接至接地GND。所述第二晶体管Q2的集电极作为所述载波功率放大器3的输出端。所述第二偏置电路M2的输入端连接至 参考电压Vreg。The carrier power amplifier 3 includes a second bias circuit M2 and a second transistor Q2. The base of the second transistor Q2 is used as the input end of the carrier power amplifier 3, and the base of the second transistor Q2 is respectively connected to the second end of the third capacitor C3 and the second bias output of circuit M2. The emitter of the second transistor Q2 is connected to the ground GND. The collector of the second transistor Q2 serves as the output terminal of the carrier power amplifier 3 . The input terminal of the second bias circuit M2 is connected to the reference voltage Vreg.
所述峰值输入匹配网络4包括第四电容C4。所述第四电容C4的第一端作为所述峰值输入匹配网络4的输入端,且所述第四电容C4的第一端连接至所述第一晶体管Q1的集电极。所述第四电容C4的第二端作为所述峰值输入匹配网络4的输出端。The peak input matching network 4 includes a fourth capacitor C4. The first terminal of the fourth capacitor C4 is used as the input terminal of the peak input matching network 4, and the first terminal of the fourth capacitor C4 is connected to the collector of the first transistor Q1. The second terminal of the fourth capacitor C4 is used as the output terminal of the peak input matching network 4 .
所述峰值功率放大器5包括第三偏置电路M3和第三晶体管Q3。所述第三晶体管Q3的基极作为所述峰值功率放大器5的输入端,且所述第三晶体管Q3的基极连接至所述第四电容C4的第二端和所述第三偏置电路M3的输出端。所述第三晶体管Q3的发射极连接至接地GND。所述第三晶体管Q3的集电极作为所述峰值功率放大器5的输出端。所述第三偏置电路M3的输入端连接至参考电压Vreg。The peak power amplifier 5 includes a third bias circuit M3 and a third transistor Q3. The base of the third transistor Q3 is used as the input terminal of the peak power amplifier 5, and the base of the third transistor Q3 is connected to the second terminal of the fourth capacitor C4 and the third bias circuit output of M3. The emitter of the third transistor Q3 is connected to the ground GND. The collector of the third transistor Q3 is used as the output terminal of the peak power amplifier 5 . The input end of the third bias circuit M3 is connected to the reference voltage Vreg.
所述第一输出匹配网络6包括第五电容C5、第六电容C6以及第四电感L4。所述第四电感L4的第一端作为所述第一输出匹配网络6的输入端,且所述第四电感L4的第一端分别连接至所述第二晶体管Q2的集电极和所述第五电容C5的第一端。所述第四电感L4的第二端作为所述峰值功率放大器5的输出端,且所述第四电感L4的第二端连接至所述第六电容C6的第一端。所述第五电容C5的第二端连接至接地GND。所述第六电容C6的第二端连接至接地GND。The first output matching network 6 includes a fifth capacitor C5, a sixth capacitor C6 and a fourth inductor L4. The first end of the fourth inductor L4 is used as the input end of the first output matching network 6, and the first end of the fourth inductor L4 is respectively connected to the collector of the second transistor Q2 and the second transistor Q2. The first terminal of five capacitors C5. The second terminal of the fourth inductor L4 is used as the output terminal of the peak power amplifier 5, and the second terminal of the fourth inductor L4 is connected to the first terminal of the sixth capacitor C6. The second terminal of the fifth capacitor C5 is connected to the ground GND. The second terminal of the sixth capacitor C6 is connected to the ground GND.
所述第二输出匹配网络7包括第五电感L5、第六电感L6、第七电感L7、第七电容C7以及第八电容C8。所述第五电感L5的第一端作为所述第二输出匹配网络7的输入端,且所述第五电感L5的第一端分别连接至所述第三晶体管Q3的集电极和所述第六电感L6的第二端。所述第六电感L6的第一端连接至电源电压Vcc。所述第五电感L5的第二端分别连接至所述第七电容C7的第一端和所述第八电容C8的第一端。所述第七电容C7的第二端连接至接地GND。所述第八电容C8的第二端作为所述第二输出匹配网络7的输出端,且所述第八电容C8的第二端连接至所述第七电感L7的第一端。所述第七电感L7的第二端连接至接地GND。The second output matching network 7 includes a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, a seventh capacitor C7 and an eighth capacitor C8. The first terminal of the fifth inductor L5 is used as the input terminal of the second output matching network 7, and the first terminal of the fifth inductor L5 is respectively connected to the collector of the third transistor Q3 and the first terminal of the second transistor Q3. The second terminal of the six inductors L6. A first end of the sixth inductor L6 is connected to the power supply voltage Vcc. The second terminal of the fifth inductor L5 is respectively connected to the first terminal of the seventh capacitor C7 and the first terminal of the eighth capacitor C8. The second end of the seventh capacitor C7 is connected to the ground GND. The second end of the eighth capacitor C8 is used as the output end of the second output matching network 7, and the second end of the eighth capacitor C8 is connected to the first end of the seventh inductor L7. The second end of the seventh inductor L7 is connected to the ground GND.
上述的电路结构可知:所述载波输入匹配网络2和所述第一输出匹配网络6均包括用于90度相移和阻抗变换的相位补偿网络。该结构使得第一输出匹配网络同时起到了四分之一波长阻抗变换线的作用,实现90度的相移。同时载波输入匹配网络包含了相位补偿网络,以保证高输出功率时载波功率放大器和峰值功率放大器的合成功率最大。从而使得本实用新型的Doherty射频功率放大器的功率附加效率高。另外,上述电路替代了相关技术的四分之一波长阻抗变换线,从而使得Doherty射频功率放大器100的版图面积小,易于集成在一个GaAs HBT工艺的芯片上。From the above circuit structure, it can be seen that both the carrier input matching network 2 and the first output matching network 6 include a phase compensation network for 90-degree phase shift and impedance transformation. This structure enables the first output matching network to simultaneously function as a quarter-wavelength impedance transformation line to achieve a 90-degree phase shift. At the same time, the carrier input matching network includes a phase compensation network to ensure that the combined power of the carrier power amplifier and the peak power amplifier is the largest when the output power is high. Therefore, the power added efficiency of the Doherty radio frequency power amplifier of the present invention is high. In addition, the above-mentioned circuit replaces the quarter-wavelength impedance transformation line of the related art, so that the layout area of the Doherty RF power amplifier 100 is small, and it is easy to be integrated on a chip of GaAs HBT process.
请参考图9所示,图9为本实用新型实施例提供的Doherty射频功率放大器与相关技术的Class AB射频功率放大器的幅度增益曲线对比示意图。Please refer to FIG. 9, which is a schematic diagram of the comparison of the amplitude gain curves of the Doherty radio frequency power amplifier provided by the embodiment of the present invention and the Class AB radio frequency power amplifier of the related art.
有图可得:在功率回退8dB时,Doherty射频功率放大器200的效率要比相关技术的Class AB射频功率放大器提高了18%。It can be seen from the picture: when the power backs off by 8dB, the efficiency of the Doherty RF power amplifier 200 is 18% higher than that of the Class AB RF power amplifier of the related technology.
因此,Doherty射频功率放大器200的电路元器件较少,电路性能高,易于集成在一个GaAs HBT工艺的芯片上。Therefore, the Doherty radio frequency power amplifier 200 has fewer circuit components, high circuit performance, and is easy to be integrated on a GaAs HBT process chip.
与相关技术相比,本实用新型的Doherty射频功率放大器通过去掉相关技术的尺寸较大的功率分配器,载波功率放大器的输入端前面设置载波输入匹配网络,峰值功率放大器的输入端前面设置峰值输入匹配网络。该设置使得通过载波输入匹配网络的阻抗值大小和峰值输入匹配网络的阻抗值大小实现对输入功率的均匀或非均匀功率分配,从而可以替代尺寸较大的功率分配器。载波功率放大器的输出端连接至第一输出匹配网络的输入端,所述载波输入匹配网络和所述第一输出匹配网络均包括用于90度相移和阻抗变换的相位补偿网络。该结构使得第一输出匹配网络同时起到了四分之一波长阻抗变换线的作用,实现90度的相移。同时载波输入匹配网络包含了相位补偿网络,以保证高输出功率时载波功率放大器和峰值功率放大器的合成功率最大,从而使得本实用新型的Doherty射频功率放大器的功率附加效率高。另外,上述电路替代了相关技术的四分之一波长阻抗变换线,从而使得Doherty射频功率放大器的 版图面积小。Compared with the related art, the Doherty radio frequency power amplifier of the present utility model removes the larger power divider of the related art, the carrier input matching network is set in front of the input end of the carrier power amplifier, and the peak input is set in front of the input end of the peak power amplifier. matching network. This setting enables uniform or non-uniform power distribution of the input power through the impedance value of the carrier input matching network and the impedance value of the peak input matching network, thereby replacing a power divider with a large size. The output terminal of the carrier power amplifier is connected to the input terminal of the first output matching network, and both the carrier input matching network and the first output matching network include a phase compensation network for 90-degree phase shift and impedance transformation. This structure enables the first output matching network to simultaneously function as a quarter-wavelength impedance transformation line to achieve a 90-degree phase shift. At the same time, the carrier input matching network includes a phase compensation network to ensure that the combined power of the carrier power amplifier and the peak power amplifier is the largest when the output power is high, so that the power added efficiency of the Doherty radio frequency power amplifier of the present invention is high. In addition, the above-mentioned circuit replaces the quarter-wavelength impedance transformation line of the related art, so that the layout area of the Doherty radio frequency power amplifier is small.
需要说明的是,以上参照附图所描述的各个实施例仅用以说明本实用新型而非限制本实用新型的范围,本领域的普通技术人员应当理解,在不脱离本实用新型的精神和范围的前提下对本实用新型进行的修改或者等同替换,均应涵盖在本实用新型的范围之内。此外,除上下文另有所指外,以单数形式出现的词包括复数形式,反之亦然。另外,除非特别说明,那么任何实施例的全部或一部分可结合任何其它实施例的全部或一部分来使用。It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the utility model rather than limit the scope of the utility model, those of ordinary skill in the art should understand that without departing from the spirit and scope of the utility model Any modifications or equivalent replacements made to the present utility model under the premise of the present utility model shall be covered within the scope of the present utility model. Further, words appearing in the singular include the plural and vice versa unless the context otherwise requires. Additionally, all or a portion of any embodiment may be utilized with all or a portion of any other embodiment, unless stated otherwise.

Claims (10)

  1. 一种Doherty射频功率放大器,其特征在于,其包括驱动放大器、载波输入匹配网络、载波功率放大器、峰值输入匹配网络、峰值功率放大器、第一输出匹配网络以及第二输出匹配网络;A kind of Doherty radio frequency power amplifier, it is characterized in that, it comprises driver amplifier, carrier input matching network, carrier power amplifier, peak input matching network, peak power amplifier, first output matching network and second output matching network;
    所述驱动放大器的输入端作为所述Doherty射频功率放大器的输入端;The input end of described driving amplifier is used as the input end of described Doherty radio frequency power amplifier;
    所述驱动放大器的输出端分别连接所述载波输入匹配网络的输入端和所述峰值输入匹配网络的输入端;The output end of the drive amplifier is respectively connected to the input end of the carrier input matching network and the input end of the peak input matching network;
    所述载波输入匹配网络的输出端连接至所述载波功率放大器的输入端;The output terminal of the carrier input matching network is connected to the input terminal of the carrier power amplifier;
    所述载波功率放大器的输出端连接至所述第一输出匹配网络的输入端;The output terminal of the carrier power amplifier is connected to the input terminal of the first output matching network;
    所述峰值输入匹配网络的输出端连接至所述峰值功率放大器的输入端;The output terminal of the peak input matching network is connected to the input terminal of the peak power amplifier;
    所述峰值功率放大器的输出端分别连接至所述第二输出匹配网络的输入端和所述第一输出匹配网络的输出端;The output end of the peak power amplifier is respectively connected to the input end of the second output matching network and the output end of the first output matching network;
    所述第二输出匹配网络的输出端作为所述Doherty射频功率放大器的输出端,以用于连接系统负载;The output end of the second output matching network is used as the output end of the Doherty radio frequency power amplifier for connecting the system load;
    其中,所述载波输入匹配网络和所述第一输出匹配网络均包括用于90度相移和阻抗变换的相位补偿网络;Wherein, both the carrier input matching network and the first output matching network include a phase compensation network for 90-degree phase shift and impedance transformation;
    所述相位补偿网络为高通T型网络、高通π型网络、低通T型网络以及低通π型网络中的任意一种。The phase compensation network is any one of a high-pass T-type network, a high-pass π-type network, a low-pass T-type network and a low-pass π-type network.
  2. 根据权利要求1所述的Doherty射频功率放大器,其特征在于,所述载波输入匹配网络为高通T型网络或高通π型网络;所述第一输出匹配网络为低通T型网络或低通π型网络。The Doherty RF power amplifier according to claim 1, wherein the carrier input matching network is a high-pass T-type network or a high-pass π-type network; the first output matching network is a low-pass T-type network or a low-pass π-type network type network.
  3. 根据权利要求2所述的Doherty射频功率放大器,其特征在于,所述载波输入匹配网络为高通T型网络;所述第一输出匹配网络为低通π型网络。The Doherty radio frequency power amplifier according to claim 2, wherein the carrier input matching network is a high-pass T-type network; the first output matching network is a low-pass π-type network.
  4. 根据权利要求3所述的Doherty射频功率放大器,其特征在于,所述驱动放大器、所述载波功率放大器以及所述峰值功率放 大器均采用晶体管实现。Doherty radio frequency power amplifier according to claim 3, is characterized in that, described driver amplifier, described carrier power amplifier and described peak power amplifier all adopt transistor to realize.
  5. 根据权利要求4所述的Doherty射频功率放大器,其特征在于,Doherty radio frequency power amplifier according to claim 4, is characterized in that,
    所述载波输入匹配网络包括第三电感、第二电容以及第三电容;所述第二电容的第一端作为所述载波输入匹配网络的输入端,且所述第二电容的第一端连接至所述第一晶体管的集电极;所述第二电容的第二端分别连接至所述第三电容的第一端和所述第三电感的第一端;所述第三电感的第二端连接至接地;所述第三电容的第二端作为所述载波输入匹配网络的输出端;The carrier input matching network includes a third inductor, a second capacitor, and a third capacitor; the first end of the second capacitor is used as an input end of the carrier input matching network, and the first end of the second capacitor is connected to to the collector of the first transistor; the second end of the second capacitor is respectively connected to the first end of the third capacitor and the first end of the third inductor; the second end of the third inductor The terminal is connected to ground; the second terminal of the third capacitor is used as the output terminal of the carrier input matching network;
    所述第一输出匹配网络包括第五电容、第六电容以及第四电感;所述第四电感的第一端作为所述第一输出匹配网络的输入端,且所述第四电感的第一端分别连接至所述第二晶体管的集电极和所述第五电容的第一端;所述第四电感的第二端作为所述峰值功率放大器的输出端,且所述第四电感的第二端连接至所述第六电容的第一端;所述第五电容的第二端连接至接地;所述第六电容的第二端连接至接地。The first output matching network includes a fifth capacitor, a sixth capacitor, and a fourth inductor; the first end of the fourth inductor serves as an input end of the first output matching network, and the first end of the fourth inductor terminals are respectively connected to the collector of the second transistor and the first terminal of the fifth capacitor; the second terminal of the fourth inductance is used as the output terminal of the peak power amplifier, and the first terminal of the fourth inductance The two terminals are connected to the first terminal of the sixth capacitor; the second terminal of the fifth capacitor is connected to the ground; the second terminal of the sixth capacitor is connected to the ground.
  6. 根据权利要求5所述的Doherty射频功率放大器,其特征在于,所述驱动放大器包括第一电感、第二电感、第一电容、第一晶体管以及第一偏置电路;所述第一电容的第一端作为所述驱动放大器的输入端,且所述第一电容的第一端通过串联所述第一电感后连接至接地,所述第一电容的第二端分别连接至所述第一晶体管的基极和所述第一偏置电路的输出端,所述第一晶体管的发射极连接至接地,所述第一晶体管的集电极作为所述驱动放大器的输出端,所述第一晶体管的集电极分别连接至所述第二电感的第二端、所述载波输入匹配网络的输入端和所述峰值输入匹配网络的输入端;所述第二电感的第一端连接至电源电压;所述第一偏置电路的输入端连接至参考电压。The Doherty radio frequency power amplifier according to claim 5, wherein the driving amplifier comprises a first inductance, a second inductance, a first capacitor, a first transistor and a first bias circuit; the first capacitor of the first capacitor One end is used as the input end of the driving amplifier, and the first end of the first capacitor is connected to ground after being connected in series with the first inductor, and the second end of the first capacitor is respectively connected to the first transistor The base of the first bias circuit and the output terminal of the first bias circuit, the emitter of the first transistor is connected to the ground, the collector of the first transistor is used as the output terminal of the driving amplifier, and the first transistor’s The collector is respectively connected to the second end of the second inductor, the input end of the carrier input matching network and the input end of the peak input matching network; the first end of the second inductor is connected to the power supply voltage; The input end of the first bias circuit is connected to the reference voltage.
  7. 根据权利要求5所述的Doherty射频功率放大器,其特征在于,所述载波功率放大器包括第二偏置电路和第二晶体管;所述第二晶体管的基极作为所述载波功率放大器的输入端,且所述第二 晶体管的基极分别连接至所述第三电容的第二端和所述第二偏置电路的输出端;所述第二晶体管的发射极连接至接地;所述第二晶体管的集电极作为所述载波功率放大器的输出端;所述第二偏置电路的输入端连接至参考电压。The Doherty radio frequency power amplifier according to claim 5, wherein the carrier power amplifier includes a second bias circuit and a second transistor; the base of the second transistor is used as the input terminal of the carrier power amplifier, And the base of the second transistor is respectively connected to the second end of the third capacitor and the output end of the second bias circuit; the emitter of the second transistor is connected to ground; the second transistor The collector of the carrier power amplifier is used as the output terminal of the carrier power amplifier; the input terminal of the second bias circuit is connected to the reference voltage.
  8. 根据权利要求5所述的Doherty射频功率放大器,其特征在于,所述峰值输入匹配网络包括第四电容;所述第四电容的第一端作为所述峰值输入匹配网络的输入端,且所述第四电容的第一端连接至所述第一晶体管的集电极;所述第四电容的第二端作为所述峰值输入匹配网络的输出端;The Doherty radio frequency power amplifier according to claim 5, wherein the peak input matching network includes a fourth capacitor; the first end of the fourth capacitor is used as the input of the peak input matching network, and the The first end of the fourth capacitor is connected to the collector of the first transistor; the second end of the fourth capacitor is used as the output end of the peak input matching network;
    所述峰值功率放大器包括第三偏置电路和第三晶体管;所述第三晶体管的基极作为所述峰值功率放大器的输入端,且所述第三晶体管的基极连接至所述第四电容的第二端和所述第三偏置电路的输出端;所述第三晶体管的发射极连接至接地;所述第三晶体管的集电极作为所述峰值功率放大器的输出端;所述第三偏置电路的输入端连接至参考电压。The peak power amplifier includes a third bias circuit and a third transistor; the base of the third transistor is used as the input of the peak power amplifier, and the base of the third transistor is connected to the fourth capacitor The second terminal of the second terminal and the output terminal of the third bias circuit; the emitter of the third transistor is connected to the ground; the collector of the third transistor is used as the output terminal of the peak power amplifier; the third The input terminal of the bias circuit is connected to a reference voltage.
  9. 根据权利要求5所述的Doherty射频功率放大器,其特征在于,所述第二输出匹配网络包括第五电感、第六电感、第七电感、第七电容以及第八电容;所述第五电感的第一端作为所述第二输出匹配网络的输入端,且所述第五电感的第一端分别连接至所述第三晶体管的集电极和所述第六电感的第二端;所述第六电感的第一端连接至电源电压;所述第五电感的第二端分别连接至所述第七电容的第一端和所述第八电容的第一端;所述第七电容的第二端连接至接地;所述第八电容的第二端作为所述第二输出匹配网络的输出端,且所述第八电容的第二端连接至所述第七电感的第一端;所述第七电感的第二端连接至接地。Doherty radio frequency power amplifier according to claim 5, is characterized in that, described second output matching network comprises the 5th inductance, the 6th inductance, the 7th inductance, the 7th electric capacity and the 8th electric capacity; The first end is used as the input end of the second output matching network, and the first end of the fifth inductor is respectively connected to the collector of the third transistor and the second end of the sixth inductor; The first end of the six inductors is connected to the power supply voltage; the second end of the fifth inductor is respectively connected to the first end of the seventh capacitor and the first end of the eighth capacitor; the first end of the seventh capacitor The two ends are connected to ground; the second end of the eighth capacitor is used as the output end of the second output matching network, and the second end of the eighth capacitor is connected to the first end of the seventh inductor; The second end of the seventh inductor is connected to ground.
  10. 根据权利要求1所述的Doherty射频功率放大器,其特征在于,所述载波输入匹配网络、所述峰值输入匹配网络、所述第一输出匹配网络以及所述第二输出匹配网络均为集总参数电路。The Doherty RF power amplifier according to claim 1, wherein the carrier input matching network, the peak input matching network, the first output matching network and the second output matching network are lumped parameters circuit.
PCT/CN2022/125438 2021-11-05 2022-10-14 Doherty radio frequency power amplifier WO2023078062A1 (en)

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CN216390917U (en) * 2021-11-05 2022-04-26 深圳飞骧科技股份有限公司 Doherty radio frequency power amplifier
CN115955203A (en) * 2022-12-30 2023-04-11 尚睿微电子(上海)有限公司 Power amplifying circuit

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WO2020208813A1 (en) * 2019-04-12 2020-10-15 三菱電機株式会社 Doherty amplifier circuit
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JP2018074255A (en) * 2016-10-25 2018-05-10 サムソン エレクトロ−メカニックス カンパニーリミテッド. Doherty amplifier
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