CN106537769B - Systems and methods relating to linear and efficient wideband power amplifiers - Google Patents

Abstract

Systems and methods related to linear and efficient wideband power amplifiers. A Power Amplifier (PA) system may include: an input circuit configured to receive a Radio Frequency (RF) signal and to divide the RF signal into a first portion and a second portion. The PA system may further include: a Doherty amplifier circuit includes a carrier amplification path coupled to the input circuit to receive the first portion and a peaking amplification path coupled to the input circuit to receive the second portion. The PA system may further include: an output circuit coupled to the Doherty amplifier circuit. The output circuit may include: a balanced-to-unbalanced (BALUN) circuit configured to combine outputs of the carrier amplification path and the peaking amplification path to generate an amplified RF signal.

Description

Systems and methods relating to linear and efficient wideband power amplifiers

Cross Reference to Related Applications

The present application claims priority from U.S. provisional application No.61/992,842 entitled "SYSTEMS AND METHODS RELATED TO LINEAR AND EFFICIENT broad AND POWER AMPLIFIERS" filed 5, 13, 2014, U.S. provisional application No.61/992,843 entitled "DEVICES AND METHODS RELATED TO combined FOR POWER AMPLIFIERS" filed 5, 13, 2014, AND U.S. provisional application No.61/992,844 entitled "filed 5, 13, 2014, SYSTEMS AND METHODS RELATED TO LINEAR LOAD MODULATED POWER", filed 5, 13, 2014, the disclosures of which are hereby expressly incorporated herein by reference in their entirety.

The present disclosure relates TO U.S. patent application No.14/797,254 entitled "SYSTEMS AND METHODS RELATED TO LINEAR AND EFFICIENT branched AND POWER AMPLIFIERS" filed on 7, 13, 2015, U.S. patent application No.14/797,275 entitled "SYSTEMS AND METHODS RELATED TO LINEAR LOAD MODULATED POWER AMPLIFIERS" filed on 7, 13, 2015, AND U.S. patent application No.14/797,261 entitled "filed on 7, 13, 2015, filed on 7, 13, AND having a RELATED publication TO combined FOR POWER amplifier AMPLIFIERS" the disclosures of which are hereby expressly incorporated herein by reference in their entirety.

Technical Field

The present disclosure relates generally to Radio Frequency (RF) Power Amplifiers (PAs).

Background

Traditionally, Doherty PAs have been widely considered unsuitable for linear PA applications in handheld devices due to size, complexity and non-linear behavior. In practice, in base station applications, a pre-distortion linearizer is typically used with a Doherty PA to meet the linearity requirement. As described herein, issues such as size, complexity, and linearity associated with a Doherty PA can be properly addressed.

Disclosure of Invention

According to some implementations, the present disclosure relates to a Power Amplifier (PA) system, comprising: an input circuit configured to receive a Radio Frequency (RF) signal and to divide the RF signal into a first portion and a second portion; a Doherty amplifier circuit including a carrier amplification path coupled to the input circuit to receive the first portion and a peaking amplification path coupled to the input circuit to receive the second portion; and an output circuit coupled to the Doherty amplifier circuit. The output circuit may include: a balanced-to-unbalanced (BALUN) circuit configured to combine outputs of the carrier amplification path and the peaking amplification path to generate an amplified RF signal.

In some embodiments, the PA system may further include a pre-driver amplifier configured to partially amplify the RF signal prior to being received by the input circuit. In some embodiments, at least one of the input circuit and the output circuit may be implemented as a lumped element circuit.

In some embodiments, the carrier amplification path may include a carrier amplifier and the peaking amplification path may include a peaking amplifier, each of the carrier amplifier and the peaking amplifier including a driver stage and an output stage. In some embodiments, the input circuit may include: a modified Wilkinson power divider configured to provide DC power to each of the carrier amplifier and the peaking amplifier. In some embodiments, DC power may be provided to the carrier amplifier and the peaking amplifier through choke inductors. In some embodiments, each of the carrier amplification path and the peaking amplification path may include a DC blocking capacitance. In some embodiments, the modified Wilkinson power divider may also be configured to provide impedance matching between the driver stage and the pre-driver amplifier. In some embodiments, each of the carrier amplification path and the peaking amplification path may include an LC matching circuit having a capacitance along the path and an inductive coupling to ground.

In some embodiments, the modified Wilkinson power divider may be configured to provide a desired phase shift to compensate or tune for the AM-PM effect associated with the peak amplifier. In some embodiments, the modified Wilkinson power divider may also be configured to provide a desired attenuation adjustment at the input of the carrier amplifier or peaking amplifier to compensate or tune for AM-AM effects associated with the carrier amplifier and peaking amplifier. In some embodiments, the modified Wilkinson power divider comprises: a capacitor coupling the first node to ground along a carrier amplification path; and an impedance coupling the second node to ground along the peak amplification path. In some embodiments, the modified Wilkinson power divider may further include an isolation resistance implemented between the first node and the second node, the isolation resistance selected to prevent or reduce a source-pulling effect between the carrier amplification path and the peaking amplification path.

In some embodiments, the BALUN circuit may include an LC BALUN transformer (transformer). In some embodiments, the peak amplifier may be configured to appear as a short circuit or low impedance node when in an off state, and the carrier amplifier may be configured to appear as a single-ended amplifier equivalent to a single-section matching network having a series inductance and a shunt capacitance when utilizing an LC BALUN transformer. In some embodiments, the LC BALUN transformer may be configured such that when in the low power mode, the impedance seen by the carrier amplifier increases. In some embodiments, the impedance seen by the carrier amplifier is approximately doubled when in the low power mode.

In some embodiments, the peaking amplifier may also be configured to operate in a similar manner as a push-pull amplifier in which the RF current from the carrier amplifier is affected by the RF current from the peaking amplifier. In some embodiments, push-pull operation may reduce even-harmonics (even-harmonics), thereby improving linearity.

In some embodiments, the LC BALUN transformer may include a first path coupling an output of the carrier amplifier to an output node, and a second path coupling an output of the peaking amplifier to the output node. In some embodiments, each of the first and second paths may be inductively coupled to a DC port to provide a DC feed to the output stage. In some embodiments, each of the first and second paths may include a harmonic trap. In some embodiments, the harmonic trap may include a second harmonic trap having an LC shunt to ground and a series inductance. In some embodiments, the second path may include a shunt capacitance and a series capacitance configured to provide phase compensation for the output of the peaking amplifier. In some embodiments, at least one of the shunt capacitance and the series capacitance may be a Surface Mount Technology (SMT) capacitor.

In some embodiments, the LC BALUN transformer may be configured to provide reduced losses in the carrier amplification path to maintain high efficiency when back-off and in a high power mode.

In some embodiments, the load modulation of the peaking amplifier may be configured such that an impedance trajectory (impedance loci) of the peaking amplifier runs from an approximate short circuit when the peaking amplifier is in an off state to an optimal load impedance when the peaking amplifier contributes approximately the same power as the carrier amplifier.

In some embodiments, the input circuit may be a wideband circuit due, at least in part, to a lead-lag network configured to provide wideband phase shift.

In some embodiments, the input circuit is configured to provide reactive to actual impedance matching and isolation between the carrier amplifier and the peaking amplifier while providing broadband performance.

In some implementations, the present disclosure relates to a method for amplifying a Radio Frequency (RF) signal, the method comprising: providing a Doherty amplifier circuit having a carrier amplification path and a peak amplification path; receiving an RF signal; dividing the RF signal into a first portion and a second portion, the first portion being provided to a carrier amplification path and the second portion being provided to a peaking amplification path; and combining the outputs of the carrier amplification path and the peaking amplification path to produce an amplified RF signal using a balanced-to-unbalanced (BALUN) circuit.

In some implementations, the present disclosure relates to a power amplifier module. The power amplifier module may include: a package substrate configured to accommodate a plurality of components; and a Power Amplifier (PA) system implemented on the package substrate. The PA system may include: an input circuit configured to receive an RF signal and to divide the RF signal into a first portion and a second portion. The PA system may also include a Doherty amplifier circuit having a carrier amplification path coupled to the input circuit to receive the first portion and a peaking amplification path coupled to the input circuit to receive the second portion. The PA system may further include: an output circuit coupled to the Doherty amplifier circuit. The output circuit may include: a balanced-to-unbalanced (BALUN) circuit configured to combine outputs of the carrier amplification path and the peaking amplification path to generate an amplified RF signal. The power amplifier module may further include: a plurality of connectors configured to provide electrical connection between the PA system and the package substrate.

In some implementations, the disclosure relates to a wireless device comprising: a transceiver configured to generate a radio frequency signal; a Power Amplification (PA) module in communication with the transceiver; and an antenna in communication with the PA module, the antenna configured to facilitate transmission of the amplified RF signal. The PA module may include an input circuit configured to receive an RF signal and to divide the RF signal into a first portion and a second portion. The PA module may further include a Doherty amplifier circuit having a carrier amplification path coupled to the input circuit to receive the first portion and a peaking amplification path coupled to the input circuit to receive the second portion. The PA module may further include: an output circuit coupled to the Doherty amplifier circuit. The output circuit may include: a balanced-to-unbalanced (BALUN) circuit configured to combine outputs of the carrier amplification path and the peaking amplification path to generate an amplified RF signal. The transceiver may further include: an antenna, in communication with the PA module, configured to facilitate transmission of the amplified RF signal.

According to some implementations, the present disclosure relates to a signal combiner comprising: a Balun transformer circuit has a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between the third port and the fourth port. The first port and the third port are coupled by a first capacitance. The second port and the fourth port are coupled by the second capacitance. The first port is configured to receive a first signal. The fourth port is configured to receive a second signal. The second port is configured to produce a combination of the first signal and the second signal. The signal combiner further comprises: a termination circuit coupling the third port to ground.

In some embodiments, the first port may be configured to receive a carrier amplified signal from a Doherty Power Amplifier (PA) and the fourth port may be configured to receive a peak amplified signal from the Doherty PA. In some embodiments, the termination circuit may include a capacitor. In some embodiments, the capacitor may have a capacitance approximately equal to 2 times pi (pi) times the operating frequency of the Doerty PA times the inverse multiplication (multiplicative inverse) of the characteristic impedance of the load coupled to the Doherty PA.

In some embodiments, the first port may be configured to receive a peak amplified signal from a Doherty Power Amplifier (PA) and the fourth port is configured to receive a carrier amplified signal from the Doherty PA. In some embodiments, the termination circuit may include an inductor. In some embodiments, the inductor may have an inductance approximately equal to the characteristic impedance of a load coupled to the Doherty PA divided by the product of 2 times pi (pi) times the operating frequency of the Doherty PA.

In some embodiments, an S-parameter between a first one of the ports and a second one of the ports may be approximately equal to (1+ j)/2. In some embodiments, an S-parameter between a first one of the ports and a second one of the ports may be approximately equal to (1-j)/2. In some embodiments, the S-parameter matrix of S-parameters between ports may include only values of approximately 0, (1+ j)/2, and (1-j)/2.

In some embodiments, the balun transformer circuit may be implemented as an integrated passive device. In some embodiments, the integrated passive device also implements an automatic transformer-based impedance matching circuit.

In some implementations, the present disclosure relates to a Power Amplifier (PA) module, comprising: a package substrate configured to accommodate a plurality of components; and a signal combiner implemented on the package substrate. The signal combiner includes a balun transformer circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between the third port and the fourth port. The first port and the third port are coupled by a first capacitance. The second port and the fourth port are coupled by the second capacitance. The first port is configured to receive a first signal. The fourth port is configured to receive a second signal. The second port is configured to produce a combination of the first signal and the second signal. The signal combiner further includes a termination circuit coupling the third port to ground.

In some embodiments, the balun transformer circuit may be implemented as an integrated passive device. In some embodiments, the integrated passive device may also implement an automatic transformer-based impedance matching circuit.

In some embodiments, the PA module may further include a Doherty PA implemented on the package substrate. The Doherty PA can have a carrier amplification path that produces a carrier amplified signal and a peak amplification path that produces a peak amplified signal. In some embodiments, the first port may be configured to receive a carrier amplified signal and the fourth port may be configured to receive a peak amplified signal. In some embodiments, the termination circuit may include a capacitor having a capacitance approximately equal to 2 times pi times the operating frequency of the Doerty PA times the multiplicative inverse of the characteristic impedance of the load coupled to the Doherty PA. In some embodiments, the first port may be configured to receive a peak amplified signal and the fourth port may be configured to receive a carrier amplified signal. In some embodiments, the termination circuit may include an inductor having an inductance approximately equal to the characteristic impedance of a load coupled to the Doherty PA divided by 2 times pi times the operating frequency of the Doherty PA.

In some embodiments, the S-parameter matrix of S-parameters between ports includes only values of approximately 0, (1+ j)/2, and (1-j)/2.

In some implementations, the disclosure relates to a wireless device comprising: a transceiver configured to generate a Radio Frequency (RF) signal. The wireless device also includes a Power Amplifier (PA) module in communication with the transceiver. The PA module includes an input circuit configured to receive an RF signal and to divide the RF signal into a first portion and a second portion. The PA module also includes a Doherty PA having a carrier amplification path coupled to the input circuit to receive the first portion and a peaking amplification path coupled to the input circuit to receive the second portion. The PA module also includes an output circuit coupled to the Doherty amplifier circuit. The output circuit includes a balun converter circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between the third port and the fourth port. The first port and the third port are coupled by a first capacitance. The second port and the fourth port are coupled by the second capacitance. The first port is configured to receive a first signal via a carrier amplification path. The fourth port is configured to receive a second signal via a peaking amplification path. The second port is configured to produce a combination of the first signal and the second signal as an amplified RF signal. The wireless device also includes an antenna in communication with the PA module. The antenna is configured to facilitate transmission of the amplified RF signal.

In some implementations, the present disclosure relates to a method for amplifying a Radio Frequency (RF) signal. The method comprises the following steps: providing a Doherty amplifier circuit having a carrier amplification path and a peak amplification path; receiving an RF signal; dividing the RF signal into a first portion and a second portion, the first portion being provided to a carrier amplification path and the second portion being provided to a peaking amplification path; and combining an output of the carrier amplification path and an output of the peaking amplification path to generate an amplified RF signal using a balun circuit. The balun transformer circuit includes a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between the third port and the fourth port. The first port and the third port are coupled by a first capacitance. The second port and the fourth port are coupled by a second capacitance. The first port is configured to receive an output of a carrier amplification path. The fourth port is configured to receive an output of a peaking amplification path. The second port is configured to generate an amplified RF signal.

According to some implementations, the present disclosure relates to a Power Amplifier (PA) system, comprising: an input circuit configured to receive a Radio Frequency (RF) signal and to divide the RF signal into a first portion and a second portion. The PA system further includes: a Doherty amplifier circuit includes a carrier amplifier coupled to the input circuit to receive the first portion and a peaking amplifier coupled to the input circuit to receive the second portion. The first and second portions have different phases and different powers. The PA system further includes: an output circuit coupled to the Doherty amplifier circuit. The output circuit is configured to combine the outputs of the carrier amplifier and the peaking amplifier to produce an amplified RF signal.

In some embodiments, the input circuit may include a phase shifter configured such that the first portion and the second portion have different phases. In some embodiments, the phase shifter and the peaking amplifier may be implemented in a peaking amplification path. In some embodiments, the first portion and the second portion may have a phase difference between 10 degrees and 20 degrees. In some embodiments, the different phases may reduce at least one of AM/AM distortion or AM/PM distortion compared to the same phase.

In some embodiments, the input circuit may include an attenuator configured such that the first portion and the second portion have different powers. In some embodiments, an attenuator and a carrier amplifier may be implemented in the carrier amplification path. In some embodiments, the different power may reduce at least one of AM/AM distortion or AM/PM distortion compared to an equal power.

In some embodiments, the input circuit may include a pre-driver amplifier.

In some embodiments, the peak amplifier comprises: a driver stage configured to operate in a first bias mode; and an output stage configured to operate in a first bias mode. In some embodiments, the first bias pattern is a class B bias pattern. In some embodiments, the class B bias mode improves the PAE of the peak amplifier compared to the class AB bias mode. In some embodiments, the carrier amplifier includes a driver stage configured to operate in a second bias mode. In some embodiments, the second bias mode is a class AB bias mode. In some embodiments, the carrier amplifier further comprises an output stage configured to operate in a first bias mode. In some embodiments, the carrier amplifier further comprises an output stage configured to operate in the second bias mode.

In some implementations, the present disclosure relates to a Power Amplifier (PA) module. The PA module includes: a package substrate configured to accommodate a plurality of components; and a PA system implemented on the package substrate. The PA system includes: an input circuit configured to receive a Radio Frequency (RF) signal and to divide the RF signal into a first portion and a second portion. The PA system further includes: a Doherty amplifier circuit includes a carrier amplifier coupled to the input circuit to receive the first portion and a peaking amplifier coupled to the input circuit to receive the second portion. The first and second portions have different phases and different powers. The PA system also includes an output circuit coupled to the Doherty amplifier circuit. The output circuit is configured to combine the outputs of the carrier amplifier and the peaking amplifier to produce an amplified RF signal.

In some embodiments, at least one of the input circuit or the output circuit may be implemented as an integrated passive device. In some embodiments, at least one of the input circuit or the output circuit may be implemented on a single GaAs die.

In some implementations, the present disclosure relates to a wireless device. The wireless device includes: a transceiver configured to generate a Radio Frequency (RF) signal. The wireless device includes: a Power Amplifier (PA) module in communication with the transceiver. The PA module includes: an input circuit configured to receive an RF signal and to divide the RF signal into a first portion and a second portion. The PA module includes: a Doherty amplifier circuit includes a carrier amplifier coupled to the input circuit to receive the first portion and a peaking amplifier coupled to the input circuit to receive the second portion. The first and second portions have different phases and different powers. The PA module includes: an output circuit coupled to the Doherty amplifier circuit. The output circuit is configured to combine the outputs of the carrier amplifier and the peaking amplifier to produce an amplified RF signal. The wireless device further includes: an antenna in communication with the PA module. The antenna is configured to facilitate transmission of the amplified RF signal.

In some implementations, the present disclosure relates to a method for amplifying a Radio Frequency (RF) signal. The method comprises the following steps: providing a Doherty amplifier circuit having a carrier amplification path and a peaking amplification path; receiving an RF signal; dividing an RF signal into a first portion and a second portion, the first portion provided to a carrier amplification path and the second portion provided to a peaking amplification path, the first portion and the second portion having different phases and different powers; and combining the output of the carrier amplification path and the output of the peaking amplification path to produce an amplified RF signal.

For the purposes of summarizing the disclosure, certain aspects, advantages and novel features of the invention have been described herein. It is to be understood that not necessarily all such advantages may be achieved in accordance with any particular embodiment of the invention. Thus, the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other advantages as may be taught or suggested herein.

Drawings

Fig. 1 illustrates that in some embodiments the power amplifier may be implemented as a linear and efficient wideband power amplifier.

Fig. 2 illustrates an example architecture of a power amplifier including a carrier amplification path and a peaking amplification path.

Fig. 3 shows an example configuration of a modified Wilkinson-type power divider.

Fig. 4 illustrates an example configuration of a combiner that can provide a balanced-to-unbalanced (BALUN) transformer function.

Fig. 5 shows a first example load modulation profile (profile) of a carrier amplifier and a peak amplifier using a BALUN transformer configuration.

Fig. 6 shows a second example load modulation profile for a carrier amplifier and a peaking amplifier using a BALUN transformer configuration.

Fig. 7 shows an example configuration of a power amplifier including a modified Wilkinson-type power divider.

FIG. 8 illustrates an example wideband phase shift response.

Fig. 9 shows an example impedance response including a harmonic trap (harmonic trap).

Fig. 10 shows an example adjacent channel leakage power ratio (ACLR) curve and Power Added Efficiency (PAE) curve.

Fig. 11 depicts a wireless device having one or more features described herein.

Fig. 12 shows an example combiner configuration with both the carrier amplifier and the peaking amplifier in an on state.

Fig. 13 shows an example combiner configuration with the carrier amplifier in an on state and the peaking amplifier in an off state.

Fig. 14 shows an example Doherty combiner that includes two or more quarter-wave transmission lines.

Fig. 15 shows an example Smith chart for the combiner of fig. 14.

Fig. 16 shows an example Doherty combiner including a 3dB coupler.

Fig. 17 shows an example Smith chart for the combiner of fig. 16.

Fig. 18 shows an example hybrid circuit that can be used as a Doherty combiner.

Fig. 19 shows another example hybrid circuit that can be used as a Doherty combiner.

Fig. 20 shows an example S-parameter matrix for the combiner of fig. 16.

Fig. 21 shows an example S-parameter matrix for the combiner of fig. 18.

FIG. 22 illustrates an example Doherty combiner configuration using the hybrid circuit of FIG. 18.

Fig. 23 shows the impedance traces resulting from the Doherty behavior in the combiner of fig. 22.

Fig. 24 shows another example Doherty combiner configuration using the hybrid circuit of fig. 18.

Fig. 25 shows the integration of hybrid circuits and automatic transformer based impedance matching as an example of an Integrated Passive Device (IPD).

Fig. 26 shows an example Smith chart with inverted (inverted) load modulation trajectories.

Fig. 27 shows another example of integration of a hybrid circuit as an IPD.

Fig. 28 illustrates an example architecture of a power amplifier that may implement a Doherty combiner having one or more features as described herein.

Fig. 29 depicts a wireless device having one or more features described herein.

Fig. 30 illustrates an example architecture of a Power Amplifier (PA) having one or more features as described herein.

Fig. 31 shows an example of a combiner circuit for a Doherty PA.

Fig. 32 shows an example of a divider circuit for a Doherty PA.

Fig. 33 shows an example of a power divider that may be used as the divider of fig. 30.

Fig. 34 shows another example of a power divider that may be used as the divider of fig. 30.

Fig. 35 shows an example of a combiner that can be used as the combiner of fig. 30.

Fig. 36 shows another example of a combiner that can be used as the combiner of fig. 30.

Fig. 37 shows an example of a low margin class AB bias circuit.

Fig. 38 shows an example of a low margin class B bias circuit.

Fig. 39 shows an example of the beneficial effect of using class B biasing of the driver stage for the peak amplifier.

Fig. 40 shows another example of the beneficial effect of using class B biasing of the driver stage for the peak amplifier.

Fig. 41 shows an example of the linearization effect that can be obtained by introducing a phase shift between the RF signals associated with carrier amplification and peak amplification.

Fig. 42 shows an example of the linearization effect that can be obtained by introducing an uneven power division between the RF signals associated with carrier amplification and peak amplification.

Fig. 43 shows an example of a combined linearization effect that can be obtained by a combination of phase shifting and non-uniform power division.

Fig. 44 shows an example graph of Power Added Efficiency (PAE) and Adjacent Channel Power (ACP) at various operating frequencies for a Front End Module (FEM).

Fig. 45 depicts a wireless device having one or more features described herein.

Detailed Description

The headings, if any, are provided herein for convenience only and do not necessarily affect the scope or meaning of the claimed invention. Systems, devices, circuits, and methods related to Radio Frequency (RF) Power Amplifiers (PAs) are described herein.

Power amplifier using Balun transformer

Fig. 1 illustrates that in some embodiments, a PA100 having one or more features as described herein may be configured to provide broadband capabilities with either or both of desired linearity and efficiency. The PA100 is shown receiving an RF signal (RF _ IN) and generating an amplified signal (RF _ OUT). Various examples relating to such PAs are described in more detail herein.

Fig. 2 illustrates an example architecture of a PA100 having one or more examples as described herein. The architecture shown is the Doherty PA architecture. Although various examples are described in the context of such a Doherty PA architecture, it will be understood that one or more features of the present disclosure may also be implemented in other types of PA systems.

The example PA100 is shown to include an input port (RF _ IN) for receiving an RF signal to be amplified. Such an input RF signal may be partially amplified by the pre-driver amplifier 102 before being split into the carrier amplification path 110 and the peak amplification path 130. Such segmentation may be implemented by a segmenter 104. Examples related to segmenter 104 are described in more detail herein, including with reference to the examples of fig. 3 and 7.

In fig. 2, the carrier amplification path 110 is shown to include an attenuator 112 and an amplification stage, generally designated 114. The amplification stage 114 is shown as including a driver stage 116 and an output stage 120. Driver stage 116 is shown as being biased by bias circuit 118, and output stage 120 is shown as being biased by bias circuit 122. In some embodiments, there may be a greater or lesser number of amplification stages. In the various examples described herein, the amplification stage 114 is sometimes described as an amplifier; however, it will be appreciated that such an amplifier may comprise one or more stages.

In fig. 2, the peak amplification path 130 is shown as including a phase shift circuit 132 and an amplification stage, generally designated 134. The amplifier stage 134 is shown as including a driver stage 136 and an output stage 140. The driver stage 136 is shown biased by a bias circuit 138, and the output stage 140 is shown biased by a bias circuit 142. In some embodiments, there may be a greater or lesser number of amplification stages. In the various examples described herein, the amplification stage 134 is sometimes described as an amplifier; however, it will be appreciated that such an amplifier may comprise one or more stages.

Fig. 2 further illustrates that carrier amplification path 110 and peaking amplification path 130 may be combined by combiner 144 to produce an amplified RF signal at an output port (RF _ OUT). Examples related to combiner 144 are described in more detail herein, including with reference to the examples of fig. 4 and 7.

In some embodiments, divider 104 of fig. 2 may be implemented as a lumped element power divider. Such a power divider may be implemented as a modified Wilkinson-type power divider configured to provide DC power to each of the driver stages (e.g., 116 and 136 in fig. 2). Fig. 3 shows an example configuration of a modified Wilkinson-type power divider 104 that may be implemented as divider 104 of fig. 2. Fig. 7 shows an example of how a modified Wilkinson-type power divider 104 may be implemented in the circuit example of the PA100 of fig. 2.

In fig. 3, the modified power divider 104 is shown to include an input port 150 configured to receive an input RF signal. As shown in the example PA circuit 100 of fig. 7, the input port 150 may be coupled to the collector (collector) of the transistor Q0 of the pre-driver amplifier 102. Input port 150 is also shown coupled to divider node 156 through node 152. Node 152 is shown coupled to DC power supply port 154 through an inductance L1 (e.g., an inductor). DC power for each of the driver stages may be obtained through the DC supply port 154. In fig. 3, L1 may be part of a modified Wilkinson-type divider that matches the impedance seen in the divider to the impedance presented to the pre-driver PA collector. Meanwhile, L1 may be used as a DC path for the predriver.

In fig. 3, the carrier amplification path (110 in fig. 2) is shown as including a path from divider node 156 through capacitance C1, node 158, and capacitance C3 to node 160. Node 160 may or may not be connected to port 162 to facilitate coupling of the aforementioned path to a carrier amplifier (e.g., 114 in fig. 2). Node 158 is shown coupled to ground through a capacitor C2. Node 160 is shown coupled to ground through an inductance L2.

In fig. 3, the peak amplification path (130 in fig. 2) is shown as including a path from divider node 156 through capacitance C4, node 164, and capacitance C5 to node 166. Node 166 may or may not be connected to port 168 to facilitate coupling of the aforementioned path to a peak amplifier (e.g., 134 in fig. 2). Node 164 is shown coupled to ground through an inductance L3. Node 166 is shown coupled to ground through an inductance L4.

In fig. 3, resistor R1 is shown coupling node 158 of the carrier amplification path and node 164 of the peaking amplification path. The resistance R1 may be selected to act as an isolation resistor to prevent or reduce source pull effects from the carrier and/or peak amplifier.

In fig. 3, the capacitor C1 may be selected to provide a DC blocking function for the carrier amplification path. Similarly, the capacitor C4 may be selected to provide a DC blocking function for the peaking amplification path.

In fig. 3, the capacitance C3 and the inductance L2 may be selected to provide impedance matching between the pre-driver amplifier (e.g., 102 in fig. 2 and 7) and the carrier amplifier 114. Similarly, C5 and inductor L4 may be selected to provide impedance matching between the pre-driver amplifier (e.g., 102 in fig. 2 and 7) and peak amplifier 134.

In fig. 3, the capacitance C2 associated with the carrier amplification path and the inductance L3 associated with the peak amplification path may be selected to provide a desired phase shift between the two paths. Such a phase shift may be selected, for example, to compensate and/or tune for AM-PM phenomena associated with peak amplifier 134. In fig. 2, such a phase shift function is depicted as block 132 along the peak amplification path 130.

In some embodiments, and as shown in fig. 2, an attenuator 112 may be provided along the carrier amplification path 110 (e.g., before the carrier amplifier 114) or the peaking amplification path 130 (e.g., before the peaking amplifier 134). Such attenuators may be configured to provide desired attenuation adjustments to compensate and/or tune AM-AM phenomena associated with either or both of the carrier and the peaking amplifier. Such an attenuator may also promote an uneven power division between the two amplification paths.

It is noted that the aforementioned correction and/or tuning of AM-AM and/or AM-PM effects may result in the PA100 of fig. 2 and 7 being substantially linear. Such linearity can be achieved without digital predistortion, which typically reduces the efficiency of the PA system and the suitability of the PA system in amplifiers for portable wireless devices. Furthermore, the linearity (without digital predistortion) achieved by the PA100 of fig. 2 and 7 may be similar to the linearity performance associated with a class AB single ended amplifier.

In some embodiments, the combiner 144 of fig. 2 may be implemented as or similar to a lumped element balanced-to-unbalanced (BALUN) transformer. Fig. 4 shows an example configuration of a combiner 144 that may provide such BALUN transformer functionality. Fig. 7 shows an example of how the combiner 144 may be implemented in the circuit example of the PA100 of fig. 2.

In fig. 4, combiner 144 is shown to include a portion of the carrier amplification path (e.g., 110 in fig. 2) and a portion of the peaking amplification path (130) joined at combining node 186. The combining node 186 is shown coupled to an output port 198 (RF _ OUT in fig. 2 and 7).

In fig. 4, the portion of the carrier amplification path is shown coupling the combining node 186 and the node 182 through the inductance L13. Node 182 may or may not be connected to port 180 to facilitate coupling of the aforementioned path to a carrier amplifier (e.g., 114 in fig. 2). Node 182 is shown coupled to ground through a capacitor C11 and an inductor L12. Node 182 is also shown coupled to port 184 through inductor L11.

In fig. 4, the portion of the peak amplification path is shown coupling the combined node 186 and the node 192 through the inductance L16, the node 196, and the capacitance C14. Node 192 may or may not be connected to port 190 to facilitate coupling of the aforementioned path to a peak amplifier (e.g., 134 in fig. 2). Node 192 is shown coupled to ground through a capacitor C12 and an inductor L15. Node 192 is also shown coupled to port 194 through inductor L14. Node L196 is shown coupled to ground through a capacitor C13.

In fig. 4, node 182 may be coupled to the collector of the output stage (e.g., 120 in fig. 2) of the carrier amplifier (114) through port 180. Thus, the DC feed may be provided to the output stage (120) of the carrier amplifier (114) through port 184 and inductor L11. Similarly, node 192 may be coupled to the collector of the output stage (e.g., 140 in fig. 2) of the peak amplifier (134) through port 190. Thus, a DC feed may be provided to the output stage (140) of the peaking amplifier (134) through port 194 and inductor L14.

In fig. 4, the capacitance C11, inductance L12, and inductance L13 may be selected to act as a second harmonic trap for the output of the carrier amplifier (114). Similarly, the capacitance C12, inductance L15, and inductance L16 may be selected to act as a second harmonic suppressor for the output of the peak amplifier (134).

In fig. 4, capacitor C13 and capacitor C14 may be selected to provide phase compensation for the output of the peak amplifier (134). In some embodiments, C13 and C14 may be implemented as Surface Mount Technology (SMT) capacitors. In such embodiments, combiner 144 may be implemented as a wideband power combiner using as few as two SMT capacitors.

The example combiner 144 of fig. 4 may provide the desired functionality for operation of the Doherty PA architecture. For example, the peaking amplifier in the Doherty PA architecture typically needs to behave as a short circuit or very low impedance path when it is turned off, and when an LC BALUN configuration is used, the carrier amplifier typically acts as a single-ended amplifier with an equivalent circuit similar or identical to a typical single-segment matching network (e.g., series L and bypass C). In such a state, the impedance seen by the carrier amplifier may be doubled.

When the peak amplifier is on, the PA system may operate in a similar manner as a "push-pull" amplifier. For example, the RF current from the carrier amplifier can see the current from the peak amplifier. In such a state, linearity can be improved because even harmonic content can be reduced.

As described herein, the combiner 144 with the example LC BALUN configuration may be implemented in a compact form using as few as two SMT components (e.g., capacitors). Such a combiner may be configured to provide impedance matching from, for example, a 50 ohm output to the transistor collector of the peak and carrier amplifiers, including the RF choke and harmonic suppressor.

As described herein, the combiner 144 with the example LC BALUN configuration may be implemented to reduce losses in the carrier amplifier path compared to other Doherty topologies. Such features may in turn facilitate efficient maintenance in fallback and high power modes. Further, the LC BALUN configuration may provide required or desired impedance and phase adjustments for the carrier amplifier. Such a feature may be important when designing an asymmetrically loaded Doherty transmitter.

In some embodiments, the load modulation associated with a peaking amplifier as described herein is generally the reverse of that in a conventional Doherty transmitter. Fig. 5 shows the load modulation profile of the carrier (200) and peak (202) amplifiers of a conventional Doherty transmitter using a BALUN transformer configuration. Fig. 6 illustrates the load modulation profile of the carrier (204) and peak (206) amplifiers (e.g., fig. 7) of a Doherty transmitter using a BALUN transformer configuration as described herein. For the peak amplifiers in fig. 5 and 6, it can be seen that the impedance traces run in opposite directions from their respective short circuit states (e.g., when the peak amplifier is off) to their respective optimum load impedance conditions (e.g., when the peak amplifier contributes the same power as the carrier amplifier). For the conventional example of fig. 5, as power increases, the impedance trace of the peak amplifier runs in the same direction as the impedance trace of the carrier amplifier. For the example of fig. 6, as power increases, the impedance trace of the peak amplifier runs in the opposite direction to the impedance trace of the carrier amplifier.

Fig. 7 illustrates an example of a PA100 having one or more features as described herein. The PA may include a pre-driver amplifier 102, such as a single-ended amplifier stage. The output of the pre-driver amplifier 102 is shown as being provided to a divider 104, such as the example described with reference to fig. 3. The split output of the splitter 104 is shown as being provided to the carrier amplifier 114 and the peaking amplifier 134. The outputs of the carrier amplifier 114 and the peak amplifier 134 are shown as being combined by a combiner 144, such as the example described with reference to fig. 4.

In the example PA100 of fig. 7, the divider 104 and the combiner 144 can produce wideband combining. For example, the splitter 104 is wideband in nature due to, for example, a lead-lag (lead-lag) network that provides wideband phase shift. An example of such a phase shifted response is shown as curve 250 in fig. 8. The example response curve 250 represents a typical phase difference between the matched reactive (reactive) base impedance and the driver amplifier collector. Note also that divider 104 provides advantageous features such as reactive to actual impedance matching, isolation between the carrier and peak amplifiers, and still produces broadband performance.

In another example, the combiner 144 with its LC BALUN configuration may also contribute to the broadband performance of the PA 100. As described herein, the LC BALUN may include a harmonic suppressor configured to keep the impedance locus within a lower constant Q circle. Examples of such impedance responses are shown as curves 260, 262 and 264 in fig. 9. Example response curves 260, 262, and 264 represent collector load impedance versus frequency for different values of ZP. ZP1 represents the load impedance seen by the carrier PA collector when both the carrier and peaking PAs are on (in operation), and in the example is about 5.7+ j0.119 ohms. ZP2 is the collector impedance at the collector of the peaking PA, which is similar to the previous case (e.g., the same impedance when both PAs are on). ZP4 is the impedance seen by the collector of the carrier PA when the peak PA is off, which effectively doubles to about 10.86+ j0.058 ohms in the example. Such a feature effectively increases the PA architecture bandwidth because the impedance does not extend along the Smith chart with respect to frequency.

PA architectures (including the examples of fig. 1-4 and 7) having one or more features as described herein may be configured to produce very good linearity and efficient wideband performance. For example, 21% relative bandwidth can be achieved for-37-dBc ACLR (adjacent channel leakage power ratio) using LTE signals (e.g., 10-MHz BW, QPSK, 12 RB). Fig. 10 shows an ACLR curve and a Power Added Efficiency (PAE) curve for different samples. The upper set of curves (270, 292) are the Power Added Efficiencies (PAEs) for 27.5 and 27dBm output power levels, respectively. The middle set of curves (274, 276) are ACLR1 for 27.5 and 27dBm output power levels, respectively. The dashed curve (278) is ACLR2 for 27.5dBm output power. In the context of ACLR performance, it can be seen that the-37-dBc ACLR bandwidth at 27-dBm output power is approximately 525MHz (e.g., between the markers "m 39" and "m 38"), which is approximately 21% of the center frequency of approximately 2500MHz (e.g., the marker "m 48"). Note that the bandwidth may be even wider if the ACLR level is allowed to increase.

In some implementations, devices and/or circuits having one or more of the features described herein can be included in an RF device, such as a wireless device. Such devices and/or circuitry may be implemented directly in the wireless device, in the form of modules as described herein, or in some combination thereof. In some embodiments, such wireless devices may include, for example, cellular telephones, smart phones, handheld wireless devices with or without telephone functionality, wireless tablets, and the like.

Fig. 11 schematically depicts an example wireless device 400 having one or more advantageous features described herein. In an example, one or more PAs 110, collectively labeled as PA architecture 100, may include one or more features as described herein. Such a PA may, for example, facilitate multi-band operation of wireless device 400.

The PA 110 may receive its respective RF signal from the transceiver 410, and the transceiver 410 may be configured and operable to generate RF signals to be amplified and transmitted, and to process the received signals. A transceiver 410 is shown interacting with the baseband subsystem 408, with the baseband subsystem 408 configured to provide conversion between data and/or voice signals appropriate for a user and RF signals appropriate for the transceiver 410. The transceiver 410 is also shown connected to a power management component 406 that is configured to manage power for operation of the wireless device 400. Such power management may also control the operation of the baseband subsystem 408 and the PA 110.

The baseband subsystem 408 is shown connected to the user interface 402 to facilitate various inputs and outputs for voice and/or data provided to and received from a user. The baseband subsystem 408 may also be coupled to memory 404, the memory 404 configured to store data and/or instructions to facilitate operation of the wireless device 400 and/or to provide storage of information for a user.

In the example wireless device 400, the output of the PA 110 is shown matched (via matching circuit 420) and routed to the antenna 416 via its respective duplexer 412a-412d and band selection switch 414. The band selection switch 414 may be configured to allow selection of an operating band. In some embodiments, each duplexer 412 may allow transmit and receive operations to be performed simultaneously using a common antenna (e.g., 416). In fig. 11, the received signal is shown as being routed to an "Rx" path (not shown), which may include, for example, a Low Noise Amplifier (LNA).

A number of other wireless device configurations may utilize one or more of the features described herein. For example, the wireless device need not be a multi-band device. In another example, the wireless device may include additional antennas, such as diversity antennas, and additional connection features, such as Wi-Fi, bluetooth, and GPS.

Signal combining for Balun transformers using wound coils

The combiner may be implemented as part of a Doherty PA and is typically used to provide multiple functions. For example, the combiner may be configured to provide equal power combining when the PA operates at full power. Fig. 12 shows an example of such a configuration, in which the combiner can be used as a conventional power combiner. In FIG. 12, the values of the various performance and operating parameters are examples; and may be adjusted appropriately for different applications.

Thus, in fig. 12, a configuration 2100 is illustrated in which the carrier amplifier 2110 and the peaking amplifier 2112 are in an on state. In some implementations, both the carrier amplifier 2110 and the peaking amplifier are saturated and have a Power Added Efficiency (PAE) of 50% or greater. The outputs of the carrier amplifier 2110 and the peak amplifier 2112 are fed to respective input ports 2131, 2132 of a transmission line combiner 2120. At the first input port 2131 and the second input port 2132, an impedance of 50 ohms may be presented. The transmission line combiner 2120 includes a 50 ohm transmission line 2121 coupled between the first input port 2131 and the second input port 2132, and a 35.5 ohm transmission line 2122 coupled between the second input port 2132 and the output port 2133. The input of the 35.5 ohm transmission line 2122 may present an impedance of 25 ohms.

In another example, the combiner may be configured to provide an impedance transformation between the PA and a load coupled to the PA. For example, when the peak amplifier is idle, a 2:1 impedance transformation may be achieved from the load to the output of the carrier amplifier. Such a transformation function is shown in fig. 13. Again, the values of the various performance and operating parameters are examples; and may be adjusted appropriately for different applications. The aforementioned function is desirable over as wide a portion of the bandwidth as possible in order to achieve economical coverage of multiple operating frequencies with one amplifier.

Thus, in fig. 13, configuration 2150 is illustrated in which carrier amplifier 2110 is in an on state and peak amplifier 2112 is in an off state. In some implementations, the carrier amplifier 2110 is saturated and has a PAE of 50% or greater. In such a configuration 2150, an impedance of 100 ohms may be presented at the first input port 2131 and a very high impedance (approximately an open circuit) may be presented at the second input port 2132.

Fig. 14 shows an example of a common Doherty combiner 2120 comprising two or more quarter- wave transmission lines 2121, 2122 arranged in such a way that both combining and impedance transforming functions are achieved. Such implementations are typically relatively bulky, especially at low frequencies. Accordingly, such a combiner 2120 may be particularly unsuitable for applications in devices such as RFICs (radio frequency integrated circuits), MMICs (monolithic microwave integrated circuits), and other RF modules. The impedance spread (spread) versus frequency for the Doherty combiner 2120 of fig. 14 is shown in the example Smith chart 2144 of fig. 15.

Other types of Doherty combiners can be based on lumped elements. Most of such implementations are limited to a relatively narrow operating band.

Fig. 16 shows another example of a Doherty combiner 2220 using a 3dB coupler 2221 with a termination impedance at the isolated port 2222 that is close to open. Even if such an implementation is more compact than the example combiner 2120 of fig. 14, it is still typically too large at low frequencies for applications such as RFICs, MMICs and other RF modules due to its quarter-wavelength. The combiner 2220 includes a 3db coupler 2221 having a first port coupled to the first input port 2231 of the combiner 2220, a second port coupled to the second input port 2232 of the combiner 2220, a third port coupled to the output port 2233 of the combiner 2220, and a fourth port (e.g., isolated port 2222) coupled to a near open termination impedance. The impedance dispersion versus frequency for the Doherty combiner 2220 of fig. 16 is shown in the example Smith chart 2244 of fig. 17.

Fig. 18 and 19 show examples of hybrid circuits that can be used as a Doherty combiner. Such hybrid circuits may be configured to be particularly suitable for applications such as RFICs, MMICs and other RF modules. Fig. 18 shows a schematic representation of such a hybrid circuit, and fig. 19 shows an example layout thereof.

The hybrid circuits of fig. 18 and 19 may be implemented as balun-based semi-lumped 90 degree hybrids. Due to the compact nature of the balun used, such a design can be easily implemented on insulating/semi-insulating substrates such as silicon, GaAs and IPD (e.g. glass or silicon).

In the hybrid circuits of fig. 18 and 19, the values of the various performance and operating parameters are examples; and may be adjusted appropriately for different applications.

Thus, in fig. 18, the signal combiner 2320 is shown as including a first port 2331, a second port 2332, a third port 2333, and a fourth port 2334. The first capacitor 2322 couples the first port 2331 and the second port 2332. The second capacitor 2323 couples the third port 2333 and the fourth port 2334. The signal combiner 2320 further includes a transformer 2321 having four ports coupled to the four ports 2331 and 2334, respectively, of the signal combiner 2320. In fig. 19, a substantially similar signal combiner 2390 is illustrated that includes a balun transformer 2391 that includes a first coil and a second coil.

Fig. 20 shows an example S-parameter (dispersion parameter) matrix that may represent the example of fig. 16, and fig. 21 shows an example S-parameter matrix that may represent the examples of fig. 18 and 19. It can be seen that the S-parameter matrix of fig. 21 is significantly different from the S-parameter matrix of fig. 20. In the example of fig. 16, open termination (termination) of an isolated port may result in Doherty behavior. In the examples of fig. 18 and 19, a specific termination (termination) may be provided at the isolated port to implement the Doherty action. Examples of terminals are described in more detail herein.

In some embodiments, it may be shown that such a particular terminal may be implemented as a capacitance (e.g., a capacitor) whose reactance is equal in magnitude to the characteristic impedance of the system. Thus, such a capacitance can be expressed as C ═ 1/(2 pi f Z)₀) Where f is the operating frequency of the Doherty PA and Z₀Is the characteristic impedance of the load coupled to the Doherty PA.

Fig. 22 shows an example of a Doherty combiner configuration 2400 using the hybrid circuits of fig. 18 and 19. The configuration 2400 includes: a first input port 2431, which may be configured to receive a carrier amplified signal of a Doherty PA; a second input port 2432, which may be configured to receive the peak amplified signal of the Doherty PA; and an output port 2433 that outputs a combination of signals received at the first input port 2431 and the second input port 2432. Configuration 2400 includes a converter (e.g., balun converter) having a first coil 2401 and a second coil 2402, the first coil 2401 being implemented between a first port 2411 and a second port 2412, the second coil 2402 being implemented between a third port 2413 and a fourth port 2414. The first port 2411 and the third port 2413 are coupled by a first capacitor 2421 and a second port 2412, and the fourth port 2414 is coupled by a second capacitor 2422. The third port 2413 is coupled to ground via a termination circuit, which in fig. 22 includes a third capacitor 2423. In some implementations, the capacitances of the first and second capacitors 2421 and 2422 are equal. In some implementations, the capacitance of the third capacitor 2423 is twice the capacitance of the first capacitor 2421 and/or the second capacitor 2422.

The impedance trace 2444 resulting from the Doherty behavior in the combiner 2400 of fig. 22 is shown in fig. 23. The spread of the impedance traces is slightly wider than that of the example of fig. 17, but better than that of the example of fig. 15. In the Doherty combiner of FIG. 22, the values of the various performance and operational parameters are examples; and may be adjusted appropriately for different applications.

It can be seen that L ═ Z₀An alternative configuration of the inductive terminations of/2 pi f may provide the Doherty combiner function in a similar manner. In which case the port locations of the carrier and peaking amplifiers may be swapped. Fig. 24 shows an example of using such inductive terminations.

The Doherty combiner configuration 2500 of fig. 24 includes: a first input port 2531, which may be configured to receive a carrier-amplified signal of the Doherty PA; a second input port 2532, which may be configured to receive a peak amplified signal of the Doherty PA; and an output port 2533 that outputs a combination of signals received at the first input port 2531 and the second input port 2532. Configuration 2500 includes a transformer (e.g., a balun transformer) having a first coil 2501 and a second coil 2502, the first coil 2501 being implemented between a first port 2511 and a second port 2512, the second coil 2502 being implemented between a third port 2513 and a fourth port 2514. The first port 2511 and the third port 2513 are coupled by a first capacitor 2521, and the second port 2512 and the fourth port 2514 are coupled by a second capacitor 2522. The third port 2513 is coupled to ground via a termination circuit, which in fig. 24 includes an inductor 2523. In the Doherty combiner 2500 of FIG. 24, the values of the various performance and operating parameters are examples; and may be adjusted appropriately for different applications.

In some embodiments, the examples described with reference to fig. 18, 19, and 20-24 are particularly useful for RFIC, MMIC, and RF module (e.g., hybrid module) configurations where impedance matching is achieved through the use of magnetic or automatic transformers. In some embodiments, the near-open output impedance of the peak amplifier device is not inverted by the matching circuit (invert), and may be presented as is at the peak amplifier port of the Doherty combiner.

Fig. 25 illustrates an example of integrating a hybrid circuit and automatic transformer-based impedance matching having one or more features as described herein into an Integrated Passive Device (IPD). Circuit 2600 includes IPD2602, which includes an impedance matching network 2610 that includes one or more automatic transformers. The IPD further comprises a combiner 2620, e.g. as described above. The circuit 2600 also includes an MMIC 2601 with a carrier amplifier 2611 and a peak amplifier 2612.

If an impedance inverse matching circuit is used, such as a Π -network, T-network, or quarter wave transformer, the peak amplifier when idle typically presents an impedance at the input of the Doherty combiner that is close to a short circuit. In such an example, an inverse load modulation trajectory is typically required or desired from the Doherty combiner (e.g., from 0.5 × Rload impedance to Rload impedance, as shown in the example Smith chart 2744 of fig. 26). In some embodiments, such functionality may be achieved by exchanging the carrier and peak amplifier inputs. Fig. 27 shows an example of such an exchange configuration. Thus, in fig. 27, circuit 2700 includes IPD 2702, which includes combiner 2720, e.g., as described above. Circuit 2700 also includes MMIC 2701, which has carrier amplifier 2711 and peak amplifier 2712. The circuit also includes an impedance inverse matching circuit 2710. Although not shown in fig. 27, the impedance inverse matching circuit 2710 may be implemented within the IPD 2702.

In fig. 25 to 27, the values of the respective performance and operation parameters are examples; and may be adjusted appropriately for different applications.

Fig. 28 illustrates an example architecture of a PA 2800 in which a Doherty combiner having one or more features as described herein may be implemented. The architecture shown is the Doherty PA architecture. Although various examples are described in the context of such a Doherty PA architecture, it will be understood that one or more features of the present disclosure may also be implemented in other types of PA systems.

The example PA 2800 is shown to include an input port (RF _ IN) for receiving an RF signal to be amplified. Such an input RF signal may be partially amplified by the pre-driver amplifier 2802 before being split into the carrier amplification path 2810 and the peak amplification path 2830. Such segmentation may be implemented by a segmenter 2804. Examples related to splitter 2804 (also referred to herein as a splitter or power splitter) are described in more detail herein.

In fig. 28, a carrier amplification path 2810 is shown as including an attenuator 2812 and an amplification stage generally designated 2814. Amplifier stage 2814 is shown to include a driver stage 2816 and an output stage 2820. Driver stage 2816 is shown biased by bias circuit 2818 and output stage 2820 is shown biased by bias circuit 2822. In some embodiments, there may be a greater or lesser number of amplification stages. In various examples described herein, the amplification stage 2814 is sometimes described as an amplifier; however, it will be appreciated that such an amplifier may comprise one or more stages.

In fig. 28, the peak amplification path 2830 is shown as including a phase shift circuit 2832 and an amplification stage, generally designated 2834. Amplifier stage 2834 is shown as including a driver stage 2836 and an output stage 2840. Driver stage 2836 is shown biased by bias circuit 2838, and output stage 2840 is shown biased by bias circuit 2842. In some embodiments, there may be a greater or lesser number of amplification stages. In various examples described herein, the amplification stage 2834 is sometimes described as an amplifier; however, it will be appreciated that such an amplifier may comprise one or more stages.

Fig. 28 further illustrates that the carrier amplification path 2810 and the peaking amplification path 2830 may be combined by a combiner 2844 to produce an amplified RF signal at the output port (RF _ OUT). Examples related to combiner 2844 are described in more detail herein. For example, combiner 2844 may be implemented as one of the combiners of fig. 22 and 24.

In some implementations, devices and/or circuits having one or more of the features described herein can be included in an RF device, such as a wireless device. Such devices and/or circuitry may be implemented directly in the wireless device, in the form of modules as described herein, or in some combination thereof. In some embodiments, such wireless devices may include, for example, cellular telephones, smart phones, handheld wireless devices with or without telephone functionality, wireless tablets, and the like.

Fig. 29 schematically depicts an example wireless device 2900 having one or more advantageous features described herein. In an example, one or more PAs 2910, collectively labeled as PA architecture 2101, may include one or more features as described herein. Such a PA may, for example, facilitate multi-band operation of the wireless device 2900.

The PAs 2110a-2110d may receive their respective RF signals from the transceiver 2910, and the transceiver 2910 may be configured and operated to generate RF signals to be amplified and transmitted, and to process the received signals. A transceiver 2910 is shown interacting with a baseband subsystem 2908, the baseband subsystem 2908 configured to provide conversion between data and/or voice signals appropriate for the user, and RF signals appropriate for the transceiver 2910. The transceiver 2910 is also shown connected to a power management component 2906, the power management component 2906 configured to manage power for operation of the wireless device 2900. Such power management may also control the operation of the baseband subsystem 2908 and the PAs 2110a-2110 d.

Baseband subsystem 2908 is shown connected to a user interface 2902 to facilitate various inputs and outputs for voice and/or data provided to and received from a user. The baseband subsystem 2908 may also be connected to a memory 2904, the memory 2904 configured to store data and/or instructions to facilitate operation of the wireless device 2900 and/or to provide storage of information for a user.

In the example wireless device 2900, the outputs of the PAs 2110a-2110d are shown matched (via matching circuits 2920a-2920d) and routed to the antenna 2916 via their respective duplexers 2912a-2912d and the band selection switch 2914. The band selection switch 2914 may be configured to allow selection of an operation band. In some embodiments, each duplexer 2912 may allow for simultaneous transmit and receive operations to be performed using a common antenna (e.g., 2916). In fig. 29, the received signal is shown as being routed to an "Rx" path (not shown), which may include, for example, a Low Noise Amplifier (LNA).

A number of other wireless device configurations may utilize one or more of the features described herein. For example, the wireless device need not be a multi-band device. In another example, the wireless device may include additional antennas, such as diversity antennas, and additional connection features, such as Wi-Fi, bluetooth, and GPS.

Power amplification with improved linearization

Various examples are disclosed relating to Doherty Power Amplifier (PA) applications, such as those for high peak-to-average power ratio (PAPR)4G modulated signals used in 3G and 4G handset applications. In some embodiments, by using the Doherty approach relative to other designs, a 10% higher peak Power Added Efficiency (PAE) level can be achieved for the same adjacent power level ratio (ACLR) level. Such PAE performance may be comparable to that of an Envelope Tracking (ET) PA with much lower overall system complexity.

Traditionally, it has been widely recognized that Doherty PAs are not suitable for linear PA applications in handheld devices due to size, complexity and non-linear behavior. In practice, in base station applications, a pre-distortion linearizer is typically used with a Doherty PA to meet the linearity requirement. As described herein, issues such as size, complexity, and linearity associated with a Doherty PA can be properly addressed.

Fig. 30 illustrates an example architecture of a PA 3100 having one or more features as described herein. The architecture shown is the Doherty PA architecture. Although various examples are described in the context of such a Doherty PA architecture, it will be understood that one or more features of the present disclosure may also be implemented in other types of PA systems.

The example PA 3100 is shown to include an input port (RF _ IN) for receiving an RF signal to be amplified. Such an input RF signal may be partially amplified by the pre-driver amplifier 3102 before being split into the carrier amplification path 3110 and the peak amplification path 3130. Such segmentation may be implemented by a segmenter 3104. Examples related to divider 3104 (also referred to herein as a divider or power divider) are described in more detail herein.

In fig. 30, the carrier amplification path 3110 is shown as including an attenuator 3112 and an amplification stage generally designated 3114. The amplification stage 3114 is shown as including a driver stage 3116 and an output stage 3120. The driver stage 3116 is shown as being biased by a bias circuit 3118, and the output stage 3120 is shown as being biased by a bias circuit 3122. In some embodiments, there may be a greater or lesser number of amplification stages. In various examples described herein, the amplification stage 3114 is sometimes described as an amplifier; however, it will be appreciated that such an amplifier may comprise one or more stages.

In fig. 30, peak amplification path 3130 is shown as including a phase shift circuit 3132 and an amplification stage, generally designated 3134. The amplification stage 3134 is shown to include a driver stage 3136 and an output stage 3140. Driver stage 3136 is shown biased by a bias circuit 3138, and output stage 3140 is shown biased by a bias circuit 3142. In some embodiments, there may be a greater or lesser number of amplification stages. In various examples described herein, amplification stage 3134 is sometimes described as an amplifier; however, it will be appreciated that such an amplifier may comprise one or more stages.

Fig. 30 further illustrates that the carrier amplification path 3110 and the peaking amplification path 3130 may be combined by a combiner 3144 to produce an amplified RF signal at the output port (RF _ OUT). Examples relating to combiner 3144 are described in more detail herein.

Fig. 31 shows an example of a combiner circuit for a Doherty PA. Such a combiner may be configured to provide medium bandwidth performance. In fig. 31, the peak amplifier signal and the carrier amplifier signal are shown as being received from their respective collectors (not shown) and combined to produce an output that may be provided to, for example, a duplexer. In fig. 31, the impedance values and the values of the respective capacitance and inductance elements are examples; and it will be understood that other values may also be implemented.

The combiner 3200 includes: a first input port 3211 (which may receive a peak amplifier signal); a second input port 3212 (which may receive a carrier amplifier signal); and an output port 3213 that provides a combination of signals received at the first and second input ports 3211, 3212.

The first input port 3211 is coupled to a first node 3211. The first node 3221 is also coupled to ground (via the first capacitor 3241 and the third inductor 3233) and to a second node 3222 (via the first inductor 3231). The second node 3222 is coupled to ground (via a second capacitor 3242) and to a third node 3223 (via a second inductor 3232).

The second input port 3212 is coupled to the fourth node 3224. The fourth node is also coupled to ground (via a third capacitor 3243 and a fifth inductor 3235) and a fifth node 3225 (via a fourth inductor 3234). Fifth node 3225 is coupled to ground (via fourth capacitor 3244) and third node 3223 (via fifth capacitor 3245).

The output port 3213 is coupled to the sixth node 3226. The sixth node 3226 is also coupled to ground (via a sixth inductor 3236) and to a third node 3223 (via a sixth capacitor 3246).

The first, second, and fifth input ports 3211, 3212, the first, third, and fifth inductors 3241, 3233, 3243, and 3235 may be implemented as Integrated Passive Devices (IPDs). In some embodiments, the assembly may be implemented on a single GaAs die 3270.

The impedances presented at the second node 3222 and the fifth node 3225 may each be 25 ohms. The impedance presented at the third node 3223 may be 12.5 ohms.

Fig. 32 shows an example of a power divider circuit for a Doherty PA. Such a divider may be used with the example combiner of fig. 31 and configured to provide medium bandwidth performance. In fig. 32, an input Radio Frequency (RF) signal is shown as being received at input 3311 and split into two paths. The first path may be coupled to the peaking PA at a first output 3312 and the second path may be coupled to the carrier PA at a second output 3313. The inductor 3331 is arranged along a first path and the capacitor 3341 is arranged along a second path. In fig. 32, the values of the respective capacitance and inductance elements are examples; and it will be understood that other values may also be implemented.

Fig. 33 shows an example of a power divider 3400 that may be used as the divider 3104 of fig. 30. In fig. 33, the power divider 3400 includes a transformer 3450 having two coils positioned relative to each other. The first coil may have interleaved windings coupled to each other with one winding coupled to the input 3411 and the other winding coupled to the first output 3414. The second coil may have interleaved windings coupled to each other with one winding coupled to the isolated port 3412 and the other winding coupled to the second output 3413.

The example of fig. 33 may be configured as a wideband capable orthogonal divider. Such dividers may be configured as semi-lumped 90 degree power dividers, which may be implemented as IPD designs for low frequencies and integrated dividers on GaAs die for higher frequencies.

The power divider 3400 may further include capacitors 3441 and 3442 of the coupling coil. In some embodiments, a first capacitor 3441 is coupled between the input 3411 and the isolated port 3412, and a second capacitor 3442 is coupled between the first output 3413 and the second output 3414.

With the above configuration, the power of the RF signal received at the input port can be divided into the two output ports 3413 and 3414. Such a divided signal may be provided to the carrier amplifier and the peak amplifier of fig. 30.

Fig. 34 shows an example of a power divider 3500 that may be used as divider 3104 of fig. 1. Additional details relating to such power dividers are described above, including but not limited to the section entitled "power amplification using Balun transformers".

The example of fig. 34 may be configured as a wideband capable orthogonal divider. In some embodiments, such dividers may be configured as lumped 90-degree power dividers, which may be implemented as SMT circuits for low frequencies and may also be implemented as integrated (e.g., IPD) dividers on GaAs die for higher frequencies.

Fig. 35 shows an example of a combiner 3600 that may be used as the combiner 3144 of fig. 30. Additional details relating to such a combiner are described above, including but not limited to the section entitled "power amplification using Balun transformers".

The example of fig. 35 may be implemented as an SMT circuit with broadband capability. In some embodiments, such a combiner may include power combining and dynamic load pull functionality implemented with lumped balun.

Fig. 36 shows another example of a combiner 3700 that may be used as the combiner 3144 of fig. 30. Additional details relating to such combiners are described above, including, but not limited to, the section entitled "signal combining using wound coil Balun transformer".

The example of fig. 36 may be implemented as an IPD with broadband capability. In some embodiments, such a combiner may include power combining and dynamic load pull functionality implemented with a semi-lumped 90 degree hybrid configuration.

Referring to fig. 30, in some embodiments, each of the driver stage 3116 and the output stage 3120 of the carrier amplifier 3114 may be configured to operate in a class AB mode. Further, each of the driver stage 3136 and the output stage 3140 of the peak amplifier 3134 may be configured to operate in a class B mode. For such a configuration, a bias circuit such as the bias circuits shown in fig. 38 and 39 may be used to bias the stages of the carrier amplifier 3114 and the peak amplifier 3134, respectively. Thus, the carrier amplifier 3114 and the peaking amplifier 3134 may operate in different bias modes. Further, each stage (3116, 3120 and 3136, 3140) may operate in a different bias mode for each amplifier 3114, 3134. The different bias patterns may include class A, class B, class AB, class C, class D, class F, class G, class I, class S, class T, or any other bias pattern.

Fig. 37 shows an example of a low margin class AB bias circuit that may be used to provide a bias Voltage (VBIAS) to a stage (driver 3116 or output 3120) of carrier amplifier 3114. Thus, class AB bias circuits may provide the functionality of bias circuit 3118 and/or bias circuit 3122 of fig. 30. Appropriate selection of transistors, diodes, capacitors and resistors may be implemented to accommodate such driver and output stage functions. In some embodiments, the example bias circuit of fig. 37 may be particularly suitable for integration with an external bandgap reference (reference) on CMOS or GaAs where low voltage margins make it difficult to use conventional 2xVbe bias circuits. The bias circuit of fig. 37 may include sufficient bandwidth at baseband frequencies to support wideband signals such as LTE.

Fig. 38 shows an example of a low margin class B bias circuit that may be used to provide a bias Voltage (VBIAS) to a stage (driver 3136 or output 3140) of peak amplifier 3134. Thus, the class B bias circuit may provide the biasing function of bias circuit 3138 and/or bias circuit 3142 of fig. 30. Appropriate selection of transistors, diodes, capacitors and resistors may be implemented to accommodate such driver and output stage functions.

Fig. 39 shows an example of the beneficial effect of using class B biasing of the driver stage for the peak amplifier (3134 in fig. 1). Graph 4000 of fig. 39 includes plots of output stage current as a function of output power for different configurations. For the carrier amplifier, the solid line 4011 is for a configuration that biases each of the driver and output stages in class B mode, while the dashed line 4011 is for a configuration that has class AB bias of the driver stage and class B bias of the output stage. Similarly, for the peak amplifier, the solid line 4021 is for the configuration of each of the bias drivers and output stages in class B mode, while the dashed line 4022 is for the configuration with the class AB bias of the driver stages and the class B bias of the output stages. As shown in fig. 39, the use of a class B bias in the driver stage in the peaking amplifier greatly reduces the current consumption of the output stage. However, the use of class B biasing in the driver stage in the carrier amplifier slightly increases the current consumption of the output stage.

Fig. 40 shows an example of the beneficial effect of using class B biasing of the driver stage for the peak amplifier (3134 in fig. 1). Graph 4100 of fig. 40 includes plots of Power Added Efficiency (PAE) as a function of output power for different configurations. Solid line 4101 is for the configuration of each of the driver and output stages that bias the peaking amplifier in class B mode. Dashed line 4102 is for a configuration that biases the driver stage in class AB mode and biases the output stage in class B mode. The two-dot dashed line 4103 is for an equivalent non-Doherty amplifier biased in class AB mode. As shown in fig. 40, the use of class B bias in the driver stage in the peaking amplifier significantly improves PAE performance.

Fig. 41 shows an example of the linearization effect that can be obtained by introducing a phase shift between the RF signals associated with carrier amplification and peak amplification. Such a phase shift may be introduced by, for example, phase shifting component 3132 of fig. 1. Graph 1200 of fig. 41 includes plots of AM/AM (left vertical axis) and AM/PM (right vertical axis) as a function of output power. For AM/ AM graphs 4211, 4212, fig. 41 shows: the curve corresponding to the configuration with phase shift has less AM/AM distortion, especially at higher output power, compared to the configuration without phase shift. Similarly, for AM/ PM maps 4221, 4222, fig. 41 shows: the curve corresponding to the configuration with phase shift has less AM/PM distortion, especially at higher output power, compared to the configuration without phase shift.

As described herein, the power split into the carrier amplification path and the peaking amplification path may be different. Fig. 42 shows an example of the linearization effect that can be obtained by introducing such an uneven power division between the RF signals associated with carrier amplification and peak amplification. Such uneven power division may be introduced or facilitated by, for example, the attenuator assembly 3112 of fig. 1. The graph 4300 of fig. 42 includes plots of AM/AM (left vertical axis) and AM/PM (right vertical axis) as a function of output power. For AM/AM diagrams 4311, 4312, FIG. 42 shows: the curve corresponding to the configuration with uneven power division has less AM/AM distortion, especially at higher output power, than the configuration with uniform power division configuration. Similarly, for AM/PM FIGS. 1321, 1322, FIG. 13 shows: the curves corresponding to configurations with non-uniform power division have less AM/PM distortion, especially at medium to higher output powers, than configurations with uniform power division configurations.

Fig. 43 shows an example of the combined linearization effect that can be obtained by the combination of the aforementioned phase shift and non-uniform power division features described with reference to fig. 41 and 42. The graph 4400 of fig. 43 includes plots of gain (left vertical axis) and PAE (right vertical axis) as a function of output power. In particular, line 4411 shows the gain of a non-Doherty amplifier, line 4412 shows the gain of a Doherty amplifier without phase shift and uniform power division, and line 4413 shows the gain of a Doherty amplifier with phase shift and non-uniform power division. Similarly, line 4421 shows the PAE of a non-Doherty amplifier, line 4422 shows the PAE of a Doherty amplifier without phase shift and uniform power division, and line 4423 shows the PAE of a Doherty amplifier with phase shift and non-uniform power division.

Fig. 43 shows that a linear load modulation amplifier (Doherty PA with phase shift and non-uniform power division) has a gain compression curve that is very similar to that of a non-Doherty PA (e.g., class AB/F amplifier). Fig. 43 also shows that the PAE of a linear load modulation amplifier (Doherty PA with phase shift and non-uniform power division) is only slightly smaller (e.g., about 3% smaller at higher output power) than the PAE of a classical non-linear Doherty amplifier (Doherty PA without linearization).

Fig. 44 shows plots of PAE (left vertical axis) and Adjacent Channel Power (ACP) (right vertical axis) at various operating frequencies for a Front End Module (FEM) with a dual-band Doherty PA configured for LTE operation and a FEM with an Average Power Tracking (APT) PA. Fig. 44 shows that PAE is generally higher and ACP size is generally lower for a Doherty PA, compared to an APT PA. In the example shown, the improvement is about 10%.

In some implementations, devices and/or circuits having one or more of the features described herein can be included in an RF device, such as a wireless device. Such devices and/or circuitry may be implemented directly in the wireless device, in the form of modules as described herein, or in some combination thereof. In some embodiments, such wireless devices may include, for example, cellular telephones, smart phones, handheld wireless devices with or without telephone functionality, wireless tablets, and the like.

Fig. 45 schematically depicts an example wireless device 3801 having one or more of the advantageous features described herein. In an example, one or more of PAs 3110a-3110d, collectively labeled as PA architecture 3101, may include one or more features as described herein. Such a PA may facilitate, for example, multi-band operation of wireless device 3801.

The PAs 3100a-3100d may receive their respective RF signals from a transceiver 3810, which transceiver 3810 may be configured and operable to generate RF signals to be amplified and transmitted, and to process the received signals. A transceiver 3810 is shown interacting with the baseband subsystem 3808, the baseband subsystem 3808 configured to provide conversion between data and/or voice signals appropriate for the user and RF signals appropriate for the transceiver 3810. The transceiver 3810 is also shown connected to a power management component 3806 configured to manage power for operation of the wireless device 3801. Such power management may also control the operation of the baseband subsystem 3808 and the PAs 3110a-3110 d.

The baseband subsystem 3808 is shown connected to the user interface 3802 to facilitate various inputs and outputs for voice and/or data provided to and received from the user. The baseband subsystem 3808 may also be connected to memory 3404, the memory 3404 configured to store data and/or instructions to facilitate operation of the wireless device 3801 and/or to provide storage of information for a user.

In the example wireless device 3801, the outputs of the PAs 3110a-3110d are shown matched (via matching circuits 3820a-3820d) and routed to the antenna 3816 via their respective duplexers 3812a-3812d and the band selection switch 3814. The band selection switch 3814 may be configured to allow selection of an operating band. In some embodiments, each duplexer 3812 may allow transmit and receive operations to be performed simultaneously using a common antenna (e.g., 3816). In fig. 45, the received signal is shown as being routed to an "Rx" path (not shown) that may include, for example, a Low Noise Amplifier (LNA).

A number of other wireless device configurations may utilize one or more of the features described herein. For example, the wireless device need not be a multi-band device. In another example, the wireless device may include additional antennas, such as diversity antennas, and additional connection features, such as Wi-Fi, bluetooth, and GPS.

Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense, that is, in a sense of "including but not limited to". The term "coupled," as generally used herein, refers to two or more elements that may be connected directly or through one or more intermediate elements. Moreover, the words "herein," "above," "below," and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Words in the above specification using the singular or plural number may also include the plural or singular number, respectively, as the context permits. The word "or" in a reference to a list of two or more items includes all of the following interpretations of the word: any one of the items in the list, all of the items in the list, or any combination of the items in the list.

The above detailed description of embodiments of the invention is not intended to be exhaustive or to limit the invention to the precise form disclosed above. While specific embodiments of, and examples for, the invention are described above for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize. For example, while processes or blocks are presented in a given order, alternative embodiments may perform routines having steps, or employ systems having blocks, in a different order, and some processes or blocks may be deleted, moved, added, subdivided, combined, and/or modified. Each of these processes or blocks may be implemented in a variety of different ways. Further, while processes or blocks are sometimes shown as being performed in series, these processes or blocks may instead be performed in parallel, or may be performed at different times.

The teachings of the invention provided herein may be applied to other systems, not necessarily the systems described above. The elements and acts of the various embodiments described above can be combined to provide further embodiments.

While some embodiments of the present invention have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the disclosure. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the disclosure. The drawings and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the disclosure.

Claims (71)

1. A power amplifier system, comprising:

an input circuit configured to receive a radio frequency signal at an input port and to divide the radio frequency signal into a first portion and a second portion;

a Doherty amplifier circuit including a carrier amplification path coupled to an input circuit to receive a first portion and a peaking amplification path coupled to an input circuit to receive a second portion, the input circuit including an isolation resistance implemented between a first node along a first path coupling the input port to the carrier amplification path and a second node along a second path coupling the input port to the peaking amplification path, the isolation resistance selected to prevent or reduce a source pull effect between the carrier amplification path and the peaking amplification path; and

an output circuit coupled to the Doherty amplifier circuit, the output circuit configured to combine the outputs of the carrier amplification path and the peaking amplification path to produce an amplified radio frequency signal,

the output circuit includes a balun circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive an output of the carrier amplification path, the fourth port configured to receive an output of the peaking amplification path, and the second port configured to generate the amplified radio frequency signal.

2. The power amplifier system of claim 1 wherein the carrier amplification path comprises a carrier amplifier and the peaking amplification path comprises a peaking amplifier.

3. The power amplifier system of claim 2, further comprising a pre-driver amplifier having an output coupled to the input port.

4. A power amplifier system according to claim 3, wherein at least one of the input circuit and the output circuit is implemented as a lumped element circuit.

5. A power amplifier system as claimed in claim 1 or 2, wherein the input circuit comprises a modified Wilkinson power divider.

6. The power amplifier system of claim 5 wherein the DC power is provided to the carrier amplifier and the peaking amplifier through a choke inductor.

7. The power amplifier system of claim 5 wherein each of the carrier amplification path and the peaking amplification path includes a DC blocking capacitance.

8. The power amplifier system of claim 3 wherein the input circuit is further configured to provide impedance matching between the carrier amplifier and the pre-driver amplifier and between the peaking amplifier and the pre-driver amplifier.

9. The power amplifier system of claim 8 wherein each of the carrier amplification path and the peaking amplification path includes an LC matching circuit having a capacitance along the path and an inductive coupling to ground.

10. The power amplifier system of claim 2, wherein the input circuit is further configured to provide a desired phase shift to compensate for or tune an AM-PM effect associated with a peaking amplifier.

11. The power amplifier system of claim 2, wherein the input circuit is further configured to provide a desired attenuation adjustment at an input of one or both of the carrier amplifier and the peaking amplifier to compensate or tune for AM-AM effects associated with the one or both of the carrier amplifier and the peaking amplifier.

12. The power amplifier system of claim 1, wherein the input circuit comprises: a first impedance coupling the first node to ground and a second impedance coupling the second node to ground.

13. The power amplifier system of claim 12 wherein the first impedance comprises a capacitance and the second impedance comprises an inductance.

14. The power amplifier system of claim 1 wherein the peaking amplifier is configured to appear as a short circuit or low impedance node when in an off state and the carrier amplifier is configured to appear as a single ended amplifier equivalent to a single ended amplifier of a single segment matching network having a series inductance and a bypass capacitance when utilizing the balun circuit.

15. The power amplifier system of claim 14 wherein the balun circuit is configured such that when in a low power mode, the impedance seen by the carrier amplifier increases.

16. The power amplifier system of claim 15 wherein the impedance seen by the carrier amplifier is approximately doubled when in the low power mode.

17. The power amplifier system of claim 14 wherein the peaking amplifier is further configured to operate in a similar manner as a push-pull amplifier in which the radio frequency current from the carrier amplifier is affected by the radio frequency current from the peaking amplifier.

18. The power amplifier system of claim 17, wherein the push-pull operation reduces even harmonics, thereby improving linearity.

19. The power amplifier system of claim 1 wherein the balun circuit includes a first path coupling an output of the carrier amplifier to an output node and a second path coupling an output of the peaking amplifier to the output node.

20. The power amplifier system of claim 19, wherein each of the first and second paths is inductively coupled to a DC port to provide a DC feed to the output stage.

21. The power amplifier system of claim 19 wherein each of the first and second paths includes a harmonic trap.

22. The power amplifier system of claim 2 wherein each of the first combiner path coupling the output of the carrier amplifier to the output node and the second combiner path coupling the output of the peaking amplifier to the output node includes a harmonic trap.

23. The power amplifier system of claim 22 wherein the harmonic trap includes a second harmonic trap having an LC shunt to ground and a series inductance.

24. The power amplifier system of claim 19 wherein the second path includes a shunt capacitance and a series capacitance configured to provide phase compensation for the output of the peaking amplifier.

25. The power amplifier system of claim 24 wherein at least one of the shunt capacitance and the series capacitance is a surface mount technology capacitor.

26. The power amplifier system of claim 1, wherein the balun circuit is configured to provide reduced losses in the carrier amplification path to maintain high efficiency at back-off and in high power mode.

27. The power amplifier system of claim 2, wherein the input circuit is configured to provide DC power to each of a carrier amplifier and a peaking amplifier.

28. The power amplifier system of claim 2 wherein the input circuit is a wideband circuit due at least in part to a lead-lag network configured to provide wideband phase shift.

29. The power amplifier system of claim 2 wherein the input circuit is configured to provide reactive to actual impedance matching and isolation between the carrier amplifier and the peaking amplifier while providing broadband performance.

30. The power amplifier system of claim 1, wherein the first portion and the second portion have different phases and different powers.

31. A method for amplifying a radio frequency signal, the method comprising:

providing a Doherty amplifier circuit having a carrier amplification path and a peak amplification path;

receiving a radio frequency signal;

dividing a radio frequency signal into a first portion and a second portion, the first portion being provided to a carrier amplification path and the second portion being provided to a peaking amplification path; and

combining the outputs of the carrier amplification path and the peaking amplification path to produce an amplified radio frequency signal using a balun circuit,

the balun circuit has a first coil implemented between a first port and a second port, a second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive an output of the carrier amplification path, the fourth port configured to receive an output of the peaking amplification path, and the second port configured to generate the amplified radio frequency signal.

32. The method of claim 31, wherein the first portion and the second portion have different phases and different powers.

33. A power amplifier module comprising:

a package substrate configured to accommodate a plurality of components;

a power amplifier system implemented on a package substrate, the power amplifier system comprising an input circuit configured to receive a radio frequency signal and divide the radio frequency signal into a first portion and a second portion, the power amplifier system further comprising a Doherty amplifier circuit having a carrier amplification path coupled to the input circuit to receive the first portion and a peak amplification path coupled to the input circuit to receive the second portion, the power amplifier system further comprising an output circuit coupled to the Doherty amplifier circuit, the output circuit comprising a balun circuit configured to combine outputs of the carrier amplification path and the peak amplification path to produce an amplified radio frequency signal; and

a plurality of connectors configured to provide electrical connections between the power amplifier system and the package substrate,

the balun circuit has a first coil implemented between a first port and a second port, a second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive an output of the carrier amplification path, the fourth port configured to receive an output of the peaking amplification path, and the second port configured to generate the amplified radio frequency signal.

34. A wireless device, comprising:

a transceiver configured to generate a radio frequency signal;

a power amplifier module in communication with the transceiver, the power amplifier module including an input circuit configured to receive a radio frequency signal and divide the radio frequency signal into a first portion and a second portion, the power amplifier module further including a Doherty amplifier circuit having a carrier amplification path coupled to the input circuit to receive the first portion and a peak amplification path coupled to the input circuit to receive the second portion, the power amplifier module further including an output circuit coupled to the Doherty amplifier circuit, the output circuit including a balun circuit configured to combine outputs of the carrier amplification path and the peak amplification path to produce an amplified radio frequency signal; and

an antenna in communication with the power amplifier module, the antenna configured to facilitate transmission of the amplified radio frequency signal,

the balun circuit has a first coil implemented between a first port and a second port, a second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive an output of the carrier amplification path, the fourth port configured to receive an output of the peaking amplification path, and the second port configured to generate the amplified radio frequency signal.

35. The wireless device of claim 34, wherein the carrier amplification path includes a carrier amplifier and the peaking amplification path includes a peaking amplifier, each of the carrier amplifier and the peaking amplifier including a driver stage and an output stage.

36. A signal combiner, comprising:

a balun circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive a first signal, the fourth port configured to receive a second signal, the second port configured to produce a combination of the first signal and the second signal; and

a termination circuit coupling the third port to ground, the termination circuit having a reactance substantially equal in magnitude to an impedance at the second port.

37. The signal combiner of claim 36 wherein the first port is configured to receive a carrier amplified signal from a carrier amplifier of the Doherty power amplifier and the fourth port is configured to receive a peaking amplified signal from a peaking amplifier of the Doherty power amplifier.

38. The signal combiner of claim 37 wherein the termination circuit includes a capacitor and has a capacitive reactance substantially equal in magnitude to an impedance at the second port.

39. The signal combiner of claim 36 wherein the first port is configured to receive a peak amplified signal from a peaking amplifier of the Doherty power amplifier and the fourth port is configured to receive a carrier amplified signal from a carrier amplifier of the Doherty power amplifier.

40. The signal combiner of claim 39 wherein the termination circuit includes an inductor and has an inductive reactance substantially equal in magnitude to an impedance at the second port.

41. The signal combiner of claim 36 wherein an S-parameter between a first one of the ports and a second one of the ports is approximately equal to (1+ j)/2.

42. The signal combiner of claim 36 wherein an S-parameter between a first one of the ports and a second one of the ports is approximately equal to (1-j)/2.

43. The signal combiner of claim 36 wherein the S-parameter matrix of S-parameters between the ports contains only values of approximately 0, (1+ j)/2, and (1-j)/2.

44. The signal combiner of claim 36 wherein the balun circuit is implemented as an integrated passive device.

45. The signal combiner of claim 44 wherein the integrated passive device further implements an auto-transformer based impedance matching circuit.

46. A power amplifier module comprising:

a package substrate configured to accommodate a plurality of components; and

a signal combiner implemented on a package substrate, the signal combiner comprising a balun circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive a first signal, the fourth port configured to receive a second signal, the second port configured to produce a combination of the first signal and the second signal, the signal combiner further comprising a termination circuit coupling the third port to ground, the termination circuit having a reactance that is substantially equal in magnitude to an impedance at the second port.

47. A power amplifier module according to claim 46 wherein the balun circuit is implemented as an integrated passive device.

48. A power amplifier module according to claim 47 wherein the integrated passive device further implements an impedance matching circuit including one or more automatic transformers.

49. The power amplifier module of claim 46 wherein the power amplifier module further comprises a Doherty power amplifier implemented on the package substrate, the Doherty power amplifier having a carrier amplifier producing a carrier amplified signal and a peaking amplifier producing a peaking amplified signal.

50. The power amplifier module of claim 49 wherein the first port is configured to receive a carrier amplified signal and the fourth port is configured to receive a peak amplified signal.

51. The power amplifier module of claim 50 wherein the termination circuit includes a capacitor and has a capacitive reactance substantially equal in magnitude to an impedance at the second port.

52. The power amplifier module of claim 49 wherein the first port is configured to receive a peak amplified signal and the fourth port is configured to receive a carrier amplified signal.

53. The power amplifier module of claim 52 wherein the termination circuit includes an inductor and has an inductive reactance substantially equal in magnitude to an impedance at the second port.

54. The power amplifier module of claim 46 wherein the S-parameter matrix of S-parameters between the ports contains only values of approximately 0, (1+ j)/2, and (1-j)/2.

55. A wireless device, comprising:

a transceiver configured to generate a radio frequency signal;

a power amplifier module in communication with the transceiver, the power amplifier module comprising an input circuit configured to receive a radio frequency signal and divide the radio frequency signal into a first portion and a second portion, the power amplifier module further comprising an amplifier circuit comprising a carrier amplifier coupled to the input circuit to receive the first portion and a peaking amplifier coupled to the input circuit to receive the second portion, the power amplifier module further comprising an output circuit coupled to the amplifier circuit, the output circuit comprising a balun circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive a first amplified signal from one of a carrier amplifier or a peaking amplifier, the fourth port configured to receive a second amplified signal from the other of the carrier amplifier or the peaking amplifier, the second port configured to produce a combination of the first amplified signal and the second amplified signal as an amplified version of a radio frequency signal, the third port coupled to ground via a termination circuit having a reactance substantially equal in magnitude to an impedance at the second port; and

an antenna in communication with the power amplifier module, the antenna configured to facilitate transmission of an amplified version of the radio frequency signal.

56. The wireless device of claim 55 wherein the first port is configured to receive a first amplified signal from a carrier amplifier and the fourth port is configured to receive a second amplified signal from a peaking amplifier, the termination circuit including a capacitor and having a capacitive reactance substantially equal in magnitude to an impedance at the second port.

57. The wireless device of claim 55 wherein the first port is configured to receive a first amplified signal from a peaking amplifier and the fourth port is configured to receive a second amplified signal from a carrier amplifier, the termination circuit including an inductor and having an inductive reactance substantially equal in magnitude to an impedance at the second port.

58. A power amplifier system, comprising:

an input circuit having an input node, a first divider node, a second divider node, and a transformer, the transformer including a first coil having a first winding and a second winding, the first winding of the first coil coupled to the input node, the second winding of the first coil coupled to the first divider node, the first winding of the second coil coupled to an isolation port, and the second winding of the second coil coupled to the second divider node, the input circuit configured to receive a radio frequency signal at the input node and divide the radio frequency signal into a first portion provided at the first divider node and a second portion provided at the second divider node;

a Doherty amplifier circuit comprising a carrier amplifier coupled to an input circuit to receive a first portion and a peaking amplifier coupled to the input circuit to receive a second portion, the first portion and the second portion having different phases and different powers, the carrier amplifier having a driver stage configured to operate in a class AB bias mode and an output stage configured to operate in a class B bias mode, the peaking amplifier having a driver stage configured to operate in a class B bias mode and an output stage configured to operate in a class B bias mode; and

an output circuit coupled to the Doherty amplifier circuit, the output circuit configured to combine the outputs of the carrier amplifier and the peaking amplifier to produce an amplified radio frequency signal,

the output circuit includes a balun circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive an output of the carrier amplifier, the fourth port configured to receive an output of the peaking amplifier, and the second port configured to generate the amplified radio frequency signal.

59. The power amplifier system of claim 58 wherein the input circuit comprises a phase shifter configured such that the first portion and the second portion have different phases.

60. The power amplifier system of claim 59, wherein the phase shifter and the peaking amplifier are implemented in a peaking amplification path.

61. The power amplifier system of claim 58, wherein the first portion and the second portion have a phase difference between 10 degrees and 20 degrees.

62. The power amplifier system of claim 58, wherein the different phases reduce at least one of AM/AM distortion or AM/PM distortion as compared to the equal phases.

63. The power amplifier system of claim 58, wherein the input circuit comprises an attenuator configured such that the first portion and the second portion have different powers.

64. The power amplifier system of claim 63, wherein the attenuator and the carrier amplifier are implemented in a carrier amplification path.

65. The power amplifier system of claim 58, wherein the different powers reduce at least one of AM/AM distortion or AM/PM distortion compared to equal powers.

66. The power amplifier system of claim 58, wherein the input circuit comprises a pre-driver amplifier.

67. The power amplifier system of claim 58 wherein the class B bias mode increases the PAE of the peaking amplifier compared to the class AB bias mode.

68. A power amplifier module comprising:

a package substrate configured to accommodate a plurality of components; and

a power amplifier system implemented on a package substrate, the power amplifier system comprising: an input circuit having an input node, a first divider node, a second divider node, and a transformer, the transformer including a first coil having a first winding and a second winding, the first winding of the first coil coupled to the input node, the second winding of the first coil coupled to the first divider node, the first winding of the second coil coupled to an isolation port, and the second winding of the second coil coupled to the second divider node, the input circuit configured to receive a radio frequency signal at the input node and divide the radio frequency signal into a first portion provided at the first divider node and a second portion provided at the second divider node;

the power amplifier system further includes a Doherty amplifier circuit including a carrier amplifier coupled to the input circuit to receive a first portion and a peaking amplifier coupled to the input circuit to receive a second portion, the first portion and the second portion having different phases and different powers, the carrier amplifier having a driver stage configured to operate in a class AB bias mode and an output stage configured to operate in a class B bias mode, the peaking amplifier having a driver stage configured to operate in a class B bias mode and an output stage configured to operate in a class B bias mode; and

the power amplifier system also includes an output circuit coupled to the Doherty amplifier circuit, the output circuit is configured to combine the outputs of the carrier amplifier and the peaking amplifier to produce an amplified radio frequency signal, the output circuit includes a balun circuit having a first coil and a second coil, the first coil is implemented between a first port and a second port, the second coil is implemented between a third port and a fourth port, the first port and the third port are coupled by a first capacitance, the second port and the fourth port are coupled by a second capacitance, the first port is configured to receive an output of the carrier amplifier, the fourth port is configured to receive an output of the peaking amplifier, and the second port is configured to generate the amplified radio frequency signal.

69. The power amplifier module of claim 68 wherein at least one of the input circuit or the output circuit is implemented as an integrated passive device.

70. The power amplifier module of claim 68 wherein at least one of the input circuit or the output circuit is implemented on a single GaAs die.

71. A wireless device, comprising:

a transceiver configured to generate a radio frequency signal;

a power amplifier module in communication with the transceiver, the power amplifier module comprising: an input circuit having an input node, a first divider node, a second divider node, and a transformer, the transformer including a first coil having a first winding and a second winding, the first winding of the first coil coupled to the input node, the second winding of the first coil coupled to the first divider node, the first winding of the second coil coupled to an isolation port, and the second winding of the second coil coupled to the second divider node, the input circuit configured to receive a radio frequency signal at the input node and divide the radio frequency signal into a first portion provided at the first divider node and a second portion provided at the second divider node; the power amplifier module further includes a Doherty amplifier circuit including a carrier amplifier coupled to the input circuit to receive a first portion and a peaking amplifier coupled to the input circuit to receive a second portion, the first portion and the second portion having different phases and different powers, the carrier amplifier having a driver stage configured to operate in a class AB bias mode and an output stage configured to operate in a class B bias mode, the peaking amplifier having a driver stage configured to operate in a class B bias mode and an output stage configured to operate in a class B bias mode; and the power amplifier module further comprises an output circuit coupled to the Doherty amplifier circuit, the output circuit is configured to combine the outputs of the carrier amplifier and the peaking amplifier to produce an amplified radio frequency signal, the output circuit includes a balun circuit having a first coil and a second coil, the first coil is implemented between a first port and a second port, the second coil is implemented between a third port and a fourth port, the first port and the third port are coupled by a first capacitance, the second port and the fourth port are coupled by a second capacitance, the first port is configured to receive an output of the carrier amplifier, the fourth port is configured to receive an output of the peaking amplifier, and the second port is configured to generate the amplified radio frequency signal; and

an antenna in communication with the power amplifier module, the antenna configured to facilitate transmission of the amplified radio frequency signal.

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