CN105375883B - Doherty power amplifier combiner with adjustable impedance termination circuit - Google Patents

Abstract

The invention relates to a doherty power amplifier combiner with adjustable impedance termination circuits. A signal combiner may include a balun circuit having a first coil and a second coil. The first coil may be implemented between the first port and the second port. The second coil may be implemented between the third port and the fourth port. The first port and the third port may be coupled by a first capacitor. The second port and the fourth port may be coupled by a second capacitor. The first port may be configured to receive a first signal. The fourth port may be configured to receive a second signal. The second port may be configured to produce a combination of the first signal and the second signal. The signal combiner may include termination circuitry coupling the third port to ground. The termination circuit may include an adjustable impedance circuit.

Description

Doherty power amplifier combiner with adjustable impedance termination circuit

Cross reference to related applications

The present application claims priority from U.S. provisional application No.62/036,854 entitled "TUBABLE WIDE-BAND HYBRID-BASEDDOHERTY COMMUNICATION" filed on 8/13/2014 AND U.S. patent application No.14/797,261 entitled "CIRCUITS, DEVICES AND METHOD RELATED TOOTHENERS FOR DOHERTY POWER AMPLIFIERS" filed on 7/13/2015, both of which are expressly incorporated herein by reference in their entirety.

Technical Field

The present application relates generally to Radio Frequency (RF) signal combiners.

Background

A multi-mode/multi-frequency (MMMB) Power Amplifier Module (PAM) for 4G LTE (long term evolution) applications is preferably operated in a back-off (back-off) manner to meet high peak-to-average power ratio (PAPR) specifications while maintaining high Power Added Efficiency (PAE). Compared to envelope tracking PAM, which enhances efficiency at backoff, Doherty PAM is able to meet high linearity and high efficiency at backoff with much less system complexity and simplified calibration and Digital Predistortion (DPD) specification. However, typical doherty power amplifier architectures are bandwidth limited due to the narrow-band nature of existing doherty power combiners.

Disclosure of Invention

According to some embodiments, the present application relates to a signal combiner including a balun (balun) circuit having a first coil and a second coil. The first coil is implemented between the first port and the second port. The second coil is implemented between the third port and the fourth port. The first port and the third port are coupled by a first capacitor. The second port and the fourth port are coupled by a second capacitor. The first port is configured to receive a first signal. The fourth port is configured to receive a second signal. The second port is configured to produce a combination of the first signal and the second signal. The signal combiner further includes a termination circuit (termination circuit) coupling the third port to ground. The termination circuit includes an adjustable impedance element.

In some embodiments, the signal combiner may further include a controller configured to receive the band selection signal and tune the adjustable impedance circuit based on the band selection signal. In some embodiments, the controller may be further configured to tune at least one of the first capacitor or the second capacitor.

In some embodiments, the first port may be configured to receive a carrier amplified signal from a doherty power amplifier PA and the fourth port may be configured to receive a peaking amplified signal from the doherty PA. In some embodiments, the adjustable impedance circuit includes a plurality of capacitors. The capacitance of each of the plurality of capacitors is approximately equal to 2 pi times the reciprocal of the respective operating frequency of the doherty PA times the characteristic impedance of a load coupled to the doherty PA. In some embodiments, the signal combiner may further include a controller configured to receive a band select signal indicative of the operating frequency and tune the adjustable impedance circuit to have a capacitance approximately equal to 2 pi times the operating frequency times a characteristic impedance of a load coupled to the doherty PA. In some embodiments, the controller may be further configured to tune the first capacitor and the second capacitor to have a capacitance approximately equal to half of a capacitance of the adjustable impedance circuit.

In some embodiments, the first port may be configured to receive a peak amplified signal from a doherty power amplifier PA and the fourth port may be configured to receive a carrier amplified signal from the doherty PA. In some embodiments, the adjustable impedance circuit may include a plurality of inductors. The inductance of each of the plurality of inductors may be approximately equal to the characteristic impedance of a load coupled to the doherty PA divided by 2 pi times the respective operating frequency of the doherty PA. In some embodiments, the signal combiner may further include a controller configured to receive a band select signal indicative of the operating frequency and tune the adjustable impedance circuit to have an inductance approximately equal to a characteristic impedance of a load coupled to the doherty PA divided by 2 pi times the operating frequency.

In some embodiments, the adjustable impedance matching circuit may comprise a plurality of impedance elements connected in parallel, each of the plurality of impedance elements comprising an impedance and a switch connected in series.

In some embodiments, the termination circuit may further include a harmonic rejection circuit configured to reduce the strength of one or more harmonics at the second port. In some embodiments, the harmonic suppression circuit may include a plurality of resonant elements connected in series, each of the plurality of resonant elements including an inductor and a capacitor connected in parallel. In some embodiments, the resonant frequency of each of the plurality of resonant elements may be substantially equal to a multiple of the operating frequency of the signal combiner. In some embodiments, the resonant frequency of each of the plurality of resonant elements may be substantially equal to twice the respective operating frequency of the signal combiner. In some embodiments, a harmonic rejection circuit may be implemented between the third port and the adjustable impedance circuit.

In some embodiments, the present application relates to a power amplifier module comprising a package substrate configured to house a plurality of components. The power amplifier module includes a signal combiner implemented on a package substrate. The signal combiner includes a balun circuit having a first coil and a second coil. The first coil is implemented between the first port and the second port. The second coil is implemented between the third port and the fourth port. The first port and the third port are coupled by a first capacitor. The second port and the fourth port are coupled by a second capacitor. The first port is configured to receive a first signal. The fourth port is configured to receive a second signal. The second port is configured to produce a combination of the first signal and the second signal, the signal combiner further including termination circuitry coupling the third port to ground. The termination circuit includes an adjustable impedance circuit.

In some embodiments, the PA module may further include a controller implemented on the package substrate, the controller configured to receive a band selection signal and tune the adjustable impedance circuit based on the band selection signal.

In some embodiments, the present application relates to a wireless device comprising a transceiver configured to generate a radio frequency, RF, signal. The wireless device includes a Power Amplifier (PA) module in communication with a transceiver. The PA module includes an input circuit configured to receive an RF signal and to split the RF signal into a first portion and a second portion. The PA module also includes a doherty PA having a carrier amplification path coupled to the input circuit to receive the first portion and a peaking amplification path coupled to the input circuit to receive the second portion. The PA module also includes an output circuit coupled to the doherty amplifier circuit. The output circuit includes a balun circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between a third port and a fourth port. The first port and the third port are coupled by a first capacitor. The second port and the fourth port are coupled by a second capacitor. The first port is configured to receive a first signal via the carrier amplification path. The fourth port is configured to receive a second signal via the peaking amplification path. The second port is configured to produce a combination of the first signal and the second signal as an amplified RF signal. The PA module also includes termination circuitry that couples the third port to ground. The termination circuit includes an adjustable impedance circuit. The wireless device also includes an antenna in communication with the PA module. The antenna is configured to effectuate transmission of the amplified RF signal.

In some embodiments, the wireless device may further include a controller configured to receive a band selection signal and tune the adjustable impedance circuit based on the band selection signal.

Drawings

Fig. 1 illustrates an example architecture of a Power Amplifier (PA) in which a doherty combiner having one or more of the features described herein can be implemented.

Fig. 2A and 2B illustrate examples of hybrid (hybrid) circuits that may be used as a doherty combiner.

Fig. 3 shows that in some embodiments, the signal combiner includes a termination circuit having a capacitor.

Fig. 4 shows that in some embodiments, the signal combiner includes a termination circuit having an inductor.

Fig. 5 illustrates that in some embodiments, the signal combiner includes a termination circuit having an adjustable impedance circuit.

Fig. 6 illustrates that in some embodiments, the adjustable impedance circuit may include a plurality of impedance elements connected in parallel.

Fig. 7 shows that in some embodiments, the signal combiner includes a termination circuit with a harmonic rejection circuit.

Fig. 8 illustrates that in some embodiments, the harmonic rejection circuit may include a plurality of resonant elements connected in series.

FIG. 9 illustrates a module having one or more features described herein.

Fig. 10 illustrates a wireless device having one or more features described herein.

Detailed Description

The headings, if any, are provided herein for convenience only and do not necessarily affect the scope or meaning of the claimed invention.

Circuits, systems, and methods are described herein that address the problem of maintaining a high PAE under the linearity requirements of the 4G LTE standard by proposing a wideband tunable hybrid-based combiner for doherty power amplifier architectures. Load modulation using a doherty power amplifier is another way to maintain high efficiency when power is backed off. In this scheme, two PAMs in parallel, one carrier amplifier and one peak amplifier are used. The peak amplifier modulates the load seen by the carrier amplifier, allowing the carrier amplifier to maintain high efficiency saturated operation even when backed off. The load modulation may be implemented using an impedance matching network whose impedance is matched to a particular frequency. Thus, for MMMB PAM without adjustable impedance circuit, several doherty PAMs (each requiring two amplifiers) can be used to cover several frequency bands, which can make implementation costly and/or impractical.

Fig. 1 illustrates an example architecture of a Power Amplifier (PA)100 in which a doherty combiner having one or more of the features described herein can be implemented. The architecture shown is the doherty PA architecture. Although various examples are described in the context of such doherty PA architectures, it will be understood that one or more features of the present application may also be implemented in other types of PA systems.

The example PA 100 is shown to include an input port (RF _ IN) for receiving an RF signal to be amplified. Such an input RF signal may be partially amplified by the pre-driver amplifier 102 and then distributed into the carrier amplification path 110 and the peaking amplification path 130. Such distribution may be achieved by a distributor (divider) 104.

In fig. 1, the carrier amplification path 110 is shown as including an attenuator 112 and an amplification stage, collectively indicated at 114. The amplification stage 114 is shown as including a driver stage 116 and an output stage 120. Driver stage 116 is shown biased by bias circuit 118 and output stage 120 is shown biased by bias circuit 122. In some embodiments, there may be more or fewer amplification stages. In the various examples described herein, the amplification stage 114 is also sometimes described as an amplifier; it will be appreciated, however, that such an amplifier may comprise one or more stages.

In fig. 1, the peaking amplification path 130 is shown as including a phase shift circuit 132 and an amplification stage, collectively indicated at 134. The amplifier stage 134 is shown as including a driver stage 136 and an output stage 140. Driver stage 136 is shown biased by bias circuit 138 and output stage 140 is shown biased by bias circuit 142. In some embodiments, there may be more or fewer amplification stages. In the various examples described herein, the amplification stage 134 is sometimes also described as an amplifier; it will be appreciated, however, that such an amplifier may comprise one or more stages.

Fig. 1 also shows that carrier amplification path 110 and peak amplification path 130 may be combined by combiner 144 to produce an amplified RF signal at an output port (RF _ OUT). Examples related to combiner 144 are described in more detail herein. For example, the combiner 144 may be implemented as one of the combiners of fig. 3, 4, 5, or 7.

Fig. 2A and 2B show examples of hybrid circuits that can be used as a doherty combiner. Such hybrid circuits may be configured to be particularly suitable for applications such as RFICs (radio frequency integrated circuits), MMICs (monolithic microwave integrated circuits) and other RF modules. Fig. 2A shows a schematic representation of such a hybrid circuit, and fig. 2B shows an example layout thereof.

The hybrid circuits of fig. 2A and 2B may be implemented as balun-based semi-lumped 90 degree hybrid circuits. Due to the compact nature of the balun used, such a design can be easily implemented on insulating/semi-insulating substrates, such as silicon, GaAs and IPD (integrated passive device) substrates (e.g. glass or silicon).

Thus, in fig. 2A, the signal combiner 244 is shown as including a first port 231, a second port 232, a third port 233, and a fourth port 234. The first capacitor 222 couples the first port 231 and the second port 232. A second capacitor 223 couples the third port 233 and the fourth port 234. The signal combiner 244 further includes a transformer 221, four ports of the transformer 221 are respectively coupled to the four ports 231 and 234 of the signal combiner 244. In fig. 2B, a substantially similar signal combiner 254 is shown, which includes a balun 251 having a first coil and a second coil.

In the example of fig. 2A and 2B, a specific termination (termination) may be provided at the isolated port (e.g., third port 231) to achieve the doherty effect. Examples of terminals are described in more detail herein.

In some embodiments, it can be seen that such a particular terminal may be implemented as a capacitance (e.g., a capacitor) having a reactance magnitude equal to the characteristic impedance of the system. Thus, such a capacitance can be expressed as C ═ 1/(2 pi fZ)₀) Where f is the operating frequency of the Doherty PA, Z₀Is the characteristic impedance of the load coupled to the doherty PA.

Fig. 3 shows that in some embodiments, signal combiner 300 includes a termination circuit having a capacitor 323. The signal combiner 300 includes a first input port 331, a second input port 332, and an output port 333, the first input port 331 being configurable to receive a carrier amplified signal of the doherty PA, the second input port 332 being configurable to receive a peak amplified signal of the doherty PA, the output port 333 outputting a combination of the signals received at the first input port 331 and the second input port 332. The signal combiner 300 comprises a transformer (e.g. a balun) having a first coil 301 and a second coil 302, the first coil 301 being implemented between a first port 311 and a second port 312, the second coil 302 being implemented between a third port 313 and a fourth port 314. The first port 311 and the third port 313 are coupled by a first capacitor 321, and the second port 312 and the fourth port 314 are coupled by a second capacitor 322. The third port 313 is coupled to ground through a termination circuit, which in fig. 3 comprises a third capacitor 323. In some embodiments, the capacitances of the first capacitor 321 and the second capacitor 322 are equal. In some embodiments, the capacitance of the third capacitor 323 is twice the capacitance of the first capacitor 321 and/or the second capacitor 322.

In some embodiments, the capacitance of the third capacitor 323 is approximately equal to 2 pi times the inverse of the operating frequency of the doherty PA times the characteristic impedance of the load coupled to the doherty PA, e.g., C1/(2 pi fZ)₀) Where f is the operating frequency of the Doherty PA, Z₀Is the characteristic impedance of the load coupled to the doherty PA.

It can be seen that L ═ Z₀Alternative configurations of the inductive terminations of/2 pi f can provide the doherty combiner function in a similar manner. In this case, the carrier and the port position of the peaking amplifier may beAnd (4) interchanging.

Fig. 4 shows that in some embodiments, signal combiner 400 includes a termination circuit having inductor 423. The signal combiner 400 of fig. 4 includes a first input port 431, a second input port 432, and an output port 433, the first input port 431 being configurable to receive a carrier amplified signal of a doherty PA, the second input port 432 being configurable to receive a peak amplified signal of the doherty PA, the output port 433 outputting a combination of the signals received at the first input port 431 and the second input port 432. The signal combiner 400 comprises a transformer (e.g. a balun) having a first coil 401 and a second coil 402, the first coil 401 being implemented between a first port 411 and a second port 412, the second coil 402 being implemented between a third port 413 and a fourth port 414. The first port 411 and the third port 413 are coupled by a first capacitor 421 and the second port 412 and the fourth port 414 are coupled by a second capacitor 422. The third port 413 is coupled to ground through a termination circuit, which in fig. 4 includes an inductor 423.

In some embodiments, the inductance of inductor 423 is approximately equal to the characteristic impedance of the load coupled to doherty PA divided by 2 pi times the operating frequency of doherty PA, e.g., the inverse of 2 pi times the operating frequency of doherty PA multiplied by the characteristic impedance of the load coupled to doherty PA, e.g., L ═ Z₀/(2 π f) where f is the operating frequency of Doherty PA, Z₀Is the characteristic impedance of the load coupled to the doherty PA.

The signal combiner may be used for multiple modes or multiple operating frequencies as part of a multi-mode/multi-frequency (MMMB) Power Amplifier Module (PAM). Thus, in some embodiments, rather than a single capacitor or a single inductor (as shown in fig. 3 and 4), a tunable impedance circuit may be used and tuned to various impedances for various frequencies and/or configurations.

Fig. 5 shows that in some embodiments, signal combiner 500 includes a termination circuit having an adjustable impedance circuit 523. The signal combiner 500 of fig. 5 includes a first input port 531, a second input port 532, and an output port 533, the first input port 531 being configurable to receive a carrier amplified signal of the doherty PA (or, in an alternative embodiment, to receive a peak amplified signal of the doherty PA), the second input port 532 being configurable to receive a peak amplified signal of the doherty PA (or, in an alternative embodiment, to receive a carrier amplified signal of the doherty PA), the output port 533 outputting a combination of the signals received at the first input port 531 and the second input port 532. The signal combiner 500 comprises a transformer (e.g. a balun) having a first coil 501 and a second coil 502, the first coil 501 being implemented between a first port 511 and a second port 512, the second coil 502 being implemented between a third port 513 and a fourth port 514. The first port 511 and the third port 513 are coupled by a first capacitor 521, and the second port 512 and the fourth port 514 are coupled by a second capacitor 522. The third port 513 is coupled to ground through a termination circuit, which in fig. 5 includes an adjustable impedance circuit 523.

The signal combiner 500 is controlled by a controller 520, the controller 520 being configured to receive a band selection signal indicative of a current operating frequency of the system of which the signal combiner 500 is a part. The controller 520 is further configured to tune the adjustable impedance circuit 523 based on the band select signal. In some embodiments, the controller 520 is further configured to tune at least one of the first capacitor 521 or the second capacitor 522.

In some embodiments, the first port 511 is configured to receive a carrier amplified signal from the doherty PA (e.g., via the first input port 531), and the fourth port 514 is configured to receive a peak amplified signal from the doherty PA (e.g., via the second input port 532). Accordingly, the controller 520 may be configured to tune the adjustable impedance circuit 523 to have a capacitance approximately equal to 2 π times the operating frequency (as indicated by the band select signal) times the inverse of the characteristic impedance of the load coupled to the Doherty PA. The controller 520 may also tune the first capacitor 521 and/or the second capacitor 522 to have a capacitance approximately equal to one-half of the capacitance of the adjustable impedance circuit 523.

In some embodiments, the first port 511 is configured to receive a peak amplified signal from the doherty PA (e.g., via the first input port 531), and the fourth port 514 is configured to receive a carrier amplified signal from the doherty PA (e.g., via the second input port 532). Accordingly, the controller 520 may be configured to tune the adjustable impedance circuit 523 to have an inductance approximately equal to 2 π times the characteristic impedance of the load coupled to the Doherty PA divided by the operating frequency (as indicated by the band select signal).

Fig. 6 illustrates that in some embodiments, the adjustable impedance circuit 623 may include a plurality of impedance elements connected in parallel. Each impedance element connected in parallel includes a series connection of impedances 610a-610d and switches 612a-612 d. The impedances 610a-610d may include one or more resistors, capacitors, and/or inductors. The switches 612a-612d may be controlled by a controller (e.g., controller 520 of fig. 5) to be in an open state or a closed state to tune the adjustable impedance circuit 623 to have a particular impedance.

In some embodiments, the adjustable impedance circuit 623 is part of a system including a doherty PA configured to operate at one or more operating frequencies. Accordingly, the impedances 610a-610d may include a plurality of capacitors, each of which has a capacitance approximately equal to 2 π times the reciprocal of the characteristic impedance of the load coupled to the Doherty PA multiplied by the corresponding operating frequency of the Doherty PA. The impedances 610a-610d may alternatively (or additionally) include a plurality of inductors, each of the plurality of inductors having an inductance approximately equal to the characteristic impedance of a load coupled to the doherty PA divided by 2 pi times the respective operating frequency of the doherty PA.

Fig. 7 shows that in some embodiments, signal combiner 700 includes a termination circuit with harmonic rejection circuit 724. Signal combiner 700 of fig. 7 is substantially similar to signal combiner 500 of fig. 5, except that signal combiner 700 of fig. 7 includes a harmonic rejection circuit 724 implemented between third port 513 and adjustable impedance circuit 523.

The harmonic rejection circuit 724 is configured to reduce the intensity of one or more harmonics at the second port 512 (and thus the output port 533). When the first input port 531 is configured to receive a carrier amplified signal and the second input port 532 is configured to receive a peak amplified signal, the carrier amplified signal and the peak amplified signal may include unwanted harmonics of the RF signal being amplified. The harmonic rejection circuit 724 is configured to reduce the intensity of these harmonics at the output port 533.

Fig. 8 illustrates that in some embodiments, the harmonic rejection circuit 823 may include multiple resonant elements connected in series. Each resonant element includes an inductor 812a-812d and a capacitor 810a-810d connected in parallel. The resonant frequency of each of the plurality of resonant elements may be approximately equal to a multiple of the operating frequency (one of a set of operating frequencies) of the system of which the harmonic rejection circuit 823 is a part. For example, in some embodiments, the resonant frequency of each of the plurality of resonant elements is approximately equal to twice the respective operating frequency of the signal combiner. Thus, if the system including the harmonic rejection circuit 823 is configured to operate at one or more of the first, second, and third frequencies, the resonant elements may have respective resonant frequencies that are twice the first frequency, twice the second frequency, and twice the third frequency.

Fig. 9 illustrates that in some embodiments, some or all of the configurations (e.g., those shown in fig. 1, 2A, 2B, and 3-8) may be implemented in whole or in part in a module. Such a module may be, for example, a Front End Module (FEM). In the example of fig. 9, the module 900 may include a package substrate 902, and a plurality of components may be mounted on such a package substrate 902. For example, the FE-PMIC component 904, the power amplifier component 906 (which may include a combiner 907 with an adjustable impedance circuit), the matching component 908, and the multiplexer component 910 may be mounted and/or implemented on and/or within the package substrate 902. Other components, such as a plurality of SMT devices 914 and an Antenna Switch Module (ASM)912, may also be mounted on the package substrate 902. Although the various components are all shown laid out on the package substrate 902, it is understood that some components may be implemented on top of other components.

In some implementations, devices and/or circuits having one or more of the features described herein may be included in RF electronics, such as wireless devices. Such devices and/or circuits may be implemented directly in a wireless device, in the form of modules as described herein, or in some combination thereof. In some embodiments, such wireless devices may include, for example, cellular telephones, smart phones, handheld wireless devices with or without telephone functionality, wireless tablets, and the like.

Fig. 10 illustrates an example wireless device 1000 having one or more of the advantageous features described herein. In the context of a module having one or more features described herein, such a module may be generally represented by dashed box 900 and may be implemented, for example, as a Front End Module (FEM).

Referring to fig. 10, Power Amplifiers (PAs) 100a-100d may receive their respective RF signals from a transceiver 1010 and process the received signals, the transceiver 1010 being configurable and operable in a known manner to generate RF signals to be amplified and transmitted. The transceiver 1010 is shown interacting with a baseband subsystem 1008, with the baseband subsystem 1008 configured to provide conversion between data and/or voice signals appropriate for a user and RF signals appropriate for the transceiver 1010. The transceiver 1010 may also be in communication with a power management component 1006, the power management component 1006 configured to manage power for operation of the wireless device 1000. Such power management may also control the operation of the baseband subsystem 1008 and the module 900.

The baseband subsystem 1008 is shown connected to the user interface 1002 to facilitate various inputs and outputs of voice and/or data provided to and received from a user. The baseband subsystem 1008 may also be coupled to memory 1004, which memory 1004 is configured to store data and/or instructions to facilitate operation of the wireless device and/or to provide information storage for a user.

In the example wireless device 1000, the outputs of the PAs 100a-100d are shown as being matched (via respective matching circuits 1020a-1020d) and routed to their respective duplexers 1012a-1012 d. Such amplified and filtered signals may be routed through antenna switch 1014 to antenna 1016 (or multiple antennas) for transmission. In some embodiments, the duplexers 1012a-1012d may allow transmit and receive operations to be performed simultaneously with a common antenna (e.g., 1016). In fig. 10, the received signal is shown as being routed to an "Rx" path (not shown), which may include, for example, a Low Noise Amplifier (LNA).

Many other wireless device configurations may utilize one or more of the features described herein. For example, the wireless device need not be a multi-frequency device. In another example, the wireless device may include additional antennas such as diversity antennas and additional connection features such as Wi-Fi, bluetooth, and GPS.

Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like, are to be construed in an inclusive sense, that is, in a sense of "including but not limited to". The term "coupled," as used generally herein, means that two or more elements may be connected directly or through one or more intervening elements. Additionally, as used in this application, the terms "herein," "above," "below," and words of similar import shall refer to this application as a whole and not to any particular portions of this application. Where the context permits, words in the above description using the singular or plural number may also include the plural or singular number respectively. The word "or" when referring to a list of two or more items, covers all of the following interpretations thereof: any of the items in the list, all of the items in the list, and any combination of the items in the list.

The above detailed description of embodiments of the invention is not intended to be exhaustive or to limit the invention to the precise form disclosed above. While specific embodiments of, and examples for, the invention are described above for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize. For example, while processes or blocks are presented in a given order, alternative embodiments may perform processes having steps in a different order, or employ systems having blocks in a different order, and some processes or blocks may be deleted, moved, added, subtracted, combined, and/or modified. Each of these processes or blocks may be implemented in a variety of different ways. Likewise, while processes or blocks are sometimes shown as being performed in series, these processes or blocks may instead be performed in parallel, or may be performed at different times.

The teachings of the invention provided herein can be applied to other systems, not necessarily the systems described above. The elements and acts of the various embodiments described above can be combined to provide further embodiments.

While some embodiments of the present invention have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the disclosure. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the disclosure. The drawings and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the disclosure.

Claims (19)

1. A signal combiner, comprising:

a balun circuit having a first coil implemented between a first port and a second port, and a second coil implemented between a third port and a fourth port, the first port and the third port being corresponding ports and coupled by a first capacitor, the second port and the fourth port being corresponding ports and coupled by a second capacitor, the first port configured to receive a first signal, the fourth port configured to receive a second signal, the second port configured to produce a combination of the first signal and the second signal; and

a termination circuit coupling the third port to ground, the termination circuit including an adjustable impedance circuit and a harmonic rejection circuit configured to reduce the strength of one or more harmonics at the second port.

2. The signal combiner of claim 1, further comprising a controller configured to receive a band selection signal and tune the adjustable impedance circuit based on the band selection signal.

3. The signal combiner of claim 2, wherein the controller is further configured to tune at least one of the first capacitor or the second capacitor.

4. The signal combiner of claim 1 wherein the first port is configured to receive a carrier amplified signal from a doherty power amplifier and the fourth port is configured to receive a peak amplified signal from the doherty power amplifier.

5. The signal combiner of claim 4, wherein the adjustable impedance circuit comprises a plurality of capacitors, each of the plurality of capacitors having a capacitance equal to 2 π times the respective operating frequency of the Doherty power amplifier times the inverse of the characteristic impedance of a load coupled to the Doherty power amplifier.

6. The signal combiner of claim 4, further comprising a controller configured to receive a band select signal indicative of an operating frequency and tune the adjustable impedance circuit to an inverse of its capacitance equal to 2 π times the operating frequency times a characteristic impedance of a load coupled to the Doherty power amplifier.

7. The signal combiner of claim 6, wherein the controller is further configured to tune the first capacitor and the second capacitor to have a capacitance equal to one-half of a capacitance of the adjustable impedance circuit.

8. The signal combiner of claim 1 wherein the first port is configured to receive a peak amplified signal from a doherty power amplifier and the fourth port is configured to receive a carrier amplified signal from the doherty power amplifier.

9. The signal combiner of claim 8, wherein the adjustable impedance circuit comprises a plurality of inductors, each of the plurality of inductors having an inductance equal to a characteristic impedance of a load coupled to the doherty power amplifier divided by 2 pi times a respective operating frequency of the doherty power amplifier.

10. The signal combiner of claim 8, further comprising a controller configured to receive a band select signal indicative of an operating frequency and tune the adjustable impedance circuit to have an inductance equal to a characteristic impedance of a load coupled to the doherty power amplifier divided by 2 pi times the operating frequency.

11. The signal combiner of claim 1, wherein the adjustable impedance matching circuit comprises a plurality of impedance elements connected in parallel, each of the plurality of impedance elements comprising an impedance and a switch connected in series.

12. The signal combiner of claim 1, wherein the harmonic rejection circuit comprises a plurality of resonant elements connected in series, each of the plurality of resonant elements comprising an inductor and a capacitor connected in parallel.

13. The signal combiner of claim 12, wherein a resonant frequency of each of the plurality of resonant elements is equal to a multiple of an operating frequency of the signal combiner.

14. The signal combiner of claim 13, wherein a resonant frequency of each of the plurality of resonant elements is equal to twice a respective operating frequency of the signal combiner.

15. The signal combiner of claim 1, wherein the harmonic rejection circuit is implemented between the third port and the adjustable impedance circuit.

16. A power amplifier module comprising:

a package substrate configured to accommodate a plurality of components; and

a signal combiner implemented on the package substrate, the signal combiner comprising a balun circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first and third ports being corresponding ports and coupled through a first capacitor, the second and fourth ports being corresponding ports and coupled through a second capacitor, the first port configured to receive a first signal, the fourth port configured to receive a second signal, the second port configured to produce a combination of the first signal and the second signal, the signal combiner further comprising a termination circuit coupling the third port to ground, the termination circuit comprising an adjustable impedance circuit and a harmonic suppression circuit, the harmonic rejection circuit is configured to reduce the strength of one or more harmonics at the second port.

17. The power amplifier module of claim 16 further comprising a controller implemented on the package substrate, the controller configured to receive a band selection signal and tune the tunable impedance circuit based on the band selection signal.

18. A wireless device, comprising:

a transceiver configured to generate a radio frequency signal;

a power amplifier module in communication with the transceiver, the power amplifier module including an input circuit configured to receive the radio frequency signal and to divide the radio frequency signal into a first portion and a second portion, the power amplifier module further including a Doherty power amplifier having a carrier amplification path coupled to the input circuit to receive the first portion and a peaking amplification path coupled to the input circuit to receive the second portion, the power amplifier module further including an output circuit coupled to the Doherty power amplifier, the output circuit including a balun circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first port and the third port are respective ports and are coupled by a first capacitor, the second port and the fourth port are respective ports and are coupled by a second capacitor, the first port is configured to receive a first signal via the carrier amplification path, the fourth port is configured to receive a second signal via the peak amplification path, the second port is configured to produce a combination of the first signal and the second signal as an amplified radio frequency signal, the power amplifier module further comprises a termination circuit coupling the third port to ground, the termination circuit comprises an adjustable impedance circuit and a harmonic rejection circuit, the harmonic rejection circuit is configured to reduce the strength of one or more harmonics at the second port; and

an antenna in communication with the power amplifier module, the antenna configured to effectuate transmission of the amplified radio frequency signal.

19. The wireless device of claim 18, further comprising a controller configured to receive a band selection signal and tune the adjustable impedance circuit based on the band selection signal.

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