CN107846196A - A kind of high-power high-efficiency power amplifier insensitive to source and load impedance - Google Patents

A kind of high-power high-efficiency power amplifier insensitive to source and load impedance Download PDF

Info

Publication number
CN107846196A
CN107846196A CN201711073091.1A CN201711073091A CN107846196A CN 107846196 A CN107846196 A CN 107846196A CN 201711073091 A CN201711073091 A CN 201711073091A CN 107846196 A CN107846196 A CN 107846196A
Authority
CN
China
Prior art keywords
phase shift
input
network
matching network
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201711073091.1A
Other languages
Chinese (zh)
Inventor
胡柳林
邬海峰
滑育楠
廖学介
陈依军
吕继平
童伟
王测天
吴曦
杨云婷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHENGDU GANIDE TECHNOLOGY Co Ltd
Original Assignee
CHENGDU GANIDE TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHENGDU GANIDE TECHNOLOGY Co Ltd filed Critical CHENGDU GANIDE TECHNOLOGY Co Ltd
Priority to CN201711073091.1A priority Critical patent/CN107846196A/en
Publication of CN107846196A publication Critical patent/CN107846196A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56Modifications of input or output impedances, not otherwise provided for
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3036Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers
    • H03G3/3042Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers in modulators, frequency-changers, transmitters or power amplifiers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a kind of high-power high-efficiency power amplifier insensitive to source and load impedance, using the enlarging function of the stacked transistors of four tunnel three amplification real-time performance balanced type amplifier, substantially increase the power gain and power capacity of balanced type power amplifier, while ± 45 ° and ± 135 ° of phase shifting controls and input and output impedance matching of four-path balance signal are realized using multistage T-shaped filtering phase-shift circuit, ensure filter with low insertion loss and it is efficient under the premise of, amplifier is greatly reduced for source impedance and the susceptibility of load impedance, so as to improve the stability of circuit and robustness.The high-power high-efficiency power amplifier insensitive to source and load impedance that the present invention is realized, power output is high, power gain is high, and low-load impedance sensitive degree is good.

Description

A kind of high-power high-efficiency power amplifier insensitive to source and load impedance
Technical field
The invention belongs to field-effect transistor microwave and millimeter wave power amplifier and technical field of integrated circuits, and in particular to A kind of design of the high-power high-efficiency power amplifier insensitive to source and load impedance.
Background technology
With layout early stage of the fast development in the commercial communication such as 3G, 4G-LTE market, and 5G communications, microwave and millimeter wave Front-end transmitter also develops to microwave and millimeter wave frequency range high power, highly integrated, efficient direction;Further, since MIMO technology Extensive use, system proposes acid test, therefore market to end power amplifier for load impedance susceptibility Urgent demand is directed to low-load impedance sensitive degree, high power, the high efficiency power amplifier chip of microwave and millimeter wave frequency range.
However, in the design of microwave and millimeter wave power amplifier chip, always in the presence of some design challenges, embody For:
(1) low-load impedance sensitive degree mutually restricts with high efficiency index in conventional balanced type amplifier:Due to microwave milli The output end of power amplifier in metric wave front-end transmitter needs to connect the poor antenna of a stationary wave characteristic, the antenna for The low-load impedance sensitive degree of microwave and millimeter wave power amplifier proposes stern challenge;It is existing to be realized based on Lange structure The balanced type power amplifier of 90 ° of phase shifts is while load impedance susceptibility is improved, often in input and output matching network The interior Insertion Loss of larger band is introduced, so as to reduce the efficiency of power amplifier;It is existing that ± 45 ° of phase shifts are realized based on two-way phase-shift structure Balanced type power amplifier load impedance susceptibility and power output still have greatly improved space.Therefore, it is existing flat Low-load impedance sensitive degree mutually restricts with high efficiency index in weighing apparatus type amplifier.
(2) microwave and millimeter wave frequency range conventional balanced type amplifier high power, high-gain index Design difficulty are larger:Due to not Carry out driving for 5G markets, there is an urgent need to high-gain, high power, high efficiency, low-load impedance are quick for microwave and millimeter wave front end transmitter Sensitivity power amplifier, but the application circuit of existing millimeter wave frequency band must use grid to grow less semiconductor technology crystal Pipe, is influenceed, the voltage swing of power amplifier will be limited by larger, therefore also limit by its low breakdown voltage The power capacity of power transistor.
The amplifier of most typical low-load impedance sensitive degree is the balance power amplification using 90 ° of phase shift Lange structures Device, still, in microwave and millimeter wave frequency range, traditional Lange balance amplifier still has some design deficiencies, is mainly reflected in:
(1) low-load impedance sensitive degree and high efficiency index Design difficulty are larger.
In order to improve the low-load impedance sensitive degree of circuit, designer generally requires to realize that two-way balances using Lange structure 90 ° of phase shift of architecture signals, will also reduce the band internal loss of introducing as far as possible, while it is near to ensure that two-way balanced signal has Like identical band internal loss, in addition it is also necessary to coordinate other mating structures to realize the input of transistor and the impedance of input port Matching, this considerably increases the design complexities of circuit and difficulty.Designer generally requires to lead to for each design objective of compromising Cross introduce it is certain realize 90 ° of phase shift and impedance matching with internal loss, this is greatly lowered the efficiency of power amplifier Index.
(2) millimere-wave band high-capacity transistor impedance matching difficulty is larger.
Because amplifier operation is higher in order to obtain in millimere-wave band, the limited power capacity of single transistor, designer Power capacity, generally require 2n times of power combining structures, this structure often lead to export network have it is very low optimal Load impedance, this low-load impedance again increase the impedance matching difficulty for causing microwave and millimeter wave section balanced type amplifier.
The content of the invention
The purpose of the present invention is to propose to a kind of high-power high-efficiency power amplifier insensitive to source and load impedance, profit With three transistor stack technologies and corresponding ± 45 ° and ± 135 ° of phase shift inputs and output matching networks, microwave milli is realized The indexs such as meter wave frequency band high-gain, high efficiency, low-load impedance sensitive degree.
The technical scheme is that:A kind of high-power high-efficiency power amplifier insensitive to source and load impedance, It is defeated including the first phase shift input matching network, the second phase shift input matching network, the 3rd phase shift input matching network, the 4th phase shift Enter matching network, the 5th phase shift input matching network, the 6th phase shift input matching network, four-path balance type three and stack power amplification Network, the first phase shift output matching network, the second phase shift output matching network, the 3rd phase shift output matching network, the 4th phase shift Output matching network, the 5th phase shift output matching network, the 6th phase shift output matching network, the first power supply biasing networks and the Two power supply biasing networks.
The input of first phase shift input matching network is connected with the input of the second phase shift input matching network as whole The input of individual power amplifier;The output end of 5th phase shift output matching network and the output of the 6th phase shift output matching network The connected output end as whole power amplifier in end.The input of power amplifier is also associated with capacitance C1
The output end of first phase shift input matching network respectively with the input of the 3rd phase shift input matching network and The input connection of four phase shift input matching networks;The output end of second phase shift input matching network inputs with the 5th phase shift respectively The input of the input of matching network and the 6th phase shift input matching network connects;5th phase shift output matching network it is defeated Enter end to be connected with the output end of the first phase shift output matching network and the output end of the second phase shift output matching network respectively;The The input of six phase shift output matching networks exports with the output end of the 3rd phase shift output matching network and the 4th phase shift respectively The output end connection of matching network.
Four-path balance type three, which stacks power amplification network, includes four inputs and four output ends, its first input end and The output end of the output end connection of 3rd phase shift input matching network, its second input and the 4th phase shift input matching network connects Connect, its 3rd input is connected with the output end of the 5th phase shift input matching network, and its 4th input and the 6th phase shift input The output end connection of matching network, its first output end is connected with the input of the first phase shift output matching network, and it is second defeated Go out end to be connected with the input of the second phase shift output matching network, its 3rd output end is defeated with the 3rd phase shift output matching network Enter end connection, its 4th output end is connected with the input of the 4th phase shift output matching network.
First power supply biasing networks stack power amplification network and the 5th phase shift output with four-path balance type three respectively Distribution network connects, and power amplification network is stacked with four-path balance type three respectively for the second power supply biasing networks and the 6th phase shift exports Matching network connects.
The beneficial effects of the invention are as follows:The present invention is using three stacked transistors amplification real-time performance four-path balance type amplifier Enlarging function, improve the power gain and power capacity of traditional two-way balanced type power amplifier, while utilize multistage filter Wave mode phase-shift circuit realizes phase shifting control and input and the output impedance matching of four-path balance signal, is ensureing filter with low insertion loss and height The load impedance susceptibility of amplifier is significantly improved on the premise of efficiency, so as to improve the Stability and dependability of circuit.
Further, the first phase shift input matching network, the 3rd phase shift input matching network, the 5th phase shift input pair net Network, the first phase shift output matching network and the 3rd phase shift output matching network are -45 ° of phase shift matching networks;Second phase shift is defeated It is equal to enter matching network, the 4th phase shift input matching network, the 6th phase shift input matching network and the 6th phase shift output matching network For+45 ° of phase shift matching networks;Second phase shift output matching network and the 4th phase shift output matching network are -135 ° of phase shifts Distribution network;5th phase shift output matching network is+135 ° of phase shift matching networks.
- 45 ° of phase shift matching networks and -135 ° of phase shift matching networks include T-shaped LCL filtering phase-shift circuits, T-shaped LCL filters Input of the one end of ripple phase-shift circuit as -45 °/- 135 ° phase shift matching networks, -45 °/- 135 ° phase shifts of its other end conduct The output end of matching network;+ 45 ° of phase shift matching networks and+135 ° of phase shift matching networks include T-shaped CLC filtering phase-shift circuits, Input of the one end of T-shaped CLC filtering phase-shift circuit as+45 ° /+135 ° phase shift matching networks, its+45 ° of other end conduct /+ The output end of 135 ° of phase shift matching networks.T-shaped LCL filtering phase-shift circuit includes the inductance of two series connection, and one is connected in parallel on Ground capacity on two inductance connection nodes;T-shaped CLC filtering phase-shift circuit includes the electric capacity of two series connection, and one simultaneously The grounded inductor being associated on two capacitance connection nodes.
The above-mentioned further beneficial effect of scheme is:Two multistages T-shaped filtering type phase-shift circuit point is respectively adopted in the present invention Do not realize ± 45 ° of four-path balance signal or ± 135 ° of phase shifting controls and input and output impedance matching, four road signals can be with Independent control, the index greatly reduced between circuit mutually limit, so as to improve the efficiency index of power amplifier.
Further, four-path balance type three, which stacks power amplification network and includes the first via three, stacks power amplification network, the Two tunnels three stack power amplification network, the 3rd tunnel three stacks power amplification network and the 4th tunnel three stacks power amplification network, often The stacking power amplification network structure of road three is identical, including one or more stacked structure in parallel, is wrapped per road stacked structure Include one group of top layer transistor, intermediate layer transistor and the bottom transistor for stacking and forming that is connected successively according to source drain;Top The size of layer transistor, intermediate layer transistor and bottom transistor is identical.
The first via three is stacked in power amplification network, and the drain electrode of each top layer transistor, which is connected, is used as the heap of four-path balance type three First output end of folded power amplification network;It is connected after the grid connection RC stabilizing circuits of each bottom transistor and is put down as four tunnels Weighing apparatus type three stacks the first input end of power amplification network.Second tunnel three is stacked in power amplification network, each top layer transistor Drain electrode be connected as four-path balance type three stacking power amplification network the second output end;The grid of each bottom transistor connects Connect the second input being connected after RC stabilizing circuits as the stacking power amplification network of four-path balance type three.3rd tunnel three stacks work( In rate amplification network, the drain electrode of each top layer transistor is connected as the 3rd defeated of the stacking power amplification network of four-path balance type three Go out end;It is connected after the grid connection RC stabilizing circuits of each bottom transistor and stacks power amplification network as four-path balance type three The 3rd input.4th tunnel three is stacked in power amplification network, and the drain electrode of each top layer transistor, which is connected, is used as four-path balance Type three stacks the 4th output end of power amplification network;Be connected conduct after the grid connection RC stabilizing circuits of each bottom transistor Four-path balance type three stacks the 4th input of power amplification network.RC stabilizing circuits include electric capacity and resistance in parallel.
The grid of each top layer transistor is inclined with the first power supply biasing networks and the second power supply respectively by a resistance Network connection is put, and the grid of each top layer transistor is also associated with compensation circuit all the way;The grid of each intermediate layer transistor It is connected respectively with the first power supply biasing networks and the second power supply biasing networks by a resistance, and each intermediate layer transistor Grid be also associated with compensation circuit all the way;The source grounding of each bottom transistor;The grid of each bottom transistor leads to A resistance is crossed to be connected with the first power supply biasing networks and the second power supply biasing networks respectively.Compensation circuit includes the grid of series connection Stabilizer pole resistance and grid compensating electric capacity, the other end ground connection of grid compensating electric capacity.
The above-mentioned further beneficial effect of scheme is:Core amplifier architecture stacks using three in the present invention amplifies network, Only need to stack structure for amplifying using one-level three, it is possible to lift 3~5dB power gain, answer so as to enormously simplify circuit Miscellaneous degree.In addition, the three grid compensating electric capacities for stacking amplification network are the less electric capacity of capacitance, for realizing grid voltage Synchronous hunting, and in order to realize the stability under millimeter wave frequency band, it is necessary to steady resistance of connecting, and traditional Cascode crystal The piled grids compensating electric capacity of pipe is the larger electric capacity of capacitance, for realizing the AC earth of grid, also without the stable electricity of series connection Resistance.
Further, the first power supply biasing networks and the second power supply biasing networks structure are identical, and it is inclined to include input power supply Circuits and amplification and output power supply biasing circuit.
In first power supply biasing networks, input power supply biasing circuit includes the resistance R of series connectiongb1uWith inductance Lggu, resistance Rgb1uWith inductance LgguConnecting node on be also associated with ground capacity Cggu;Resistance Rgb1uThe other end connect the first low pressure biasing Power supply VGGu;In second power supply biasing networks, input power supply biasing circuit includes the resistance R of series connectiongb1wWith inductance Lggw, resistance Rgb1wWith inductance LggwConnecting node on be also associated with ground capacity Cggw;Resistance Rgb1wThe other end connect the second low pressure biasing Power supply VGGw;The grid of each bottom transistor by a resistance respectively with inductance LgguAnd LggwConnection.
In first power supply biasing networks, amplify and export the resistance R that power supply biasing circuit includes being sequentially connected in seriesgb4u、Rgb5u、 Rgb6uAnd inductance Lddu;Resistance Rgb4uThe other end ground connection;Resistance Rgb6uWith inductance LdduConnecting node on be also respectively connected with Ground capacity CdduWith the first HVB high voltage bias power vd Du;Inductance LdduThe other end and the 5th phase shift output matching network input End connection;In second power supply biasing networks, amplify and export the resistance R that power supply biasing circuit includes being sequentially connected in seriesgb4w、Rgb5w、 Rgb6wAnd inductance Lddw;Resistance Rgb4wThe other end ground connection;Resistance Rgb6wWith inductance LddwConnecting node on be also respectively connected with Ground capacity CddwWith the second HVB high voltage bias power vd Dw;Inductance LddwThe other end and the 6th phase shift output matching network input End connection.
The grid of each intermediate layer transistor by a resistance respectively with Rgb4uAnd Rgb5uConnecting node and Rgb4wWith Rgb5wConnecting node connection;The grid of each top layer transistor by a resistance respectively with Rgb5uAnd Rgb6uConnecting node And Rgb5wAnd Rgb6wConnecting node connection.
The above-mentioned further beneficial effect of scheme is:Two symmetrically arranged power supply biasing networks are used to realize puts down to four tunnels Weighing apparatus type three stacks transistor gate and drain electrode feed and the bypass functionality of spurious signal in power amplification network.
Brief description of the drawings
Fig. 1 show a kind of high-power high-efficiency power insensitive to source and load impedance provided in an embodiment of the present invention Amplifier principle block diagram.
Fig. 2 show a kind of high-power high-efficiency power insensitive to source and load impedance provided in an embodiment of the present invention Amplifier circuit figure.
Embodiment
The illustrative embodiments of the present invention are described in detail referring now to accompanying drawing.It should be appreciated that shown in accompanying drawing and What the embodiment of description was merely exemplary, it is intended that explain the principle and spirit of the present invention, and not limit the model of the present invention Enclose.
The embodiments of the invention provide a kind of high-power high-efficiency power amplifier insensitive to source and load impedance, such as Shown in Fig. 1, including the first phase shift input matching network, the second phase shift input matching network, the 3rd phase shift input matching network, Four phase shift input matching networks, the 5th phase shift input matching network, the 6th phase shift input matching network, four-path balance type three stack Power amplification network, the first phase shift output matching network, the second phase shift output matching network, the 3rd phase shift output matching network, 4th phase shift output matching network, the 5th phase shift output matching network, the 6th phase shift output matching network, the first power supply biasing net Network and the second power supply biasing networks.
Wherein, the input phase continuous cropping of the input of the first phase shift input matching network and the second phase shift input matching network For the input of whole power amplifier;The output end of 5th phase shift output matching network and the 6th phase shift output matching network The connected output end as whole power amplifier of output end.The input of power amplifier is also associated with capacitance C1
The output end of first phase shift input matching network respectively with the input of the 3rd phase shift input matching network and The input connection of four phase shift input matching networks;The output end of second phase shift input matching network inputs with the 5th phase shift respectively The input of the input of matching network and the 6th phase shift input matching network connects;5th phase shift output matching network it is defeated Enter end to be connected with the output end of the first phase shift output matching network and the output end of the second phase shift output matching network respectively;The The input of six phase shift output matching networks exports with the output end of the 3rd phase shift output matching network and the 4th phase shift respectively The output end connection of matching network.
Four-path balance type three, which stacks power amplification network, includes four inputs and four output ends, its first input end and The output end of the output end connection of 3rd phase shift input matching network, its second input and the 4th phase shift input matching network connects Connect, its 3rd input is connected with the output end of the 5th phase shift input matching network, and its 4th input and the 6th phase shift input The output end connection of matching network, its first output end is connected with the input of the first phase shift output matching network, and it is second defeated Go out end to be connected with the input of the second phase shift output matching network, its 3rd output end is defeated with the 3rd phase shift output matching network Enter end connection, its 4th output end is connected with the input of the 4th phase shift output matching network.
First power supply biasing networks stack power amplification network and the 5th phase shift output with four-path balance type three respectively Distribution network connects, and power amplification network is stacked with four-path balance type three respectively for the second power supply biasing networks and the 6th phase shift exports Matching network connects.
In the embodiment of the present invention, the first phase shift input matching network, the 3rd phase shift input matching network, the 5th phase shift input Matching network, the first phase shift output matching network and the 3rd phase shift output matching network are -45 ° of phase shift matching networks;Second Phase shift input matching network, the 4th phase shift input matching network, the 6th phase shift input matching network and the 6th phase shift output matching Network is+45 ° of phase shift matching networks;Second phase shift output matching network and the 4th phase shift output matching network are -135 ° Phase shift matching network;5th phase shift output matching network is+135 ° of phase shift matching networks.
- 45 ° of phase shift matching networks and -135 ° of phase shift matching networks include T-shaped LCL filtering phase-shift circuits, T-shaped LCL filters Input of the one end of ripple phase-shift circuit as -45 °/- 135 ° phase shift matching networks, -45 °/- 135 ° phase shifts of its other end conduct The output end of matching network;+ 45 ° of phase shift matching networks and+135 ° of phase shift matching networks include T-shaped CLC filtering phase-shift circuits, Input of the one end of T-shaped CLC filtering phase-shift circuit as+45 ° /+135 ° phase shift matching networks, its+45 ° of other end conduct /+ The output end of 135 ° of phase shift matching networks.
T-shaped LCL filtering phase-shift circuit includes the inductance of two series connection, and one is connected in parallel on two inductance connection nodes Ground capacity;T-shaped CLC filtering phase-shift circuit includes the electric capacity of two series connection, and one is connected in parallel on two capacitance connection sections Grounded inductor on point.
In the embodiment of the present invention, as shown in Fig. 2 the first phase shift input matching network includes the inductance L of series connection1With L2, and It is connected in parallel on L1With L2Ground capacity C in connecting node2;Second phase shift input matching network includes the electric capacity C of series connection3With C4, with And it is connected in parallel on C3With C4Grounded inductor L in connecting node3;3rd phase shift input matching network includes the inductance L of series connection4With L5, And it is connected in parallel on L4With L5Ground capacity C in connecting node5;4th phase shift input matching network includes the electric capacity C of series connection6With C7, and it is connected in parallel on C6With C7Grounded inductor L in connecting node6;5th phase shift input matching network includes the inductance L of series connection7 With L8, and it is connected in parallel on L7With L8Ground capacity C in connecting node8;6th phase shift input matching network includes the electric capacity of series connection C9With C10, and it is connected in parallel on C9With C10Grounded inductor L in connecting node9
First phase shift output matching network includes the inductance L of series connection10With L11, and it is connected in parallel on L10With L11In connecting node Ground capacity C11;Second phase shift output matching network includes the inductance L of series connection12With L13, and it is connected in parallel on L12With L13Connection Ground capacity C on node12;3rd phase shift output matching network includes the inductance L of series connection14With L15, and it is connected in parallel on L14With L15Ground capacity C in connecting node13;4th phase shift output matching network includes the inductance L of series connection16With L17, and be connected in parallel on L16With L17Ground capacity C in connecting node14;5th phase shift output matching network includes the electric capacity C of series connection15With C16, and It is connected in parallel on C15With C16Grounded inductor L in connecting node18;6th phase shift output matching network includes the electric capacity C of series connection17With C18, and it is connected in parallel on C17With C18Grounded inductor L in connecting node19
Four-path balance type three stacks power amplification network and stacked including the stacking power amplification of the first via three network, the second tunnel three Power amplification network, the 3rd tunnel three stack power amplification network and the 4th tunnel three stacks power amplification network, and work(is stacked per road three Rate amplification network structure is identical, and including one or more stacked structure in parallel, one group is included per road stacked structure successively Be connected top layer transistor, intermediate layer transistor and the bottom transistor for stacking and forming according to source drain.Top layer transistor, The size of intermediate layer transistor and bottom transistor is identical.In the embodiment of the present invention, as shown in Fig. 2 stacking power per road three Amplify network using stacked structure all the way.
The first via three is stacked in power amplification network, and top layer transistor M43 drain electrode stacks work(as four-path balance type three Rate amplifies the first output end of network;Top layer transistor M43 grid passes through resistance Rgb43Respectively with first power supply biasing networks And the second power supply biasing networks connection, and top layer transistor M43 grid is also connected with by grid steady resistance Rg43With a termination The grid compensating electric capacity C on groundg43Compensation circuit in series.Intermediate layer transistor M42 grid passes through resistance Rgb42Respectively with First power supply biasing networks and the second power supply biasing networks connection, and intermediate layer transistor M42 grid is also connected with by grid Steady resistance Rg42With the grid compensating electric capacity C of one end ground connectiong42Compensation circuit in series.Bottom transistor M41 source electrode Ground connection;Bottom transistor M41 grid passes through resistance Rgb41Respectively net is biased with the first power supply biasing networks and the second power supply Network is connected, and bottom transistor M41 grid is connected by resistance Rg41With inductance Cg41Conduct after the RC stabilizing circuits that parallel connection is formed Four-path balance type three stacks the first input end of power amplification network.
Second tunnel three is stacked in power amplification network, and top layer transistor M33 drain electrode stacks work(as four-path balance type three Rate amplifies the second output end of network;Top layer transistor M33 grid passes through resistance Rgb33Respectively with first power supply biasing networks And the second power supply biasing networks connection, and top layer transistor M33 grid is also connected with by grid steady resistance Rg33With a termination The grid compensating electric capacity C on groundg33Compensation circuit in series.Intermediate layer transistor M32 grid passes through resistance Rgb32Respectively with First power supply biasing networks and the second power supply biasing networks connection, and intermediate layer transistor M32 grid is also connected with by grid Steady resistance Rg32With the grid compensating electric capacity C of one end ground connectiong32Compensation circuit in series.Bottom transistor M31 source electrode Ground connection;Bottom transistor M31 grid passes through resistance Rgb31Respectively net is biased with the first power supply biasing networks and the second power supply Network is connected, and bottom transistor M31 grid is connected by resistance Rg31With inductance Cg31Conduct after the RC stabilizing circuits that parallel connection is formed Four-path balance type three stacks the second input of power amplification network.
3rd tunnel three is stacked in power amplification network, and top layer transistor M23 drain electrode stacks work(as four-path balance type three Rate amplifies the 3rd output end of network;Top layer transistor M23 grid passes through resistance Rgb23Respectively with first power supply biasing networks And the second power supply biasing networks connection, and top layer transistor M23 grid is also connected with by grid steady resistance Rg23With a termination The grid compensating electric capacity C on groundg23Compensation circuit in series.Intermediate layer transistor M22 grid passes through resistance Rgb22Respectively with First power supply biasing networks and the second power supply biasing networks connection, and intermediate layer transistor M22 grid is also connected with by grid Steady resistance Rg22With the grid compensating electric capacity C of one end ground connectiong22Compensation circuit in series.Bottom transistor M21 source electrode Ground connection;Bottom transistor M21 grid passes through resistance Rgb21Respectively net is biased with the first power supply biasing networks and the second power supply Network is connected, and bottom transistor M21 grid is connected by resistance Rg21With inductance Cg21Conduct after the RC stabilizing circuits that parallel connection is formed Four-path balance type three stacks the 3rd input of power amplification network.
4th tunnel three is stacked in power amplification network, and top layer transistor M13 drain electrode stacks work(as four-path balance type three Rate amplifies the 4th output end of network;Top layer transistor M13 grid passes through resistance Rgb13Respectively with first power supply biasing networks And the second power supply biasing networks connection, and top layer transistor M13 grid is also connected with by grid steady resistance Rg13With a termination The grid compensating electric capacity C on groundg13Compensation circuit in series.Intermediate layer transistor M12 grid passes through resistance Rgb12Respectively with First power supply biasing networks and the second power supply biasing networks connection, and intermediate layer transistor M12 grid is also connected with by grid Steady resistance Rg12With the grid compensating electric capacity C of one end ground connectiong12Compensation circuit in series.Bottom transistor M11 source electrode Ground connection;Bottom transistor M11 grid passes through resistance Rgb11Respectively net is biased with the first power supply biasing networks and the second power supply Network is connected, and bottom transistor M11 grid is connected by resistance Rg11With inductance Cg11Conduct after the RC stabilizing circuits that parallel connection is formed Four-path balance type three stacks the 4th input of power amplification network.
Because the output impedance of three stacking power amplification networks is higher than traditional common-source amplifier, the heap of four-path balance type three Folded power amplification network can also be respectively adopted 2nStacking amplifier architecture in parallel again, can still ensure of a relatively high output Load impedance.
When using the stacked structure of multi-channel parallel, the first via three is stacked in power amplification network, each top layer transistor Drain electrode be connected as four-path balance type three stacking power amplification network the first output end;The grid of each bottom transistor connects Connect the first input end being connected after RC stabilizing circuits as the stacking power amplification network of four-path balance type three.Second tunnel three stacks work( In rate amplification network, the drain electrode of each top layer transistor is connected as the second defeated of the stacking power amplification network of four-path balance type three Go out end;It is connected after the grid connection RC stabilizing circuits of each bottom transistor and stacks power amplification network as four-path balance type three The second input.3rd tunnel three is stacked in power amplification network, and the drain electrode of each top layer transistor, which is connected, is used as four-path balance Type three stacks the 3rd output end of power amplification network;Be connected conduct after the grid connection RC stabilizing circuits of each bottom transistor Four-path balance type three stacks the 3rd input of power amplification network.4th tunnel three is stacked in power amplification network, each top layer The drain electrode of transistor, which is connected, stacks the 4th output end of power amplification network as four-path balance type three;Each bottom transistor It is connected after grid connection RC stabilizing circuits and the 4th input of power amplification network is stacked as four-path balance type three.Other every roads The circuit connecting mode of stacked structure is identical with stacked structure all the way.
First power supply biasing networks and the second power supply biasing networks structure are identical, include input power supply biasing circuit and put Big and output power supply biasing circuit.
In first power supply biasing networks, input power supply biasing circuit includes the resistance R of series connectiongb1uWith inductance Lggu, resistance Rgb1uWith inductance LgguConnecting node on be also associated with ground capacity Cggu;Resistance Rgb1uThe other end connect the first low pressure biasing Power supply VGGu;Inductance LgguThe other end respectively with resistance Rgb11、Rgb21、Rgb31And Rgb41Connection.
In second power supply biasing networks, input power supply biasing circuit includes the resistance R of series connectiongb1wWith inductance Lggw, resistance Rgb1wWith inductance LggwConnecting node on be also associated with ground capacity Cggw;Resistance Rgb1wThe other end connect the second low pressure biasing Power supply VGGw;Inductance LggwThe other end respectively with resistance Rgb11、Rgb21、Rgb31And Rgb41Connection.
In first power supply biasing networks, amplify and export the resistance R that power supply biasing circuit includes being sequentially connected in seriesgb4u、Rgb5u、 Rgb6uAnd inductance Lddu;Resistance Rgb4uThe other end ground connection;Resistance Rgb6uWith inductance LdduConnecting node on be also respectively connected with Ground capacity CdduWith the first HVB high voltage bias power vd Du;Inductance LdduThe other end and the 5th phase shift output matching network input End connection;Rgb4uAnd Rgb5uConnecting node respectively with resistance Rgb12、Rgb22、Rgb32And Rgb42Connection;Rgb5uAnd Rgb6uConnection Node respectively with resistance Rgb13、Rgb23、Rgb33And Rgb43Connection.
In second power supply biasing networks, amplify and export the resistance R that power supply biasing circuit includes being sequentially connected in seriesgb4w、Rgb5w、 Rgb6wAnd inductance Lddw;Resistance Rgb4wThe other end ground connection;Resistance Rgb6wWith inductance LddwConnecting node on be also respectively connected with Ground capacity CddwWith the second HVB high voltage bias power vd Dw;Inductance LddwThe other end and the 6th phase shift output matching network input End connection;Rgb4wAnd Rgb5wConnecting node respectively with resistance Rgb12、Rgb22、Rgb32And Rgb42Connection;Rgb5wAnd Rgb6wConnection Node respectively with resistance Rgb13、Rgb23、Rgb33And Rgb43Connection.
The concrete operating principle and process of the present invention are introduced with reference to Fig. 2:
Radio-frequency input signals is by input IN ingoing power amplifiers, after inputting blocking coupled capacitor C1, in INc Point constant power is assigned as signal A and signal B two paths of signals.
Signal A constant powers again after the first phase shift input matching network carries out -45 ° of phase shifting controls and input resistant matching It is assigned as signal A1 and signal A2 two paths of signals.Signal A1 through the 3rd phase shift input matching network carry out -45 ° of phase shifting controls and Enter the stacking power amplification network of the first via three that four-path balance type three stacks power amplification network after input resistant matching.First Road three stacks power amplification network and carries out power amplification to signal A1 using one or more transistor stack structure in parallel, enters Enter the first phase shift output matching network.Signal A1 carries out -45 ° of phase shifting controls and output through the first phase shift output matching network again Enter the 5th phase shift output matching network after impedance matching.Signal A2 carries out+45 ° of phase shift controls through the 4th phase shift input matching network Enter the second tunnel three stacking power amplification net that four-path balance type three stacks power amplification network after system and input resistant matching Network.Second tunnel three stacks power amplification network and carries out power to signal A2 using one or more transistor stack structure in parallel Amplification, into the second phase shift output matching network.Signal A2 carries out -135 ° of phase shifting controls through the second phase shift output matching network again And enter the 5th phase shift output matching network after output impedance matching.After signal A1 and A2 constant power synthesizes signal A', enter Enter the 5th phase shift output matching network and carry out+135 ° of phase shifting controls and output impedance matching, then reach OUTc points.
Similarly, signal B after the second phase shift input matching network carries out+45 ° of phase shifting controls and input resistant matching again Constant power is assigned as signal B1 and signal B2 two paths of signals.Signal B1 carries out -45 ° of phase shift controls through the 5th phase shift input matching network Enter the 3rd tunnel three stacking power amplification net that four-path balance type three stacks power amplification network after system and input resistant matching Network.3rd tunnel three stacks power amplification network and carries out power to signal B1 using one or more transistor stack structure in parallel Amplification, into the 3rd phase shift output matching network.Signal B1 carries out -45 ° of phase shifting controls through the 3rd phase shift output matching network again And enter the 6th phase shift output matching network after output impedance matching.Signal B2 carries out through the 6th phase shift input matching network+ Enter the 4th tunnel three stacking work(that four-path balance type three stacks power amplification network after 45 ° of phase shifting controls and input resistant matching Rate amplifies network.4th tunnel three stacks power amplification network using one or more transistor stack structure in parallel to signal B2 Power amplification is carried out, into the 4th phase shift output matching network.Signal B2 carries out -135 ° through the 4th phase shift output matching network again Enter the 6th phase shift output matching network after phase shifting control and output impedance matching.Signal B1 and B2 constant power synthesizes signal After B' ,+45 ° of phase shifting controls and output impedance matching are carried out into the 6th phase shift output matching network, then reach OUTc points.
Finally, signal A' and signal B' enters output end OUT after the synthesis of OUTc points constant power.
Two symmetrically arranged power supply biasing networks, which are used to realize, stacks crystalline substance in power amplification network to four-path balance type three Body tube grid and drain electrode feed and the bypass functionality of spurious signal.
One of ordinary skill in the art will be appreciated that embodiment described here is to aid in reader and understands this hair Bright principle, it should be understood that protection scope of the present invention is not limited to such especially statement and embodiment.This area Those of ordinary skill can make according to these technical inspirations disclosed by the invention various does not depart from the other each of essence of the invention The specific deformation of kind and combination, these deform and combined still within the scope of the present invention.

Claims (10)

1. a kind of high-power high-efficiency power amplifier insensitive to source and load impedance, it is characterised in that moved including first Phase input matching network, the second phase shift input matching network, the 3rd phase shift input matching network, the 4th phase shift input pair net Network, the 5th phase shift input matching network, the 6th phase shift input matching network, four-path balance type three stack power amplification network, the One phase shift output matching network, the second phase shift output matching network, the 3rd phase shift output matching network, the 4th phase shift output matching Network, the 5th phase shift output matching network, the 6th phase shift output matching network, the first power supply biasing networks and the second power supply are inclined Put network;
The input of the first phase shift input matching network is connected with the input of the second phase shift input matching network as whole The input of the individual power amplifier;The output end of the 5th phase shift output matching network and the 6th phase shift output matching net The connected output end as the whole power amplifier of the output end of network;
The output end of the first phase shift input matching network respectively with the input of the 3rd phase shift input matching network and The input connection of four phase shift input matching networks;The output end of the second phase shift input matching network respectively with the 5th phase shift The input of the input of input matching network and the 6th phase shift input matching network connects;The 5th phase shift output matching The input of network respectively with the output end of the first phase shift output matching network and the output of the second phase shift output matching network End connection;The input of the 6th phase shift output matching network respectively with the output end of the 3rd phase shift output matching network and The output end connection of 4th phase shift output matching network;
The four-path balance type three, which stacks power amplification network, includes four inputs and four output ends, its first input end and The output end of the output end connection of 3rd phase shift input matching network, its second input and the 4th phase shift input matching network connects Connect, its 3rd input is connected with the output end of the 5th phase shift input matching network, and its 4th input and the 6th phase shift input The output end connection of matching network, its first output end is connected with the input of the first phase shift output matching network, and it is second defeated Go out end to be connected with the input of the second phase shift output matching network, its 3rd output end is defeated with the 3rd phase shift output matching network Enter end connection, its 4th output end is connected with the input of the 4th phase shift output matching network;
The first power supply biasing networks stack power amplification network and the 5th phase shift output with four-path balance type three respectively Distribution network connects, and the second power supply biasing networks stack power amplification network and the 6th phase shift with four-path balance type three respectively Output matching network connects.
2. high-power high-efficiency power amplifier according to claim 1, it is characterised in that the first phase shift input Distribution network, the 3rd phase shift input matching network, the 5th phase shift input matching network, the first phase shift output matching network and the 3rd move Phase output matching network is -45 ° of phase shift matching networks;The second phase shift input matching network, the 4th phase shift input matching Network, the 6th phase shift input matching network and the 6th phase shift output matching network are+45 ° of phase shift matching networks;Described second Phase shift output matching network and the 4th phase shift output matching network are -135 ° of phase shift matching networks;The 5th phase shift output Matching network is+135 ° of phase shift matching networks.
3. high-power high-efficiency power amplifier according to claim 2, it is characterised in that -45 ° of phase shifts pair net Network and -135 ° of phase shift matching networks include T-shaped LCL filtering phase-shift circuits, and one end of the T-shaped LCL filtering phase-shift circuit is made For the input of -45 °/- 135 ° phase shift matching networks, output end of its other end as -45 °/- 135 ° phase shift matching networks; + 45 ° of phase shifts matching network and+135 ° of phase shift matching networks include T-shaped CLC filtering phase-shift circuits, the T-shaped CLC filters Input of the one end of ripple phase-shift circuit as+45 ° /+135 ° phase shift matching networks ,+45 ° /+135 ° phase shifts of its other end conduct The output end of matching network.
4. high-power high-efficiency power amplifier according to claim 3, it is characterised in that the T-shaped LCL filtering phase shift Circuit includes the inductance of two series connection, and a ground capacity being connected in parallel on two inductance connection nodes;The T-shaped CLC Filtering phase-shift circuit includes the electric capacity of two series connection, and a grounded inductor being connected in parallel on two capacitance connection nodes.
5. high-power high-efficiency power amplifier according to claim 1, it is characterised in that the heap of four-path balance type three Folded power amplification network includes the first via three and stacks power amplification network, the second tunnel three stacking power amplification network, the 3rd tunnel three Stack power amplification network and the 4th tunnel three stacks power amplification network, stacking power amplification network structure is identical per road three, Including one or more stacked structure in parallel, stacked structure described in per road is connected according to source drain successively including one group Stack top layer transistor, intermediate layer transistor and the bottom transistor formed;The top layer transistor, intermediate layer transistor with And the size of bottom transistor is identical.
6. high-power high-efficiency power amplifier according to claim 5, it is characterised in that the first via three stacks work( In rate amplification network, the drain electrode of each top layer transistor is connected as the first defeated of the stacking power amplification network of four-path balance type three Go out end;It is connected after the grid connection RC stabilizing circuits of each bottom transistor and stacks power amplification network as four-path balance type three First input end;
Second tunnel three is stacked in power amplification network, and the drain electrode of each top layer transistor, which is connected, is used as the heap of four-path balance type three Second output end of folded power amplification network;It is connected after the grid connection RC stabilizing circuits of each bottom transistor and is put down as four tunnels Weighing apparatus type three stacks the second input of power amplification network;
3rd tunnel three is stacked in power amplification network, and the drain electrode of each top layer transistor, which is connected, is used as the heap of four-path balance type three 3rd output end of folded power amplification network;It is connected after the grid connection RC stabilizing circuits of each bottom transistor and is put down as four tunnels Weighing apparatus type three stacks the 3rd input of power amplification network;
4th tunnel three is stacked in power amplification network, and the drain electrode of each top layer transistor, which is connected, is used as the heap of four-path balance type three 4th output end of folded power amplification network;It is connected after the grid connection RC stabilizing circuits of each bottom transistor and is put down as four tunnels Weighing apparatus type three stacks the 4th input of power amplification network;
The RC stabilizing circuits include electric capacity and resistance in parallel.
7. high-power high-efficiency power amplifier according to claim 6, it is characterised in that each top layer transistor Grid be connected respectively with the first power supply biasing networks and the second power supply biasing networks by a resistance, and each top layer crystalline substance The grid of body pipe is also associated with compensation circuit all the way;The grid of each intermediate layer transistor is supplied with first respectively by a resistance Electrical bias network and the second power supply biasing networks connection, and the grid of each intermediate layer transistor is also associated with compensating electricity all the way Road;The source grounding of each bottom transistor;The grid of each bottom transistor is powered with first respectively by a resistance Biasing networks and the second power supply biasing networks connection;
The compensation circuit includes the grid steady resistance and grid compensating electric capacity of series connection, the other end of the grid compensating electric capacity Ground connection.
8. high-power high-efficiency power amplifier according to claim 7, it is characterised in that the first power supply biasing net Network and the second power supply biasing networks structure are identical, include input power supply biasing circuit and amplification and output power supply biasing circuit.
9. high-power high-efficiency power amplifier according to claim 8, it is characterised in that the first power supply biasing net In network, input power supply biasing circuit includes the resistance R of series connectiongb1uWith inductance Lggu, the resistance Rgb1uWith inductance LgguConnection section Ground capacity C is also associated with pointggu;The resistance Rgb1uThe other end connect the first low pressure bias supply VGGu;Described second Power in biasing networks, input power supply biasing circuit includes the resistance R of series connectiongb1wWith inductance Lggw, the resistance Rgb1wWith inductance LggwConnecting node on be also associated with ground capacity Cggw;The resistance Rgb1wThe other end connect the second low pressure bias supply VGGw;The grid of each bottom transistor by a resistance respectively with inductance LgguAnd LggwConnection;
In the first power supply biasing networks, amplify and export the resistance R that power supply biasing circuit includes being sequentially connected in seriesgb4u、Rgb5u、 Rgb6uAnd inductance Lddu;The resistance Rgb4uThe other end ground connection;The resistance Rgb6uWith inductance LdduConnecting node on also divide Ground capacity C is not connected withdduWith the first HVB high voltage bias power vd Du;The inductance LdduThe other end and the 5th phase shift it is defeated Go out the input connection of matching network;In the second power supply biasing networks, amplification and output power supply biasing circuit are included successively The resistance R of series connectiongb4w、Rgb5w、Rgb6wAnd inductance Lddw;The resistance Rgb4wThe other end ground connection;The resistance Rgb6wWith inductance LddwConnecting node on be also respectively connected with ground capacity CddwWith the second HVB high voltage bias power vd Dw;The inductance LddwIt is another One end is connected with the input of the 6th phase shift output matching network;
The grid of each intermediate layer transistor by a resistance respectively with Rgb4uAnd Rgb5uConnecting node and Rgb4wAnd Rgb5w Connecting node connection;The grid of each top layer transistor by a resistance respectively with Rgb5uAnd Rgb6uConnecting node and Rgb5wAnd Rgb6wConnecting node connection.
10. according to any described high-power high-efficiency power amplifiers of claim 1-9, it is characterised in that the power is put The input of big device is also associated with capacitance C1
CN201711073091.1A 2017-11-03 2017-11-03 A kind of high-power high-efficiency power amplifier insensitive to source and load impedance Pending CN107846196A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711073091.1A CN107846196A (en) 2017-11-03 2017-11-03 A kind of high-power high-efficiency power amplifier insensitive to source and load impedance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711073091.1A CN107846196A (en) 2017-11-03 2017-11-03 A kind of high-power high-efficiency power amplifier insensitive to source and load impedance

Publications (1)

Publication Number Publication Date
CN107846196A true CN107846196A (en) 2018-03-27

Family

ID=61682320

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711073091.1A Pending CN107846196A (en) 2017-11-03 2017-11-03 A kind of high-power high-efficiency power amplifier insensitive to source and load impedance

Country Status (1)

Country Link
CN (1) CN107846196A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108736847A (en) * 2018-07-24 2018-11-02 成都嘉纳海威科技有限责任公司 High efficiency based on the control of accurate resonance circuit stacks power amplifier against D classes
CN108768316A (en) * 2018-08-14 2018-11-06 成都嘉纳海威科技有限责任公司 A kind of high-frequency high-power high efficiency Darlington tube core based on four Stack Technologies
CN109274343A (en) * 2018-11-09 2019-01-25 华南理工大学 A kind of power amplifier stackable with energy

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101192864A (en) * 2006-11-27 2008-06-04 株式会社瑞萨科技 RF power amplifying device and wireless communication terminal device for carrying the same
CN101976754A (en) * 2010-10-29 2011-02-16 华南理工大学 Tri-band Wilkinson power distributor
CN103986422A (en) * 2014-05-19 2014-08-13 天津大学 Dual-frequency band radiofrequency power amplifier impedance match circuit
CN106487342A (en) * 2016-10-24 2017-03-08 成都嘉纳海威科技有限责任公司 A kind of matrix power amplifier based on transistor stack structure
CN106537769A (en) * 2014-05-13 2017-03-22 天工方案公司 Systems and methods related to linear and efficient broadband power amplifiers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101192864A (en) * 2006-11-27 2008-06-04 株式会社瑞萨科技 RF power amplifying device and wireless communication terminal device for carrying the same
CN101976754A (en) * 2010-10-29 2011-02-16 华南理工大学 Tri-band Wilkinson power distributor
CN106537769A (en) * 2014-05-13 2017-03-22 天工方案公司 Systems and methods related to linear and efficient broadband power amplifiers
CN103986422A (en) * 2014-05-19 2014-08-13 天津大学 Dual-frequency band radiofrequency power amplifier impedance match circuit
CN106487342A (en) * 2016-10-24 2017-03-08 成都嘉纳海威科技有限责任公司 A kind of matrix power amplifier based on transistor stack structure

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
章国豪: "一种对负载不敏感的高功率平衡功率放大器", 《电子科技大学学报》 *
赵海忠: "基于LTCC技术的K/Ka频段平衡功率放大器设计", 《中国优秀硕士学位论文全文数据库》 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108736847A (en) * 2018-07-24 2018-11-02 成都嘉纳海威科技有限责任公司 High efficiency based on the control of accurate resonance circuit stacks power amplifier against D classes
CN108736847B (en) * 2018-07-24 2023-09-01 成都嘉纳海威科技有限责任公司 High-efficiency inverse D-type stacked power amplifier based on accurate resonant circuit control
CN108768316A (en) * 2018-08-14 2018-11-06 成都嘉纳海威科技有限责任公司 A kind of high-frequency high-power high efficiency Darlington tube core based on four Stack Technologies
CN108768316B (en) * 2018-08-14 2023-09-01 成都嘉纳海威科技有限责任公司 High-frequency high-power high-efficiency composite transistor die based on four-stacking technology
CN109274343A (en) * 2018-11-09 2019-01-25 华南理工大学 A kind of power amplifier stackable with energy
CN109274343B (en) * 2018-11-09 2024-05-31 华南理工大学 Power amplifier with energy superposition function

Similar Documents

Publication Publication Date Title
CN107994875A (en) Ultra wide band based on compound reactance LC filter networks stacks power amplifier
CN107743021A (en) A kind of strong anti-mismatch high efficiency power amplifier based on transistor stack technology
CN105811895B (en) High efficiency K-band MMIC power amplifiers are optimized based on harmonic termination
CN106487342A (en) A kind of matrix power amplifier based on transistor stack structure
CN106411268A (en) Power amplifier of distributed two-stack structure considering miller effect
CN107733381A (en) A kind of High-efficiency high-gain Doherty stacks power amplifier
CN107846196A (en) A kind of high-power high-efficiency power amplifier insensitive to source and load impedance
CN105207644A (en) On-chip active phase shifter based on vector synthesis
CN207475495U (en) A kind of High-efficiency high-gain Doherty stacks power amplifier
CN108768315A (en) A kind of high-efficiency double-frequency F classes stacking power amplifier based on accurate harmonic controling
CN109245735A (en) A kind of high efficiency J class stacking power amplifier based on second harmonic injection technique
CN111292922B (en) 8-shaped four-way power combiner with low insertion loss
CN106533372A (en) Piecewise external matching type miniature power amplifier
CN108574465A (en) A kind of high efficiency F classes stacking power amplifier based on left-and-right-hand transmission line
CN209134365U (en) A kind of high efficiency J class stacking power amplifier based on second harmonic injection technique
CN207475491U (en) A kind of high-power high-efficiency power amplifier insensitive to source and load impedance
CN207475494U (en) A kind of strong anti-mismatch high efficiency power amplifier based on transistor stack technology
CN108736847A (en) High efficiency based on the control of accurate resonance circuit stacks power amplifier against D classes
CN108763640A (en) The Doherty power amplifier and its design method that high efficiency height retracts
CN207732732U (en) Ultra wide band based on compound reactance LC filter networks stacks power amplifier
CN109274339A (en) A kind of Doherty driving Doherty power amplifier
CN208539863U (en) High efficiency based on the control of accurate resonance circuit stacks power amplifier against D class
CN208539858U (en) A kind of high-efficiency double-frequency F class stacking power amplifier based on accurate harmonic controling
CN208656727U (en) A kind of high-power high-efficiency high-gain stacks power amplifier against F class
CN111934632A (en) Ultra-wideband high-power amplifier

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20180327

RJ01 Rejection of invention patent application after publication