CN113394115A - Substrate for semiconductor device, method for manufacturing substrate for semiconductor device, and semiconductor device - Google Patents
Substrate for semiconductor device, method for manufacturing substrate for semiconductor device, and semiconductor device Download PDFInfo
- Publication number
- CN113394115A CN113394115A CN202110235071.XA CN202110235071A CN113394115A CN 113394115 A CN113394115 A CN 113394115A CN 202110235071 A CN202110235071 A CN 202110235071A CN 113394115 A CN113394115 A CN 113394115A
- Authority
- CN
- China
- Prior art keywords
- external electrode
- main body
- semiconductor device
- substrate
- body portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 223
- 239000000758 substrate Substances 0.000 title claims abstract description 146
- 238000000034 method Methods 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 239000002344 surface layer Substances 0.000 claims abstract description 151
- 229910018104 Ni-P Inorganic materials 0.000 claims abstract description 10
- 229910018536 Ni—P Inorganic materials 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 89
- 238000007747 plating Methods 0.000 claims description 38
- 229910052751 metal Inorganic materials 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 22
- 229920005989 resin Polymers 0.000 claims description 18
- 239000011347 resin Substances 0.000 claims description 18
- 238000000059 patterning Methods 0.000 claims description 9
- 230000005389 magnetism Effects 0.000 abstract description 15
- 239000010949 copper Substances 0.000 description 16
- 239000010931 gold Substances 0.000 description 14
- 238000005323 electroforming Methods 0.000 description 13
- 239000000463 material Substances 0.000 description 6
- 238000007789 sealing Methods 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 238000007772 electroless plating Methods 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 229910000510 noble metal Inorganic materials 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- -1 for example Substances 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 239000011135 tin Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Hall/Mr Elements (AREA)
Abstract
The invention provides a substrate for a semiconductor device, a method for manufacturing the substrate for the semiconductor device, and a semiconductor device. The invention provides a substrate for a semiconductor device, which is provided with a mounting pad main body part and an external electrode main body part and does not induce magnetism, and the structure for mounting the pad main body part and the external electrode main body part is simplified. The substrate for a semiconductor device of the present invention has an external electrode (3) formed on the surface of a substrate (16). The external electrode (3) is provided with: a third surface layer (7) formed on the surface of the substrate (16), an external electrode main body part (9) formed on the surface of the third surface layer (7), and a fourth surface layer (13) formed on the surface of the external electrode main body part (9). The external electrode main body part (9) of the external electrode (3) is formed of nonmagnetic Ni-P.
Description
Technical Field
The present invention relates to a substrate for a semiconductor device having a mounting pad and an external electrode formed on a substrate, a method for manufacturing the substrate for the semiconductor device, and a semiconductor device in which a semiconductor element is mounted and the semiconductor element and the external electrode and the like are sealed with resin using the substrate for the semiconductor device.
Background
In the substrate for a semiconductor device of the present invention, the main body portion for mounting the pad and the external electrode is formed of nonmagnetic Ni — P, but a mounting pad and an external electrode having an Ni — P layer are disclosed in the semiconductor device of patent document 1. In the semiconductor device of patent document 1, the semiconductor element and the external electrode are sealed in a resin, a mounting pad main body portion for mounting a pad and an electrode main body portion for the external electrode are formed of a nonmagnetic Cu layer, and a nonmagnetic Ni — P layer is provided between the Cu layer and a surface layer exposed on the mounting surface side of the semiconductor device. The surface layer is formed by electroforming Au on the substrate not covered with the resist body, and the Ni-P layer is formed by performing electroless plating treatment on the Au layer. The Cu layer is formed by electroforming Cu on the Ni — P layer so as to exceed the thickness of the resist body, and a protrusion (overlap) is formed on the upper peripheral edge. An Au layer is formed on the upper surface of the Cu layer by impact plating, and an Ag layer is formed on the upper surface of the Au layer by electroforming.
Documents of the prior art
Patent document
Patent document 1: japanese laid-open patent publication No. 2010-40679
Disclosure of Invention
Problems to be solved by the invention
According to the semiconductor device of patent document 1, since the mounting pad main body portion of the mounting pad and the electrode main body portion of the external electrode are formed of the non-magnetic Cu layer and the Ni — P layer, respectively, even when the semiconductor element that induces magnetism is fixed to the mounting pad, the semiconductor element is not adversely affected by magnetism. However, since the Au layer, the Ni — P layer, the Cu layer, the Au layer, and the Ag layer are formed by stacking the electroforming treatment, the electroless plating treatment, the electroforming treatment, the impact plating treatment, and the electroforming treatment in this order, the number of manufacturing steps of the semiconductor device increases, and an increase in manufacturing cost cannot be avoided.
The invention aims to simplify the structure of a non-magnetic mounting pad (mounting pad main body part) and an external electrode (external electrode main body part) and provide a substrate for a semiconductor device and the semiconductor device without inducing magnetism at lower cost.
Means for solving the problems
The substrate for a semiconductor device of the present invention has external electrodes 3 formed on the surface of a substrate 16. The external electrode 3 includes: a third surface layer 7 formed on the surface of the substrate 16, an external electrode main body portion 9 formed on the surface of the third surface layer 7, and a fourth surface layer 13 formed on the surface of the external electrode main body portion 9. The external electrode main body 9 of the external electrode 3 is characterized by being formed of nonmagnetic Ni — P.
The external electrode main body portion 9 of the external electrode 3 is formed of an Ni — P plating layer.
The Vickers hardness of the outer electrode main body portion 9 of the outer electrode 3 is 400 to 600 HV.
The total thickness T1 of the external electrode 3 is 20 to 100 μm.
The other substrate for a semiconductor device of the present invention has a mounting pad 2 of a semiconductor element 1 and an external electrode 3 formed on a surface of a substrate 16. The mounting pad 2 includes: a first surface layer 6 formed on the surface of the substrate 16, a mounting pad body 8 formed on the surface of the first surface layer 6, and a second surface layer 12 formed on the surface of the mounting pad body 8. The external electrode 3 includes: a third surface layer 7 formed on the surface of the substrate 16, an external electrode main body portion 9 formed on the surface of the third surface layer 7, and a fourth surface layer 13 formed on the surface of the external electrode main body portion 9. The mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 are each formed of nonmagnetic Ni — P.
The mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 are formed of Ni — P plating layers, respectively.
The Vickers hardness of the mounting pad main body part 8 of the mounting pad 2 and the external electrode main body part 9 of the external electrode 3 is 400-600 HV.
The total thickness T1 of the mounting pad 2 and the external electrode 3 is 20 to 100 μm.
In the method for manufacturing a substrate for a semiconductor device of the present invention, a substrate for a semiconductor device having an external electrode 3 formed on a surface of a substrate 16 is used as an object. A method for manufacturing a substrate for a semiconductor device, comprising: a resist patterning step of forming a pattern resist on the surface of the substrate 16; a first metal layer forming step of forming a third surface layer 7 of the external electrode 3 on the surface of the substrate 16 by using the pattern resist; a main body portion forming step of forming an external electrode main body portion 9 on the surface of the third surface layer 7; and a second metal layer forming step of forming a fourth surface layer 13 on the surface of the external electrode main body 9; in the main body portion forming step, the surface of the third surface layer 7 is subjected to Ni — P plating treatment to form the external electrode main body portion 9.
In the method for manufacturing another substrate for a semiconductor device according to the present invention, a substrate for a semiconductor device in which mounting pads 2 of a semiconductor element 1 and external electrodes 3 are formed on a surface of a substrate 16 is used as an object. A method for manufacturing a substrate for a semiconductor device, comprising: a resist patterning step of forming a pattern resist on the surface of the substrate 16; a first metal layer forming step of forming the first surface layer 6 on which the pad 2 and the third surface layer 7 on which the external electrode 3 are mounted on the surface of the substrate 16 using the pattern resist; a main body portion forming step of forming a mounting pad main body portion 8 and an external electrode main body portion 9 on the surfaces of the first surface layer 6 and the third surface layer 7; a second metal layer forming step of forming a second surface layer 12 on the surface of the mounting pad body 8 and a fourth surface layer 13 on the surface of the external electrode body 9; in the main body portion forming step, Ni — P plating is performed on the surfaces of the first surface layer 6 and the third surface layer 7 to form the mounting pad main body portion 8 and the external electrode main body portion 9.
In the semiconductor device of the present invention, the semiconductor element 1 is electrically connected to the external electrode 3 and sealed inside the resin 5. The external electrode 3 includes: a third surface layer 7 exposed on the mounting surface S of the semiconductor device, an external electrode body portion 9 formed on the surface of the third surface layer 7, and a fourth surface layer 13 formed on the surface of the external electrode body portion 9. The external electrode main body portion 9 of the external electrode 3 is formed of nonmagnetic Ni — P.
The external electrode main body portion 9 of the external electrode 3 is formed of an Ni — P plating layer.
The Vickers hardness of the outer electrode main body portion 9 of the outer electrode 3 is 400 to 600 HV.
The total thickness T1 of the external electrode 3 is 20 to 100 μm.
In another semiconductor device of the present invention, semiconductor element 1 fixed to mounting pad 2 is electrically connected to external electrode 3, and semiconductor element 1, mounting pad 2, and external electrode 3 are sealed inside resin 5. The mounting pad 2 includes: the semiconductor device includes a first surface layer 6 exposed on a mounting surface S of the semiconductor device, a mounting pad body 8 formed on a surface of the first surface layer 6, and a second surface layer 12 formed on a surface of the mounting pad body 8. The external electrode 3 includes: a third surface layer 7 exposed on the mounting surface S of the semiconductor device, an external electrode body portion 9 formed on the surface of the third surface layer 7, and a fourth surface layer 13 formed on the surface of the external electrode body portion 9. The mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 are characterized by being formed of nonmagnetic Ni — P.
The mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 are formed of Ni — P plating layers, respectively.
The Vickers hardness of the mounting pad main body part 8 of the mounting pad 2 and the external electrode main body part 9 of the external electrode 3 is 400-600 HV.
The total thickness T1 of the mounting pad 2 and the external electrode 3 is 20 to 100 μm.
Effects of the invention
In the substrate for a semiconductor device of the present invention, the external electrode 3 includes: a third surface layer 7 formed on the surface of the substrate 16, an external electrode main body portion 9 formed on the surface of the third surface layer 7, and a fourth surface layer 13 formed on the surface of the external electrode main body portion 9. The external electrode main body 9 of the external electrode 3 is formed of nonmagnetic Ni — P. According to such a substrate for a semiconductor device, the structure of the external electrode main body portion 9 can be simplified as compared with a conventional substrate for a semiconductor device in which a nonmagnetic thin Ni — P layer is formed on a surface layer, a thick Cu layer is formed on the Ni — P layer, and a thin Au layer is further formed on a protruding portion. Further, since the entire external electrode main body portion 9 is formed of nonmagnetic Ni — P, the entire external electrode main body portion 9 can be made insensitive to magnetism. Therefore, when a semiconductor device including the semiconductor element 1 that induces magnetism, such as a magnetic sensor, is configured using the substrate for a semiconductor device of the present invention, the overall cost can be reduced while improving the magnetic stability of the semiconductor device.
The external electrode main body portion 9 of the external electrode 3 is formed of an Ni — P plating layer. According to such a substrate for a semiconductor device, the external electrode main body portion 9 can be easily formed without performing a base treatment such as an impact plating treatment. Incidentally, in the case where the external electrode main body portion is made of Cu, it is necessary to perform impact plating treatment after forming the surface layer on the surface of the substrate, and it is inevitable to increase the cost of the semiconductor device accordingly.
The vickers hardness of the external electrode main body portion 9 of the external electrode 3 is set to 400 to 600HV because, if the vickers hardness of the external electrode main body portion 9 is less than 400HV, the external electrode 3 may fall off when the substrate 16 is physically peeled off and removed or in a completed semiconductor device; if the vickers hardness exceeds 600HV, cracks are likely to occur when a load is applied to the external electrode 3.
If the total thickness T1 of the external electrodes 3 is less than 20 μm, the external electrodes 3 may fall off when the substrate 16 is physically peeled off or removed or in the completed semiconductor device; if the total thickness T1 of the external electrode 3 exceeds 100 μm, the productivity (cost) is deteriorated.
In another semiconductor device substrate according to the present invention, a mounting pad 2 includes: a first surface layer 6 formed on the surface of the substrate 16, a mounting pad body 8 formed on the surface of the first surface layer 6, and a second surface layer 12 formed on the surface of the mounting pad body 8. Further, the external electrode 3 includes: a third surface layer 7 formed on the surface of the substrate 16, an external electrode main body portion 9 formed on the surface of the third surface layer 7, and a fourth surface layer 13 formed on the surface of the external electrode main body portion 9. The mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 are each formed of nonmagnetic Ni — P. According to such a substrate for a semiconductor device, the structure for mounting the pad main body portion 8 and the external electrode main body portion 9 can be simplified as compared with a conventional substrate for a semiconductor device in which a nonmagnetic thin Ni — P layer is formed on a surface layer, a thick Cu layer is formed on the Ni — P layer, and a thin Au layer is formed on a protruding portion. Further, since the entirety of the mounting pad main body portion 8 and the external electrode main body portion 9 is formed of non-magnetic Ni — P, the entirety of the mounting pad main body portion 8 and the external electrode main body portion 9 can be made non-magnetically sensitive. Therefore, when a semiconductor device including the semiconductor element 1 that induces magnetism, such as a magnetic sensor, is configured using the substrate for a semiconductor device of the present invention, the overall cost can be reduced while improving the magnetic stability of the semiconductor device.
The mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 are formed of Ni — P plating layers, respectively. According to such a substrate for a semiconductor device, since the mounting pad main body portion 8 and the external electrode main body portion 9 can be easily formed without performing a substrate treatment such as an impact plating treatment, the semiconductor device can be provided at a low cost.
The vickers hardness of the mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 is set to 400 to 600HV because, if the vickers hardness of the mounting pad main body portion 8 and the external electrode main body portion 9 is less than 400HV, there is a possibility that the mounting pad 2 and the external electrode 3 may fall off when the substrate 16 is physically peeled off or removed or in a completed semiconductor device; if the vickers hardness exceeds 600HV, cracks are likely to occur when a load is applied to the mounting pad 2 and the external electrode 3.
If the total thickness T1 of the mounting pad 2 and the external electrode 3 is less than 20 μm, the mounting pad 2 and the external electrode 3 may fall off when the substrate 16 is physically peeled off or removed or in the completed semiconductor device; if the total thickness T1 of the mounting pad 2 and the external electrode 3 exceeds 100 μm, the productivity (cost) is deteriorated.
In the method for manufacturing a substrate for a semiconductor device of the present invention, the external electrode 3 is formed through a resist patterning step, a first metal layer forming step, a main body portion forming step, and a second metal layer forming step. In the main body portion forming step, the surface of the third surface layer 7 is subjected to Ni — P plating treatment to form the external electrode main body portion 9. According to the method for manufacturing a substrate for a semiconductor device, a substrate for a semiconductor device including the external electrode main body portion 9 that does not induce magnetism can be formed by simply performing Ni — P plating on the substrate 16 that has undergone the first metal layer forming step. Therefore, the substrate for a semiconductor device including the external electrode main body portion 9 which does not induce magnetism can be formed at low cost, as compared with a conventional substrate for a semiconductor device in which a thin nonmagnetic Ni — P layer is formed on a surface layer and then a thick Cu layer including a protrusion is formed on the Ni — P layer.
In another method for manufacturing a substrate for a semiconductor device according to the present invention, the mounting pad 2 and the external electrode 3 are formed through the resist patterning step, the first metal layer forming step, the main body portion forming step, and the second metal layer forming step, which are the same as described above. In the main body portion forming step, Ni — P plating is performed on the surfaces of the first surface layer 6 and the third surface layer 7 to form the mounting pad main body portion 8 and the external electrode main body portion 9. According to the method for manufacturing a substrate for a semiconductor device, as described above, a substrate for a semiconductor device including the mounting pad main portion 8 and the external electrode main portion 9 which do not induce magnetism can be formed by simply performing Ni — P plating on the substrate 16 which has undergone the first metal layer forming step. Therefore, the substrate for a semiconductor device including the mounting pad main body portion 8 and the external electrode main body portion 9 which do not induce magnetism can be formed at a lower cost than a conventional substrate for a semiconductor device.
In the semiconductor device of the present invention, the semiconductor element 1 is electrically connected to the external electrode 3 and sealed inside the resin 5. The external electrode 3 includes: a third surface layer 7 exposed on the mounting surface S of the semiconductor device, an external electrode body portion 9 formed on the surface of the third surface layer 7, and a fourth surface layer 13 formed on the surface of the external electrode body portion 9. The external electrode main body portion 9 of the external electrode 3 is formed of nonmagnetic Ni — P. According to such a semiconductor device, the structure of the external electrode main body portion 9 can be simplified as compared with a conventional semiconductor device in which a nonmagnetic thin Ni — P layer is formed on a surface layer, a thick Cu layer is formed on the Ni — P layer, and a thin Au layer is further formed on a protruding portion. Further, since the entire external electrode main body portion 9 is formed of nonmagnetic Ni — P, the entire external electrode main body portion 9 can be made insensitive to magnetism. Therefore, in the case of a semiconductor device, for example, a magnetic sensor, including the semiconductor element 1 that induces magnetism, the overall cost can be reduced while improving the magnetic stability of the semiconductor device. Further, the mounting pad 2 can be omitted, and the structure of the semiconductor device can be simplified, and the manufacturing cost can be reduced.
The external electrode main body portion 9 of the external electrode 3 is formed of an Ni — P plating layer. According to such a semiconductor device, the external electrode main body portion 9 can be easily formed without performing a base treatment such as an impact plating treatment, and accordingly, the semiconductor device can be provided at low cost.
The Vickers hardness of the external electrode main body portion 9 of the external electrode 3 is set to 400-600 HV. In such a semiconductor device, if the vickers hardness of the external electrode main body portion 9 is less than 400HV, the external electrode 3 may be detached when the substrate 16 is physically peeled off or removed or in the completed semiconductor device. Further, if the vickers hardness exceeds 600HV, cracks are likely to occur when a load is applied to the external electrode 3.
The total thickness T1 of the external electrode 3 is set to 20 to 100 μm. In such a semiconductor device, if the total thickness T1 of the external electrodes 3 is less than 20 μm, the external electrodes 3 may fall off when the substrate 16 is physically peeled off or removed or in the completed semiconductor device; if the total thickness T1 of the external electrode 3 exceeds 100 μm, the productivity (cost) is deteriorated.
In another semiconductor device in which a semiconductor element 1 fixed to a mounting pad 2 is electrically connected to an external electrode 3 and each of the members 1, 2, and 3 is sealed in a resin 5, the mounting pad 2 includes: the first surface layer 6, the mounting mat body portion 8 formed on the surface of the first surface layer 6, and the second surface layer 12 formed on the surface of the mounting mat body portion 8. The external electrode 3 further includes: a third surface layer 7 exposed on the mounting surface S of the semiconductor device, an external electrode body portion 9 formed on the surface of the third surface layer 7, and a fourth surface layer 13 formed on the surface of the external electrode body portion 9. Further, the mounting pad main body portion 8 and the external electrode main body portion 9 are formed of nonmagnetic Ni — P. According to such a semiconductor device, as in the case of the semiconductor device described above, the structure for mounting the pad main body portion 8 and the external electrode main body portion 9 can be simplified as compared with a conventional semiconductor device. Further, since the entirety of the mounting pad main body portion 8 and the external electrode main body portion 9 is formed of non-magnetic Ni — P, the entirety of the mounting pad main body portion 8 and the external electrode main body portion 9 can be made non-magnetically sensitive. Therefore, in the case of a semiconductor device, for example, a magnetic sensor, including the semiconductor element 1 that induces magnetism, the overall cost can be reduced while improving the magnetic stability of the semiconductor device.
The mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 are formed of Ni — P plating layers, respectively. According to such a semiconductor device, the mounting pad main body portion 8 and the external electrode main body portion 9 can be easily formed without performing a base treatment such as an impact plating treatment, and accordingly, the semiconductor device can be provided at a low cost.
The Vickers hardness of the mounting pad main body part 8 of the mounting pad 2 and the external electrode main body part 9 of the external electrode 3 is set to 400-600 HV. In such a semiconductor device, if the vickers hardness of the mounting pad main body portion 8 and the external electrode main body portion 9 is less than 400HV, the mounting pad 2 and the external electrode 3 may fall off when the substrate 16 is physically peeled off or removed or in the completed semiconductor device. Further, if the vickers hardness exceeds 600HV, cracks are likely to occur when a load is applied to the mounting pad 2 or the external electrode 3.
The total thickness T1 of the mounting pad 2 and the external electrode 3 is set to be 20 to 100 μm. In such a semiconductor device, if the total thickness T1 of the mounting pad 2 and the external electrode 3 is less than 20 μm, the mounting pad 2 and the external electrode 3 may fall off when the substrate 16 is physically peeled off or removed or in the completed semiconductor device; if the total thickness T1 of the mounting pad 2 and the external electrode 3 exceeds 100 μm, the productivity (cost) is deteriorated.
Drawings
Fig. 1 is a vertical sectional front view of a semiconductor device according to embodiment 1 of the present invention.
Fig. 2 is a perspective view of the semiconductor device as viewed from the bottom surface side.
Fig. 3(a) to (f) are explanatory views showing a process of manufacturing the substrate for a semiconductor device according to embodiment 1 of the present invention.
Fig. 4(a) to (d) are explanatory views showing a manufacturing process of the semiconductor device according to embodiment 1 of the present invention.
Fig. 5 is a vertical sectional front view of a semiconductor device according to embodiment 2 of the present invention.
Fig. 6 is a front vertical sectional view of a semiconductor device according to embodiment 3 of the present invention.
Description of the symbols
1: a semiconductor device; 2: a mounting pad; 3: an external electrode; 4: a lead wire; 5: a resin; 6: a first surface layer; 7: a third surface layer; 8: a mounting pad main body part; 9: an external electrode main body portion; 10. 11: a protrusion; 12: a second surface layer; 13: a fourth surface layer; 16: a substrate; 17: a resist layer; s: and (3) a mounting surface.
Detailed Description
(embodiment 1) fig. 1 to 4 show a substrate for a semiconductor device according to embodiment 1 of the present invention, a process for manufacturing the same, and a semiconductor device having a semiconductor element 1 mounted on the substrate for a semiconductor device. As shown in fig. 1, the semiconductor device is configured by sealing a semiconductor element 1 that induces magnetism (is susceptible to a magnetic field), mounting pads 2 and 6 external electrodes 3 exposed on a mounting surface S of the semiconductor device, and leads 4 that electrically connect the semiconductor element 1 and the external electrodes 3, inside an insulating resin (sealing material) 5, and is used as a unit electronic component (semiconductor device) for surface mounting. The mounting pads 2 are arranged in the center of the mounting surface S of the semiconductor device, and the external electrodes 3 are arranged linearly 3 by 3 with the mounting pads 2 interposed therebetween. The semiconductor device is formed in a flat rectangular parallelepiped shape.
As shown in fig. 1, each of the mounting pad 2 and the external electrode 3 includes: the semiconductor device includes a first surface layer 6 and a third surface layer 7 exposed on a mounting surface S of the semiconductor device, a mounting pad body portion 8 continuous with the first surface layer 6, an external electrode body portion 9 continuous with the third surface layer 7, and a second surface layer 12 and a fourth surface layer 13 covering surfaces of the body portions 8 and 9. The mounting pad main body portion 8 and the external electrode main body portion 9 are each formed of nonmagnetic Ni — P, and the surface layers 6, 7, 12, and 13 are each formed of a single layer made of any 1 kind of nonmagnetic metal (noble metal) such as gold, silver, palladium, and tin, or a layer in which 2 or more kinds of metals (noble metals) are stacked. In this embodiment, the first surface layer 6 and the third surface layer 7 exposed on the mounting surface S are formed of gold, and the second surface layer 12 and the fourth surface layer 13 covering the surfaces of the two main bodies 8, 9 are formed of silver.
The semiconductor device is formed through a process of forming a substrate for a semiconductor device and a process of mounting the semiconductor element 1 on the substrate for a semiconductor device. The substrate for a semiconductor device is formed through a resist patterning step of forming a pattern resist on the surface of a substrate 16, a first metal layer forming step of forming a first surface layer 6 and a third surface layer 7 on the surface of the substrate 16 using the pattern resist formed in the resist patterning step, a main body forming step of forming a mounting pad main body portion 8 and an external electrode main body portion 9 on the surfaces of the first surface layer 6 and the third surface layer 7, and a second metal layer forming step of forming a second surface layer 12 and a fourth surface layer 13 on the surfaces of the mounting pad main body portion 8 and the external electrode main body portion 9. After that, the semiconductor device is completed through a mounting step of the semiconductor element 1, a bonding step using the lead 4, a resin sealing step, a substrate peeling step, and a dicing step. Hereinafter, the outline of the manufacturing process of the substrate for a semiconductor device and the semiconductor device will be described.
As shown in fig. 3(a), in the resist patterning step, a photosensitive film resist is laminated on the surface of a substrate 16 made of a conductive metal plate to form a resist layer 17, a pattern film 18 is brought into close contact with the surface of the resist layer 17, and ultraviolet light is irradiated from an ultraviolet lamp 19 to expose the resist layer. At this time, ultraviolet light is irradiated to the resist layer 17 facing the light transmission holes 20 formed in the pattern film 18, and the exposed resist layer 17 is cured. The unexposed portions of the resist layer 17 shielded by the pattern film 18 are dissolved and removed by development, and as shown in fig. 3(b), only the exposed portions remain on the substrate 16, thereby forming a pattern resist having through holes for forming the mounting pads 2 and the external electrodes 3 between the exposed portions.
As shown in fig. 3 c, in the first metal layer forming step, the substrate 16 subjected to the plating pretreatment (degreasing, acid dipping, oxide film removal, activation, chemical etching, electrolytic treatment, impact plating, etc.) is immersed in an electroforming bath, and gold is electroformed (plated) on the substrate 16 exposed to the previous pattern resist to form the first surface layer 6 and the third surface layer 7. In this case, the thickness of the first surface layer 6 and the third surface layer 7 is preferably set to 0.04 μm or more and 1.0 μm or less, and in the present embodiment, the electroforming (plating) time is adjusted so as to be 0.1 μm. If the thickness of the first surface layer 6 and the third surface layer 7 is less than 0.04 μm, solder wettability is poor when the semiconductor device is mounted. In addition, the adhesion between the Ni — P layer (mounting pad main body portion 8 and external electrode main body portion 9) and the substrate 16 is too strong, and there is a possibility that the substrate 16 is difficult to peel off and remove. In addition, if the thickness of the first surface layer 6 and the third surface layer 7 exceeds 1.0 μm, the solder bonding strength of the mounted semiconductor device may be deteriorated.
In the next main body portion forming step, as shown in fig. 3(d), the substrate 16 is immersed in the electroforming tank again, and the plating treatment of Ni — P is performed on the surface sides of the surface layers 6 and 7 to form the mounting pad main body portion 8 and the external electrode main body portion 9. At this time, by adjusting the electroforming (plating) processing time, the protruding portions 10 and 11 can be formed on the upper portions of the mounting pad main body portion 8 (mounting pad 2) and the external electrode main body portion 9 (external electrode 3). The protruding portions 10 and 11 are formed by electroforming (plating) the main body portions 8 and 9 over the thickness of the resist layer 17 in the main body portion forming step, and the peripheral edge portions (tip end portions) of the protruding portions 10 and 11 are formed so as to protrude toward the previously cured resist layer 17. In the case where the Ni — P layer is directly formed on the surface of the substrate 16 without forming the first surface layer 6 and the third surface layer 7, the Ni — P layer is hard to peel off and remove the substrate 16 because the Ni — P layer is strongly adhered to the substrate 16.
The surface roughness (arithmetic mean roughness Ra) of the mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 formed of the Ni-P layer is 0.2 to 0.3 μm, and the surface state of each of the surface layers 12, 13 is similar to the surface state of each of the main body portions 8, 9 by forming the second surface layer 12 and the fourth surface layer 13 formed on the surface of each of the main body portions 8, 9 to be thin. Incidentally, if the surfaces of the second surface layer 12 and the fourth surface layer 13 are too smooth, the mounting property of the semiconductor element 1 on the mounting pad 2 becomes good, but the adhesion with the resin 5 becomes poor. If the surfaces of the second surface layer 12 and the fourth surface layer 13 are too rough, the adhesiveness when the electrodes of the semiconductor element 1 are electrically connected to the external electrodes 3 is deteriorated. When the mounting pad main body and the external electrode main body are formed of Ni, the surface roughness (arithmetic mean roughness Ra) of each surface layer is 0.3 to 0.5 μm, and the surfaces of the mounting pad 2 and the external electrode 3 formed of an Ni — P layer are formed to be slightly smooth.
In the next second metal layer forming step, as shown in fig. 3(e), silver is electroformed (plated) on the surfaces of the main bodies 8 and 9 to form a second surface layer 12 and a fourth surface layer 13. In this case, the thickness of each of the surface layers 12 and 13 is preferably 1.5 μm to 6.0 μm, and in this example, the electroforming (plating) time is adjusted so as to be 2 μm. If the thickness of each of the surface layers 12, 13 is less than 1.5 μm, the bondability becomes poor; if the thickness of each surface layer 12, 13 exceeds 6.0 μm, there is a disadvantage that the cost increases. In the case where the surface layers 12 and 13 are hard to be formed in close contact with the surfaces of the main bodies 8 and 9, it is preferable to perform a plating pretreatment on the surfaces of the main bodies 8 and 9 before electroforming (plating) of the surface layers 12 and 13 to improve the close contact of the surface layers 12 and 13 with the main bodies 8 and 9. The total thickness T1 of the mounting pad main body 8 and the external electrode main body 9 is preferably within a range of 20 to 100 μm, and in the present embodiment, the total thickness T1 of the mounting pad 2 and the external electrode 3 is preferably 40 μm. If the thicknesses of the second surface layer 12 and the fourth surface layer 13 are thin, the influence on the magnetic sensor (semiconductor element 1) becomes small. However, depending on the characteristics of the semiconductor element 1 and the thickness and area of the surface layers 12 and 13, the degree of influence on the magnetic sensor (semiconductor element 1) may vary.
As shown in fig. 3(f), the resist layer 17 remaining on the blank of the substrate for a semiconductor device obtained through the second metal layer forming step is removed, whereby a substrate for a semiconductor device having the mounting pads 2 and the external electrodes 3 formed on the substrate 16 can be obtained. The hardness of each of the plurality of main body portions 8 and 9 in the substrate for a semiconductor device is measured, and as a result, the vickers hardness of the mounting pad main body portion 8 and the external electrode main body portion 9 is 400 to 600 HV. In addition, the shear strength test of the mounting pad 2 and the external electrode 3 was performed on the semiconductor device substrate from which the resist layer 17 was removed, and the degree of adhesion between the mounting pad 2 and the external electrode 3 and the substrate 16 was confirmed. In the shear strength test, after the substrate 16 was fixed, a shear tool was attached to the peripheral side surfaces of the mounting pad 2 and the external electrode 3, a force parallel to the substrate 16 was applied to the shear tool, and the load when the mounting pad 2 and the external electrode 3 were detached from the substrate 16 was measured. The substrate for a semiconductor device of the present example had a target value of shear strength of 100 to 500g and an average load of 297 g. Since the average load of the shear strength of the conventional semiconductor device substrate in which the mounting pad main body portion and the external electrode main body portion are formed of Ni is 324g, the substrate can exhibit substantially the same shear strength. When the bonding strength between the mounting pad 2 and the external electrode 3 and the substrate 16 is low, the mounting pad 2 and the external electrode 3 may be detached from the substrate 16 when the bonding process is performed during the mounting of the semiconductor element 1 or when the resin sealing process is performed. If the bonding strength between the mounting pads 2 and the external electrodes 3 and the substrate 16 is too high, the substrate 16 is difficult to peel off and remove.
In the mounting step of mounting the semiconductor element 1 on the semiconductor device substrate obtained as described above, as shown in fig. 4(a), the semiconductor element 1 is fixed to the mounting pad 2 via a bonding material (solder, paste, tape, die attach film, or the like), and as shown in fig. 4(b), the electrodes on the upper surface of the semiconductor element 1 and the external electrodes 3 are connected by leads 4 made of thin wires of gold, copper, or the like. After the bonding step is completed by electrically connecting the semiconductor element 1 and the external electrode 3, the process proceeds to a resin sealing step. In the resin sealing step, the front surface side of the substrate 16 is attached to a molding die serving as an upper die, the substrate 16 is caused to function as a lower die, and a thermosetting epoxy resin is injected into the molding die and heated to be cured. At this time, as shown in fig. 4(c), the substrate 16 is uniformly sealed in a state where a plurality of combinations of the mounting pads 2 and the plurality of external electrodes 3, which are one semiconductor device, are arranged, and a plurality of semiconductor devices are connected to each other.
Next, as shown in fig. 4 d, the substrate 16 is removed, whereby the back surfaces of the mounting pad 2 (first surface layer 6) and the external electrode 3 (third surface layer 7) are exposed to the bottom (mounting surface S) of each semiconductor device. In order to remove the substrate 16, for example, a method of physically peeling off and removing (peeling off) the substrate 16 from the semiconductor device side is used. By using a stainless material having excellent strength and peelability as the substrate 16, the substrate 16 can be peeled off from the semiconductor device side and can be peeled off and removed quickly. When the substrate 16 is made of another metal material, for example, copper material, a method of immersing the substrate 16 in an etching solution to dissolve the substrate may be used as a method of removing the substrate 16. Then, by performing a dicing process (cutting process), a semiconductor device can be obtained.
As described above, in the semiconductor device according to the above embodiment, since the mounting pad main body portion 8 on which the pad 2 is mounted and the external electrode main body portion 9 of the external electrode 3 are each formed of nonmagnetic Ni — P, the structure of the mounting pad main body portion 8 and the external electrode main body portion 9 can be simplified as compared with a conventional semiconductor device in which a nonmagnetic Ni — P layer is formed on a surface layer by electroless plating, a Cu layer having a protruding portion is formed on the Ni — P layer, and a thin Au layer is formed on the Cu layer. Further, since the entirety of the mounting pad main body portion 8 and the external electrode main body portion 9 is formed of non-magnetic Ni — P, it is possible to eliminate (make non-magnetic) magnetic induction of both (the mounting pad main body portion 8 and the external electrode main body portion 9), and therefore, even in the case of a semiconductor device, for example, a magnetic sensor, including the semiconductor element 1 that induces magnetic induction, it is possible to prevent the magnetic influence from being generated, and to contribute to improvement in reliability of the semiconductor device.
Since the mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 are each formed of an Ni — P plating layer, the number of plating steps for forming the mounting pad 2 and the external electrode 3 can be reduced as compared with a conventional semiconductor device, and accordingly, the semiconductor device can be provided at a lower cost.
The Vickers hardness of the mounting pad main body portion 8 of the mounting pad 2 and the external electrode main body portion 9 of the external electrode 3 is preferably 400 to 600 HV. By forming the vickers hardness of the mounting pad main body portion 8 and the external electrode main body portion 9 within a range of 400 to 600HV, the strength (rigidity) of the mounting pad 2 and the external electrode 3 can be ensured, and the mounting pad 2 and the external electrode 3 can be prevented from falling off even when the thickness of the mounting pad 2 and the external electrode 3 is made thinner than that of the conventional product.
The total thickness T1 of the mounting pad 2 and the external electrode 3 is preferably 20 to 100 μm. If the total thickness T1 of the mounting pad 2 and the external electrode 3 is less than 20 μm, the contact area with the resin 5 is small, and there is a possibility that the mounting pad 2 and the external electrode 3 may fall off when the substrate 16 is physically peeled off or removed or in the completed semiconductor device; if the total thickness T1 of the mounting pad 2 and the external electrode 3 exceeds 100 μm, it takes time to form the mounting pad 2 and the external electrode 3, and productivity (cost) is deteriorated.
(embodiment 2) fig. 5 shows a semiconductor device according to embodiment 2 of the present invention. In example 2, a semiconductor device was formed by performing a mounting step of the semiconductor element 1 on a substrate for a semiconductor device, on which the mounting pad 2 was omitted. The semiconductor element 1 is fixed to a predetermined position on the substrate 16 with an easily peelable bonding material. In the semiconductor device of the present embodiment, the semiconductor element 1 is sealed inside the resin 5 in a state where the bottom surface of the semiconductor element 1 and the third surface layer 7 of the external electrode 3 are exposed on the mounting surface S of the semiconductor device, and the semiconductor element 1 and the external electrode 3 are electrically connected by the lead 4. The external electrode 3 is composed of the third surface layer 7, the external electrode main body portion 9, and the fourth surface layer 13, as in example 1. The external electrode main body portion 9 is formed by applying Ni — P plating treatment to the surface of the third surface layer 7. The rest is the same as that of the semiconductor device of example 1, and therefore the same members are denoted by the same reference numerals and their description is omitted. The same applies to example 3 described later. According to such a semiconductor device, the mounting pad 2 can be omitted, the structure of the semiconductor device can be simplified accordingly, and the manufacturing cost can be reduced.
(embodiment 3) fig. 6 shows a semiconductor device according to embodiment 3 of the present invention. In example 3, the semiconductor element 1 is fixed with a bonding material in a state of spanning over the paired external electrodes 3 with respect to the substrate for a semiconductor device in which the mounting pad 2 is omitted. In the semiconductor device of the present embodiment, the semiconductor element 1 is sealed inside the resin 5 in a state where the third surface layer 7 of the external electrode 3 is exposed on the mounting surface S of the semiconductor device, and the semiconductor element 1 and the external electrode 3 are electrically connected by the lead 4. The external electrode main body portion 9 is formed by applying Ni — P plating treatment to the surface of the third surface layer 7. In the semiconductor device of example 3, the mounting pad 2 for supporting the semiconductor element 1 can be omitted. According to such a semiconductor device, as in the semiconductor device of example 2, the mounting pad 2 can be omitted, the structure of the semiconductor device can be simplified accordingly, and the manufacturing cost can be reduced. Note that, the semiconductor element 1 and the external electrode 3 may be electrically connected by Flip chip bonding (Flip chip bonding) instead of Wire bonding, and in this case, a bonding material can be omitted.
Claims (18)
1. A substrate for a semiconductor device, in which an external electrode (3) is formed on the surface of a substrate (16),
the external electrode (3) is provided with: a third surface layer (7) formed on the surface of the substrate (16), an external electrode main body part (9) formed on the surface of the third surface layer (7), and a fourth surface layer (13) formed on the surface of the external electrode main body part (9),
the external electrode main body part (9) of the external electrode (3) is formed of nonmagnetic Ni-P.
2. The substrate for a semiconductor device according to claim 1, wherein the external electrode main body portion (9) of the external electrode (3) is formed of an electroplated layer of Ni — P.
3. The substrate for a semiconductor device according to claim 1 or 2, wherein the Vickers hardness of the external electrode main body portion (9) of the external electrode (3) is 400 to 600 HV.
4. The substrate for a semiconductor device according to any one of claims 1 to 3, wherein the total thickness T1 of the external electrodes (3) is 20 to 100 μm.
5. A substrate for a semiconductor device, in which a mounting pad (2) of a semiconductor element (1) and an external electrode (3) are formed on a surface of a substrate (16),
the mounting pad (2) is provided with: a first surface layer (6) formed on the surface of the substrate (16), a mounting pad main body portion (8) formed on the surface of the first surface layer (6), and a second surface layer (12) formed on the surface of the mounting pad main body portion (8),
the external electrode (3) is provided with: a third surface layer (7) formed on the surface of the substrate (16), an external electrode main body part (9) formed on the surface of the third surface layer (7), and a fourth surface layer (13) formed on the surface of the external electrode main body part (9),
the mounting pad main body part (8) of the mounting pad (2) and the external electrode main body part (9) of the external electrode (3) are respectively formed by nonmagnetic Ni-P.
6. The substrate for a semiconductor device according to claim 5, wherein the mounting pad main body portion (8) of the mounting pad (2) and the external electrode main body portion (9) of the external electrode (3) are formed of Ni-P plating layers, respectively.
7. The substrate for a semiconductor device according to claim 5 or 6, wherein the Vickers hardness of the mounting pad main body portion (8) of the mounting pad (2) and the external electrode main body portion (9) of the external electrode (3) is 400 to 600 HV.
8. The substrate for a semiconductor device according to any one of claims 5 to 7, wherein a total thickness T1 of the mounting pad (2) and the external electrode (3) is 20 to 100 μm.
9. A method for manufacturing a substrate for a semiconductor device, in which an external electrode (3) is formed on a surface of a substrate (16), is characterized by comprising:
a resist patterning step of forming a pattern resist on the surface of the substrate (16);
a first metal layer forming step of forming a third surface layer (7) of the external electrode (3) on the surface of the substrate (16) by using the pattern resist;
a main body portion forming step of forming an external electrode main body portion (9) on the surface of the third surface layer (7); and
a second metal layer forming step of forming a fourth surface layer (13) on the surface of the external electrode main body (9);
in the main body portion forming step, the surface of the third surface layer (7) is subjected to Ni-P plating treatment to form an external electrode main body portion (9).
10. A method for manufacturing a substrate for a semiconductor device, in which a mounting pad (2) of a semiconductor element (1) and an external electrode (3) are formed on a surface of a substrate (16), the method comprising:
a resist patterning step of forming a pattern resist on the surface of the substrate (16);
a first metal layer forming step of forming a first surface layer (6) on which a pad (2) is mounted and a third surface layer (7) on which an external electrode (3) is mounted on the surface of a substrate (16) by using the pattern resist;
a main body part forming step of forming a mounting pad main body part (8) and an external electrode main body part (9) on the surfaces of the first surface layer (6) and the third surface layer (7); and
a second metal layer forming step of forming a second surface layer (12) on the surface of the mounting pad main body (8) and a fourth surface layer (13) on the surface of the external electrode main body (9);
in the main body portion forming step, the surfaces of the first surface layer (6) and the third surface layer (7) are subjected to Ni-P plating treatment to form a mounting pad main body portion (8) and an external electrode main body portion (9).
11. A semiconductor device in which a semiconductor element (1) and an external electrode (3) are electrically connected and sealed in a resin (5),
the external electrode (3) is provided with: a third surface layer (7) exposed on the mounting surface (S) of the semiconductor device, an external electrode body (9) formed on the surface of the third surface layer (7), and a fourth surface layer (13) formed on the surface of the external electrode body (9),
the external electrode main body part (9) of the external electrode (3) is formed of nonmagnetic Ni-P.
12. The semiconductor device according to claim 11, wherein the external electrode main body portion (9) of the external electrode (3) is formed of an electroplated layer of Ni — P.
13. The semiconductor device according to claim 11 or 12, wherein the Vickers hardness of the external electrode main body portion (9) of the external electrode (3) is 400 to 600 HV.
14. The semiconductor device according to any one of claims 11 to 13, wherein the total thickness T1 of the external electrode (3) is 20 to 100 μm.
15. A semiconductor device in which a semiconductor element (1) fixed to a mounting pad (2) is electrically connected to an external electrode (3), and the semiconductor element (1), the mounting pad (2), and the external electrode (3) are sealed in a resin (5),
the mounting pad (2) is provided with: a first surface layer (6) exposed on a mounting surface (S) of the semiconductor device, a mounting pad body (8) formed on the surface of the first surface layer (6), and a second surface layer (12) formed on the surface of the mounting pad body (8),
the external electrode (3) is provided with: a third surface layer (7) exposed on the mounting surface (S) of the semiconductor device, an external electrode body (9) formed on the surface of the third surface layer (7), and a fourth surface layer (13) formed on the surface of the external electrode body (9),
the mounting pad main body part (8) of the mounting pad (2) and the external electrode main body part (9) of the external electrode (3) are formed of nonmagnetic Ni-P.
16. The semiconductor device according to claim 15, wherein the mounting pad main body portion (8) of the mounting pad (2) and the external electrode main body portion (9) of the external electrode (3) are each formed of an Ni — P plating layer.
17. The semiconductor device according to claim 15 or 16, wherein the vickers hardness of the mounting pad main body portion (8) of the mounting pad (2) and the external electrode main body portion (9) of the external electrode (3) is 400 to 600 HV.
18. The semiconductor device according to any one of claims 15 to 17, wherein a total thickness T1 of each of the mounting pad (2) and the external electrode (3) is 20 to 100 μm.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2020-043371 | 2020-03-12 | ||
| JP2020043371A JP7481865B2 (en) | 2020-03-12 | 2020-03-12 | Substrate for semiconductor device and semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113394115A true CN113394115A (en) | 2021-09-14 |
Family
ID=77617293
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110235071.XA Pending CN113394115A (en) | 2020-03-12 | 2021-03-03 | Substrate for semiconductor device, method for manufacturing substrate for semiconductor device, and semiconductor device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP7481865B2 (en) |
| CN (1) | CN113394115A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023188194A1 (en) * | 2022-03-30 | 2023-10-05 | 住友大阪セメント株式会社 | Optical waveguide element, and optical modulation device and optical transmission apparatus using same |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001189214A (en) | 1999-12-28 | 2001-07-10 | Daido Electronics Co Ltd | Bonded rare earth magnet and manufacturing method therefor |
| JP2004214265A (en) | 2002-12-27 | 2004-07-29 | Kyushu Hitachi Maxell Ltd | Semiconductor device and its manufacturing method |
| JP2005227134A (en) | 2004-02-13 | 2005-08-25 | Hitachi Metals Ltd | Magnetic sensor |
| JP5580522B2 (en) | 2008-08-01 | 2014-08-27 | 日立マクセル株式会社 | Semiconductor device and manufacturing method thereof |
| JP2011104909A (en) | 2009-11-19 | 2011-06-02 | Hitachi Maxell Ltd | Roll mold and method for manufacturing the same |
| JP6044936B2 (en) | 2013-04-24 | 2016-12-14 | Ｓｈマテリアル株式会社 | Manufacturing method of semiconductor device mounting substrate |
-
2020
- 2020-03-12 JP JP2020043371A patent/JP7481865B2/en active Active
-
2021
- 2021-03-03 CN CN202110235071.XA patent/CN113394115A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JP2021145060A (en) | 2021-09-24 |
| JP7481865B2 (en) | 2024-05-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3781596A (en) | Semiconductor chip carriers and strips thereof | |
| JP2002009196A (en) | Manufacturing method of semiconductor device | |
| JP2002016181A (en) | Semiconductor device, manufacturing method thereof, and electrodeposition frame | |
| US10727169B2 (en) | Semiconductor device having lead with back and end surfaces provided with plating layers | |
| JP2011077519A (en) | Lead frame, and method of manufacturing the same | |
| JP2022120854A (en) | Substrate for semiconductor device and semiconductor device | |
| JPH01235170A (en) | Micro i/o pin and its manufacture | |
| JP3869849B2 (en) | Manufacturing method of semiconductor device | |
| JP2005244033A (en) | Electrode package and semiconductor device | |
| CN113394115A (en) | Substrate for semiconductor device, method for manufacturing substrate for semiconductor device, and semiconductor device | |
| JP6492930B2 (en) | Lead frame for semiconductor device and manufacturing method thereof | |
| JP3979873B2 (en) | Non-contact data carrier manufacturing method | |
| JP4638657B2 (en) | Electronic component built-in multilayer board | |
| JP2022168143A (en) | Semiconductor device substrate and semiconductor device | |
| US20220173017A1 (en) | Semiconductor device | |
| JP2009060144A (en) | Multi-layer substrate with built-in electronic part | |
| JP7339231B2 (en) | Substrates for semiconductor devices, semiconductor devices | |
| JP2002198635A (en) | Wiring board and its manufacturing method | |
| CN115863286A (en) | Substrate for semiconductor device | |
| JP6806436B2 (en) | Substrates for semiconductor devices, their manufacturing methods, and semiconductor devices | |
| JP7256303B2 (en) | Substrates for semiconductor devices and semiconductor devices | |
| JP7132298B2 (en) | Substrate for semiconductor device, method for manufacturing semiconductor device | |
| JP6846484B2 (en) | Substrates for semiconductor devices and their manufacturing methods, semiconductor devices | |
| JP6579667B2 (en) | Semiconductor device substrate manufacturing method and semiconductor device manufacturing method | |
| JP2022189979A (en) | Substrate for semiconductor device and semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| CB02 | Change of applicant information |
Address after: Kyoto Japan Applicant after: MAXELL, Ltd. Address before: Kyoto Japan Applicant before: MAXELL HOLDINGS, Ltd. |
|
| CB02 | Change of applicant information | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |