CN113325912B - LDO circuit suitable for wide input voltage range - Google Patents
LDO circuit suitable for wide input voltage range Download PDFInfo
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- CN113325912B CN113325912B CN202110649923.XA CN202110649923A CN113325912B CN 113325912 B CN113325912 B CN 113325912B CN 202110649923 A CN202110649923 A CN 202110649923A CN 113325912 B CN113325912 B CN 113325912B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
The invention discloses an LDO (low dropout regulator) circuit applicable to a wide input voltage range, which comprises an IC (integrated circuit) chip, an input voltage VIN (voltage-variable) end and other application circuit modules which are arranged on the IC chip, and a voltage division module, a band-gap reference voltage generation module, a comparator U2 and a switch control module which are arranged on the IC chip; the non-inverting input end of the comparator U2 is connected with the input voltage VIN end through a voltage division module, the inverting input end of the comparator U2 is connected with a band-gap reference voltage generation module, and the output end of the comparator U2 is connected with the input voltage VIN end through a switch control module; a power tube module is connected between the band gap reference voltage generation module and the input voltage VIN end, and is also connected with other application circuit modules; the switch control module is also connected with the power tube module. The invention has simple circuit design and can solve the problems of poor stability, high cost and the like of the current LDO circuit architecture.
Description
Technical Field
The invention relates to the technical field of low dropout voltage stabilizing circuits, in particular to an LDO (low dropout regulator) circuit applicable to a wide input voltage range.
Background
In some integrated circuit designs for special applications, there is a need for a relatively large range of input voltage, for example, the input voltage of an over-voltage protection switch IC is 2.5-35V, but the devices used in the IC are low-voltage (5V) devices, and at this time, an LDO circuit (low dropout linear regulator) is required to generate a voltage source for the internal circuit, and the current LDO circuit has the following four common architectures:
1) an LDO architecture with a Zener diode function, the circuit architecture of which is shown in fig. 1, has the advantages that no high voltage device is needed, the number of layers can be reduced, and the cost is reduced, but the architecture needs to use an external current limiting resistor R1 and a capacitor C to ensure the stability of the LDO circuit, so that if the architecture is used, an external device is used, the cost is increased, and the operating current of the LDO circuit is large, and as long as the VIN voltage is greater than the VO voltage, the current of (VIN-VO)/R1 is needed, and the power consumption is increased;
2) as shown in fig. 2, the LOD circuit is mostly applied to high voltage, where MP is a high voltage PMOS transistor, and the LOD circuit mostly needs a large capacitor at the VO end to generate a pole to ensure the stability of the LDO, thereby increasing additional cost;
3) an NMOS transistor based LDO circuit architecture is shown in fig. 3, where MN in the circuit is a high voltage NMOS transistor, and when the VIN voltage is smaller than the set VO voltage, in order to avoid that the VO voltage is smaller than the VIN voltage by one VGS voltage, a high voltage charge pump (charge pump) is added, and an output voltage of the charge pump is higher than the VO voltage by at least one threshold voltage (threshold voltage), so that when the VIN voltage is smaller than the VO voltage, the VO voltage may be equal to the VIN voltage, and further, there is no extra voltage difference. Therefore, the circuit needs to additionally add a charge pump circuit, so that the cost is high;
4) as shown in fig. 4, an output voltage of the LDO circuit architecture is mainly determined by a voltage of a Zener diode, and if MN selects a high-voltage depletion NMOS (depletion NMOS transistor), when VIN voltage is smaller than VO voltage, VO voltage is equal to VIN voltage.
Disclosure of Invention
The invention aims to provide an LDO circuit suitable for a wide input voltage range, so as to solve the problems of poor stability, high cost and the like of the traditional LDO circuit architecture.
In order to realize the purpose, the following technical scheme is adopted:
an LDO circuit suitable for a wide input voltage range comprises an IC chip, an input voltage VIN end and other application circuit modules which are arranged on the IC chip, and further comprises a voltage division module, a band gap reference voltage generation module, a comparator U2 and a switch control module which are arranged on the IC chip; the non-inverting input end of the comparator U2 is connected with the input voltage VIN end through a voltage division module, the inverting input end of the comparator U2 is connected with a band-gap reference voltage generation module, and the output end of the comparator U2 is connected with the input voltage VIN end through a switch control module; a power tube module is connected between the band gap reference voltage generation module and the input voltage VIN end, and is also connected with other application circuit modules; the switch control module is also connected with the power tube module and used for controlling the power tube module to be opened or closed.
Further, the power tube module comprises a power tube MN1, a power tube MP1, a voltage stabilizing diode ZD1 and a resistor R4; the drain electrode of the power tube MN1 is connected with the input voltage VIN end through a resistor R4, the grid electrode of the power tube MN1 is grounded through a voltage stabilizing diode ZD1, and the source electrode of the power tube MN1 is respectively connected with a band gap reference voltage generating module and other application circuit modules; the grid electrode of the power tube MP1 is connected with the switch control module, the drain electrode of the power tube MP1 is connected with the common connection end of the power tube MN1 and other application circuit modules, and the source electrode of the power tube MP1 is connected with the input voltage VIN end.
Further, the power tube module further comprises a resistor R3 and a capacitor C1; one end of the resistor R3 is connected with the input voltage VIN end, and the other end of the resistor R3 is connected with the common connection end of the power tube MN1 and the voltage-stabilizing diode ZD 1; one end of the capacitor C1 is connected with the grid of the power tube MN1, and the other end of the capacitor C1 is grounded.
Further, the power tube module further comprises a zener diode ZD2, a capacitor C2; one ends of the zener diode ZD2 and the capacitor C2 are both connected to the common connection end of the power tube MN1 and the power tube MP1, and the other ends of the zener diode ZD2 and the capacitor C2 are both grounded.
Further, the power tube module also comprises a voltage stabilizing diode ZD3, a resistor R5; one ends of the voltage-stabilizing diode ZD3 and the resistor R5 are both connected to the common connection end of the power tube MP1 and the switch control module, the other end of the voltage-stabilizing diode ZD3 is connected with the input voltage VIN end, and the other end of the resistor R5 is grounded.
Further, the switch control module comprises a switch tube MP2, a switch tube MN2, and a resistor R7; the drain electrode of the switching tube MP2 is connected with the power tube module, the source electrode of the switching tube MP2 is connected with the input voltage VIN end, and the grid electrode of the switching tube MP2 is connected with the drain electrode of the switching tube MN2 through a resistor R7; the grid electrode of the switch tube MN2 is connected with the output end of the comparator U2, and the source electrode of the switch tube MN2 is grounded.
Further, the switch control module further comprises a resistor R6 and a voltage stabilizing diode ZD 4; one ends of the zener diode ZD4 and the resistor R6 are both connected to the common connection end of the switch tube MP2 and the resistor R7, and the other ends of the zener diode ZD4 and the resistor R6 are both connected to the input voltage VIN end.
Further, the voltage division module comprises a resistor R1 and a resistor R2; one end of the resistor R1 is connected with the input voltage VIN end, and the other end of the resistor R1 is connected with the resistor R2 and then grounded; the non-inverting input terminal of the comparator U2 is connected to the common connection terminal of the resistor R1 and the resistor R2.
By adopting the scheme, the invention has the beneficial effects that:
1) the design is reasonable, the principle is simple, additional external devices except the IC chip are not needed, and the expenditure cost on the circuit architecture is reduced;
2) a depletion type NMOS tube is not needed, an additional charge pump circuit is not needed, the area of the IC chip can be reduced, and the production cost of the IC chip is further reduced;
3) the circuit architecture belongs to an open-loop LDO architecture, has no stability problem, further does not need a compensation circuit, can further reduce the cost, and does not have the oscillation problem caused by insufficient stability;
4) when the input voltage VIN is smaller than the designed voltage VO, VO is equal to VIN, and therefore there is no voltage difference.
Drawings
FIG. 1 is a circuit diagram of a first conventional LDO architecture;
FIG. 2 is a circuit diagram of a second conventional LDO architecture;
FIG. 3 is a circuit diagram of a third conventional LDO architecture;
FIG. 4 is a circuit diagram of a fourth conventional LDO architecture;
FIG. 5 is a circuit diagram of the present invention;
FIG. 6 is a graph of voltage change at each node versus time according to one embodiment of the present invention;
wherein the figures identify the description:
1-an IC chip; 2-input voltage VIN terminal;
3-other application circuit module; 4, a voltage division module;
5, a band gap reference voltage generating module; 6, a switch control module;
and 7, a power tube module.
Detailed Description
The invention is described in detail below with reference to the figures and the specific embodiments.
Referring to fig. 5 to 6, the present invention provides an LDO circuit suitable for a wide input voltage range, which includes an IC chip 1, an input voltage VIN terminal 2 and other application circuit modules 3 disposed on the IC chip 1, and further includes a voltage dividing module 4, a bandgap reference voltage generating module 5, a comparator U2, and a switch control module 6 disposed on the IC chip 1; the non-inverting input end of the comparator U2 is connected with the input voltage VIN end 2 through the voltage dividing module 4, the inverting input end of the comparator U2 is connected with the band-gap reference voltage generating module 5, and the output end of the comparator U2 is connected with the input voltage VIN end 2 through the switch control module 6; a power tube module 7 is connected between the band-gap reference voltage generation module 5 and the input voltage VIN end 2, and the power tube module 7 is also connected with other application circuit modules 3; the switch control module 6 is further connected with the power tube module 7 and used for controlling the power tube module 7 to be opened or closed.
The power tube module 7 comprises a power tube MN1, a power tube MP1, a voltage stabilizing diode ZD1 and a resistor R4; the drain electrode of the power tube MN1 is connected with the input voltage VIN end 2 through a resistor R4, the grid electrode of the power tube MN1 is grounded through a voltage stabilizing diode ZD1, and the source electrode of the power tube MN1 is respectively connected with the band-gap reference voltage generating module 5 and the other application circuit modules 3; the grid electrode of the power tube MP1 is connected with the switch control module 6, the drain electrode of the power tube MP1 is connected with the common connecting end of the power tube MN1 and other application circuit modules 3, and the source electrode of the power tube MP1 is connected with the input voltage VIN end 2; the power tube module 7 further comprises a resistor R3 and a capacitor C1; one end of the resistor R3 is connected with the input voltage VIN end 2, and the other end of the resistor R3 is connected with the common connection end of the power tube MN1 and the voltage-stabilizing diode ZD 1; one end of the capacitor C1 is connected with the grid of the power tube MN1, and the other end of the capacitor C1 is grounded; the power tube module 7 further comprises a voltage stabilizing diode ZD2 and a capacitor C2; one ends of the zener diode ZD2 and the capacitor C2 are both connected to the common connection end of the power tube MN1 and the power tube MP1, and the other ends of the zener diode ZD2 and the capacitor C2 are both grounded.
The power tube module 7 further comprises a voltage stabilizing diode ZD3 and a resistor R5; one ends of the voltage-stabilizing diode ZD3 and the resistor R5 are both connected to the common connection end of the power tube MP1 and the switch control module 6, the other end of the voltage-stabilizing diode ZD3 is connected with the input voltage VIN end 2, and the other end of the resistor R5 is grounded; the switch control module 6 comprises a switch tube MP2, a switch tube MN2 and a resistor R7; the drain electrode of the switching tube MP2 is connected with the power tube module 7, the source electrode of the switching tube MP2 is connected with the input voltage VIN end 2, and the grid electrode of the switching tube MP2 is connected with the drain electrode of the switching tube MN2 through a resistor R7; the grid electrode of the switching tube MN2 is connected with the output end of the comparator U2, and the source electrode of the switching tube MN2 is grounded; the switch control module 6 further comprises a resistor R6 and a zener diode ZD 4; one ends of the voltage-stabilizing diode ZD4 and the resistor R6 are connected to a common connection end of the switching tube MP2 and the resistor R7, and the other ends of the voltage-stabilizing diode ZD4 and the resistor R6 are connected with an input voltage VIN end 2; the voltage division module 4 comprises a resistor R1 and a resistor R2; one end of the resistor R1 is connected with the input voltage VIN end 2, and the other end of the resistor R1 is connected with the resistor R2 and then grounded; the non-inverting input terminal of the comparator U2 is connected to the common connection terminal of the resistor R1 and the resistor R2.
The working principle of the invention is as follows:
referring to fig. 5, in the present embodiment, the Bandgap reference voltage generating module 5 (hereinafter, referred to as "Bandgap" for short as U1 in the figure) is a circuit capable of generating a voltage independent of temperature, and the circuit architecture is not limited; the comparator U2 is used to compare: the VBG voltage generated by U1 and the voltage E (voltage at node E) obtained by dividing the voltage VIN input at the input voltage VIN terminal 2 by the voltage dividing module 4 are, if the voltage E is higher than the VBG voltage, the output voltage a (voltage at node a) of the comparator U2 is logic 1(VO voltage); the zener diode ZD1 is used to generate the reference voltage of VO, and the voltage value of the zener diode ZD1 is designed to add a threshold voltage (threshold voltage) to the VO voltage; the zener diode ZD2 is used for protection, and other circuits (other application circuit modules 3) in the IC chip 1 using the VO voltage as a power supply can prevent the internal circuits from flowing too high voltage to cause device damage; the zener diode ZD3 is used to generate the VGS voltage of the power transistor MP1 (high voltage PMOS transistor) when turned on, and since the VGS terminals of some high voltage devices are all limited in voltage, the zener diode ZD3 is used to limit the VGS voltage of the power transistor MP1, and similarly, the zener diode ZD4 is used to limit the VGS voltage of the switching transistor MP 2; the design sizes of the power transistor MN1 and the power transistor MP1 depend on the operating current of the internal circuit, and the design sizes of the switch transistor MP2 and the switch transistor MN2 are not necessarily large for controlling the power transistor MP1 to be turned on or off.
The resistor R1 and the resistor R2 are used to detect the change of the input voltage VIN at the input voltage VIN terminal 2, and since the VIN voltage may be very high, the use of the resistor R1 and the resistor R2 can prevent the non-inverting input terminal of the comparator U2 from being burnt by the high voltage; the resistor R3 functions as a pull-high resistor (pull-up resistor) at the node D, and when the VIN voltage is smaller than the voltage of the zener diode ZD1, the voltage at the node D is pulled to the VIN voltage by the resistor R3; the resistor R4 is used for ESD (electrostatic discharge) considerations to prevent ESD charges from flowing into the drain of the MN 1; the purpose of the resistor R5 is to turn on the power transistor MP1 when the switch MP2 is turned off, and to ensure that the power transistor MP1 is turned on when the VIN voltage is low, so that the VO voltage is equal to the VIN voltage; the purpose of the resistor R6 is to turn off the switch MP2 and turn on the power transistor MP1 when the switch MN2 is turned off; the purpose of the resistor R7 is to limit the current of the zener diode ZD4, so that when the switch MN2 and the switch MP2 are turned on, the input voltage VIN terminal 2 will not consume too much current on the zener diode ZD 4; the capacitor C1 and the capacitor C2 are voltage-stabilizing capacitors, and are only used for voltage stabilization, so corresponding capacitance values can be designed according to the circuit requirements, and usually do not need to be large, and do not occupy too much area cost.
Referring to fig. 6, the relative voltage values of the nodes in the circuit when the VIN voltage rises from 0V (starting points of the voltages of all the nodes are from 0V) are indicated, wherein the inclined dotted line is the VIN voltage and is used to illustrate the relative relationship between a certain voltage and the VIN voltage; the left side of the vertical dotted line is the voltage variation trend that the VIN voltage is smaller than the set VO voltage value, and the right side of the vertical dotted line is the voltage variation trend that the VIN voltage is larger than the set VO voltage value.
Initially, when VIN rises, VBG is greater than the voltage at node E, so that the voltage at node a is 0V, MN2 is turned off, and the voltage at node B is pulled to VIN by resistor R6, so that MP2 is also turned off; the resistor R5 pulls the voltage at the node C to a voltage value obtained by subtracting the voltage of the zener diode ZD3 from the voltage VIN, so that the power transistor MP1 is turned on, and therefore the VO voltage rises along with the voltage VIN at the beginning, and the voltage is the same, and the voltage at the node D also rises along with the voltage VIN at the beginning; when the VIN voltage is large enough to make the voltage at the node E greater than the VBG voltage, the voltage at the node a is pulled to the VO voltage, the voltage at the node B is pulled to the voltage value obtained by subtracting the voltage of the zener diode ZD4 from the VIN voltage, the switch transistor MP2 is turned on, the power transistor MP1 is turned off, the VO voltage is obtained by subtracting the VGS voltage of the power transistor MN1 from the voltage at the node D, and the VO voltage is the designed value.
In addition, the devices of the power tube MN1, the switch tube MN2, the power tube MP1 and the switch tube MP2 are selected and used related to the VIN voltage, and a device conforming to the VIN withstand voltage value must be selected and used, and the design of the LDO architecture circuit is simple, no additional external device is needed, the cost can be greatly reduced, and when the VIN voltage is lower, the VO voltage can be equal to the VIN voltage, and meanwhile, the space of the internal circuit can be improved, so that the design of the internal circuit can be easier, in addition, no additional compensation circuit is needed to increase the stability, and the consideration of the stability is simpler than that of other traditional LDO circuits.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (7)
1. An LDO circuit suitable for a wide input voltage range comprises an IC chip, an input voltage VIN end and other application circuit modules, and is characterized by further comprising a voltage division module, a band gap reference voltage generation module, a comparator U2 and a switch control module, wherein the voltage division module, the band gap reference voltage generation module, the comparator U2 and the switch control module are arranged on the IC chip; the non-inverting input end of the comparator U2 is connected with the input voltage VIN end through a voltage division module, the inverting input end of the comparator U2 is connected with a band-gap reference voltage generation module, and the output end of the comparator U2 is connected with the input voltage VIN end through a switch control module; a power tube module is connected between the band gap reference voltage generation module and the input voltage VIN end, and is also connected with other application circuit modules; the switch control module is also connected with the power tube module and is used for controlling the power tube module to be opened or closed;
the power tube module comprises a power tube MN1, a power tube MP1, a voltage-stabilizing diode ZD1 and a resistor R4; the drain electrode of the power tube MN1 is connected with the input voltage VIN end through a resistor R4, the grid electrode of the power tube MN1 is grounded through a voltage stabilizing diode ZD1, and the source electrode of the power tube MN1 is respectively connected with a band gap reference voltage generating module and other application circuit modules; the grid electrode of the power tube MP1 is connected with the switch control module, the drain electrode of the power tube MP1 is connected with the common connection end of the power tube MN1 and other application circuit modules, and the source electrode of the power tube MP1 is connected with the input voltage VIN end.
2. The LDO circuit for a wide range of input voltages of claim 1, wherein said power transistor module further comprises a resistor R3, a capacitor C1; one end of the resistor R3 is connected with the input voltage VIN end, and the other end of the resistor R3 is connected with the common connection end of the power tube MN1 and the voltage-stabilizing diode ZD 1; one end of the capacitor C1 is connected with the grid of the power tube MN1, and the other end of the capacitor C1 is grounded.
3. The LDO circuit with wide input voltage range according to claim 1, wherein said power tube module further comprises a zener diode ZD2, a capacitor C2; one ends of the zener diode ZD2 and the capacitor C2 are both connected to the common connection end of the power tube MN1 and the power tube MP1, and the other ends of the zener diode ZD2 and the capacitor C2 are both grounded.
4. The LDO circuit applicable to a wide input voltage range of claim 1, wherein the power tube module further comprises a zener diode ZD3, a resistor R5; one ends of the voltage-stabilizing diode ZD3 and the resistor R5 are both connected to the common connection end of the power tube MP1 and the switch control module, the other end of the voltage-stabilizing diode ZD3 is connected with the input voltage VIN end, and the other end of the resistor R5 is grounded.
5. The LDO circuit with wide input voltage range according to claim 1, wherein the switch control module comprises a switching tube MP2, a switching tube MN2, a resistor R7; the drain electrode of the switching tube MP2 is connected with the power tube module, the source electrode of the switching tube MP2 is connected with the input voltage VIN end, and the grid electrode of the switching tube MP2 is connected with the drain electrode of the switching tube MN2 through a resistor R7; the grid electrode of the switch tube MN2 is connected with the output end of the comparator U2, and the source electrode of the switch tube MN2 is grounded.
6. The LDO circuit with wide input voltage range according to claim 5, wherein the switch control module further comprises a resistor R6, a zener diode ZD 4; one ends of the zener diode ZD4 and the resistor R6 are both connected to the common connection end of the switch tube MP2 and the resistor R7, and the other ends of the zener diode ZD4 and the resistor R6 are both connected to the input voltage VIN end.
7. The LDO circuit with wide input voltage range according to claim 1, wherein the voltage divider module comprises a resistor R1, a resistor R2; one end of the resistor R1 is connected with the input voltage VIN end, and the other end of the resistor R1 is connected with the resistor R2 and then grounded; the non-inverting input terminal of the comparator U2 is connected to the common connection terminal of the resistor R1 and the resistor R2.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1669831A1 (en) * | 2004-12-03 | 2006-06-14 | Dialog Semiconductor GmbH | Voltage regulator output stage with low voltage MOS devices |
| US20140347023A1 (en) * | 2013-05-27 | 2014-11-27 | Rohm Co., Ltd. | Semiconductor integrated circuit |
| CN106886243A (en) * | 2017-05-05 | 2017-06-23 | 电子科技大学 | A kind of low pressure difference linear voltage regulator with fast response characteristic |
| CN111338413A (en) * | 2020-03-02 | 2020-06-26 | 电子科技大学 | Low dropout regulator with high power supply rejection ratio |
-
2021
- 2021-06-10 CN CN202110649923.XA patent/CN113325912B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1669831A1 (en) * | 2004-12-03 | 2006-06-14 | Dialog Semiconductor GmbH | Voltage regulator output stage with low voltage MOS devices |
| US20140347023A1 (en) * | 2013-05-27 | 2014-11-27 | Rohm Co., Ltd. | Semiconductor integrated circuit |
| CN106886243A (en) * | 2017-05-05 | 2017-06-23 | 电子科技大学 | A kind of low pressure difference linear voltage regulator with fast response characteristic |
| CN111338413A (en) * | 2020-03-02 | 2020-06-26 | 电子科技大学 | Low dropout regulator with high power supply rejection ratio |
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