CN102778912B - Startup circuit and power supply system integrated with same - Google Patents
Startup circuit and power supply system integrated with same Download PDFInfo
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- CN102778912B CN102778912B CN201210263995.1A CN201210263995A CN102778912B CN 102778912 B CN102778912 B CN 102778912B CN 201210263995 A CN201210263995 A CN 201210263995A CN 102778912 B CN102778912 B CN 102778912B
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Abstract
The invention discloses a startup circuit and a power supply system integrated with the same. Low-voltage power supply is produced by the startup circuit to be supplied to a reference voltage source in the system when the system is powered up, thereby avoiding use of high-voltage devices by the reference voltage source. After the system works normally, the startup circuit can be turned off completely, and no additional power consumption is needed. After the power supply system integrated with the startup circuit is applied, the reference voltage source in a chip can always maintain low voltage, and only one high-accuracy low-voltage reference source needs to be constructed in the chip. Therefore, due to high-voltage application of the power supply system, the number of the applied high-voltage devices can be reduced, the area of the chip can be reduced, and the design cost can be decreased.
Description
Technical field
The invention belongs to power technique fields, be specifically related to a kind of design that is applicable to the self-starting internal power supply system of high-voltage applications.
Background technology
All there is power up in all chips, so all inevitably will design the power up of chip in chip design, appropriate design can improve the performance of chip, the cost of reduction chip.Traditional chip power process is, outer power voltage Vin is directly to base modules power supply, sets up chip internal power supply after waiting benchmark to set up again, and finally chip can regular event.In high-voltage applications, there are two serious defects in this power up: 1. the power supply due to benchmark is outer power voltage, so reference part will be used a large amount of withstand voltage devices, increased the area of chip; 2. under high pressure there is serious leakage current in device, so the benchmark of high voltage supply exists serious temperature to float, will cause the reference voltage of chip internal to have serious drift with temperature like this.Therefore, adopt the high-voltage applications chip of traditional power up, often need to additionally increase a low-voltage high-precision reference source at chip internal again, thereby meet the inner demand of accurately controlling, this will further increase power consumption and the area of chip.
Summary of the invention
The object of the invention is the problems referred to above that exist in order to solve the existing self-starting internal power supply system for high-voltage applications, proposed a kind of start-up circuit.
Technical scheme of the present invention is: a kind of start-up circuit, comprising: a PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe, the 4th PMOS pipe, the 5th PMOS pipe, the one NMOS pipe, the 2nd NMOS pipe, the 3rd NMOS pipe, one phase inverter, one capacitor cell, one resistance unit, one voltage regulation unit, wherein, and the input end of phase inverter is connected and as the input end of described start-up circuit, the output terminal of phase inverter is connected to the grid end of a NMOS pipe to the grid end of the 2nd NMOS pipe, a NMOS pipe, the 2nd NMOS pipe, the source of the 3rd NMOS pipe and substrate are all connected to ground, the grid end of a PMOS pipe, the drain terminal of the 2nd PMOS pipe metal-oxide-semiconductor, the drain terminal of the 2nd NMOS pipe, the first terminal of capacitor cell, the grid end of the 3rd NMOS pipe, the grid end of the 4th PMOS pipe links together, and the second terminal of capacitor cell is connected with supply voltage, and the grid end of the drain terminal of a PMOS pipe and the 2nd PMOS pipe is connected to the drain terminal of a NMOS pipe, a PMOS pipe, the 2nd PMOS pipe, source and the substrate of the 4th PMOS pipe are connected to supply voltage, the drain terminal of the 4th PMOS pipe drain terminal and the 3rd NMOS pipe, the grid end of the 3rd PMOS pipe, the grid end of the 5th PMOS pipe links together, and the substrate of the substrate of the 3rd PMOS pipe and the 5th PMOS pipe is connected to supply voltage, resistance unit is connected between the source and supply voltage of the 3rd PMOS pipe, and the source of the drain terminal of the 3rd PMOS pipe and the 5th PMOS pipe is connected to the first terminal of voltage regulation unit, the second connecting terminals of voltage regulation unit is received ground, and the drain terminal of the 5th PMOS pipe is as the output terminal of described start-up circuit.
Based on above-mentioned start-up circuit, the invention allows for a kind of self-starting internal power supply system that is applicable to high-voltage applications, also comprise: reference voltage source, LDO, comparator circuit, one diode and a switchgear, wherein, the output terminal of start-up circuit is connected with the startup input end of reference voltage source and the negative end of diode, reference voltage source provides reference source for LDO, the output terminal of LDO is as the output terminal of described electric power system, the reference source that two input ends of comparator circuit produce for input reference voltage source and the output voltage of LDO, the output terminal of comparator circuit is connected with the control end of the input end of start-up circuit and switchgear, the first terminal of switchgear and the second terminal connect respectively the forward end of diode and the output terminal of LDO.
Beneficial effect of the present invention: start-up circuit of the present invention produces the power supply of a low pressure to the reference voltage source of internal system when system powers on, thereby avoid reference voltage source to adopt high tension apparatus, and the feature of the relative conventional start-up circuit maximum of this start-up circuit is, after system normal operation, start-up circuit can cut out completely, does not consume extra power consumption; It is low pressure all the time that the electric power system of integrated start-up circuit of the present invention makes the reference voltage source supply voltage of chip internal, at chip internal, only need to build a high-precision Low Voltage CMOS Bandgap Reference like this, so adopting the high-voltage applications of electric power system provided by the invention can reduce high tension apparatus uses, reduce the area of chip, and then reduce the cost of chip.In addition due to electric power system of the present invention, the power supply of reference voltage source is cut to the internal electric source of chip the most at last, can greatly improve like this PSRR of benchmark.
Accompanying drawing explanation
Fig. 1 is the structural representation of the start-up circuit that proposes of the present invention.
The structural representation of the self-starting internal power supply system that is applicable to high-voltage applications of Fig. 2 is integrated start-up circuit.
Fig. 3 is the power up schematic diagram of electric power system when supply voltage is 5V in embodiment.
Fig. 4 is the power up schematic diagram of electric power system when supply voltage is 16V in embodiment.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described further.
Start-up circuit of the present invention as shown in Figure 1, comprises PMOS pipe MP1, MP2, MP3, MP4, MP5, NMOS manages MN1, MN2, MN3, a phase inverter INV1, capacitor cell, a resistance unit R1, voltage regulation unit, concrete annexation is as follows: and the input end of phase inverter INV1 is connected and as the input end of described start-up circuit, the output terminal of phase inverter INV1 is connected to the grid end that NMOS manages MN1 to the NMOS pipe grid end of MN2, NMOS manages MN1, MN2, the source of MN3 and substrate are all connected to ground, the grid end of PMOS pipe MP1, the drain terminal of metal-oxide-semiconductor MP2, the drain terminal of NMOS pipe MN2, the first terminal of capacitor cell, the grid end of MN3, the grid end of MP4 links together, and the second terminal of capacitor cell is connected with supply voltage Vin, and the grid end of the drain terminal of PMOS pipe MP1 and PMOS pipe MP2 is connected to the drain terminal of NMOS pipe MN1, PMOS manages MP1, MP2, the source of MP4 and substrate are connected to supply voltage Vin, the drain terminal of PMOS pipe MP4 drain terminal and NMOS pipe MN3, the grid end of PMOS pipe MP3, the grid end of PMOS pipe MP5 links together, and the PMOS pipe substrate of MP3 and the substrate of MP5 are connected to supply voltage Vin, resistance unit R1 is connected between the source and supply voltage Vin of PMOS pipe MP3, and the source of the drain terminal of PMOS pipe MP3 and PMOS pipe MP5 is connected to the first terminal of voltage regulation unit, the second connecting terminals of voltage regulation unit is received ground, and the drain terminal of PMOS pipe MP5 is as the output terminal of described start-up circuit.
As shown in Figure 1, the capacitor cell is here specially mos capacitance, in Fig. 1, mos capacitance is specifically managed MP6 by PMOS and is realized, and wherein, the grid end of MP6 is as the first terminal of described capacitor cell, source and the drain terminal of MP6 link together, as the second terminal of described capacitor cell.
As shown in Figure 1, the voltage regulation unit is here specially a Zener diode D1, and the negative end of Zener diode is as the first terminal of described voltage regulation unit, and the forward end of Zener diode is as the second terminal of described voltage regulation unit.
Start-up circuit when system powers on, by this module, produced the power supply V of a low pressure
l71, offer base modules, wherein, NMOS pipe MN1, MN2, PMOS pipe MP1, MP2 and phase inverter INV1 form Level Shift structure, and the low voltage logic signal L70 by input, changes the high pressure logical signal V to supply voltage Vin into
a, the voltage that in Fig. 1, A is ordered, can close the rear start-up circuit of the normal startup of chip normally.
Be applicable to high-voltage applications self-starting internal power supply system theory diagram as shown in Figure 2, also comprise: reference voltage source, LDO, comparator circuit, one diode and a switchgear, wherein, the output terminal of start-up circuit is connected with the startup input end of reference voltage source and the negative end of diode, reference voltage source provides reference source for LDO, the output terminal of LDO is as the output terminal of described electric power system, the reference source that two input ends of comparator circuit produce for input reference voltage source and the output voltage of LDO, the output terminal of comparator circuit is connected with the control end of the input end of start-up circuit and switchgear, the first terminal of switchgear and the second terminal connect respectively the forward end of diode and the output terminal of LDO.
The reference voltage source here, LDO and comparator circuit can adopt conventional structure, and switchgear can be realized by a metal-oxide-semiconductor.
The power up of this electric power system is: when supply voltage Vin powers on, produce the power supply V of a low pressure by start-up circuit
l71to reference voltage source, power, after the normal foundation of benchmark, LDO module is moved and is started to set up internal power source voltage VOUT, when the output VOUT that monitors LDO when comparator circuit reaches predefined value, produce enable signal L70, in the time of this signal at stop start-up circuit, by interrupteur SW 1 closure, the electrical source exchange of reference voltage source provides to deducted diode D2 pressure drop by VOUT.
Below the principle of work of start-up circuit in Fig. 1 is set forth: when supply voltage Vin powers on, because internal signal does not all have to produce, so NMOS pipe MN1 and MN2 are in cut-off state, the output node A of Level Shift is high-impedance state, by the mos capacitance being formed by PMOS pipe MP6, the output node A of Level Shift is carried out to initialization, while powering on, making node A is high level, by the phase inverter forming by PMOS pipe MP4 and NMOS pipe MN3, obtaining Node B is low level, PMOS pipe MP3 and MP5 conducting, thereby form by R1, the path that MP3 and MP5 form produces supply voltage V
l71.Because internal signal L70 is maintained low until the output VOUT of LDO rises to predefined value always, i.e. reference value V
rEF, and the voltage of phase inverter INV1 is V
l71, NMOS pipe MN1 conducting, MN2 cut-off, maintaining node A is high level, thereby the voltage of node L71 can be maintained always.When input supply voltage Vin is lower, Zener diode D2 is not breakdown, and the level of node C deducts the pressure drop of resistance R 1 by Vin and the source-drain voltage of PMOS pipe MP3 obtains, and then by PMOS, manages the voltage that MP5 obtains node L71; When the supply voltage Vin inputting is higher, Zener diode D2 punctures the voltage stabilization of node C about 5V, can guarantee that like this voltage of output node L71 is always in the scope of low pressure.The magnitude of voltage that monitors the output VOUT of LDO when comparator circuit rises to reference value V
rEFtime, the output signal L70 of comparator circuit is high level by low level upset, NMOS pipe MN1 cut-off, MN2 conducting in start-up circuit, the level of node A is drawn as low level, by obtaining the current potential of Node B after one-level phase inverter, it is high level, close the path being formed by R1, MP3 and MP5, the voltage of L71 switches to output VOUT by LDO and deducts a diode drop and obtain.
When Fig. 3 and Fig. 4 have provided respectively input supply voltage Vin and have been 5V and 16V, the power up of electric power system provided by the invention.In Fig. 3 because input voltage vin is lower, voltage stabilizing diode does not puncture, so low-tension supply L71 is directly obtained by a resistance R 1, two PMOS pipe MP3 and MP5 by supply voltage Vin, when the output VOUT of LDO rises to 3.2V, the output signal L70 of comparator circuit is high level by low level upset, and then start-up circuit cuts out, low-tension supply L71 switches to by inner LDO and provides.In Fig. 4, because input voltage vin is higher, voltage stabilizing diode punctures, and by the voltage stabilization of C node, in 5.2V left and right, low-tension supply L71 is by the voltage V at electrical nodes C place
cby a PMOS pipe MP5, obtain, when the output VOUT of LDO rises to 3.2V, the output signal L70 of comparator circuit is high level by low level upset, and then start-up circuit cuts out, and low-tension supply L71 switches to by inner LDO and provides.By Fig. 3 and Fig. 4, show, start-up circuit can cut out completely after system normal operation, does not consume extra power consumption.
From above analysis and simulation, can find out, start-up circuit of the present invention produces the power supply of a low pressure to the base modules of internal system when system powers on, thereby avoid base modules to adopt high tension apparatus, and the feature of the relative conventional start-up circuit maximum of this start-up circuit is, after system normal operation, start-up circuit can cut out completely, does not consume extra power consumption; It is low pressure all the time that the electric power system of integrated start-up circuit of the present invention makes the reference voltage source supply voltage of chip internal, at chip internal, only need to build a high-precision Low Voltage CMOS Bandgap Reference like this, so adopting the high-voltage applications of electric power system provided by the invention can reduce high tension apparatus uses, reduce the area of chip, and then reduce the cost of chip.In addition due to electric power system of the present invention, the power supply of reference voltage source is cut to the internal electric source of chip the most at last, can greatly improve like this PSRR of benchmark.
Those of ordinary skill in the art will appreciate that, embodiment described here is in order to help reader understanding's principle of the present invention, should be understood to that protection scope of the present invention is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not depart from essence of the present invention according to these technology enlightenments disclosed by the invention, and these distortion and combination are still in protection scope of the present invention.
Claims (5)
1. a start-up circuit, is characterized in that, comprising: a PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe, the 4th PMOS pipe, the 5th PMOS pipe, the one NMOS pipe, the 2nd NMOS pipe, the 3rd NMOS pipe, one phase inverter, one capacitor cell, one resistance unit, one voltage regulation unit, wherein, and the input end of phase inverter is connected and as the input end of described start-up circuit, the output terminal of phase inverter is connected to the grid end of a NMOS pipe to the grid end of the 2nd NMOS pipe, a NMOS pipe, the 2nd NMOS pipe, the source of the 3rd NMOS pipe and substrate are all connected to ground, the grid end of a PMOS pipe, the drain terminal of the 2nd PMOS pipe, the drain terminal of the 2nd NMOS pipe, the first terminal of capacitor cell, the grid end of the 3rd NMOS pipe, the grid end of the 4th PMOS pipe links together, and the second terminal of capacitor cell is connected with supply voltage, and the grid end of the drain terminal of a PMOS pipe and the 2nd PMOS pipe is connected to the drain terminal of a NMOS pipe, a PMOS pipe, the 2nd PMOS pipe, source and the substrate of the 4th PMOS pipe are connected to supply voltage, the drain terminal of the 4th PMOS pipe drain terminal and the 3rd NMOS pipe, the grid end of the 3rd PMOS pipe, the grid end of the 5th PMOS pipe links together, and the substrate of the substrate of the 3rd PMOS pipe and the 5th PMOS pipe is connected to supply voltage, resistance unit is connected between the source and supply voltage of the 3rd PMOS pipe, and the source of the drain terminal of the 3rd PMOS pipe and the 5th PMOS pipe is connected to the first terminal of voltage regulation unit, the second connecting terminals of voltage regulation unit is received ground, and the drain terminal of the 5th PMOS pipe is as the output terminal of described start-up circuit.
2. start-up circuit according to claim 1, it is characterized in that, described voltage regulation unit is specially a Zener diode, and the negative end of Zener diode is as the first terminal of described voltage regulation unit, and the forward end of Zener diode is as the second terminal of described voltage regulation unit.
3. start-up circuit according to claim 1, is characterized in that, described capacitor cell is specially mos capacitance.
4. start-up circuit according to claim 3, it is characterized in that, described mos capacitance is specifically realized by the 6th PMOS pipe, wherein, the grid end of the 6th PMOS pipe is as the first terminal of described capacitor cell, source and the drain terminal of the 6th PMOS pipe link together, as the second terminal of described capacitor cell.
5. the self-starting internal power supply system of the start-up circuit described in the integrated arbitrary claim of claim 1 to 4, it is characterized in that, also comprise: reference voltage source, LDO, comparator circuit, one diode and a switchgear, wherein, the output terminal of start-up circuit is connected with the startup input end of reference voltage source and the negative end of diode, reference voltage source provides reference source for LDO, the output terminal of LDO is as the output terminal of described electric power system, the reference source that two input ends of comparator circuit produce for input reference voltage source and the output voltage of LDO, the output terminal of comparator circuit is connected with the control end of the input end of start-up circuit and switchgear, the first terminal of switchgear and the second terminal connect respectively the forward end of diode and the output terminal of LDO.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210263995.1A CN102778912B (en) | 2012-07-27 | 2012-07-27 | Startup circuit and power supply system integrated with same |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210263995.1A CN102778912B (en) | 2012-07-27 | 2012-07-27 | Startup circuit and power supply system integrated with same |
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| Publication Number | Publication Date |
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| CN102778912A CN102778912A (en) | 2012-11-14 |
| CN102778912B true CN102778912B (en) | 2014-03-05 |
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| CN201210263995.1A Expired - Fee Related CN102778912B (en) | 2012-07-27 | 2012-07-27 | Startup circuit and power supply system integrated with same |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104914909B (en) * | 2014-03-11 | 2017-11-28 | 深圳市中兴微电子技术有限公司 | A kind of power control and method |
| CN105846802B (en) * | 2015-01-12 | 2018-12-07 | 昆山启达微电子有限公司 | A kind of ultralow pressure start-up circuit |
| CN104917382B (en) * | 2015-07-10 | 2017-05-10 | 上海灿瑞科技股份有限公司 | High voltage starting circuit |
| CN107861554B (en) * | 2017-10-26 | 2019-07-12 | 西安微电子技术研究所 | The circuit for starting up band gap basis and method of wide power range are used for based on Flouride-resistani acid phesphatase bipolar process |
| EP3812872B1 (en) * | 2019-10-25 | 2023-06-14 | Nxp B.V. | A system comprising a low drop-out regulator |
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|---|---|---|---|---|
| US5742155A (en) * | 1996-11-25 | 1998-04-21 | Microchip Technology Incorporated | Zero-current start-up circuit |
| US5949227A (en) * | 1997-12-22 | 1999-09-07 | Advanced Micro Devices, Inc. | Low power circuit for disabling startup circuitry in a voltage Reference circuit |
| US6943533B2 (en) * | 2003-01-20 | 2005-09-13 | Sharp Kabushiki Kaisha | Voltage conversion circuit, semiconductor integrated circuit device, and portable terminal |
| CN101421683A (en) * | 2006-04-18 | 2009-04-29 | 爱特梅尔公司 | Low-dropout voltage regulator with a voltage slew rate efficient transient response boost circuit |
| CN201345532Y (en) * | 2009-01-16 | 2009-11-11 | 深圳艾科创新微电子有限公司 | Power output short-circuit protection circuit |
-
2012
- 2012-07-27 CN CN201210263995.1A patent/CN102778912B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5742155A (en) * | 1996-11-25 | 1998-04-21 | Microchip Technology Incorporated | Zero-current start-up circuit |
| US5949227A (en) * | 1997-12-22 | 1999-09-07 | Advanced Micro Devices, Inc. | Low power circuit for disabling startup circuitry in a voltage Reference circuit |
| US6943533B2 (en) * | 2003-01-20 | 2005-09-13 | Sharp Kabushiki Kaisha | Voltage conversion circuit, semiconductor integrated circuit device, and portable terminal |
| CN101421683A (en) * | 2006-04-18 | 2009-04-29 | 爱特梅尔公司 | Low-dropout voltage regulator with a voltage slew rate efficient transient response boost circuit |
| CN201345532Y (en) * | 2009-01-16 | 2009-11-11 | 深圳艾科创新微电子有限公司 | Power output short-circuit protection circuit |
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