CN113287161A - Display module and driving method of display module - Google Patents

Display module and driving method of display module Download PDF

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Publication number
CN113287161A
CN113287161A CN202080008907.6A CN202080008907A CN113287161A CN 113287161 A CN113287161 A CN 113287161A CN 202080008907 A CN202080008907 A CN 202080008907A CN 113287161 A CN113287161 A CN 113287161A
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China
Prior art keywords
display panel
metal layer
electrode
driving
metal
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Application number
CN202080008907.6A
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Chinese (zh)
Inventor
金珍浩
申相旻
重田哲也
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003Display of colours
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2077Display of intermediate tones by a combination of two or more gradation control methods
    • G09G3/2081Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
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    • G09G2300/0421Structural details of the set of electrodes
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/0426Layout of electrodes and connections
    • GPHYSICS
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    • G09G2300/00Aspects of the constitution of display devices
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    • G09G2310/00Command of the display device
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    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0259Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • G09G2310/066Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0223Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
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    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0247Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0626Adjustment of display parameters for control of overall brightness
    • G09G2320/064Adjustment of display parameters for control of overall brightness by time modulation of the brightness of the illumination source
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/025Reduction of instantaneous peaks of current

Abstract

A display module is disclosed. The display module includes: a display panel including an inorganic light emitting device, a scan electrode connected to at least one input pin, and a Pulse Width Modulation (PWM) pixel circuit; and a driving unit configured to supply a scan signal to the scan electrode through at least one input pin, wherein the PWM pixel circuit includes a driving transistor and supplies a driving current having a pulse width corresponding to the data voltage to the inorganic light emitting device by varying a voltage of a gate terminal of the driving transistor according to the scan signal applied through the scan electrode, and the number of the at least one input pin varies according to a size of the display panel.

Description

Display module and driving method of display module
Technical Field
The present disclosure relates to a display module and a driving method of the display module, and more particularly, to a display module in which light emitting devices constitute pixels, and a driving method of the display module.
Background
In the related art, in a display panel in which inorganic light emitting devices such as a red LED, a green LED, or a blue LED constitute sub-pixels, the gray scale of the sub-pixels has been represented by a Pulse Amplitude Modulation (PAM) driving system from an active matrix driving system.
The PAM drive system is a system that drives an inorganic light emitting device using a pixel circuit composed of a transistor and/or a capacitor, and the PAM drive system is a system that expresses a gray scale by the amplitude (or size) of a drive current.
However, in the case of the PAM driving system, not only the gray scale of light emitted from the organic light emitting device but also the wavelength changes according to the magnitude of the driving current, thereby deteriorating the color reproducibility of an image. Fig. 1 illustrates a wavelength variation according to the magnitude (or amplitude) of a driving current flowing through a blue LED, a green LED, and a red LED.
Therefore, for driving of a display panel in which the inorganic light emitting device directly constitutes a sub-pixel, it is necessary to perform Pulse Width Modulation (PWM) driving representing gray scales with a pulse width of a driving current.
The PWM driving system comprises a digital PWM driving system and an analog PWM driving system. However, in the case of the digital PWM driving system, gray scales are expressed in the subfield system, thereby causing a problem of noise with respect to a false contour, and in the case of increasing the number of subfields to reduce the false contour problem, a light emitting duty ratio may be lowered.
Therefore, the analog PWM driving is suitable for driving of the display panel in which the inorganic light emitting device constitutes a sub-pixel. The analog PWM system is a system for controlling turn-on or turn-off of a driving transistor by vertically shifting a data voltage set (or programmed) to a gate terminal of the driving transistor by an external sweep (sweep) signal, for example, a triangular wave, thereby controlling a duration of a driving current, i.e., a light emitting duration of a light emitting device.
In such an analog PWM driving system, it is important to uniformly apply the sweep signal in a predetermined region of the display panel. This is because, in the case where the sweep signal is unevenly applied, a luminance difference occurs according to the sweep signal although the data voltage is uniform. In the case of the related art display panel, the scan signal is not uniformly applied to the driving transistor due to the deviation of the RC load in the scan electrode, and thus, a problem of luminance deviation occurs even if the data voltage is the same.
Disclosure of Invention
Technical problem
The present disclosure has been made in view of the above problems, and it is an object of the present disclosure to provide a display module having a scan electrode structure capable of uniformly supplying a scan signal, and a driving method of the display module.
Technical scheme
According to one embodiment of the present disclosure, a display module includes: a display panel including an inorganic light emitting device, a scan electrode connected to at least one input pin, and a Pulse Width Modulation (PWM) pixel circuit; and a driving unit configured to supply a scan signal to the scan electrode through at least one input pin, wherein the PWM pixel circuit includes a driving transistor and supplies a driving current having a pulse width corresponding to the data voltage to the inorganic light emitting device by varying a voltage of a gate terminal of the driving transistor according to the scan signal applied through the scan electrode, and the number of the at least one input pin varies according to a size of the display panel.
A first number of input pins may be provided in the display panel as at least one input pin based on the display panel of the first size, and a second number of input pins larger than the first number may be provided in the display panel based on the display panel of the second size larger than the first size.
The driving unit may provide the same sweep signal through each of the plurality of input pins spaced at regular intervals, based on the at least one input pin connected to the sweep electrode being the plurality of input pins.
The display panel may have a stacked structure including a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer, the first metal layer may include a gate terminal of the driving transistor, the second metal layer may include a source terminal and a drain terminal of the driving transistor, the third metal layer may include an electrode for supplying a driving voltage to the PWM pixel circuit, and the fourth metal layer may include an electrode for connecting the PWM pixel circuit and the inorganic light emitting device to each other.
The sweeping electrode may include: a plurality of first metal lines disposed on the first metal layer; and a plurality of second metal lines disposed on the second metal layer and connecting the plurality of first metal lines to each other, and the gate terminal of the driving transistor may be connected to a metal line among the plurality of first metal lines.
The at least one input pin may be connected with at least one of the plurality of first metal lines and the plurality of second metal lines disposed in the edge region.
The scan electrode may further include a shorting bar disposed on at least one of the third and fourth metal layers and connected to at least one of the plurality of first metal lines through at least one via hole.
The shorting bar may be disposed in an edge region of at least one of the third and fourth metal layers and may be connected to a metal line disposed in the edge region among the plurality of first metal lines through a via hole, and the at least one input pin may be connected to the shorting bar disposed in the edge region.
The shorting bar may have a size greater than a size of each of the plurality of first metal lines.
The scan electrodes may be disposed in a plurality of block units, a plurality of input pins may be disposed, the plurality of input pins may be connected to each of the plurality of scan electrode blocks symmetrically with each other, and the driving unit may provide the scan signals in the scan electrode block units at different times through the plurality of input pins connected to each block.
According to another embodiment of the present disclosure, a method of driving a display module including a display panel including an inorganic light emitting device, a scan electrode connected to at least one input pin, and a Pulse Width Modulation (PWM) pixel circuit, the method includes: setting a data voltage to a gate terminal of a driving transistor included in the PWM pixel circuit; providing a sweeping signal to the sweeping electrode through at least one input pin; and supplying a driving current having a pulse width corresponding to the set data voltage to the inorganic light emitting device by varying a voltage of the gate terminal of the driving transistor according to the sweep signal based on the sweep signal applied to the PWM pixel circuit through the sweep electrode, and the number of the at least one input pin is varied according to the size of the display panel.
A first number of input pins may be provided in the display panel as at least one input pin based on the display panel of the first size, and a second number of input pins larger than the first number may be provided in the display panel based on the display panel of the second size larger than the first size.
Providing the sweep signal may include: the same sweep signal is provided through each of the plurality of input pins spaced at regular intervals based on at least one input pin connected to the sweep electrode being the plurality of input pins.
The display panel may have a stacked structure including a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer, the first metal layer may include a gate terminal of the driving transistor, the second metal layer may include a source terminal and a drain terminal of the driving transistor, the third metal layer may include an electrode for supplying a driving voltage to the PWM pixel circuit, and the fourth metal layer may include an electrode for connecting the PWM pixel circuit and the inorganic light emitting device to each other.
The sweeping electrode may include: a plurality of first metal lines disposed on the first metal layer; and a plurality of second metal lines disposed on the second metal layer and connecting the plurality of first metal lines to each other, and the gate terminal of the driving transistor may be connected to a metal line among the plurality of first metal lines.
The at least one input pin may be connected with at least one of the plurality of first metal lines and the plurality of second metal lines disposed in the edge region.
The scan electrode may further include a shorting bar disposed on at least one of the third metal layer and the fourth metal layer and connected to at least one of the plurality of first metal lines through at least one via hole.
The shorting bar may be disposed in an edge region of at least one of the third and fourth metal layers and may be connected to a metal line disposed in the edge region among the plurality of first metal lines through a via hole, and the at least one input pin may be connected to the shorting bar disposed in the edge region.
The shorting bar may have a size greater than a size of each of the plurality of first metal lines.
The scan electrode may be provided in a plurality of block units, a plurality of input pins may be provided, the plurality of input pins may be symmetrically connected to each of the plurality of scan electrode blocks, and the providing the scan signal may include providing the scan signal in the scan electrode block unit at different times through the plurality of input pins connected to each block.
Effects of the invention
As described above, according to various embodiments of the present disclosure, a scan electrode structure capable of uniformly providing a scan signal may be provided. Accordingly, it is possible to solve the problem regarding the luminance deviation due to the deviation of the RC load in the scan electrode in the display module.
Drawings
FIG. 1 is a graph showing a change in wavelength according to the magnitude of a driving current flowing through a blue LED, a green LED and a red LED,
fig. 2A is a view for describing a pixel structure of a display panel according to an embodiment,
figure 2B is a view showing a sub-pixel structure according to another embodiment,
figure 3 is a block diagram of a display module according to one embodiment,
figure 4 is a cross-sectional view of a display panel according to one embodiment,
figure 5 is a diagram for describing the operation of a PWM pixel circuit according to one embodiment,
fig. 6 is a view for describing a problem caused by a deviation of an RC load in a scan electrode in the related art,
figure 7A is a block diagram of a metal layer according to one embodiment,
figure 7B is a detailed view of a metal layer according to one embodiment,
figure 8A is an exemplary diagram of a scan electrode according to one embodiment,
figure 8B is an exemplary diagram of a scan electrode according to another embodiment,
figure 8C is an exemplary diagram of a scan electrode according to yet another embodiment,
figure 9A is an exemplary diagram illustrating a shorting bar according to one embodiment,
figure 9B is an exemplary diagram of a scan electrode according to yet another embodiment,
figure 10 is an exemplary diagram illustrating a sweep electrode block according to one embodiment,
fig 11A is a view showing a general PWM driving system,
figure 11B is a view showing a split type driving of the sweep electrode block according to one embodiment,
fig. 11C is a view showing a divided type driving of the sweep electrode block according to another embodiment,
fig. 11D is a view showing a split type driving of the sweep electrode block according to still another embodiment,
FIG. 12 is a configuration diagram of a display device according to an embodiment, an
Fig. 13 is a flowchart illustrating a driving method of a display module according to an embodiment.
Detailed Description
In describing the present disclosure, when it is determined that the detailed description may unnecessarily obscure the gist of the present disclosure, the detailed description of the related art is omitted. In addition, a repeated description of the same configuration may be omitted.
The suffix "part" of an element used in the following description is given or used in consideration of easiness of writing the specification, and does not have a particular meaning or effect.
The terminology used in the present disclosure is for describing one embodiment, but is not intended to limit the scope of other embodiments. Unless specifically defined otherwise, singular expressions may include plural expressions.
It will be understood that terms such as "comprising" or "consisting of …," are used herein to specify the presence of stated features, quantities, steps, operations, elements, parts, or combinations thereof, and do not preclude the presence or addition of one or more other features, quantities, steps, operations, elements, parts, or combinations thereof.
The terms "first," "second," and the like, as used in this disclosure, may refer to various elements, regardless of order and/or importance, and may be used to distinguish one element from another element without limiting the elements.
If it is described that a certain element (e.g., a first element) is "operably or communicatively coupled"/"operably or communicatively coupled to" another element or "connected to" another element (e.g., a second element), it is to be understood that the certain element may be directly connected to the another element or connected to the another element through yet another element (e.g., a third element). On the other hand, if it is described that a certain element (e.g., a first element) is "directly coupled to" or "directly connected to" another element (e.g., a second element), it may be understood that no element (e.g., a third element) exists between the certain element and the another element.
Unless otherwise defined, terms used in the embodiments of the present disclosure may be understood by those skilled in the art with their common understanding in the corresponding technical fields.
Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
Fig. 2A is a view for describing a pixel structure of the display panel 100 according to an embodiment of the present disclosure. As shown in fig. 2A, the display panel 100 may include a plurality of pixels 10 arranged in a matrix form.
Each pixel 10 may include a plurality of sub-pixels 10-1 to 10-3. For example, one pixel 10 included in the display panel 100 may include three types of sub-pixels, for example, a red (R) sub-pixel 10-1, a green (G) sub-pixel 10-2, and a blue (B) sub-pixel 10-3. That is, one set R, G and B sub-pixels may constitute one unit pixel of the display panel 100.
Referring to fig. 2A, a pixel region 20 in a display panel 100 may include a pixel occupied area 10 and a peripheral area 11.
As shown, the area 10 occupied by a pixel may include R, G and B sub-pixels 10-1 through 10-3. Specifically, the R sub-pixel 10-1 may include an R light emitting element and a pixel circuit for driving the R light emitting element, the G sub-pixel 10-2 may include a G light emitting element and a pixel circuit for driving the G light emitting element, and the B sub-pixel 10-3 may include a B light emitting element and a pixel circuit for driving the B light emitting element, respectively. The pixel circuit may include a PWM pixel circuit for performing PWM driving of the connected inorganic light emitting element, but is not limited thereto.
According to one embodiment, the peripheral region 11 of the pixel 10 may include various circuits for driving the pixel circuits differently. In addition, the display panel 100 may include a scan electrode for applying a scan signal to the PWM pixel circuit. This will be described in detail later.
Fig. 2B is a view illustrating a sub-pixel structure according to another embodiment of the present disclosure. Referring to fig. 2A, the sub-pixels 10-1 to 10-3 are arranged in one pixel 10 in a horizontally inverted L shape. However, the embodiment is not limited thereto, and as shown in fig. 2B, R, G and B sub-pixels 10-1 to 10-3 may be arranged in a row in a pixel 10'. Such an arrangement of the sub-pixels is merely an example, and a plurality of sub-pixels may be arranged in various forms in each pixel according to an embodiment.
In the above example, the pixel configuration is described as being configured with three types of sub-pixels, but is not limited thereto. For example, according to the embodiment, a pixel may be implemented with R, G, B and W (white) four types of sub-pixels, and an arbitrary number of sub-pixels may constitute one pixel. Hereinafter, for convenience of description, a case where the pixel 10 is configured with R, G, B three kinds of sub-pixels is described as an example.
Fig. 3 is a block diagram of a display module 1000 according to an embodiment of the present disclosure. Referring to fig. 3, the display module 1000 includes a display panel 100 and a driving unit 200.
The display panel 100 may include an inorganic light emitting element 110, a PWM pixel circuit 120, and a scan electrode 130. As will be described later, the display panel 100 may have a structure in which: the PWM pixel circuit 120 is formed on the substrate 30 and the inorganic light emitting element 110 is disposed on the PWM pixel circuit 120. For convenience of description, fig. 3 shows only a configuration regarding one sub-pixel included in the display panel 100.
The inorganic light emitting element 110 may constitute the sub-pixels 10-1 to 10-3 of the display panel 100, and a plurality of types may be provided according to the color of emitted light. For example, the inorganic light emitting element 110 may be provided as a red (R) inorganic light emitting element configured to emit red light, a green (G) inorganic light emitting element configured to emit green light, and a blue (B) inorganic light emitting element configured to emit blue light.
Therefore, the type of the sub-pixel may be determined according to the type of the inorganic light emitting element 110. That is, the R phosphor element may constitute the R sub-pixel 10-1, the G phosphor element may constitute the G sub-pixel 10-2, and the B phosphor element may constitute the B sub-pixel 10-3.
The inorganic light emitting element 110 is a light emitting element manufactured using an inorganic material, which is different from an Organic Light Emitting Diode (OLED) manufactured using an organic material.
According to an embodiment of the present disclosure, the inorganic light emitting element 110 may be a micro Light Emitting Diode (LED) (μ -LED). A micro LED is a micro inorganic light emitting element having a size of 100 micrometers (μm) or less, which emits light by itself without a backlight or a color filter.
The inorganic light emitting element 110 may emit light having different brightness according to the magnitude or pulse width of the supplied driving current. The pulse width of the driving current here may be expressed as a duty ratio of the driving current or a duration of the driving current. For example, the inorganic light emitting element 110 may emit light of higher luminance due to a large amplitude of the driving current, and may emit light of higher luminance due to a long pulse width (i.e., due to a high duty ratio or a long duration), but is not limited thereto.
Specifically, according to an embodiment of the present disclosure, the inorganic light emitting element 110 may emit light based on a driving current having a pulse width controlled by the PWM pixel circuit 120. That is, the inorganic light emitting element 110 may be driven by PWM.
The PWM pixel circuit 120 may perform PWM driving of the inorganic light emitting element 110. The PWM driving system is a system for expressing a gray scale according to the light emitting time of the inorganic light emitting element 110. Therefore, in the case of driving the inorganic light emitting element 110 in the PWM system, various grays can be expressed by changing the pulse width although the amplitude is the same. Therefore, it is possible to solve a problem regarding that the wavelength of light emitted from the LED (particularly, the micro LED) varies according to the gray scale due to the LED being driven only in the PAM system.
The PWM pixel circuit 120 may control a pulse width of a driving current provided by a current source (not shown) based on the applied PWM data voltage. According to one embodiment, the current source may be configured to include a PAM pixel circuit (150 in fig. 5).
Specifically, the PWM pixel circuit 120 may include a driving transistor (not shown), and control a voltage of a gate terminal of the driving transistor according to various signals (or voltages) applied to control a pulse width of the driving current.
Specifically, when the PWM data voltage corresponding to a specific gray scale is applied, the PWM pixel circuit 120 may set (or program) the applied PWM data voltage at the gate terminal of the driving transistor.
After that, when the sweep signal is applied through the sweep electrode 130, the PWM pixel circuit 120 changes the voltage of the gate terminal of the driving transistor according to the sweep signal, and thus, the driving current having the pulse width corresponding to the set PWM data voltage can be supplied to the inorganic light emitting element 100.
The sweep signal in this context may be a linearly varying signal such as a triangular wave, which linearly varies the gate terminal voltage of the driving transistor by an externally applied voltage, but is not limited thereto.
According to an embodiment of the present disclosure, the scan electrode 130 may be connected to at least one input pin (not shown), and a scan signal may be input from the outside of the display panel 100 through the input pin. Accordingly, the scan signal may be applied to each of the plurality of PWM pixel circuits 120 included in the display panel 100 through the scan electrode 130. According to an embodiment of the present disclosure, the input pin may be formed on the TFT layer 40, which TFT layer 40 will be described later as a conductive pad (or electrode pad). The number of input pins may vary according to the size of the display panel 100, which will be described in detail later.
As described above, the sub-pixels are configured as a unit of the inorganic light emitting element 110, and thus, the display panel 100 can express a gray scale in a sub-pixel unit by driving the PWM pixel circuit 120, unlike a Liquid Crystal Display (LCD) panel using a plurality of LEDs emitting the same single color as a backlight.
To this end, each sub-pixel included in the display panel 100 may include an inorganic light emitting element 110 and a PWM pixel circuit 120 for driving the inorganic light emitting element 110. That is, there may be a PWM pixel circuit 120 for driving the inorganic light emitting element 110 for each sub-pixel.
According to one embodiment, the display panel 100 may further include a MUX circuit for selecting any one of a plurality of sub-pixels 10-1 to 10-3 constituting the pixel 10, an electrostatic discharge (ESD) protection circuit for preventing static electricity from being generated in the display panel 100, a power supply circuit for supplying power to the pixel circuits 120 and 150, and a clock supply circuit for supplying a clock for driving the pixel circuits 120 and 150.
The driving unit 200 drives the display panel 100. Specifically, the driving unit 130 may drive the display panel 100 by supplying various control signals and data signals to the display panel 100.
Specifically, the driving unit 200 may supply the sweep signal to the sweep electrode 130 through the input pin. Accordingly, the driving unit 200 may include a sweep signal supply circuit (not shown).
In addition, the driving unit 200 may further include at least one gate driver for driving the pixels of the display panel 100 disposed in the vertical line unit in a matrix form, a data driver (or a source driver) for supplying a data voltage (e.g., a PAM data voltage or a PWM data voltage) to each pixel or each sub-pixel, and the like.
The driving unit 200 may be separately provided outside the display panel 100 and may be connected to the display panel 100 through a separate wiring. Alternatively, the driving unit 200 may be implemented together with the pixel circuits 120 and 150 in the display panel 100.
However, the embodiment is not limited thereto, and some configurations of various drivers and circuits included in the driving unit 200 may be implemented in the display panel 100, and other configurations may be separately provided outside the display panel 100. For example, the sweep signal supply circuit may be configured to be mounted in an external Printed Circuit Board (PCB) together with a processor or a Timing Controller (TCON), and the gate driver may be configured to be included in a TFT layer of the display panel 100.
Meanwhile, the display module 1000 according to various embodiments of the present disclosure may be installed as a single unit in wearable devices, portable devices, handheld devices, and various electronic products or vehicles requiring a display. In addition, a plurality of display modules 1000 may be assembled and applied to a display device such as a monitor for a Personal Computer (PC), a high-resolution TV, a sign, an electronic display, and the like.
Fig. 4 is a cross-sectional view of a display panel 100 according to an embodiment of the present disclosure. For convenience of description, fig. 4 illustrates only one pixel included in the display panel 100.
Referring to fig. 4, the display panel 100 includes a substrate 30, a TFT layer 40, and inorganic light emitting elements R, G and B110-1 to 110-3. The PWM pixel circuit 120 or the PAM pixel circuit 150 may be implemented as a Thin Film Transistor (TFT) and included in the TFT layer 40 formed on the substrate 30. Each of the inorganic light emitting elements R, G and B110-1 to 110-3 is disposed on the TFT layer 40 and constitutes each of the sub-pixels 110-1 to 110-3 of the display panel 100. The substrate 30 may have a material such as glass or synthetic resin.
Meanwhile, although not clearly shown in the drawings, the PWM pixel circuit 120 and/or the PAM pixel circuit 150 for driving the inorganic light emitting elements 110-1 to 110-3 may be present in the TFT layer 40 for each of the inorganic light emitting elements 110-1 to 110-3. Each of the inorganic light emitting elements R, G and B110-1 to 110-3 may be mounted or disposed on the TFT layer 40 to be electrically connected to the corresponding pixel circuits 120 and 150.
For example, as shown in fig. 4, the R phosphor element 110-1 may be mounted or arranged such that the anode electrode 3 and the cathode electrode 4 of the R phosphor element 110-1 are connected to the anode electrode 1 and the cathode electrode 2 formed on the pixel circuits 120 and 150 (not shown), respectively, to drive the R phosphor element 110-1, and the same configuration applies to the G phosphor element 110-2 and the B phosphor element 110-3. According to one embodiment, at least one of the anode electrode 1 and the cathode electrode 2 may be implemented as a common electrode.
Fig. 4 shows an example in which each of the inorganic light emitting elements 110-1 to 110-3 is a flip chip micro LED. However, without being limited thereto, according to one embodiment, each of the inorganic light emitting elements 110-1 to 110-3 may be a micro LED in a lateral or longitudinal direction.
The TFT layer 40 includes pixel circuits 120 and 150 implemented as TFTs and is formed on one surface of the substrate 30. According to an embodiment of the present disclosure, at least some of various circuits (e.g., a MUX circuit, an ESD protection circuit, a power supply circuit, a clock supply circuit, etc.) for driving the above-described pixel circuits 120 and 150 and various drivers and circuits (e.g., a sweep signal supply circuit, a gate driver, a data driver, etc.) included in the driving unit 130 may be formed on the TFT layer 40 together with the pixel circuits 120 and 150.
Further, according to an embodiment, at least some of the various circuits (e.g., the MUX circuit, the ESD protection circuit, the power supply circuit, the clock supply circuit, and the like) described above and various drivers and circuits (e.g., the sweep signal supply circuit, the gate driver, the data driver, and the like) included in the driving unit 130 may be separately provided on the other surface of the substrate 30, or may be provided as a separate chip and may be connected to the pixel circuits 120 and 150 of the TFT layer 40 through internal wiring.
One end of the internal wiring may be connected to a conductive pad (or an electrode pad) provided on the TFT layer 40, and the other end thereof may be connected to at least some of the above-described various circuits (e.g., a MUX circuit, an ESD protection circuit, a power supply circuit, a clock supply circuit, etc.) and various drivers and circuits (e.g., a sweep signal supply circuit, a gate driver, a data driver, etc.) included in the driving unit 130.
In this case, for example, the sweep signal supplied from the sweep signal supply circuit may be applied to the sweep electrode through the internal wiring and the conductive pad (or the electrode pad) and supplied to the PWM pixel circuit 120. Therefore, in this case, the conductive pad (or the electrode pad) to which the sweep signal is applied via the internal wiring may be the sweep signal input pin according to the embodiment of the present disclosure.
Fig. 5 is a view for describing an operation of the PWM pixel circuit according to an embodiment of the present disclosure. For convenience of description, fig. 5 shows only one inorganic light emitting element 110 and one of each group of pixel circuits 120 and 150 for driving the inorganic light emitting element 110.
The PAM pixel circuit 150 may control the magnitude of the driving current supplied to the inorganic light emitting element 110 based on the applied PAM data voltage, and the PWM pixel circuit 120 may control the pulse width of the driving current supplied to the inorganic light emitting element 110 based on the applied PWM data voltage.
Specifically, the PAM pixel circuit 150 supplies a driving current having a magnitude corresponding to the PAM data voltage to the inorganic light emitting element 110. At this time, the PWM pixel circuit 12 controls the holding time of the driving current (i.e., the driving current having the magnitude corresponding to the PAM data voltage) supplied to the inorganic light emitting element 110 by the PAM pixel circuit 150 based on the PWM data voltage, thereby controlling the pulse width of the driving current.
Meanwhile, the same PAM data voltage may be applied to the PAM pixel circuit 150 for all the sub-pixels, and in this case, the PAM pixel circuit 150 may function as a constant current source together with the transistor 140. That is, the PAM pixel circuits 150 of all the sub-pixels supply the driving currents having the same magnitude to the inorganic light emitting elements 110.
According to an embodiment of the present disclosure, the PAM pixel circuit 150 may provide a driving current having the same magnitude to the inorganic light emitting element 110 except for a specific case where a High Dynamic Range (HDR) driving is required. Accordingly, the gradation of the image can be represented by the PWM pixel circuit 120.
The inorganic light emitting element 110 may emit light of different brightness according to the pulse width of the driving current supplied from the PWM pixel circuit 120. The pulse width of the driving current may be referred to as a duty cycle of the driving current or a duration of the driving current.
Specifically, referring to fig. 5, when the driving Voltage (VDD) is applied to the inorganic light emitting elements 110, in a state where the PAM data voltage is input and set to the PAM pixel circuit 150 and the PWM data voltage is input and set to the gate terminal of the driving transistor 121 of the PWM pixel circuit 120, the PAM pixel circuit 150 supplies a driving current having a magnitude corresponding to the PAM data voltage to the inorganic light emitting elements 110, and the inorganic light emitting elements 110 start to emit light.
At this time, application of a sweep signal (e.g., a linearly varying voltage) to the PWM pixel circuit 120 is started. When the sweep signal is applied, the voltage of the gate terminal of the driving transistor 121 varies according to the sweep signal in accordance with the voltage based on the PWM data voltage. Meanwhile, the driving transistor 121 in the off-state maintains the off-state until the voltage of the gate terminal changes according to the sweep signal and reaches the threshold of the driving transistor 121.
When the gate terminal voltage of the driving transistor 121 reaches the threshold voltage of the driving transistor 121, the driving transistor 121 is turned on, and accordingly, the driving Voltage (VDD) applied to the source terminal of the driving transistor 121 is applied to the gate terminal of the transistor 140 through the drain terminal of the driving transistor 121.
A driving Voltage (VDD) is applied to the source terminal of the transistor 140, and thus, when the driving Voltage (VDD) is applied to the gate terminal of the transistor 140, a voltage between the gate terminal and the source terminal of the transistor 140 exceeds a threshold voltage of the transistor 140, thereby turning off the transistor 140 (as a reference, a PMOSFET has a negative value of a threshold value, and thus, the PMOSFET is turned on when a voltage equal to or less than the threshold voltage is applied between the gate terminal and the source terminal, and is turned off when a voltage exceeding the threshold voltage is applied). When the transistor 140 is turned off, no more driving current flows, and the inorganic light emitting element 110 stops emitting light.
At this time, the same sweep signal is applied to all the PWM pixel circuits 120, and accordingly, assuming that the threshold voltages of the driving transistors 121 are the same as each other (actually, there may be a threshold voltage difference between the driving transistors 121, but may be compensated for), theoretically, the pulse width of the driving current depends only on the PWM data voltage. As described above, the PWM pixel circuit 120 can supply the driving current having the pulse width corresponding to the PWM data voltage to the inorganic light emitting element 110 by controlling the voltage of the gate terminal of the driving transistor 121.
Fig. 6 is a view for describing a problem caused by a deviation of an RC load in a scan electrode in the related art. As described above, in order for the PWM pixel circuit 120 to express an accurate gray scale according to the PWM data voltage, it is important to uniformly apply the sweep signal to the display panel 100. However, due to the deviation of the RC load of each area of the scan electrode, a difference may occur in the actual scan signal of each area.
Reference numeral 8 in fig. 6 denotes a scan electrode of a related art display panel. Specifically, the related art scan electrode has a structure in which: the horizontal metal lines 600-1 to 600-n and the vertical metal lines 610-1 and 610-2 are connected to each other through via holes in the display panel. In addition, a scan signal input pin is shown connected to the scan electrode.
Although not shown in the drawings, PWM pixel circuits respectively corresponding to the sub-pixels may be connected to the scan electrodes at the position of each sub-pixel in the display panel, and may receive the scan signals through the scan electrodes. Accordingly, the scan signal is input through the scan signal input pin and supplied to all PWM pixel circuits included in the display panel through the scan electrode.
As described above, when the scan signal is transmitted to the PWM pixel circuit through the scan electrode, RC delay occurs due to the resistance component and parasitic capacitance component of the scan electrode.
Specifically, reference numeral 9 in fig. 6 shows that, in the case of the display panel of the related art, a difference in the sweep signal occurs between the sweep signal input pin and the points a and B. In particular, a significant delay may be observed at point B, which is far from the sweep signal input pin, because the resistance component at point B is greater than the resistance component at point a with respect to the sweep signal input pin.
Such a difference in the scan signal for each area of the display panel is a problem because it causes a difference in luminance of the light emitting elements with respect to the same PWM data voltage. Specifically, as the size of the display panel increases, the deviation of the RC load of each scan electrode in the panel further increases. Therefore, as in the related art, there is a problem in the structure in which the scan signal is uniformly applied to the scan electrode using one input pin regardless of the size of the display panel.
According to the embodiments of the present disclosure, the number of the scan signal input pins is changed according to the size of the display panel, and thus, it is possible to reduce a deviation of the scan signal in the display panel due to a deviation of the RC load in the scan electrode.
Specifically, according to an embodiment of the present disclosure, in the case where the display panel 100 has a first size, a first number of input pins to which the sweep signal is applied may be provided, and in the case where the display panel has a second size larger than the first size, a second number of input pins, which is larger than the first number, may be provided.
For example, in the display panel 100 used in a small display device such as a smart watch, only one sweep signal input pin is used, and as the size of the display panel 100 increases, such as a tablet computer, a notebook computer, a home Television (TV), a large TV, and the like, a greater number of sweep signal input pins are appropriately provided in the sweep electrode, and accordingly, the deviation of the RC load of each region of the sweep electrode can be appropriately adjusted so that the brightness deviation does not occur.
Hereinafter, the structure of the scan electrode according to various embodiments of the present disclosure will be described with reference to fig. 7A to 9B.
According to an embodiment of the present disclosure, the display panel 100 may have a stacked structure including a plurality of metal layers. Fig. 7A is a structural view of a metal layer included in the display panel 100 according to an embodiment of the present disclosure.
Referring to fig. 7A, transistors included in all circuits included in the TFT layer 40 described above may be formed in the first and second metal layers M1 and M2.
Specifically, a gate electrode (i.e., a gate terminal of the transistor) may be formed in the first metal layer M1, and data electrodes (i.e., source and drain terminals of the transistor) may be formed in the second metal layer M2.
Meanwhile, electrodes for supplying power for operation to various circuits configured by transistors included in the first and second metal layers M1 and M2 may be formed in the third and fourth metal layers M3 and M4.
Specifically, the third metal layer M3 may include an electrode for supplying a driving Voltage (VDD). In particular, the third metal layer M3 may include an electrode for supplying a driving Voltage (VDD) to the PWM pixel circuit 120.
The fourth metal layer M4 may include an electrode for supplying a ground Voltage (VSS). In addition, electrodes for connecting the PWM pixel circuit 120 and the inorganic light emitting element 110 to each other (i.e., the pixel circuit 1 and the pixel circuit 2) may be formed in the fourth metal layer M4.
The materials of the first to fourth metal layers M1 to M4 may be conductive metals, but are not limited thereto, and any metal materials used to manufacture TFTs having a stacked-layer structure may correspond to the materials of the first to fourth metal layers M1 to M4. The details related thereto are not relevant to the subject matter of the present disclosure, and thus a detailed description thereof will be omitted.
Fig. 7B is a view illustrating in detail a stacked structure of TFTs of the display panel 100 according to an embodiment of the present disclosure. Referring to fig. 7B, the first to fourth metal layers M1 to M4 may be formed on the substrate 30.
For example, a semiconductor channel layer may be formed on the glass substrate 30. The channel layer may be configured with various materials such as amorphous silicon (a-Si), Low Temperature Polysilicon (LTPS), or oxide.
The first metal layer M1 including the gate electrode of the transistor is formed on the channel layer, and the channel layer is opened or closed according to a voltage applied to the gate electrode. Accordingly, a data flow between the source terminal and the drain terminal formed in the second metal layer M2 is controlled.
Meanwhile, as described above, the driving Voltage (VDD) electrode is formed on the layer M3, the pixel electrode 3 and the pixel electrode 4 are formed on the layer M4, respectively, and the inorganic light emitting element 110 may be mounted on the pixel electrode 3 and the pixel electrode 4.
Fig. 8A is an exemplary diagram of a sweeping electrode according to an embodiment of the present disclosure. Referring to fig. 8A, the scan electrode 130 of the display panel 100 may include a plurality of first metal lines 50-1 to 50-n disposed on a first metal layer M1, and a plurality of second metal lines 60-1 to 60-3 disposed on a second metal layer M2 and connecting the plurality of first metal lines 50-1 to 50-n to each other.
The plurality of first metal lines 50-1 to 50-n and the plurality of second metal lines 60-1 to 60-3 may be connected to each other through via holes.
Although not shown in the drawings, the PWM pixel circuit 120 corresponding to each sub-pixel included in the display panel 100 may be connected to the scan electrode at the position of each sub-pixel in the display panel 100. Accordingly, the PWM pixel circuit 120 may receive the scan signal through the scan electrode 130.
Specifically, the gate terminal of the driving transistor 121 included in the PWM pixel circuit 120 may be connected to the plurality of first metal lines 50-1 to 50-n. Therefore, the voltage of the gate terminal of the driving transistor 121 may vary according to the variation of the sweep signal applied through the sweep electrode 130.
According to an embodiment of the present disclosure, at least one input pin 131 may be connected to the scan electrode 130, and the number of the at least one input pin 131 may vary according to the size of the display panel 100. As described above, the driving unit 200 may supply the scan signal to the scan electrode 130 through the input pin 131. For this, the driving unit 200 supplies the same sweep signal to each of the input pins 131.
Fig. 8A illustrates an example in which four input pins 131 are connected to the first metal line 50-1 disposed in the edge region among the plurality of first metal lines 50-1 to 50-n. As described above, in the case where the plurality of input pins 131 are connected to the scan electrode 130, the resistance component at each point of the scan electrode 130 with respect to each input pin 131 is reduced, as compared with the case where one input pin is provided, so that the RC deviation of each area of the scan electrode 130 is reduced. Therefore, according to the embodiments of the present invention, it is possible to solve the problem regarding the luminance deviation due to the RC deviation in the scan electrode of the scan signal.
As shown in fig. 8A, four input pins 131 may be spaced at regular intervals and connected to the first metal line 50-1, but the embodiment is not limited thereto.
Further, the number of input pins 131 is not limited to four. Any number of input pins 131 may be connected to the scan electrodes 130 according to the size of the display panel 100.
In addition, fig. 8A shows an example of three second metal lines 60-1 to 60-3, but is not limited thereto, and two or four or more second metal lines may be connected to the first metal lines 50-1 to 50-n through via holes, which is also applicable to fig. 8B, 8C, and 9B.
Fig. 8B is an exemplary diagram of a sweeping electrode according to another embodiment of the present disclosure. Referring to fig. 8B, in comparison with the display panel 100 of fig. 8A, the display panel 100 further includes four input pins 131 connected to another first metal line 50-n disposed in an edge region among the first metal lines 50-1 to 50-n.
As shown in fig. 8B, the input pins 131 connected to the two first metal lines 50-1 and 50-n in the edge region may be symmetrically connected to each other, but is not limited thereto.
As described above, when the number of input pins increases, the resistance component at each point of the scan electrode 130 further decreases with respect to the position of each input pin, thereby further reducing the RC deviation of each area of the scan electrode 130.
Fig. 8C is an exemplary diagram of a sweeping electrode according to still another embodiment of the present disclosure. According to an embodiment of the present invention, as shown in fig. 8C, the input pin 131 receiving the scan signal may be connected to at least one of the metal lines 60-1 and 60-3 disposed in the edge area among the plurality of second metal lines 60-1 to 60-3.
The number of input pins 131 connected to the second metal lines 60-1 and 60-3 shown in fig. 8C or the relative interval between the input pins 131 shown in fig. 8C is merely an example and is not limited thereto.
The embodiments illustrated in fig. 8A to 8C are not limited to the embodiments respectively illustrated. According to one embodiment, the input pin 131 shown in fig. 8C may be additionally connected with the second metal line 60-1 and the second metal line 60-3 shown in fig. 8A or 8B.
Meanwhile, as described above, transistors configuring various circuits are formed on the first metal layer M1 and the second metal layer M2 and various signal lines are provided. Therefore, the space thereof is relatively narrow, and the thickness of the first metal line or the second metal line can be formed thin.
Therefore, in order to reduce the RC delay of each region of the scan electrode 130, the number of the input pins 131 may not be increased infinitely, and even when the number of the input pins 131 is increased, there may be a limitation in reducing the RC deviation in the scan electrode 130 because the thicknesses of the first and second metal lines are thin.
Therefore, according to an embodiment of the present invention, the problem may be solved by forming a shorting bar (shorting bar) having a large area on the third metal layer M3 or the fourth metal layer M4 and connecting the shorting bar to the first metal line or the second metal line through the via hole.
Fig. 9A is an exemplary diagram illustrating third metal layer M3 according to an embodiment of the present disclosure. As described above, the electrode 80 for supplying the driving Voltage (VDD) is formed on the third metal layer M3. As shown in fig. 9A, the shorting bar 70-1 and the shorting bar 70-2 may be formed on the third metal layer M3.
The shorting bars 70-1 and 70-2 may be disposed in the edge regions of the third metal layer M3. Fig. 9A illustrates that the shorting bar 70-1 and the shorting bar 70-2 are disposed in the upper and lower edge regions of the third metal layer M3 symmetrically to each other, but the embodiment is not limited thereto. According to one embodiment, shorting bars may be disposed in any combination of the upper, lower, right and left edge regions of the third metal layer M3.
The shorting bars may be provided only in any one of the upper, lower, right, and left edge regions, two shorting bars may be symmetrically provided in the left and right edge regions, or two or three shorting bars may be asymmetrically provided in the upper, right edge regions or the lower, left, and right edge regions.
The area of the shorting bar may be greater than the area of the first metal line of the first metal layer M1 or the second metal line of the second metal layer M2 described above.
Fig. 9B is an exemplary diagram of a sweep electrode 130 according to yet another embodiment of the present disclosure. As shown in fig. 9B, the scan electrode 130 may include a shorting bar 70-1 and a shorting bar 70-2 formed on the third metal layer M3 in addition to the plurality of first metal lines formed on the first metal layer M1 and the plurality of second metal lines formed on the second metal layer M2.
Fig. 9B shows that each of the shorting bar 70-1 and the shorting bar 70-2 has an area corresponding to two first metal lines and is connected to the plurality of first metal lines through via holes. The same sweep signal inputted through each of the plurality of input pins 131 is transmitted to the entire sweep electrode 130 in an overlapping manner through the shorting bar 70-1 and the shorting bar 70-2 having a larger area (i.e., a low resistance component), and accordingly, the RC deviation of each region of the sweep electrode 130 can be more effectively reduced.
Further, by increasing the number of via holes formed between the shorting bars 70-1 and 70-2 and the first metal line, an effect equivalent to increasing the number of input pins to the scan electrode 130 can be obtained by the increased number of via holes.
Fig. 9B illustrates an example in which the input pin 131 is connected to the first metal line of the first metal layer M1, but the embodiment is not limited thereto. For example, at least one input pin may be connected to the shorting bar 70-1 and the shorting bar 70-2, and a sweep signal input through the input pin connected to the shorting bar 70-1 and the shorting bar 70-2 may be transmitted to the first metal line and the second metal line through the via hole.
That is, according to various embodiments of the present disclosure, at least one input pin may be connected to a first metal line, may be connected to a second metal line, or may be connected to a shorting bar. According to one embodiment, at least one input pin may be connected to the first metal line and the shorting bar, may be connected to the second metal line and the shorting bar, or may be connected to all of the first metal line, the second metal line, and the shorting bar.
Fig. 9A and 9B illustrate an example in which the shorting bar is formed on the third metal layer, but are not limited thereto. That is, as described above with respect to the third metal layer M3, the shorting bar may be formed on the fourth metal layer M4, and the ground Voltage (VSS) electrode and the pixel electrode are formed on the fourth metal layer M4.
In the above, the metal line having a relatively large area formed on the third metal layer M3 or the fourth metal layer M4 is referred to as a shorting bar, but the term shorting bar may be used without limitation.
That is, in some cases, regardless of the metal layer, the metal line directly connected to at least one input pin 131 and initially receiving the sweep signal from the input pin 131 may be referred to as a shorting bar.
For example, a metal line connected to the at least one input pin 131 among the plurality of first metal lines 50-1 to 50-n in the first metal layer M1 and the plurality of second metal lines 60-1 to 60-3 in the second metal layer M2 configuring the scan electrode 130 may also be referred to as a shorting bar.
According to one embodiment of the present disclosure, in the case where a plurality of scan signal input pins are provided, split type (split) driving may be performed by dividing a display panel into a plurality of scan blocks.
Specifically, according to one embodiment of the present disclosure, the sweep electrode 130 may be disposed in a plurality of block units. The number of the input pins 131 is more than one for each of the plurality of scan electrode blocks, and the plurality of input pins 131 may be symmetrically connected to each other.
Fig. 10 shows an example of the sweeping electrode divided into two blocks (a block and B block). As shown in fig. 10, the scan electrode 130 may include a plurality of first metal lines 50-1 to 50-n formed on the first metal layer M1, and a plurality of input pins 131 are spaced at regular intervals and connected to the first metal lines 50-1 and 50-n in the edge region, respectively. This is the same as that shown in fig. 8B.
However, fig. 10 shows that the second metal lines 60-1 to 60-6 formed on the second metal layer M2 are divided for each of the scan electrode blocks. That is, unlike the description in fig. 8B, fig. 10 shows that the second metal lines 60-1 to 60-3 are connected to the first metal lines through via holes in the a-block, and the second metal lines 60-4 to 60-6 are connected to the first metal lines through via holes in the B-block.
Accordingly, the scan electrodes 130 included in the a block and the B block are electrically separated from each other, the scan signal applied through the input pin 131 connected to the first metal line 50-1 included in the a block is not transmitted to the B block, and the scan signal applied through the input pin 131 connected to the first metal line 50-n included in the B block is not transmitted to the a block.
Accordingly, the driving unit 200 may perform the divided driving of the display panel 100 by providing the scan signals at different times in the scan electrode block unit via the input pins connected to each block.
Fig. 11A to 11D are views for describing operations related to the split type driving of the display panel 100.
Fig. 11A is a view showing a general PWM driving system. In general, when one image frame is displayed, the PWM driving system operates separately in a scan period for setting a PWM data voltage for each line and a light emitting period for allowing the light emitting elements to emit light according to the set PWM data voltage. At this time, the sweep signal is simultaneously applied to the entire area of the display panel during the light emitting period.
As described above, in the case where the scanning period and the light emitting period are separately performed for driving, it is difficult to secure a sufficient scanning time. Therefore, high-speed transmission of PWM data is required for peripheral circuits (e.g., TCON, data driver, etc.) for driving the PWM pixel circuits, which results in an increase in the cost of implementing the peripheral circuits.
Therefore, according to an embodiment of the present invention, when the display panel 100 is divided into a plurality of scan electrode block units and the divided driving of the display panel 100 is performed in the block units, the entire period of one frame may be used as a scan cycle. Therefore, the above-described problems can be solved.
Fig. 11B is a view illustrating an example of dividing the scan electrode 130 into two blocks and performing split type driving of the display panel 100 in the divided scan electrode block unit according to an embodiment of the present disclosure.
In the display panel 100 of fig. 11B, the scan electrode structure shown in fig. 10 may be used. As shown in fig. 11B, the B block operates in the light emitting period and the a block operates in the scanning period, and the B block operates in the scanning period and the a block operates in the light emitting period, and accordingly, the entire period of one image frame may be taken as the scanning period.
Fig. 11C illustrates an example of dividing the scan electrode 130 into three blocks and performing a split type driving of the display panel 100 in divided scan electrode block units according to another embodiment of the present disclosure. FIG. 11C also shows A, B and the scan period of the C block forming the entire time of one image frame.
As described above, when the scan period is increased, for example, the data transfer speed from the TCON to the data driver can be reduced, thereby reducing the circuit cost.
The display panel 100 of fig. 11B and 11C shows that the number of the scan input pins 131 is more than one and the scan input pins 131 are arranged symmetrically to each other. The driving unit 200 may provide the sweeping signals in the sweeping electrode block unit at different times through the input pin 131 connected to each of the division blocks.
Fig. 11D is a split type driving schematic diagram of a sweep electrode block according to yet another embodiment of the present disclosure. At the time of 2-minute driving shown in fig. 11B, in the case where driving is performed by setting each duty ratio of the scanning period and the light emitting period to 50%, flicker may occur.
Therefore, according to the embodiment of the present disclosure, as shown in fig. 11D, by setting the duty ratio of the scanning period to 29% and the duty ratio of the light emitting period to 71%, the driving operation is performed within one frame period, and thus, a certain portion of the light emitting period between two blocks may overlap, thereby eliminating the possibility of occurrence of flicker.
Fig. 12 is a configuration diagram of a display device according to an embodiment of the present disclosure. Referring to fig. 12, the display apparatus 1200 includes a display panel 100, a panel driving unit 800, and a processor 900.
The display panel 100 may include a plurality of inorganic light emitting elements 110 constituting a plurality of sub-pixels, and a plurality of pixel circuits 120 and 150 for driving each of the inorganic light emitting elements 110.
Specifically, in the display panel 100, the gate lines G1 to Gn and the data lines D1 to Dm are formed to cross each other, and the pixel circuits 120 and 150 may be formed as regions provided by the crossing. For example, each of the plurality of pixel circuits 120 and 150 may be configured such that the adjacent R, G and B sub-pixels constitute one pixel, but is not limited thereto.
In particular, the display panel 100 may include the scan electrode 130 according to the various embodiments described above. At least one input pin 131 may be connected to the scan electrode 130, and the scan signal input through the input pin 130 is transmitted to the plurality of PWM pixel circuits 120 through the scan electrode 130.
The number of input pins may vary according to the size of the display panel 100.
The panel driving unit 800 may drive the display panel 100, more particularly, each of the plurality of pixel circuits 120 and 150 according to the control of the processor 900, and the panel driving unit 800 may include a timing controller 810, a data driving unit 820, a gate driving unit 830, and a sweep signal providing circuit (not shown).
The timing controller 810 may receive an Input Signal (IS), a horizontal synchronization signal (Hsync), a vertical synchronization signal (Vsync), and a main clock signal (MCLK), generate an image data signal, a scan control signal, a data control signal, a light emission control signal, etc., and supply the signals to the display panel 100, the display driving unit 820, the gate driving unit 830, the sweep signal supply circuit (not shown), etc.
In particular, the timing controller 810 may apply various control signals to the pixel circuits 120 and 150 according to various embodiments of the present disclosure. Further, according to one embodiment, the timing controller 810 may apply a control signal (MUX Sel R, G, B) for selecting one sub-pixel from R, G and B sub-pixels to the display panel 100.
The data driving unit 820 (or a source driver or a data driver) is a unit for generating a data signal, receives image data of R/G/B components and the like from the processor 900, and generates data voltages (e.g., a PWM data voltage and a PAM data voltage). In addition, the data driving unit 820 may apply the generated data signal to the display panel 100.
The gate driving unit 830 (or gate driver) is a unit for generating various control signals, for example, a sweep signal for selecting pixels arranged in a matrix form for each line, and transmitting the generated various control signals to a certain line (or a certain horizontal line) or all lines of the display panel 100.
In addition, according to one embodiment, the gate driving unit 830 may apply a driving Voltage (VDD) to driving voltage terminals of the pixel circuits 120 and 150.
The scan signal supply circuit (not shown) may supply the scan signal to the scan electrode 130 through at least one input pin connected to the scan electrode 130 of the display panel 100.
The data driving unit 820, the gate driving unit 830, and the sweep signal supplying circuit (not shown) may constitute the driving unit 200 as described above. As described above, both or one of the data driving unit 820 and the gate driving unit 830 may be implemented to be included in the TFT layer 40, the TFT layer 40 being formed on one surface of the substrate 30 of the display panel 100, or both or one of the data driving unit 820 and the gate driving unit 830 may be implemented as a separate semiconductor IC and disposed on the other surface of the substrate 30. The sweep signal supply circuit (not shown) may be provided on the main PCB as a separate IC together with the timing controller 810 or the processor 900, but the implementation example is not limited thereto.
One display module 1000 including the display panel 100 and the driving unit 200 may constitute one display apparatus 1200. In addition, according to an embodiment, a combination of a plurality of display modules 1000 may constitute one display apparatus 1200.
The processor 900 controls the overall operation of the display apparatus 1200. Specifically, the processor 900 may control the panel driving unit 800 to drive the display panel 100.
To this end, the processor 900 may be implemented as one or more of a Central Processing Unit (CPU), a microcontroller, an Application Processor (AP), or a Communication Processor (CP) and an ARM processor.
In fig. 12, the processor 900 and the timing controller 810 are described as separate components, but according to one embodiment, the timing controller 810 may perform the functions of the processor 900 without the processor 900.
Fig. 13 is a flowchart illustrating a driving method of the display module 1000 according to an embodiment of the present disclosure. In the description of fig. 13, detailed description of the above-described duplicated portions will be omitted.
The display module 1000 may include a display panel 100 having an inorganic light emitting element 110, a scan electrode 130 connected to at least one input pin 131, and a PWM pixel circuit 120. The number of the input pins 131 may vary according to the size of the display panel 100.
Specifically, in the case where the display panel 100 has a first size, a first number of input pins 131 may be provided, and in the case where the display panel 100 has a second size larger than the first size, a second number of input pins 131, which is larger than the first number, may be provided.
Referring to fig. 13, the display module 1000 may set a PWM data voltage in the gate terminal of the driving transistor 121 included in the PWM pixel circuit 120 (S1310).
Hereinafter, the display module 1000 may provide a scan signal to the scan electrode 130 through the at least one input pin 131 (S1320).
Accordingly, when the sweep signal is applied to the PWM pixel circuit 120 through the sweep electrode 130, the display module 1000 may change the voltage of the gate terminal of the driving transistor 121 according to the sweep signal and supply the driving current having the pulse width corresponding to the set PWM data voltage to the inorganic light emitting element 110 (S1330).
According to an embodiment of the present disclosure, the scan electrodes 130 may be disposed in a plurality of block units and the plurality of input pins 131 may be connected to the scan electrode block symmetrically to each other. In this case, the display module 1000 may provide the sweeping signals in the sweeping electrode block unit at different times through the input pin 131 connected to each block.
As described above, according to various embodiments of the present disclosure, a scan electrode structure capable of uniformly providing a scan signal may be provided. Accordingly, it is possible to solve the problem of the luminance deviation due to the deviation of the RC load in the scan electrode in the display module.
In addition, due to the increase of the scanning period (i.e., the data setting period), high-speed data transmission of the peripheral circuit is not required, thereby reducing the cost for constructing the peripheral circuit.
Meanwhile, various embodiments of the present disclosure may be implemented as software including instructions stored in a machine (e.g., computer) readable storage medium. The machine herein is a device that calls instructions stored in a storage medium and operates according to the called instructions, and may include a display device 1200, the display device 1200 including various display modules 1000 according to the above-described embodiments.
In the case of instructions being executed by a processor, the processor may perform functions corresponding to the instructions either directly or using other elements under the control of the processor. The instructions may include code generated by a compiler or executed by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, "non-transitory" simply means that the storage medium is tangible, does not contain a signal, and does not distinguish whether data is semi-permanently or temporarily stored in the storage medium.
According to one embodiment, a method according to various embodiments of the present disclosure may be provided for inclusion in a computer program product. The computer program product may be exchanged between the seller and the buyer as a commercially available product. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read only memory (CD-ROM)) or distributed online through an application store (e.g., PlayStore (TM)). In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily generated in a storage medium (e.g., a memory of a manufacturer's server, a server of an application store, or a relay server).
Each element (e.g., module or program) according to various embodiments may be composed of a single entity or multiple entities, and some of the sub-elements described above may be omitted. These elements may further be included in various embodiments. Alternatively or additionally, some elements (e.g., modules or programs) may be integrated into one entity to perform the same or similar functions by each respective element before integration. Operations performed by a module, program, or other element may, in accordance with various embodiments, be performed sequentially in a parallel, repetitive, or heuristic manner, or at least some operations may be performed in a different order, omitted, or different operations may be added.
The above description is merely illustrative of the technical spirit of the present disclosure, and it will be understood by those skilled in the art that various changes and modifications may be made to the present disclosure without departing from the spirit and scope of the present disclosure. In addition, the embodiments according to the present disclosure are not intended to be limiting but to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. Therefore, the scope of the present disclosure should be construed in accordance with the appended claims, and all technical spirit within the equivalent scope falls within the scope of the appended claims.

Claims (15)

1. A display module, comprising:
a display panel including an inorganic light emitting device, a scan electrode connected to at least one input pin, and a Pulse Width Modulation (PWM) pixel circuit; and
a drive unit configured to provide a sweeping signal to the sweeping electrode through the at least one input pin,
wherein the PWM pixel circuit includes a driving transistor, and supplies a driving current having a pulse width corresponding to a data voltage to the inorganic light emitting device by varying a voltage of a gate terminal of the driving transistor according to the scan signal applied through the scan electrode, and
wherein the number of the at least one input pin varies according to the size of the display panel.
2. The module of claim 1, wherein a first number of input pins are provided in the display panel as the at least one input pin based on a first size of the display panel, and a second number of input pins larger than the first number are provided in the display panel based on a second size of the display panel larger than the first size.
3. The module of claim 1, wherein the driving unit provides the same sweeping signal through each of the plurality of input pins spaced at regular intervals based on the at least one input pin connected to the sweeping electrode being a plurality of input pins.
4. The module of claim 1, wherein the display panel has a stacked structure including a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer,
wherein the first metal layer comprises a gate terminal of the driving transistor,
wherein the second metal layer includes a source terminal and a drain terminal of the driving transistor,
wherein the third metal layer comprises electrodes for providing a drive voltage to the PWM pixel circuits, an
Wherein the fourth metal layer includes an electrode for connecting the PWM pixel circuit and the inorganic light emitting device to each other.
5. The module of claim 4, wherein the sweeping electrode comprises: a plurality of first metal lines disposed on the first metal layer; and a plurality of second metal lines disposed on the second metal layer and connecting the plurality of first metal lines to each other, an
Wherein a gate terminal of the driving transistor is connected to a metal line of the plurality of first metal lines.
6. The module of claim 5, wherein the at least one input pin is connected with at least one of the plurality of first metal lines and the plurality of second metal lines disposed in an edge region.
7. The module of claim 5, wherein the scan electrode further comprises a shorting bar disposed on at least one of the third and fourth metal layers and connected to at least one of the plurality of first metal lines through at least one via hole.
8. The module of claim 7, wherein the shorting bar is disposed in an edge region of at least one of the third and fourth metal layers and is connected to a metal line of the plurality of first metal lines disposed in the edge region through the via hole, and
wherein the at least one input pin is connected with the shorting bar disposed in the edge region.
9. The module of claim 7, wherein a size of the shorting bar is greater than a size of each of the plurality of first metal lines.
10. The module of claim 1, wherein the scan electrodes are disposed in a plurality of block units,
wherein a plurality of input pins are provided and connected to each of the plurality of scan electrode blocks symmetrically with each other, an
Wherein the driving unit provides the sweeping signal in the sweeping electrode block unit at different times through the plurality of input pins connected to each block.
11. A method of driving a display module comprising a display panel including an inorganic light emitting device, a scan electrode connected to at least one input pin, and a pulse width modulation, PWM, pixel circuit, the method comprising:
setting a data voltage to a gate terminal of a driving transistor included in the PWM pixel circuit;
providing a sweeping signal to the sweeping electrode through the at least one input pin; and
supplying a driving current having a pulse width corresponding to the set data voltage to the inorganic light emitting device by changing a voltage of a gate terminal of the driving transistor according to the scan signal based on the scan signal applied to the PWM pixel circuit through the scan electrode,
wherein the number of the at least one input pin varies according to the size of the display panel.
12. The method of claim 11, wherein a first number of input pins are provided in the display panel as the at least one input pin based on a first size of the display panel, and a second number of input pins larger than the first number are provided in the display panel based on a second size of the display panel larger than the first size.
13. The method of claim 11, wherein providing a sweep signal comprises: providing the same sweeping signal through each of the plurality of input pins spaced at regular intervals based on the at least one input pin connected with the sweeping electrode being a plurality of input pins.
14. The method of claim 11, wherein the display panel has a stacked structure including a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer,
wherein the first metal layer comprises a gate terminal of the driving transistor,
the second metal layer includes a source terminal and a drain terminal of the driving transistor,
the third metal layer includes an electrode for supplying a driving voltage to the PWM pixel circuit, an
The fourth metal layer includes an electrode for connecting the PWM pixel circuit and the inorganic light emitting device to each other.
15. The method of claim 14, wherein the sweeping electrode comprises: a plurality of first metal lines disposed on the first metal layer; and a plurality of second metal lines disposed on the second metal layer and connecting the plurality of first metal lines to each other,
wherein a gate terminal of the driving transistor is connected to a metal line of the plurality of first metal lines.
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