CN114627793A - Array substrate, display panel and display device - Google Patents

Array substrate, display panel and display device Download PDF

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Publication number
CN114627793A
CN114627793A CN202210359224.6A CN202210359224A CN114627793A CN 114627793 A CN114627793 A CN 114627793A CN 202210359224 A CN202210359224 A CN 202210359224A CN 114627793 A CN114627793 A CN 114627793A
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sub
pixel
pixels
color
row
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CN114627793B (en
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陈艳玲
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TCL Huaxing Photoelectric Technology Co Ltd
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TCL Huaxing Photoelectric Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2074Display of intermediate tones using sub-pixels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0666Adjustment of display parameters for control of colour parameters, e.g. colour temperature

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The application relates to an array substrate, a display panel and a display device. The array substrate comprises a display area and a non-display area: the display area is provided with a plurality of sub-pixels which are arranged in an N-row array, the sub-pixels in each row are repeatedly arranged according to a preset sub-pixel color sequence from top to bottom, and the sub-pixels in each row have the same color; a GOA circuit comprising M scanning circuits is arranged in the non-display area; sequentially combining every three rows of sub-pixels with different colors into line pixel combination units according to a sub-pixel color sequence preset from top to bottom to obtain L line pixel combination units; the M scanning circuits are electrically connected with the L row pixel combination units in a one-to-one correspondence manner; when each frame is driven, any K scanning circuits in the M scanning circuits are controlled to output scanning pulse signals, so that the sub-pixels in 3K rows are charged, the charging time of each sub-pixel is increased, the charging time is prolonged while the refresh rate is ensured, and the problem of color cast caused by insufficient charging rate is solved.

Description

Array substrate, display panel and display device
Technical Field
The present application relates to the field of display processing technologies, and in particular, to an array substrate, a display panel, and a display device.
Background
The lcd is a widely used flat panel display, and two driving schemes commonly used in the lcd are: a Normal (Normal) drive architecture and a Tri-gate (Tri-gate) drive architecture. The horizontal direction of the driving structure is scanning lines G1, G2, G3, etc., and the vertical direction is data lines D1, D2, D3, etc. In the Tri-Gate (Tri-Gate) driving scheme, the number of Data lines is reduced to 1/3 of the Normal (Normal) driving scheme, and the number of scan lines is increased by 3 times of the Normal driving scheme, so the width and charging time of each Gate pulse (Gate pulse) of the Tri-Gate driving scheme are respectively reduced to 1/3 of the Normal driving scheme.
In the prior art, when a two-color mixed picture is displayed, the charging rate of a pixel driven later is high, and the charging rate of a pixel driven earlier is low, so that the charging rate is insufficient due to progressive scanning, and the picture has color cast or uneven display.
Disclosure of Invention
Therefore, it is necessary to provide an array substrate, a display panel, and a display device, which can improve the charging time of each frame of the display panel, improve the color shift of the display panel due to insufficient charging rate, and improve the display effect, for solving the problems of insufficient charging rate of the pixels driven later and insufficient charging rate of the pixels driven earlier when displaying the two-color mixed picture, and color shift or display unevenness of the picture.
In a first aspect, the present application provides an array substrate, including:
the display device comprises a display area, a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, wherein the display area is provided with a plurality of sub-pixels, each sub-pixel is arranged in an N-row array, N is a natural number greater than 2, each sub-pixel comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, each sub-pixel is electrically connected with a scanning line and a data line, the sub-pixels in each row are repeatedly arranged according to a preset sub-pixel color sequence from top to bottom, and the sub-pixels in each row are the same in color;
the non-display area is provided with a GOA circuit, the GOA circuit comprises M scanning circuits, and M is a natural number which is greater than 0 and less than or equal to one third of N;
sequentially combining every three rows of sub-pixels with different colors into line pixel combination units according to a sub-pixel color sequence preset from top to bottom to obtain L line pixel combination units; the M scanning circuits are electrically connected with the L row pixel combination units in a one-to-one correspondence manner; when each frame is driven, controlling any K scanning circuits in the M scanning circuits to output scanning pulse signals so as to charge the sub-pixels in the 3K rows; k is a natural number greater than 0 and less than M +1, and L is a natural number greater than 0 and less than or equal to one-third of N.
Optionally, the sub-pixel includes a pixel electrode and a thin film transistor;
the grid electrode of the thin film transistor is connected with the corresponding scanning line, the drain electrode of the thin film transistor is connected with the corresponding data line, and the source electrode of the thin film transistor is connected with the pixel electrode.
Optionally, the first color sub-pixel is a red sub-pixel, the second color sub-pixel is a blue sub-pixel, and the third color sub-pixel is a blue sub-pixel.
Optionally, K is 1.
Optionally, the red sub-pixels, the green sub-pixels and the blue sub-pixels are arranged from top to bottom according to a preset color sequence of the sub-pixels.
Optionally, the color sequence of the sub-pixels from top to bottom is a green sub-pixel, a red sub-pixel and a blue sub-pixel.
Optionally, the red sub-pixels, the blue sub-pixels and the green sub-pixels are arranged from top to bottom according to a preset color sequence of the sub-pixels.
In a second aspect, the present application provides a display panel including the array substrate as described in any one of the above.
In a third aspect, the present application provides a display device comprising the display panel as described above.
Optionally, the display panel is an LCD display panel with a resolution of 4K, an LCD display panel with a resolution of 8K, or an LCD display panel with a resolution of 16K.
One of the above technical solutions has the following advantages and beneficial effects:
in the array substrate, a plurality of sub-pixels are arranged in a display area, each sub-pixel is arranged in an N-row array, N is a natural number greater than 2, each sub-pixel comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, each sub-pixel is electrically connected with a scanning line and a data line, the sub-pixels in each row are repeatedly arranged from top to bottom according to a preset sub-pixel color sequence, and the sub-pixels in each row are the same in color; a GOA circuit is arranged in the non-display area and comprises M scanning circuits, wherein M is a natural number which is more than 0 and less than or equal to one third of N; sequentially combining every three rows of sub-pixels with different colors into line pixel combination units according to a sub-pixel color sequence preset from top to bottom to obtain L line pixel combination units; the M scanning circuits are electrically connected with the L row pixel combination units in a one-to-one correspondence manner; when each frame is driven, controlling any K scanning circuits in the M scanning circuits to output scanning pulse signals so as to charge the sub-pixels in the 3K rows; k is a natural number which is more than 0 and less than M +1, L is a natural number which is more than 0 and less than or equal to N-thirds, so that the 1H time of each frame is increased by M/K times, the charging time of each sub-pixel is increased, the charging time is increased while the refresh rate is ensured, the problem of color cast of the display panel caused by insufficient charging rate is solved, and the display effect is improved.
Drawings
The foregoing and other objects, features and advantages of the application will be apparent from the following more particular description of preferred embodiments of the application, as illustrated in the accompanying drawings. Like reference numerals refer to like parts throughout the drawings, and the drawings are not intended to be drawn to scale in actual dimensions, emphasis instead being placed upon illustrating the subject matter of the present application.
Fig. 1 is a schematic view of a first structure of an array substrate according to an embodiment of the present disclosure.
Fig. 2 is a schematic view of a second structure of the array substrate in the embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be used. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In this application, the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation.
Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
In addition, the term "plurality" shall mean two as well as more than two.
It should be noted that, in the present application, the embodiments and features of the embodiments may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
Since the number of Data lines (Data lines) in the Tri-Gate (Tri-Gate) driving scheme is reduced to 1/3 of the Normal (Normal) driving scheme and the number of scan lines (Gate lines) is increased to 3 times of the Normal driving scheme, the width and charging time of each Gate pulse (Gate pulse) in the Tri-Gate driving scheme are reduced to 1/3 of the Normal driving scheme, respectively. When the second mixed color picture is displayed, the charging rate of the next pixel is higher, and the charging rate of the previous pixel is lower, which can cause the problem of color cast or uneven display of the picture caused by insufficient charging rate caused by progressive scanning. Especially for high-resolution display devices, such as 8K and 16K display devices, the problem of color cast is more obvious because of the shorter charging time and the larger RC loading (resistive loading in screen).
This application is through dividing into M scanning circuit with the GOA circuit according to pixel equidistant, at each frame, arbitrary scanning circuit output scanning pulse signal among the control M scanning circuit for only 3K row sub-pixel charges in each frame, thereby make the 1H time increase M times of each frame, the charge time of every sub-pixel also increases thereupon, thereby can realize when guaranteeing the refresh rate, promote the charge time, improve the display panel colour cast problem.
In one embodiment, as shown in fig. 1, there is provided an array substrate including: a display area 10 and a non-display area. The display area 10 is provided with a plurality of sub-pixels 102, each sub-pixel 102 is arranged in an N-row array, N is a natural number greater than 2, each sub-pixel 102 comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, each sub-pixel 102 is electrically connected with a scanning line and a data line, the sub-pixels 102 in each row are repeatedly arranged from top to bottom according to a preset sub-pixel color sequence, and the sub-pixels 102 in each row have the same color; the non-display area is provided with a GOA circuit 210, the GOA circuit 210 comprises M scanning circuits 202, and M is a natural number which is greater than 0 and less than or equal to one third of N; sequentially combining every three rows of sub-pixels 102 with different colors into a row pixel combination unit according to a preset color sequence of the sub-pixels 102 from top to bottom to obtain L row pixel combination units; the M scanning circuits 202 are electrically connected with the L column pixel combination units in a one-to-one correspondence manner; when each frame is driven, any K scanning circuits 202 in the M scanning circuits 202 are controlled to output scanning pulse signals, so that the sub-pixels in 3K rows are charged; k is a natural number greater than 0 and less than M +1, and L is a natural number greater than 0 and less than or equal to one-third of N.
The array substrate may include a display region 10 and a non-display region. The display area 10 refers to a pixel display area (i.e., an AA area), a plurality of sub-pixels 102 are disposed in the display area 10, and each sub-pixel 102 is arranged in an array to form an array having N (N is a natural number greater than 2) rows.
In each of the sub-pixels 102 arranged in an array, each sub-pixel 102 is electrically connected to a scan line and a data line, the sub-pixels 102 in each column are repeatedly arranged from top to bottom according to a preset color sequence of the sub-pixels 102, and the sub-pixels 102 in each row have the same color. Illustratively, the scan lines are laterally arranged scan lines, which can be used to provide turn-on and turn-off voltages to the thin film transistors. The data lines are longitudinally arranged scanning lines and can be used for conveying display contents to the pixel electrodes. In the pixel array, the sub-pixels 102 in the same row are connected to the same scanning line, and the sub-pixels 102 in the same column are connected to the same data line. It should be noted that each of the sub-pixels 102 arranged in an array may include a plurality of first color sub-pixels, a plurality of second color sub-pixels, and a plurality of third color sub-pixels, and the number of the first color sub-pixels, the number of the second color sub-pixels, and the number of the third color sub-pixels are the same.
The non-display area may be located at the periphery of the display area 10, and a Gate Driver on array (GOA) circuit 210 is disposed in the non-display area. The GOA circuit 210 can be applied to an active liquid crystal display panel, and it should be noted that the driving of the horizontal scanning lines of the active liquid crystal display panel is mainly performed by an external IC of the panel, and the external IC can control the charging and discharging of the horizontal scanning lines of each level step by step. In the present application, the GOA circuit 210 is adopted, so that the driving circuit of the horizontal scanning line can be fabricated on the substrate around the display area by using the original process of the liquid crystal display panel, and the driving circuit can replace an external IC to complete the driving of the horizontal scanning line. The bonding process of the external IC can be reduced based on the GOA circuit 210, which can improve the productivity and reduce the product cost, and the lcd panel can be more suitable for manufacturing narrow-frame or frameless display products.
The GOA circuits 210 are respectively connected to the scan lines in the pixel array. The GOA circuits 210 can be equally spaced into M (M is a natural number greater than 0 and less than or equal to one-third of N) scan circuits 202 based on the pixel array. Based on the color sequence of the sub-pixels 102 preset in the pixel array from top to bottom, each three rows of sub-pixels 102 with different colors are sequentially combined into a row pixel combination unit to obtain L (L is a natural number greater than 0 and less than or equal to N-thirds) row pixel combination units, and then three scanning lines of the corresponding row pixel combination units can be connected to the corresponding scanning circuits 202, i.e., the M scanning circuits 202 and the L row pixel combination units are electrically connected in a one-to-one correspondence manner, and further, when each frame is driven, any K (K is a natural number greater than 0 and less than M + 1) scanning circuits 202 in the M scanning circuits 202 are controlled to output scanning pulse signals to charge the corresponding 3K rows of sub-pixels, so that the 1H time of each frame is increased by M times, the charging time of each sub-pixel is also increased, and the refresh rate is ensured, the charging time is prolonged, and the color cast problem of the display panel is improved.
In the above embodiment, the display region 10 is provided with the plurality of sub-pixels 102, each sub-pixel 102 is arranged in an N-row array, each sub-pixel 102 is electrically connected to a scan line and a data line, the sub-pixels 102 in each row are repeatedly arranged from top to bottom according to a preset color sequence of the sub-pixels 102, and the sub-pixels 102 in each row have the same color; a GOA circuit 210 is disposed in the non-display area, where the GOA circuit 210 includes M scanning circuits 202, where M is a natural number greater than 0 and less than or equal to one-third of N; sequentially combining every three rows of sub-pixels 102 with different colors into a row pixel combination unit according to the color sequence of the sub-pixels 102 preset from top to bottom to obtain L row pixel combination units; the M scanning circuits 202 are electrically connected with the L row pixel combination units in a one-to-one correspondence manner; during driving of each frame, controlling any K scanning circuits 202 in the M scanning circuits 202 to output scanning pulse signals so as to charge the sub-pixels 102 in 3K rows; k is a natural number which is more than 0 and less than M +1, L is a natural number which is more than 0 and less than or equal to N-thirds, so that the 1H time of each frame is increased by M/K times, the charging time of each sub-pixel 102 is increased, the refresh rate is ensured, the charging time is prolonged, the problem of color cast of the display panel caused by insufficient charging rate is solved, and the display effect is improved.
In one embodiment, as shown in fig. 2, the sub-pixel includes a pixel electrode and a thin film transistor; the grid electrode of the thin film transistor is connected with the corresponding scanning line, the drain electrode of the thin film transistor is connected with the corresponding data line, and the source electrode of the thin film transistor is connected with the pixel electrode.
The pixel electrode is used for receiving display contents transmitted by the data line so as to enable corresponding liquid crystal molecules to emit light for display. A Thin Film Transistor (TFT) is a special type of Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Each sub-pixel corresponds to a thin film transistor, the grid electrode of the thin film transistor is connected with a corresponding scanning line, the drain electrode of the thin film transistor is connected with a corresponding data line, the source electrode of the thin film transistor is connected with a pixel electrode, sufficient voltage is applied to the scanning line, all TFTs on the line are turned on, at the moment, the pixel electrode on the horizontal scanning line is connected with the data line in the vertical direction, and therefore display signal voltage on the data line is written into the pixel, and the light transmittance of different liquid crystals is controlled, so that the light emission of different sub-pixels is controlled.
Illustratively, when each frame is driven, any K scanning circuits in the M scanning circuits are controlled to output scanning pulse signals, and then the scanning pulse signals are transmitted to corresponding sub-pixels in 3K rows through corresponding scanning lines, so that thin film transistors corresponding to the sub-pixels in 3K rows are turned on, display contents are transmitted to pixel electrodes through the turned-on thin film transistors by data lines, corresponding liquid crystal molecules are driven to work through the pixel electrodes, and then the corresponding sub-pixels emit light, so that the 1H time of each frame is increased by M/K times, the charging time of each sub-pixel is increased, the refresh rate is guaranteed, the charging time is prolonged, the problem of color cast of a display panel caused by insufficient charging rate is solved, and the display effect is improved.
In one embodiment, the first color sub-pixel is a red sub-pixel, the second color sub-pixel is a green sub-pixel, and the third color sub-pixel is a blue sub-pixel.
The red sub-pixel refers to a sub-pixel capable of generating red bright light, the green sub-pixel refers to a sub-pixel capable of generating green bright light, and the blue sub-pixel refers to a sub-pixel capable of generating blue bright light.
In one example, the red sub-pixel, the green sub-pixel and the blue sub-pixel are arranged in a preset sub-pixel color sequence from top to bottom. For example, among the sub-pixels arranged in an array, the first row is a red sub-pixel, the second row is a green sub-pixel, the third row is a blue sub-pixel, the fourth row is a red sub-pixel, the fifth row is a green sub-pixel, the sixth row is a blue sub-pixel … …, and so on, so that the sub-pixels in each column are repeatedly arranged according to a preset sub-pixel color sequence from top to bottom, and the sub-pixels in each row have the same color. In the pixel array, each red sub-pixel is respectively and electrically connected with a scanning line and a data line, each green sub-pixel is respectively and electrically connected with a scanning line and a data line, each blue sub-pixel is respectively and electrically connected with a scanning line and a data line, each sub-pixel in the same row is respectively and electrically connected with the same scanning line, and each sub-pixel in the same column is respectively and electrically connected with the same data line.
The GOA circuit is equally spaced into M scanning circuits based on the pixel array. Based on the color sequence of the sub-pixels preset in the pixel array from top to bottom, sequentially combining every three rows of sub-pixels with different colors into a row pixel combination unit to obtain L row pixel combination units, namely, each row pixel combination unit consists of a row of red sub-pixels, a row of green sub-pixels and a row of blue sub-pixels, and M scanning circuits are electrically connected with the L row pixel combination units in a one-to-one correspondence manner, so that when each frame is driven, any K scanning circuits in the M scanning circuits are controlled to output scanning pulse signals, and the corresponding 3K row sub-pixels are charged, so that the 1H time of each frame is increased by M/K times, the charging time of each sub-pixel is increased, the refresh rate is ensured, the charging time is prolonged, and the color cast problem of a display panel is improved.
In one example, the green sub-pixel, the red sub-pixel and the blue sub-pixel are arranged in a preset sub-pixel color order from top to bottom. For example, among the sub-pixels arranged in an array, the first row is a green sub-pixel, the second row is a red sub-pixel, the third row is a blue sub-pixel, the fourth row is a green sub-pixel, the fifth row is a red sub-pixel, the sixth row is a blue sub-pixel … …, and so on, so that the sub-pixels in each column are repeatedly arranged according to a preset sub-pixel color sequence from top to bottom, and the sub-pixels in each row have the same color. In the pixel array, each red sub-pixel is respectively and electrically connected with a scanning line and a data line, each green sub-pixel is respectively and electrically connected with a scanning line and a data line, each blue sub-pixel is respectively and electrically connected with a scanning line and a data line, each sub-pixel in the same row is respectively and electrically connected with the same scanning line, and each sub-pixel in the same column is respectively and electrically connected with the same data line. Through M scanning circuits and L row pixel combination units which are electrically connected in a one-to-one correspondence mode, when each frame is driven, any K scanning circuits in the M scanning circuits are controlled to output scanning pulse signals, so that corresponding 3K row sub-pixels are charged, the 1H time of each frame is increased by M/K times, the charging time of each sub-pixel is increased, the refresh rate is guaranteed, the charging time is prolonged, and the color cast problem of a display panel is improved.
In one example, the red sub-pixel, the blue sub-pixel and the green sub-pixel are arranged in the preset sub-pixel color sequence from top to bottom. For example, among the sub-pixels arranged in an array, the first row is a red sub-pixel, the second row is a blue sub-pixel, the third row is a green sub-pixel, the fourth row is a red sub-pixel, the fifth row is a blue sub-pixel, the sixth row is a green sub-pixel … …, and so on, so that the sub-pixels in each column are repeatedly arranged according to a preset sub-pixel color sequence from top to bottom, and the sub-pixels in each row have the same color. In the pixel array, each red sub-pixel is respectively and electrically connected with a scanning line and a data line, each green sub-pixel is respectively and electrically connected with a scanning line and a data line, each blue sub-pixel is respectively and electrically connected with a scanning line and a data line, each sub-pixel in the same row is respectively and electrically connected with the same scanning line, and each sub-pixel in the same column is respectively and electrically connected with the same data line. Through the one-to-one electrical connection of the M scanning circuits and the L row pixel combination units, when each frame is driven, any K scanning circuits in the M scanning circuits are controlled to output scanning pulse signals, so that the corresponding 3K row sub-pixels are charged, the 1H time of each frame is increased by M/K times, the charging time of each sub-pixel is increased, the refresh rate is guaranteed, the charging time is prolonged, and the color cast problem of a display panel is improved.
It should be noted that, the color sequence of the sub-pixels from top to bottom may also be a green sub-pixel, a blue sub-pixel and a red sub-pixel; the color sequence of the sub-pixels can be blue sub-pixels, green sub-pixels and red sub-pixels according to the preset color sequence of the sub-pixels from top to bottom; the color sequence of the sub-pixels from top to bottom can be blue sub-pixels, red sub-pixels and green sub-pixels.
In one embodiment, a plurality of sub-pixels are arranged in a display area, each sub-pixel is arranged in an N-row array, each sub-pixel comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, each sub-pixel is electrically connected with a scanning line and a data line, the sub-pixels in each row are repeatedly arranged from top to bottom according to a preset sub-pixel color sequence, and the sub-pixels in each row have the same color; the method comprises the steps that a GOA circuit is arranged in a non-display area, the GOA circuit is divided into M scanning circuits at equal intervals according to pixels, and every three rows of sub-pixels with different colors are sequentially formed into line pixel combination units according to a sub-pixel color sequence preset from top to bottom to obtain L line pixel combination units; the M scanning circuits are electrically connected with the L row pixel combination units in a one-to-one correspondence manner; when each frame is driven, any 1 scanning circuit in the M scanning circuits is controlled to output scanning pulse signals, so that 1 row of pixel combination units (namely corresponding 3 rows of sub-pixels) are charged, the 1H time of each frame is increased by M times, the charging time of each sub-pixel is increased, the charging time is increased while the refresh rate is ensured, the problem of color cast of a display panel due to insufficient charging rate is solved, and the display effect is improved.
In the above embodiment, the GOA circuit is equally divided into M scanning circuits, and 3 rows of RGB sub-pixels are turned on every 3(M-1) rows in each frame, so that the charging time of each frame is increased while the same refresh rate is ensured, thereby reducing the color chip problem caused by insufficient charging rate.
In one embodiment, a display panel is further provided, which includes the array substrate as described above.
The specific content process of the array substrate can refer to the above content, and is not described herein again.
In an example, the display panel further includes a color film substrate and a liquid crystal layer. The liquid crystal layer is arranged between the array substrate and the color film substrate. Liquid crystal molecules are arranged in the liquid crystal layer, and when the liquid crystal layer is electrified, the liquid crystal molecules of the corresponding part in the liquid crystal layer work under the action of voltage on the upper electrode plate and the lower electrode plate, so that light rays emitted by the light emitting source in the bottom layer light emitting module can penetrate through gaps among the liquid crystal molecules to be emitted. The color film substrate comprises a substrate and a color filter positioned on the substrate, and the three primary colors of red (R), green (G) and blue (B) are filtered out through the color filter.
The array substrate comprises an array substrate, a plurality of sub-pixels and a plurality of data lines, wherein the plurality of sub-pixels are arranged in a display area of the array substrate, each sub-pixel is arranged in an N-row array, N is a natural number greater than 2, each sub-pixel comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, each sub-pixel is electrically connected with one scanning line and one data line, the sub-pixels in each row are repeatedly arranged from top to bottom according to a preset sub-pixel color sequence, and the sub-pixels in each row are identical in color; a GOA circuit is arranged in a non-display area of the array substrate and comprises M scanning circuits, wherein M is a natural number which is more than 0 and less than or equal to one third of N; sequentially combining every three rows of sub-pixels with different colors into line pixel combination units according to a sub-pixel color sequence preset from top to bottom to obtain L line pixel combination units; the M scanning circuits are electrically connected with the L row pixel combination units in a one-to-one correspondence manner; when each frame is driven, controlling any K scanning circuits in the M scanning circuits to output scanning pulse signals so as to charge the sub-pixels in the 3K rows; k is a natural number which is more than 0 and less than M +1, L is a natural number which is more than 0 and less than or equal to N-thirds, so that the 1H time of each frame is increased by M/K times, the charging time of each sub-pixel is increased, the charging time is increased while the refresh rate is ensured, the problem of color cast of the display panel caused by insufficient charging rate is solved, and the display effect is improved.
In one embodiment, a display device is provided. The display device may be, but is not limited to, various LCD display panels with a resolution of 4K, 8K, or 16K. The display device includes a display panel. The display panel comprises the array substrate in the embodiments.
The array substrate comprises an array substrate, a plurality of sub-pixels and a plurality of data lines, wherein the plurality of sub-pixels are arranged in a display area of the array substrate, each sub-pixel is arranged in an N-row array, N is a natural number greater than 2, each sub-pixel comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, each sub-pixel is electrically connected with one scanning line and one data line, the sub-pixels in each row are repeatedly arranged from top to bottom according to a preset sub-pixel color sequence, and the sub-pixels in each row are identical in color; a GOA circuit is arranged in a non-display area of the array substrate and comprises M scanning circuits, wherein M is a natural number which is more than 0 and less than or equal to one third of N; sequentially combining every three rows of sub-pixels with different colors into line pixel combination units according to a sub-pixel color sequence preset from top to bottom to obtain L line pixel combination units; the M scanning circuits are electrically connected with the L row pixel combination units in a one-to-one correspondence manner; when each frame is driven, controlling any K scanning circuits in the M scanning circuits to output scanning pulse signals so as to charge the sub-pixels in the 3K rows; k is a natural number which is more than 0 and less than M +1, L is a natural number which is more than 0 and less than or equal to N-thirds, so that the 1H time of each frame is increased by M/K times, the charging time of each sub-pixel is increased, the charging time is increased while the refresh rate is ensured, the problem of color cast of the display panel caused by insufficient charging rate is solved, and the display effect is improved.
In the above embodiment, any K (M is greater than or equal to K and greater than or equal to 1) scanning circuit in the M scanning circuits can be controlled to output the scanning pulse signal according to the requirement, and only 3K rows of sub-pixels in each frame are charged, so that the 1H time of each frame is increased by M/K times, the charging rate is optimized, the power consumption is reduced, for a tri-gate display panel with high resolution, the charging time of the sub-pixels is optimized while the refresh rate is ensured, and the color cast problem of the display panel caused by insufficient charging rate is improved.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent application shall be subject to the appended claims.

Claims (10)

1. An array substrate, comprising:
the display device comprises a display area, a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, wherein the display area is provided with a plurality of sub-pixels, each sub-pixel is arranged in an N-row array, N is a natural number greater than 2, each sub-pixel comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel, each sub-pixel is electrically connected with a scanning line and a data line, the sub-pixels in each row are repeatedly arranged from top to bottom according to a preset sub-pixel color sequence, and the sub-pixels in each row are identical in color;
the display device comprises a non-display area, wherein the non-display area is provided with a GOA circuit, the GOA circuit comprises M scanning circuits, and M is a natural number which is greater than 0 and less than or equal to one third of N;
sequentially combining every three rows of sub-pixels with different colors into line pixel combination units according to a sub-pixel color sequence preset from top to bottom to obtain L line pixel combination units; the M scanning circuits are electrically connected with the L row pixel combination units in a one-to-one correspondence manner; when each frame is driven, controlling any K scanning circuits in the M scanning circuits to output scanning pulse signals so as to charge the sub-pixels in the 3K rows; k is a natural number greater than 0 and less than M +1, and L is a natural number greater than 0 and less than or equal to one-third of N.
2. The array substrate of claim 1, wherein the sub-pixels comprise pixel electrodes and thin film transistors;
the grid electrode of the thin film transistor is connected with the corresponding scanning line, the drain electrode of the thin film transistor is connected with the corresponding data line, and the source electrode of the thin film transistor is connected with the pixel electrode.
3. The array substrate of claim 1, wherein the first color sub-pixel is a red sub-pixel, the second color sub-pixel is a blue sub-pixel, and the third color sub-pixel is a blue sub-pixel.
4. The array substrate of claim 1, wherein K is 1.
5. The array substrate of claim 1, wherein the predetermined sequence of sub-pixel colors from top to bottom is a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
6. The array substrate of claim 1, wherein the predetermined sequence of sub-pixel colors from top to bottom is a green sub-pixel, a red sub-pixel, and a blue sub-pixel.
7. The array substrate of claim 1, wherein the predetermined sequence of sub-pixel colors from top to bottom is a red sub-pixel, a blue sub-pixel, and a green sub-pixel.
8. A display panel comprising the array substrate according to any one of claims 1 to 7.
9. A display device characterized by comprising the display panel according to claim 8.
10. The device according to claim 9, wherein the display panel is an LCD display panel with a resolution of 4K, an LCD display panel with a resolution of 8K, or an LCD display panel with a resolution of 16K.
CN202210359224.6A 2022-04-06 2022-04-06 Array substrate, display panel and display device Active CN114627793B (en)

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