CN113223960A - Crimping type thyristor core and manufacturing method - Google Patents
Crimping type thyristor core and manufacturing method Download PDFInfo
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- CN113223960A CN113223960A CN202110388560.9A CN202110388560A CN113223960A CN 113223960 A CN113223960 A CN 113223960A CN 202110388560 A CN202110388560 A CN 202110388560A CN 113223960 A CN113223960 A CN 113223960A
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- 238000002788 crimping Methods 0.000 title claims abstract description 9
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 67
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- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical group S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66363—Thyristors
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/34—Sorting according to other particular properties
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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Abstract
The invention discloses a crimping type thyristor core and a manufacturing method thereof, comprising the following steps: 1) preparing a thyristor diffusion sheet, 2) corroding a voltage tank, 3) depositing a polycrystalline silicon film or a silicon nitride film by the voltage tank, 4) passivating voltage tank glass, 5) etching to remove a passivation film of most of cathode surface and anode surface areas which do not need protection of the polycrystalline silicon film or the silicon nitride, 6) welding a chip and a molybdenum sheet, 7) evaporating aluminum on a cathode surface, 8) selectively corroding an aluminum layer on the cathode surface, and 9) microalloy on the aluminum layer. Further 10) single-side multilayer metallization of the molybdenum sheet on the anode surface of the tube core, and 11) coating a third protective layer on the voltage slot. The chip is tested before welding, unqualified chips are removed, waste of molybdenum sheets and the like is avoided, and the unqualified chips are reused after being processed. The voltage slot adopts three-layer protection, so that the leakage current of the tube core tested under high-temperature dynamic conditions is reduced; the molybdenum sheet titanium nickel silver multilayer metal protection prevents oxidation, reduces thermal resistance and resistance, and reduces power consumption.
Description
Technical Field
The invention relates to a thyristor core and a manufacturing method thereof, in particular to a manufacturing method of a crimping type thyristor core. Belongs to the technical field of semiconductor devices.
Background
Currently, one of the prior art is (see fig. 1): (1) preparing a crimping type thyristor diffusion sheet with a four-layer structure: according to the requirements of electrical parameters, selecting the resistivity and the sheet thickness of an N-type silicon wafer, carrying out first expansion on the silicon single wafer according to pattern design to form P1 and P2 layers, then carrying out oxidation, photoresist coating, exposure and development according to the designed pattern on a cathode surface, removing an oxidation layer by a wet method to carry out selective N + phosphorus diffusion, removing phosphorus and borosilicate glass to form an N + cathode, a gate pole isolating ring and a short circuit point region, and forming a thyristor diffusion sheet with a four-layer structure on the silicon single wafer through the main processes. (2) Then the diffusion sheet, the aluminum foil and the molybdenum sheet are overlapped together and welded in a high vacuum sintering furnace. Then forming a cathode, a gate pole isolating ring and an aluminum metalized layer after aluminum evaporation, aluminum etching and aluminum microalloying, grinding positive and negative bevel angles, corroding the positive and negative bevel angles, cleaning, coating organic insulating materials such as polyimide and silicon rubber on the positive and negative bevel angles for protection, curing, drying, testing and removing unqualified products. The conventional process and the conventional flow have four defects: 1. the scrapped tube core molybdenum sheet can not be reused: the tube core with unqualified electrical parameters in the test belongs to waste products. The molybdenum sheet and the chip are welded together through the aluminum foil, the edge of the molybdenum sheet is deformed after the positive and negative bevel angles are ground and the positive and negative bevel angles are corroded, the geometric dimension of the molybdenum sheet does not accord with that of the original molybdenum sheet, and the molybdenum sheet is scrapped together, so that the production cost is increased. 2. The angle grinding process has low efficiency. After the chip and the molybdenum sheet are welded to form the tube core, positive and negative bevel angles need to be ground piece by piece, the production efficiency is low, and the positive and negative bevel angles are ground to occupy larger area of the cathode surface of the chip, so that the on-state pressure drop is large. 3. The die mesa cannot be used to deposit a semi-insulating polysilicon film or a silicon nitride film using a low pressure chemical vapor deposition process (CVD). After the tube core is welded and cleaned by grinding the positive and negative bevel angles, a semi-insulating polysilicon film or a silicon nitride film cannot be passivated by a low-pressure Chemical Vapor Deposition (CVD) process at the high temperature of 700 plus-minus 800 ℃ because the melting point of the silicon-aluminum alloy is 577 ℃, the brazing temperature of a chip and a molybdenum sheet is about 650 ℃, the temperature of the subsequent film preparation for passivating the positive and negative bevel angles needs to be carried out at the temperature of 700 plus-minus 800 ℃, and the film passivation temperature is higher than the welding temperature, so that the alloy layer of the anode P1 layer of the thyristor is burnt too deeply at the high temperature to cause reverse voltage resistance reduction and even scrapping. Therefore, the positive and negative bevel angles can only be protected by common passivation films such as polyimide and silicon rubber. The insulating protective material is difficult to block most ion impurities from contaminating and corroding the positive and negative bevel table top. Therefore, under high-temperature test, the forward and reverse leakage current is larger, the high-temperature reverse bias characteristic is unstable, and the qualified rate is low. 4. The molybdenum sheet on the anode surface of the tube core is easy to oxidize. Because the molybdenum sheet on the anode surface of the tube core is not provided with the oxidation-resistant metal layer, an oxidation layer is formed on the surface of the molybdenum sheet after the molybdenum sheet is stored for a long time, and the oxidation layer has certain thermal resistance and resistance, so that the power consumption is increased.
The prior art also discloses a like chinese patent 201110213225.1, a mesa technology silicon controlled rectifier chip structure is disclosed, including N + type cathode region, positive P type short base region, glass passive film, positive slot, SiO2 protection film, silicon single crystal piece, gate pole aluminium electrode and negative pole aluminium electrode, the silicon single crystal piece openly is equipped with positive P type short base region, the silicon single crystal piece back is equipped with back P type region, positive P type short base region surface is equipped with SiO2 protection film, gate pole aluminium electrode and negative pole aluminium electrode, be equipped with positive slot on positive P type short base region and the silicon single crystal piece, positive slot is located gate pole aluminium electrode and negative pole aluminium electrode both sides, be equipped with N + type cathode region between negative pole aluminium electrode and the positive P type short base region. The method has the defects that a cathode, a gate pole isolating ring and an aluminum metallization layer are formed after aluminum evaporation, aluminum etching and aluminum microalloying. The chip can only be used for soft welding (below 400 ℃) and can not be used in a compression joint type device. Because the compression joint type tube core is welded with the molybdenum sheet by adding the aluminum foil at 600-700 ℃, the aluminum layer of the electrode can penetrate into the N + cathode and the P layer, so that the performance of the chip is seriously reduced and even damaged.
Disclosure of Invention
The invention aims to provide a crimping type thyristor core and a manufacturing method thereof aiming at the defects of the prior art, so that the electrical parameters of the product are improved, the production cost is reduced, and the qualification rate of the product is improved.
The technical scheme adopted by the invention for achieving the aim is as follows: a method for manufacturing a compression-joint type thyristor core comprises the following steps:
1) preparing a four-layer thyristor diffusion sheet: according to the requirements of electrical parameters, selecting the resistivity and the sheet thickness of an N-type silicon wafer, carrying out laser drilling on the silicon single crystal wafer according to a pattern design, then forming a P-type isolation wall, an anode P1P type diffusion layer, an N-type base region and a P2P type diffusion layer along with expansion, then coating photoresist on a cathode surface through oxidation, carrying out exposure and development according to the designed pattern, removing an oxide layer for selective N + phosphorus diffusion, removing phosphorus and borosilicate glass, then forming an N + cathode, a gate pole, a short-circuit point and a voltage slot, and forming a four-layer thyristor diffusion sheet with the P-type isolation wall on the silicon single crystal wafer through the procedures.
2) Corroding the voltage slot: coating photoresist on the diffusion sheet with the four-layer structure of the thyristor, exposing, developing to obtain a region to be corroded by a thyristor voltage slot, then placing the region in conventional mixed acid corrosive liquid for corrosion, wherein the temperature of the acid liquid is-10-12 ℃, the time is 5-20min, after corrosion, washing with high-purity water, removing the photoresist on the cathode surface, and drying for later use. The standing time is as short as possible to avoid contamination.
3) Voltage bath deposition of semi-insulating polysilicon film or silicon nitride film: and putting the etched wafer with the voltage slot structure in low-pressure Chemical Vapor Deposition (CVD) equipment, and depositing a semi-insulating polysilicon film or a silicon nitride film according to the conventional film-making process operation.
4) Voltage tank glass passivation: and coating glass powder on the passivated film area of the finished silicon nitride or semi-insulating polysilicon of the voltage groove on the cathode surface and passivating to form a glass passivated film, wherein the passivating temperature is 690 and 750 ℃, and the passivating time is 30-60 min.
5) Etching to remove most of the passive film of the cathode surface and anode surface regions which do not need to be protected by the semi-insulating polysilicon film or the silicon nitride: and after the voltage tank is subjected to glass passivation, coating photoresist, carrying out exposure development according to the design pattern of the cathode surface of the thyristor, and reserving the photoresist on the voltage tank, the gate and the isolation ring area of the cathode. Removing residual glass powder on the cathode surface by using dilute hydrofluoric acid after development; and then etching an unnecessary semi-insulating polysilicon film by using mixed acid corrosive liquid, or etching and removing most of passivation films on the whole areas of the cathode surface and the anode surface protected by the silicon nitride film by using plasma equipment, and then placing the silicon nitride film in sulfuric acid to remove the photoresist on the voltage tank, the isolation ring between the gate and the cathode. Through the processes, the chip can bear forward and reverse voltage resistance and is protected by two layers of passivation films before metallization and welding.
6) Welding the chip and the molybdenum sheet: after the chip which can bear the forward and reverse pressure resistance is detected to be qualified, the chip is overlapped with the aluminum foil and the molybdenum sheet and is welded in a high vacuum sintering furnace at the temperature of 620 ℃ and 700 ℃ for 10-20 minutes at constant temperature, and the chip is taken out of the furnace by adopting slow cooling.
7) And (3) evaporating aluminum on the cathode surface: placing the welded tube core in a high vacuum coating or magnetron sputtering device, and evaporating aluminum on the cathode surface, wherein the thickness of the aluminum layer is not less than
8) Selective corrosion of the aluminum layer on the cathode surface: coating photoresist on the surface of the cathode surface with the aluminum layer, exposing and developing to remove the photoresist on the voltage slot and the isolating ring between the cathode and the gate, then carrying out aluminum etching by using aluminum corrosive liquid, keeping the aluminum layers on the cathode surface and the gate, and corroding for 9-20min at the temperature of 60-70 ℃.
9) Aluminum layer microalloying: and placing the tube core with the selectively corroded aluminum layer in an alloy furnace with nitrogen protection for aluminum microalloying at the temperature of 500-550 ℃ for 10-50 min.
Further, 10) single-side multilayer metallization of the molybdenum sheet on the anode surface of the tube core: putting the molybdenum sheet on the anode surface of the tube core upwards in a vacuum magnetron sputtering device or a vacuum coating machine for sputtering titanium, nickel and silver with multilayer metallization, wherein the thickness of the molybdenum sheet is titanium
Nickel (II)
Silver (Ag)
And performing micro-alloying at the temperature of 400-450 ℃ to form a multi-metallization layer. Because the silver layer is not easy to oxidize, the silver coating plays a role in resisting oxidation.
Further, 11) voltage tank is coated with a third protective layer: polyimide or silicon rubber is coated on the voltage slot for further passivation protection, and damage caused by collision is prevented.
The invention has the positive effects that: (1) the thyristor diffusion sheet with the four-layer structure and the P-type partition wall is formed on the silicon single crystal sheet, then the chip capable of bearing forward and reverse voltage resistance is manufactured, the chip can be tested piece by piece before welding (in the prior art, the chip does not have test conditions before welding), the chip incapable of bearing forward and reverse voltage resistance is removed firstly, and the chip capable of bearing forward and reverse voltage resistance is welded with the molybdenum sheet, so that waste of the molybdenum sheet, chemical reagents and manpower is avoided, and the production cost is greatly reduced. (2) The thyristor chip uses the technology of corroding the voltage slot to replace the corner grinding technology, the quantity of chip corrosion in one time in an acid corrosion machine reaches 100 plus 300 pieces (phi 30-60mm), the efficiency is improved by dozens of times compared with the traditional chip-by-chip corner grinding technology, and the production efficiency is greatly improved. (3) Because the chip and the molybdenum sheet are welded to form the tube core, finally, the geometric dimension of the molybdenum sheet is not changed because a few unqualified tube cores are subjected to various electrical parameter tests and the corrosion process after corner grinding and welding is not carried out, the molybdenum sheet can be completely reused after treatment, and the production cost is further reduced. (4) The chip voltage slot adopts a low-pressure Chemical Vapor Deposition (CVD) process to carry out the first semi-insulating polysilicon film or silicon nitride film passivation and the secondary protection of a glass passivation film on a sensitive voltage slot area, thereby effectively preventing the pollution and the erosion of most ion impurities, and then adopts polyimide and elastic silicon rubber to carry out the third protection, thereby preventing collision, obviously reducing the leakage current of a tube core tested under high temperature and dynamic conditions, and improving the stability and the qualification rate of the test under high temperature reverse bias. (5) The molybdenum sheet on the anode surface of the thyristor core is protected by sputtering or evaporating titanium, nickel and silver multilayer metal, so that oxidation is prevented, thermal resistance and electric resistance are reduced, and power consumption is reduced.
The invention will be explained in more detail below with reference to the drawings and examples.
Drawings
FIG. 1 is a cross-sectional structural schematic view of a prior art crimped die.
FIG. 2 is a schematic cross-sectional structural view of a press-fit type pipe core of the present invention.
In the figure: 1. the structure of the solar cell comprises an anode P1P type diffusion layer, a 2.N type base region, a 3.P2P type diffusion layer, a 4. cathode N + diffusion layer, a 5. gate pole, a 6. short-circuit point, a 7. molybdenum sheet deformation region, 8. aluminum foil, 9. isolation ring, 10. aluminum layer, 11. negative bevel angle, 12. positive bevel angle, 13. silicon rubber, 14. molybdenum sheet, 15.P type isolation wall, 16. laser hole, 17. voltage groove, 18. semi-insulating polysilicon film, 19. glass passivation film and 20. multi-metallization layer.
Detailed Description
The prior art is shown in fig. 1: preparing a crimping type thyristor diffusion sheet with a four-layer structure: according to the requirements of electrical parameters, selecting the resistivity and the thickness of an N-type silicon wafer, carrying out pattern design on a silicon single crystal wafer to form an anode P1P type diffusion layer (1), an N-type base region (2) and a P2P type diffusion layer (3), then carrying out oxidation, photoresist coating, exposure and development according to the designed pattern, removing an oxidation layer by a wet method to carry out selective N + phosphorus diffusion to form an N + cathode (4), a gate pole (5) and a short circuit point (6) region, and forming a four-layer thyristor on the silicon single crystal wafer through the main processes. Then the diffusion sheet, the aluminum foil (8) and the molybdenum sheet (14) are overlapped together and welded in a high vacuum sintering furnace. Then forming a cathode, a gate pole isolating ring (9) and a metalized aluminum layer (10) after aluminum evaporation, aluminum etching and aluminum microalloying, grinding a positive bevel (12) and a negative bevel (11), corroding the positive bevel and the negative bevel, cleaning, and then coating organic insulating materials such as polyimide and silicon rubber (13) on the positive bevel and the negative bevel for protection, solidification, drying, testing and rejecting unqualified products. In the prior art, a molybdenum sheet deformation area (7) appears after corrosion when a positive bevel (12) and a negative bevel (11) are ground.
Embodiment 1. a crimping type thyristor core and a manufacturing method.
As shown in fig. 2, a method for manufacturing a die of a brazed compression-bonded thyristor according to the present invention comprises the following steps:
1) preparing a four-layer thyristor diffusion sheet: according to the requirements of electrical parameters, selecting the resistivity and the thickness of an N-type silicon wafer, carrying out laser drilling (16) on the silicon single crystal wafer according to a pattern design, then forming a P-type isolation wall (15), an anode P1P type diffusion layer (1), an N-type base region (2) and a P2P type diffusion layer (3) along with expansion, then coating photoresist on a cathode surface through oxidation, carrying out exposure and development according to the designed pattern, then removing an oxide layer for selective N + phosphorus diffusion, removing phosphorus and borosilicate glass, then forming an N + cathode (4), a gate pole (5), a short-circuit point (6) and a voltage slot (17), and forming a thyristor diffusion sheet with a four-layer structure and a P-type isolation wall on the silicon single crystal wafer through the procedures. The volume ratio of the solution for removing the oxide layer is ammonium fluoride: hydrofluoric acid: water 30%: 6%: and 64 percent.
2) Corroding the voltage slot: and coating photoresist on the diffusion sheet forming the four-layer structure of the thyristor, exposing and developing to obtain a region to be corroded by a thyristor voltage slot (17), and then putting the diffusion sheet into a conventional mixed acid corrosive liquid for corrosion, wherein the volume ratio of the mixed acid is 5 parts of hydrofluoric acid, 4 parts of glacial acetic acid, 2 parts of fuming nitric acid and 1 part of nitric acid. The number of the first etching pieces is about 60 (4 inches), the temperature of the acid liquor is-10 ℃ to 12 ℃, the time is 5 to 20min, the etching is carried out, then the high-purity water is used for washing, the photoresist on the cathode surface is removed by concentrated sulfuric acid, and the drying is carried out for standby. The standing time is as short as possible to avoid contamination.
3) Voltage bath deposition of semi-insulating polysilicon film (18) or silicon nitride film: the etched wafer having the voltage sink structure is placed in a low pressure Chemical Vapor Deposition (CVD) apparatus to deposit a semi-insulating polysilicon film or a silicon nitride film (18). The manufacturing process parameters of the semi-insulating polycrystalline silicon film are as follows: the gas is silane, nitrous oxide, chlorineHydrogen is gasified; hydrogen chloride cleaning process parameters: the temperature at the furnace mouth is 575 ℃, the temperature at the furnace tail is 575 ℃, the hydrogen chloride cleaning time is 40min, the hydrogen chloride cleaning pressure is 200-. SIPOS deposition process parameters: the temperature furnace mouth 640-660 ℃, and the temperature furnace tail 640-660 ℃; introducing silane for deposition for 40 seconds, and then performing SIPOS deposition for 30-45 min; the SIPOS deposition pressure is 300 mTorr, the gas flow N2O is 50-80ml/min, and the SiH4 is 260-320 ml/min. The temperature of MTO (medium temperature oxidation) is 600 ℃ plus 670 ℃, the temperature of the furnace is 600 ℃ plus 670 ℃, and the temperature of the furnace tail is 600 ℃ plus 670 ℃; the time is 20-30 min; and finally, densification: the furnace mouth is 700 ℃ and 800 ℃, the furnace tail is 700 ℃ and 800 ℃ and the time is 20-30 min. Film thickness
4) Voltage tank glass passivation: and coating glass powder on the passivated film area of the finished silicon nitride or semi-insulating polysilicon of the voltage groove on the cathode surface and passivating to form a glass passivated film (19), wherein the passivating temperature is 690 and 750 ℃, and the passivating time is 30-60 min.
5) Etching to remove most of the passive film of the cathode surface and anode surface regions which do not need to be protected by the semi-insulating polysilicon film or the silicon nitride: and after the voltage tank is subjected to glass passivation, coating photoresist, carrying out exposure development according to the design pattern of the cathode surface of the thyristor, and reserving the photoresist on the voltage tank, the gate and the isolation ring area of the cathode. Removing residual glass powder on the cathode surface by using dilute hydrofluoric acid after development; and then etching by using mixed acid corrosive liquid or plasma equipment to remove most of the passive film on the whole area of the cathode surface and the anode surface without the protection of a semi-insulating polycrystalline silicon film or silicon nitride, and then placing the passive film in sulfuric acid to remove the photoresist on the voltage tank, the isolation ring between the gate and the cathode. Through the processes, the chip can bear forward and reverse voltage resistance and is protected by two layers of passivation films before metallization and welding. The working procedure of grinding positive and negative angles is omitted.
6) Welding the chip and the molybdenum sheet: after the chip which can bear the forward and reverse pressure resistance is detected to be qualified, the chip is overlapped with the aluminum foil (8) and the molybdenum sheet (14) and is welded in a high vacuum sintering furnace at the constant temperature of 620 ℃ and 700 ℃ for 10-20 minutes, and the chip is taken out of the furnace by slow cooling.
7) And (3) evaporating aluminum on the cathode surface: placing the welded tube core in a high vacuum coating or magnetron sputtering device, and evaporating aluminum on the cathode surface, wherein the thickness of the aluminum layer (10) is not less than
8) Selective corrosion of the aluminum layer on the cathode surface: coating photoresist on the surface of the existing aluminum layer on the cathode surface, exposing and developing to remove the photoresist on the voltage slot and the isolating ring (9) between the cathode and the gate pole, then carrying out aluminum etching by using aluminum corrosive liquid, reserving the aluminum layers on the cathode surface and the gate pole, and obtaining the volume ratio of the aluminum corrosive liquid, phosphoric acid: glacial acetic acid: nitric acid: 76.58% of water: 14.64%: 3.94%: 4.84 percent; corroding at 60-70 deg.C for 9-20 min.
9) Aluminum layer microalloying: and placing the tube core with the selectively corroded aluminum layer in an alloy furnace with nitrogen protection for aluminum microalloying at the temperature of 500-550 ℃ for 10-50 min.
10) Single-side multilayer metallization of a molybdenum sheet on the anode surface of a tube core: putting the molybdenum sheet on the anode surface of the tube core upwards in a vacuum magnetron sputtering device (or a vacuum coating machine) for sputtering titanium-nickel-silver multilayer metallization, wherein the thickness of the molybdenum sheet is titanium
Nickel (II)
Silver (Ag)
And microalloying at 400-450 ℃ to form the multi-metallization layer (20). Because the silver layer is not easy to oxidize, the silver coating plays a role in resisting oxidation.
11) Voltage tank coating third protective layer: and further coating polyimide or silicon rubber (13) on the voltage slot for further passivation protection to prevent damage caused by collision.
12) And (6) testing and warehousing the tube core.
The specific operation details in the present embodiment are well known to those skilled in the art and will not be described again. But does not affect the subject matter of the embodiments.
Claims (9)
1. A method for manufacturing a compression joint type thyristor core comprises the steps of firstly manufacturing a chip which is provided with a P-type isolation wall, can bear positive and negative pressure resistance and is not metalized on the surface, and then hard-welding an aluminum foil and a molybdenum sheet; the method comprises the following steps:
1) preparing a four-layer thyristor diffusion sheet: according to the requirements of electrical parameters, selecting the resistivity and the sheet thickness of an N-type silicon wafer, carrying out laser drilling (16) on the silicon single crystal wafer according to pattern design, then forming a P-type isolation wall (15), an anode P1P type diffusion layer (1), an N-type base region (2) and a P2P type diffusion layer (3) along with expansion, then coating photoresist on a cathode surface through oxidation, carrying out exposure and development according to the design pattern, removing an oxide layer for selective N + phosphorus diffusion, removing phosphorus and borosilicate glass, then forming an N + cathode (4), a gate pole (5), a short-circuit point (6) and a voltage slot (17), and forming a thyristor diffusion sheet with a four-layer structure and a P-type isolation wall on the silicon single crystal wafer through the procedures;
2) corroding the voltage tank, washing with high-purity water after corrosion, removing the photoresist on the cathode surface, and drying for later use;
3) voltage bath deposition of semi-insulating polysilicon film or silicon nitride film: placing the etched wafer with voltage slot structure in a chemical vapor deposition device, depositing a semi-insulating polysilicon film or silicon nitride film (18), and making into a film with a thickness equal to that of the conventional film-forming process
4) Voltage tank glass passivation: coating glass powder on the passivation film area of the voltage groove on the cathode surface, which is finished with the semi-insulating polysilicon or silicon nitride, and passivating to form a glass passivation film (19), wherein the passivation temperature is 690 and 750 ℃, and the passivation time is 30-60 min;
5) etching to remove most of the passive films of the cathode surface and the anode surface without the protection of the semi-insulating polysilicon film or the silicon nitride, and removing the residual glass powder on the cathode surface;
6) welding the chip and the molybdenum sheet: overlapping the chip, the aluminum foil and the molybdenum sheet together, welding in a high vacuum sintering furnace at the temperature of 620 ℃ and 700 ℃ for 10-20 minutes at constant temperature, cooling and discharging;
7) and (3) evaporating aluminum on the cathode surface: placing the welded tube core in a high vacuum coating or magnetron sputtering device, and evaporating aluminum on the cathode surface, wherein the thickness of the aluminum layer is not less than
8) Selective corrosion of the aluminum layer on the cathode surface: coating photoresist on the surface of the cathode surface with the aluminum layer, exposing and developing to remove the photoresist on the voltage slot and the isolation ring (9) between the cathode and the gate, then etching the aluminum by using aluminum corrosive liquid, and reserving the aluminum layers on the cathode surface and the gate;
9) aluminum layer microalloying: and placing the tube core with the aluminum layer selectively corroded on the cathode surface in an alloy furnace with nitrogen protection for aluminum microalloying at the temperature of 500-550 ℃ for 10-50 min.
2. The method of making a crimped thyristor die of claim 1, wherein: further comprising the step 10) of single-side multilayer metallization of the molybdenum sheet on the anode surface of the tube core: putting the molybdenum sheet on the anode surface of the tube core upwards in a vacuum magnetron sputtering device or a vacuum coating machine for sputtering titanium, nickel and silver with multilayer metallization, wherein the thickness of the molybdenum sheet is titanium
Nickel (II)
Silver (Ag)
And performing micro-alloying at 400-450 ℃ for 20-60min to form a multi-metallization layer (20).
3. The method of fabricating a crimped thyristor die of claim 1 or 2, wherein: further comprising step 11) voltage bath coating a third protective layer: the voltage slots are coated with polyimide or silicone rubber.
4. The method of fabricating a crimped thyristor die of claim 1 or 2, wherein: and 2) coating photoresist on the diffusion sheet with the thyristor four-layer structure, exposing and developing to obtain a region to be corroded of the thyristor voltage slot (17), and then placing the diffusion sheet in mixed acid corrosive liquid for corrosion, wherein the temperature of the acid liquid is-10-12 ℃, the time is 5-20min, and the volume ratio of the mixed acid to the mixed acid corrosive liquid is 5 parts of hydrofluoric acid, 4 parts of glacial acetic acid, 2 parts of fuming nitric acid and 1 part of nitric acid.
5. The method of fabricating a crimped thyristor die of claim 1 or 2, wherein: in the step 3), the semi-insulating polycrystalline silicon film is prepared by the technological parameters that the gas is silane, nitrous oxide and hydrogen chloride; hydrogen chloride cleaning process parameters: the temperature at the furnace mouth is 575 ℃, the temperature at the furnace tail is 575 ℃, the cleaning time is 40min, the cleaning pressure is 200 millitorr, and the cleaning flow is 100 millitorr; SIPOS deposition process parameters: the temperature furnace mouth 640-660 ℃, and the temperature furnace tail 640-660 ℃; the SIPOS is firstly conducted for 40S after the silane deposition, and then the SIPOS deposition is conducted for 30-45 min; SIPOS deposition pressure: 300 mtorr, gas flow: N2O is 50-80ml/min, SiH4 is 260-320 ml/min; the MTO temperature is 670 ℃ at the furnace mouth, 670 ℃ at the furnace mouth and 670 ℃ at the furnace tail, 670 ℃; the time is 20-30 min; the densification furnace mouth is 700-800 ℃, the furnace tail is 700-800 ℃ and the time is 20-30 min.
6. The method of fabricating a crimped thyristor die of claim 1 or 2, wherein: step 5), after performing glass passivation on the voltage tank, coating photoresist, performing exposure development according to the design pattern of the cathode surface of the thyristor, and reserving the photoresist on the voltage tank, the gate and the isolation ring area of the cathode; removing residual glass powder on the cathode surface by using dilute hydrofluoric acid after development; etching by using mixed acid corrosive liquid to remove most of the passive film of the whole area of the cathode surface and the anode surface which do not need to be protected by the semi-insulating polycrystalline silicon film; the mixed acid etching solution comprises 5 parts of hydrofluoric acid, 4 parts of glacial acetic acid, 2 parts of fuming nitric acid and 1 part of nitric acid in volume ratio, and is then placed in concentrated sulfuric acid to remove the photoresist on the isolation ring between the voltage slot, the gate pole and the cathode.
7. The method of fabricating a crimped thyristor die of claim 1 or 2, wherein: in the step 8), the volume ratio of the aluminum corrosive liquid to phosphoric acid: glacial acetic acid: nitric acid: 76.58% of water: 14.64%: 3.94%: 4.84 percent; corroding at 60-70 deg.C for 9-20 min.
8. The method of fabricating a crimped thyristor die of claim 1 or 2, wherein: and 6), before the chip is welded with the molybdenum sheet, testing the chip and removing unqualified chips.
9. The crimped thyristor die of claim 1, wherein: the method for manufacturing the crimping type thyristor core as claimed in any one of claims 1 to 7.
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