CN113219284A - Simulation filter combination fault simulation device, fault simulation system and fault simulation method thereof - Google Patents
Simulation filter combination fault simulation device, fault simulation system and fault simulation method thereof Download PDFInfo
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Abstract
The invention discloses a simulation filter combination fault simulation device, a fault simulation system and a fault simulation method thereof. The device comprises a power supply input unit, a power supply protection unit, a signal input unit, a signal output unit, an operational amplifier unit and a resistance-capacitance drift matching unit; the signal input unit is respectively connected with the operational amplifier unit and the resistance-capacitance drift matching unit, the operational amplifier unit is connected with the resistance-capacitance drift matching unit, the power input unit and the power protection unit are respectively connected with the operational amplifier unit and the resistance-capacitance drift matching unit, and the operational amplifier unit and the resistance-capacitance drift matching unit are connected with corresponding outputs. The invention solves the problem that the simulation type of the multi-element fault type of the existing simulation filter circuit is insufficient.
Description
Technical Field
The invention belongs to the field of analog filtering; in particular to a fault simulation device, a fault simulation system and a fault simulation method for a simulation filter combination.
Background
In the world today, a wide variety of electronic and electrical devices, such as analog filter circuits, are widely used in electrical devices. The reliability of the analog filter circuit, which is an important guarantee for signal processing in the circuit, is of great significance to the overall circuit system, and is one of the very important analog circuits. In practical use, the analog filter circuit is easy to generate drift faults of resistance and capacitance, and the design and manufacture of the fault simulation device of the analog filter have important significance for recognizing the faults of the filter. Most fault simulators are realized by a simulation method, and the physical platform only simulates the influence of resistance with a fixed resistance value or capacitance drift with a fixed capacitance value on the simulation circuit, so that the flexibility of the fault simulator is greatly limited.
Disclosure of Invention
The invention provides a simulation filter combination fault simulation device, a fault simulation system and a fault simulation method thereof, which are used for solving the problem that the simulation type of the multi-element fault type of the existing simulation filter circuit is insufficient.
The invention is realized by the following technical scheme:
a simulation filter combination fault simulation device comprises a power supply input unit, a power supply protection unit, a signal input unit, a signal output unit, an operational amplifier unit and a resistance-capacitance drift matching unit; the signal input unit is respectively connected with the operational amplifier unit and the resistance-capacitance drift matching unit, the operational amplifier unit is connected with the resistance-capacitance drift matching unit, the power input unit and the power protection unit are respectively connected with the operational amplifier unit and the resistance-capacitance drift matching unit, and the operational amplifier unit and the resistance-capacitance drift matching unit are connected with corresponding outputs.
Further, the resistance-capacitance drift matching unit specifically comprises a drift resistor R1, a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2, wherein the drift resistor R1 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift capacitor C1 and the drift capacitor C2; the drift resistor R2 is freely combined with one or more of a drift resistor R1, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R3 is freely combined with one or more of a drift resistor R2, a drift resistor R1, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R4 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R1, a drift capacitor C1 and a drift capacitor C2 respectively; the drift capacitor C1 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift resistor R1 and a drift capacitor C2 respectively; the drift capacitor C2 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift resistor R1 and the drift capacitor C1.
A fault simulation system for an analog filter combination comprises a power supply input unit, a power supply protection unit, a signal input unit, a signal output unit, a drift fault combination unit, an operational amplifier unit and a resistance-capacitance drift matching unit; the signal input unit transmits pulse signals to the operational amplifier unit and the resistance-capacitance drift matching unit, the power input unit provides electric energy for the operational amplifier unit and the resistance-capacitance drift matching unit, the power supply unit prevents large current caused by short circuit from damaging a circuit, the operational amplifier unit and the resistance-capacitance drift matching unit transmit signals to each other, and the operational amplifier unit and the resistance-capacitance drift matching unit transmit the signals to corresponding outputs.
Further, the resistance-capacitance drift matching unit specifically comprises a drift resistor R1, a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2, wherein the drift resistor R1 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift capacitor C1 and the drift capacitor C2; the drift resistor R2 is freely combined with one or more of a drift resistor R1, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R3 is freely combined with one or more of a drift resistor R2, a drift resistor R1, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R4 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R1, a drift capacitor C1 and a drift capacitor C2 respectively; the drift capacitor C1 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift resistor R1 and a drift capacitor C2 respectively; the drift capacitor C2 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift resistor R1 and the drift capacitor C1.
Further, the fault simulation method comprises the following steps:
step 1: after the system is assembled, a direct current power supply is switched on;
step 2: setting the output of a signal source for the system;
and step 3: adjusting the drift grade of the fault combination resistor and the capacitor;
and 4, step 4: inputting the signal in the signal source in the step 2 into a filter for filtering;
and 5: and (4) inputting the signal which passes through the filter in the step (4) into a digital oscilloscope for displaying.
A fault simulation method of an analog filter combination fault simulation system is characterized in that a direct-current power supply in step 1 selects a dual-port direct-current stabilized power supply which simultaneously outputs positive and negative levels, and the required level is +15V to-15V.
Further, the waveform output by the signal source in step 2 is a pulse wave, and the parameters are set as follows: the period is more than 10ms, the high level/low level is 5V/0V, the pulse width is 10 mu s, the offset compensation is 1.25V, and the rising/falling time is 100 ns.
Further, the step 3 of adjusting the drift levels of the fault combined resistor and capacitor is specifically to set a standard state without drift at the initial time, set the element to drift in a negative direction by rotating counterclockwise, and set a one-element or multi-element resistor and capacitor drift fault mode by rotating clockwise to drift in a positive direction.
Further, the simulation monobasic fault mode firstly determines whether a drift fault occurs on a capacitor or a resistor, determines a specific drift element, keeps a resistor-capacitor knob except the drift element unchanged at a drift level of 0, and rotates a fault simulation knob corresponding to the drift element, namely, only changes the resistance value or the capacitance value of the drift element, and does not change the attributes of other elements, so that the simulation of the monobasic fault drift of the analog filter circuit is realized.
Further, in the multi-element fault mode, the simulated fault is determined to be an n-element resistance-capacitance drift fault, n specific elements which drift, 6-n resistance-capacitance knobs except for the drift elements are kept unchanged at the drift level 0, and the fault simulation knobs corresponding to the n drift elements are sequentially rotated to corresponding drift level positions, namely the resistance value and the capacitance value of the set drift elements are combined, the attributes of other elements are not changed, and the multi-element fault combination simulation of the analog filter circuit is realized.
The invention has the beneficial effects that:
the invention takes the circuit fault of the analog filter as a research object, sets the resistance-capacitance drift grade in a knob selection mode, and utilizes different resistance and capacitance drift grades controlled by a plurality of groups of knobs to carry out fault multivariate combination, thereby simulating a large number of common multivariate fault states of the analog filter. Compared with the conventional single analog circuit fault simulation device, the invention can effectively combine the drift faults of a plurality of resistors and capacitors, and the fault simulation method is flexible. The invention can simulate as many as 366024 fault modes, which is far more than the fault simulation device of the existing simulation circuit. The analog fault waveform of the invention is observed by a digital oscilloscope, the waveform is smooth and stable, no oscillation exists, the noise interference is extremely small, different drift levels are selected by using the resistance-capacitance drift knob, the fault waveform change is obvious, the resistance-capacitance drift fault of the analog circuit can be better simulated by the invention, and the invention has very strong practical application significance.
Drawings
FIG. 1 is a schematic diagram of the system of the present invention.
FIG. 2 is a combined implementation method of the resistance-capacitance fault of the present invention.
FIG. 3 is a prior art RC fault combination implementation method.
Fig. 4 is an analog filter circuit diagram of the normal operating mode of the present invention.
Fig. 5 is a circuit diagram of an analog filter for rc drift fault of the present invention.
Fig. 6 is a schematic diagram of a knob switch of the present invention, wherein (a) is a schematic diagram of a resistance knob switch, and (b) is a schematic diagram of a capacitance knob switch.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
A simulation filter combination fault simulation device comprises a power supply input unit, a power supply protection unit, a signal input unit, a signal output unit, an operational amplifier unit and a resistance-capacitance drift matching unit; the signal input unit is respectively connected with the operational amplifier unit and the resistance-capacitance drift matching unit, the operational amplifier unit is connected with the resistance-capacitance drift matching unit, the power input unit and the power protection unit are respectively connected with the operational amplifier unit and the resistance-capacitance drift matching unit, and the operational amplifier unit and the resistance-capacitance drift matching unit are connected with corresponding outputs.
Further, the rc-drift matching unit specifically includes a drift resistor R1, a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift capacitor C1, and a drift capacitor C2, where the drift resistor R1 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift capacitor C1, and the drift capacitor C2 (e.g., R1+ R2, R1+ R3, R1+ C1+ C2, or R1+ R3+ R4+ C1, etc.); the drift resistor R2 is freely combined with one or more of a drift resistor R1, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R3 is freely combined with one or more of a drift resistor R2, a drift resistor R1, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R4 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R1, a drift capacitor C1 and a drift capacitor C2 respectively; the drift capacitor C1 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift resistor R1 and a drift capacitor C2 respectively; the drift capacitor C2 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift resistor R1 and the drift capacitor C1.
A fault simulation system for an analog filter combination comprises a power supply input unit, a power supply protection unit, a signal input unit, a signal output unit, an operational amplifier unit and a resistance-capacitance drift matching unit; the signal input unit transmits pulse signals to the operational amplifier unit and the resistance-capacitance drift matching unit, the power input unit provides electric energy for the operational amplifier unit and the resistance-capacitance drift matching unit, the power protection unit prevents large current caused by short circuit from damaging a circuit, the operational amplifier unit and the resistance-capacitance drift matching unit transmit signals to each other, and the operational amplifier unit and the resistance-capacitance drift matching unit transmit the signals to corresponding outputs.
Further, the rc-drift matching unit specifically includes a drift resistor R1, a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift capacitor C1, and a drift capacitor C2, where the drift resistor R1 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift capacitor C1, and the drift capacitor C2 (e.g., R1+ R2, R1+ R3, R1+ C1+ C2, or R1+ R3+ R4+ C1, etc.); the drift resistor R2 is freely combined with one or more of a drift resistor R1, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R3 is freely combined with one or more of a drift resistor R2, a drift resistor R1, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R4 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R1, a drift capacitor C1 and a drift capacitor C2 respectively; the drift capacitor C1 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift resistor R1 and a drift capacitor C2 respectively; the drift capacitor C2 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift resistor R1 and the drift capacitor C1.
Further, the fault simulation method comprises the following steps
Step 1: after the system is assembled, a direct current power supply is switched on;
step 2: setting the output of a signal source for the system;
and step 3: adjusting the drift grade of the fault combination resistor and the capacitor;
and 4, step 4: inputting the signal in the signal source in the step 2 into a filter for filtering;
and 5: and (4) inputting the signal which passes through the filter in the step (4) into a digital oscilloscope for displaying.
A fault simulation method of an analog filter combination fault simulation system is characterized in that a direct-current power supply in step 1 selects a dual-port direct-current stabilized power supply which simultaneously outputs positive and negative levels, and the required level is +15V to-15V. The input interface of the power supply is more flexible, can use the big D type power interface of general power supply, if do not have big D type power interface can use dupont line connection to european style terminal for the power supply of filter circuit.
Further, the waveform output by the signal source in step 2 is a pulse wave, and the parameters are set as follows: period is more than 10ms, high level/low level is 5V/0V, pulse width is 10 mus, rising/falling time is 100 ns.
Further, the step 3 of adjusting the drift levels of the fault combined resistor and capacitor is specifically to set a standard state without drift at the initial time, set the element to drift in a negative direction by rotating counterclockwise, and set a one-element or multi-element resistor and capacitor drift fault mode by rotating clockwise to drift in a positive direction.
Further, the simulation monobasic fault mode firstly determines whether a drift fault occurs on a capacitor or a resistor, determines a specific drift element, keeps a resistor-capacitor knob except the drift element unchanged at a drift level of 0, and rotates a fault simulation knob corresponding to the drift element, namely, only changes the resistance value or the capacitance value of the drift element, and does not change the attributes of other elements, so that the simulation of the monobasic fault drift of the analog filter circuit is realized.
Further, in the multi-element fault mode, the simulated fault is determined to be an n-element resistance-capacitance drift fault, n specific elements which drift, 6-n resistance-capacitance knobs except for the drift elements are kept unchanged at the drift level 0, and the fault simulation knobs corresponding to the n drift elements are sequentially rotated to corresponding drift level positions, namely the resistance value and the capacitance value of the set drift elements are combined, the attributes of other elements are not changed, and the multi-element fault combination simulation of the analog filter circuit is realized.
Further, the step 5 is to determine a drift failure mode simulated by the circuit through the waveform. In order to prevent the filter circuit from being damaged by large voltage and large current, the power supply protection unit is arranged while simulating faults, and the influence of other uncontrollable factors outside the set environment is reduced to the maximum extent.
The invention can simulate one or more failure modes caused by resistance or capacitance drift in the analog filter circuit.
The capacitance and resistance values for different drift levels are shown in tables 1 and 2.
TABLE 1 capacitance value and drifting grade of capacitance corresponding to knob switch gear
| Knob switch gear | C1(nF) | C2(nF) |
| -2 | 6.8(-43％) | 6.8(-43％) |
| -1 | 5.6(-17％) | 5.6(-17％) |
| 0 | 4.7(0) | 4.7(0) |
| 1 | 3.9(19％) | 3.9(19％) |
| 2 | 2.7(45％) | 2.7(45％) |
TABLE 2 resistance and drift grade corresponding to knob switch gear
| Knob switch gear | R1(kΩ) | R2(kΩ) | R3(kΩ) | R4(kΩ) |
| -5 | 3.09(-50％) | 3.09(-50％) | 3.09(-50％) | 0.806(-50％) |
| -4 | 4.42(-29％) | 4.42(-29％) | 4.42(-29％) | 1.13(-30％) |
| -3 | 5.36(-14％) | 5.36(-14％) | 5.36(-14％) | 1.37(-15％) |
| -2 | 5.62(-10％) | 5.62(-10％) | 5.62(-10％) | 1.43(-12％) |
| -1 | 5.9(-5％) | 5.9(-5％) | 5.9(-5％) | 1.54(-5％) |
| 0 | 6.19(0) | 6.19(0) | 6.19(0) | 1.62(0) |
| 1 | 6.49(5％) | 6.49(5％) | 6.49(5％) | 1.68(4％) |
| 2 | 6.81(10％) | 6.81(10％) | 6.81(10％) | 1.78(10％) |
| 3 | 7.15(15％) | 7.15(15％) | 7.15(15％) | 1.87(15％) |
| 4 | 8.06(31％) | 8.06(31％) | 8.06(31％) | 2.05(27％) |
| 5 | 9.31(50％) | 9.31(50％) | 9.31(50％) | 2.43(50％) |
Because the analog filter circuit drift fault modes which can be simulated by the simulation device are too many, the description cannot be totally listed, 6 multi-element drift fault combination modes are randomly listed, and the circuit drift state of the analog filter under the current state is described as shown in table 3.
TABLE 3 Multi-element resistance-capacitance drift fault knob switch gear and multi-element fault combination state
Claims (10)
1. The analog filter combination fault simulation device is characterized by comprising a power supply input unit, a power supply protection unit, a signal input unit, a signal output unit, an operational amplifier unit and a resistance-capacitance drift matching unit; the signal input unit is respectively connected with the operational amplifier unit and the resistance-capacitance drift matching unit, the operational amplifier unit is connected with the resistance-capacitance drift matching unit, the power input unit and the power protection unit are respectively connected with the operational amplifier unit and the resistance-capacitance drift matching unit, and the operational amplifier unit and the resistance-capacitance drift matching unit are connected with corresponding outputs.
2. The analog filter combination fault simulation device according to claim 1, wherein the rc-drift matching unit specifically comprises a drift resistor R1, a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2, wherein the drift resistor R1 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift capacitor C1 and the drift capacitor C2; the drift resistor R2 is freely combined with one or more of a drift resistor R1, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R3 is freely combined with one or more of a drift resistor R2, a drift resistor R1, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R4 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R1, a drift capacitor C1 and a drift capacitor C2 respectively; the drift capacitor C1 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift resistor R1 and a drift capacitor C2 respectively; the drift capacitor C2 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift resistor R1 and the drift capacitor C1.
3. The analog filter combination fault simulation system is characterized by comprising a power supply input unit, a power supply protection unit, a signal input unit, a signal output unit, a drift fault combination unit, an operational amplifier unit and a resistance-capacitance drift matching unit; the signal input unit transmits pulse signals to the operational amplifier unit and the resistance-capacitance drift matching unit, the power input unit provides electric energy for the operational amplifier unit and the resistance-capacitance drift matching unit, the power protection unit prevents large current caused by short circuit from damaging a circuit, the operational amplifier unit and the resistance-capacitance drift matching unit transmit signals to each other, and the operational amplifier unit and the resistance-capacitance drift matching unit transmit the signals to corresponding outputs.
4. The analog filter combination fault simulation system of claim 1, wherein the resistance-capacitance drift matching unit specifically comprises a drift resistor R1, a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2, and the drift resistor R1 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift capacitor C1 and the drift capacitor C2; the drift resistor R2 is freely combined with one or more of a drift resistor R1, a drift resistor R3, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R3 is freely combined with one or more of a drift resistor R2, a drift resistor R1, a drift resistor R4, a drift capacitor C1 and a drift capacitor C2 respectively; the drift resistor R4 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R1, a drift capacitor C1 and a drift capacitor C2 respectively; the drift capacitor C1 is freely combined with one or more of a drift resistor R2, a drift resistor R3, a drift resistor R4, a drift resistor R1 and a drift capacitor C2 respectively; the drift capacitor C2 is freely combined with one or more of the drift resistor R2, the drift resistor R3, the drift resistor R4, the drift resistor R1 and the drift capacitor C1.
5. A method for simulating faults in a fault simulation system according to claim 2, wherein the fault simulation method comprises the following steps
Step 1: after the system is assembled, a direct current power supply is switched on;
step 2: setting the output of a signal source for the system;
and step 3: adjusting the drift grade of the fault combination resistor and the capacitor;
and 4, step 4: inputting the signal in the signal source in the step 2 into a filter for filtering;
and 5: and (4) inputting the signal which passes through the filter in the step (4) into a digital oscilloscope for displaying.
6. The method for simulating faults of an analog filter combination fault simulation system according to claim 2, wherein the direct current power supply of the step 1 selects a dual-port direct current stabilized power supply which simultaneously outputs positive and negative levels, and the required level is +15V to-15V.
7. The method of claim 2, wherein the waveform of the output of the signal source in step 2 is a pulse wave, and the parameters thereof are set as follows: the period is more than 10ms, the high level/low level is 5V/0V, the pulse width is 10 mu s, the offset compensation is 1.25V, and the rising/falling time is 100 ns.
8. The method of claim 2, wherein the step 3 of adjusting the drift levels of the combined resistor and capacitor is to set the standard state without drift initially, and the counter-clockwise rotation sets the element to drift in a negative direction, and the clockwise rotation sets the element to drift in a positive direction to set a one-element or multi-element resistor and capacitor drift failure mode.
9. The method as claimed in claim 8, wherein the method for simulating the single-element fault mode is to firstly determine whether the drift fault occurs in the capacitor or the resistor, determine the specific drift element, keep the rc knob except the drift element unchanged at the drift level 0, and rotate the fault simulation knob corresponding to the drift element, that is, only change the resistance or the capacitance of the drift element, and not change the properties of other elements, thereby realizing the simulation of the single-element fault drift of the analog filter circuit.
10. The method as claimed in claim 8, wherein the multivariate fault mode determines that the simulated fault is an n-tuple rc drift fault, determines n elements with drift, keeps 6-n rc knobs at the drift level 0, and sequentially rotates the fault simulation knobs corresponding to the n drift elements to the corresponding drift level positions, i.e. combines the resistance and the capacitance of the set drift elements without changing the properties of other elements, thereby realizing multivariate fault combination simulation of the analog filter circuit.
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Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11284446A (en) * | 1998-03-31 | 1999-10-15 | Anritsu Corp | Amplifier circuit with offset voltage drift correction circuit |
| JP2001136050A (en) * | 1999-11-02 | 2001-05-18 | Matsushita Electric Ind Co Ltd | Analog filter |
| JP2004048417A (en) * | 2002-07-12 | 2004-02-12 | Mitsubishi Electric Corp | Fault detection system of signal processing circuit |
| JP2007074340A (en) * | 2005-09-07 | 2007-03-22 | Matsushita Electric Ind Co Ltd | Operational amplifier |
| CN101819252A (en) * | 2009-11-23 | 2010-09-01 | 电子科技大学 | Analog-circuit fault diagnosis method |
| CN102520218A (en) * | 2011-12-06 | 2012-06-27 | 浙江大学 | Programmable trouble power simulator |
| CN103281051A (en) * | 2013-05-22 | 2013-09-04 | 山东大学 | Quick-response low-drift active low-pass filter circuit |
| CN104639095A (en) * | 2015-03-19 | 2015-05-20 | 山东大学 | Variable parameter drift-free active low-pass filter circuit |
| CN106059510A (en) * | 2016-05-24 | 2016-10-26 | 南京大学 | Method and device for eliminating direct current drift output by capacitance coupling amplification circuit |
| CN205982600U (en) * | 2016-05-23 | 2017-02-22 | 国网浙江省电力公司紧水滩水力发电厂 | Trouble analogue test device |
| CN109884453A (en) * | 2019-03-26 | 2019-06-14 | 西南交通大学 | A kind of DC filter high-voltage capacitor fault recognition method based on parameter identification |
| CN109975433A (en) * | 2019-04-11 | 2019-07-05 | 苏芯物联技术(南京)有限公司 | A kind of dynamic and configurable band pass filter means and method for acoustic emission signal |
| CN209462347U (en) * | 2019-04-08 | 2019-10-01 | 重庆交通大学 | Intelligent control failure warning plate |
| CN211930600U (en) * | 2020-05-18 | 2020-11-13 | 南京大全电气研究院有限公司 | Intelligent low-voltage fault sensor simulation front-end conditioning circuit |
-
2021
- 2021-05-11 CN CN202110510305.7A patent/CN113219284B/en active Active
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11284446A (en) * | 1998-03-31 | 1999-10-15 | Anritsu Corp | Amplifier circuit with offset voltage drift correction circuit |
| JP2001136050A (en) * | 1999-11-02 | 2001-05-18 | Matsushita Electric Ind Co Ltd | Analog filter |
| JP2004048417A (en) * | 2002-07-12 | 2004-02-12 | Mitsubishi Electric Corp | Fault detection system of signal processing circuit |
| JP2007074340A (en) * | 2005-09-07 | 2007-03-22 | Matsushita Electric Ind Co Ltd | Operational amplifier |
| CN101819252A (en) * | 2009-11-23 | 2010-09-01 | 电子科技大学 | Analog-circuit fault diagnosis method |
| CN102520218A (en) * | 2011-12-06 | 2012-06-27 | 浙江大学 | Programmable trouble power simulator |
| CN103281051A (en) * | 2013-05-22 | 2013-09-04 | 山东大学 | Quick-response low-drift active low-pass filter circuit |
| CN104639095A (en) * | 2015-03-19 | 2015-05-20 | 山东大学 | Variable parameter drift-free active low-pass filter circuit |
| CN205982600U (en) * | 2016-05-23 | 2017-02-22 | 国网浙江省电力公司紧水滩水力发电厂 | Trouble analogue test device |
| CN106059510A (en) * | 2016-05-24 | 2016-10-26 | 南京大学 | Method and device for eliminating direct current drift output by capacitance coupling amplification circuit |
| CN109884453A (en) * | 2019-03-26 | 2019-06-14 | 西南交通大学 | A kind of DC filter high-voltage capacitor fault recognition method based on parameter identification |
| CN209462347U (en) * | 2019-04-08 | 2019-10-01 | 重庆交通大学 | Intelligent control failure warning plate |
| CN109975433A (en) * | 2019-04-11 | 2019-07-05 | 苏芯物联技术(南京)有限公司 | A kind of dynamic and configurable band pass filter means and method for acoustic emission signal |
| CN211930600U (en) * | 2020-05-18 | 2020-11-13 | 南京大全电气研究院有限公司 | Intelligent low-voltage fault sensor simulation front-end conditioning circuit |
Non-Patent Citations (3)
| Title |
|---|
| LIKUN XIA 等: "Automated Model Generation Algorithm for High-Level Fault Modeling", IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 29, no. 7, 31 July 2019 (2019-07-31), pages 1140 - 1145 * |
| 杨勇 等: "特高压直流输电系统交流滤波器电容元件击穿故障仿真研究", 电力电容器与无功补偿, no. 4, 25 August 2018 (2018-08-25), pages 7 - 12 * |
| 谢永乐: "模拟VLSI测试的小波滤波器组方法", 计算机辅助设计与图形学学报, no. 11, 15 November 2007 (2007-11-15), pages 97 - 102 * |
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