CN206042010U - Chaos circuit of net multiple wing - Google Patents

Chaos circuit of net multiple wing Download PDF

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Publication number
CN206042010U
CN206042010U CN201621088517.1U CN201621088517U CN206042010U CN 206042010 U CN206042010 U CN 206042010U CN 201621088517 U CN201621088517 U CN 201621088517U CN 206042010 U CN206042010 U CN 206042010U
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China
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operational amplifier
resistance
output end
negative input
input end
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张朝霞
唐朝晖
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Central South University
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Central South University
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Abstract

The utility model discloses a chaos circuit of net multiple wing, constitute including basic chaotic signal generator circuit N1, the sequencer N2 who is used for producing switching control function, the sequencer N3 who is used for producing switching control function, basic chaotic signal generator circuit N1's output is connected with sequencer N2, sequencer N3's input respectively, and sequencer N2, sequencer N3's output and basic chaotic signal generator circuit N1 input are connected. A sequencer makes chaos circuit of net multiple wing hardware change the realization for producing switching control function, the utility model discloses can produce the chaos system of net multiple wing for chaotic encryption nature is stronger.

Description

Grid multiple wing chaos circuit
Technical field
The present invention relates to the chaos circuit needed for chaotic secret communication, and in particular to the grid based on switching control function Multiple wing chaos circuit.
Background technology
How to produce for the various chaos circuits needed for chaotic secret communication is nonlinear circuit and system in recent years One frontier of disciplinary study, at present achieved with some related achievements in research, such as Chinese patent Authorization Notice No. The patent document of CN1199968A discloses a kind of deformed cai's circuit, Chinese patent Authorization Notice No. ZL201210129556.1 Patent document disclose a kind of composite chaotic signal circuit, but be not related to grid multiple wing chaos system, therefore, protect for chaos Also there is limitation in close communication.
The content of the invention
In order to overcome the deficiencies in the prior art, it is an object of the invention to provide grid multiple wing chaos circuit, makes chaos circuit Hardware is more easy to realize that encryption is higher.
To achieve these goals, the present invention takes below scheme：
Grid multiple wing chaos circuit, including basic Generation of Chaotic Signals N1, for producing switching control function S (y) Sequencer N2, the sequencer N3 for producing switching control function T (z)；The basic chaotic signal produces electricity The output end of road N1 is connected with the input of sequencer N2, sequencer N3 respectively, and sequencer N2, sequence occur The output end of device N3 is connected with the input of basic Generation of Chaotic Signals N1；
Wherein described basic Generation of Chaotic Signals N1 includes operational amplifier OP1, operational amplifier OP2, operation amplifier Device OP3, operational amplifier OP4, operational amplifier OP5, multiplier MUL1, multiplier MUL2With multiplier MUL3；
Wherein operational amplifier OP1Output end pass through electric capacity C1With operational amplifier OP1Negative input end connection, computing Amplifier OP1Negative input end respectively pass through resistance R1, resistance R2, resistance R3With multiplier MUL1Output end, operational amplifier OP1Output end, operational amplifier OP4Output end connection；
The operational amplifier OP2Output end pass through electric capacity C2With operational amplifier OP2Negative input end connection, computing Amplifier OP2Negative input end pass through resistance R4With operational amplifier OP5Output end connection；Operational amplifier OP2Output end It is connected with the input of sequencer N2；
The operational amplifier OP3Output end pass through electric capacity C3With operational amplifier OP3Negative input end connection, computing Amplifier OP3Negative input end respectively pass through resistance R5, resistance R6, resistance R7Input, multiplier with sequencer N3 MUL2Output end, multiplier MUL2Input two connect；The operational amplifier OP3Output end and sequencer N3 Input connection；
The operational amplifier OP4Output end pass through resistance R9With operational amplifier OP4Negative input end connection, computing Amplifier OP4Negative input end pass through resistance R8It is connected with the input of sequencer N2；
The operational amplifier OP5Output end pass through resistance R11With operational amplifier OP5Negative input end connection, computing Amplifier OP5Negative input end pass through resistance R10With operational amplifier OP1Output end connection；
The multiplier MUL2Input one, the output end respectively with sequencer N2 of input two, sequence occur The output end connection of device N3；
The multiplier MUL1Input two and multiplier MUL2Input two connect；
The multiplier MUL3Output end and multiplier MUL1Input one connect, multiplier MUL3Input one, The input respectively with sequencer N2 of input two, the input of sequencer N3 are connected；
The operational amplifier OP1, operational amplifier OP2, operational amplifier OP3, operational amplifier OP4, operational amplifier OP5Positive input terminal ground connection.
Preferably, sequencer N2 includes operational amplifier OP6, operational amplifier OP7, including operational amplifier OP8、 Including operational amplifier OP9, operational amplifier OP10, operational amplifier OP11, operational amplifier OP12, operational amplifier OP13, fortune Calculate amplifier OP14, operational amplifier OP15, operational amplifier OP16, operational amplifier OP17, operational amplifier OP18, computing puts Big device OP19, operational amplifier OP20, operational amplifier OP21, operational amplifier OP22, operational amplifier OP23, operational amplifier OP24, operational amplifier OP25, operational amplifier OP26, operational amplifier OP27With multiplier MUL4；
The operational amplifier OP6Positive input terminal and operational amplifier OP2Output end connection, operational amplifier OP6's Negative input end and operational amplifier OP6Output end connection；Operational amplifier OP6Output end and multiplier MUL4Input First, input two connects, multiplier MUL3Output end pass through resistance R12With operational amplifier OP12Negative input end connection；
The operational amplifier OP9Negative input end and operational amplifier OP2Output end connection, operational amplifier OP9's Output end passes through resistance R18With operational amplifier OP8Negative input end connection, operational amplifier OP8Negative input end pass through resistance R17With operational amplifier OP8Output end connection, operational amplifier OP8Output end pass through resistance R16With operational amplifier OP7 Negative input end connection, operational amplifier OP7Negative input end pass through resistance R14With operational amplifier OP7Output end connection, Operational amplifier OP7Output end pass sequentially through resistance R13, switch K1With operational amplifier OP12Negative input end connection；
The operational amplifier OP11Negative input end and operational amplifier OP2Output end connection, operational amplifier OP11 Output end pass through resistance R22With operational amplifier OP10Negative input end connection, operational amplifier OP10Negative input end pass through Resistance R21With operational amplifier OP10Output end connection；Operational amplifier OP10Output end pass through resistance R20With operation amplifier Device OP7Positive input terminal connection；
The operational amplifier OP15Negative input end and operational amplifier OP2Output end connection, operational amplifier OP15 Output end pass through resistance R29With operational amplifier OP14Negative input end connection, operational amplifier OP14Negative input end pass through Resistance R28With operational amplifier OP14Output end connection, operational amplifier OP14Output end pass through resistance R27With operation amplifier Device OP13Negative input end connection, operational amplifier OP13Negative input end pass through resistance R25With operational amplifier OP13Output end Connection, operational amplifier OP13Output end pass sequentially through resistance R24, switch K2With operational amplifier OP12Negative input end connect Connect；
The operational amplifier OP17Negative input end and operational amplifier OP2Output end connection, operational amplifier OP17 Output end pass through resistance R33With operational amplifier OP16Negative input end connection, operational amplifier OP16Negative input end pass through Resistance R32With operational amplifier OP16Output end connection；Operational amplifier OP16Output end pass through resistance R31With operation amplifier Device OP13Positive input terminal connection；
The operational amplifier OP20Negative input end and operational amplifier OP2Output end connection, operational amplifier OP20 Output end pass through resistance R39With operational amplifier OP19Negative input end connection, operational amplifier OP19Negative input end pass through Resistance R38With operational amplifier OP19Output end connection, operational amplifier OP19Output end pass through resistance R37With operation amplifier Device OP18Negative input end connection, operational amplifier OP18Negative input end pass through resistance R35With operational amplifier OP18Output end Connection, operational amplifier OP18Output end pass sequentially through resistance R34, switch K3With operational amplifier OP12Negative input end connect Connect；
The operational amplifier OP22Negative input end and operational amplifier OP2Output end connection, operational amplifier OP22 Output end pass through resistance R43With operational amplifier OP21Negative input end connection, operational amplifier OP21Negative input end pass through Resistance R42With operational amplifier OP21Output end connection；Operational amplifier OP21Output end pass through resistance R41With operation amplifier Device OP18Positive input terminal connection；
The operational amplifier OP25Negative input end and operational amplifier OP2Output end connection, operational amplifier OP25 Output end pass through resistance R49With operational amplifier OP24Negative input end connection, operational amplifier OP24Negative input end pass through Resistance R48With operational amplifier OP24Output end connection, operational amplifier OP24Output end pass through resistance R47With operation amplifier Device OP23Negative input end connection, operational amplifier OP23Negative input end pass through resistance R45With operational amplifier OP23Output end Connection, operational amplifier OP23Output end pass sequentially through resistance R44, switch K4With operational amplifier OP12Negative input end connect Connect；
The operational amplifier OP27Negative input end and operational amplifier OP2Output end connection, operational amplifier OP27 Output end pass through resistance R53With operational amplifier OP26Negative input end connection, operational amplifier OP26Negative input end pass through Resistance R52With operational amplifier OP26Output end connection；Operational amplifier OP26Output end pass through resistance R51With operation amplifier Device OP23Positive input terminal connection；
The operational amplifier OP12Negative input end pass through resistance R23With operational amplifier OP12Output end connection, fortune Calculate amplifier OP12Output end and multiplier MUL2Input one connect；
The operational amplifier OP9, operational amplifier OP11, operational amplifier OP15, operational amplifier OP17, operation amplifier Device OP20, operational amplifier OP22, operational amplifier OP25, operational amplifier OP27Positive input terminal be respectively connected to voltage E1, voltage E2, voltage E3, voltage E4, voltage E5, voltage E6, voltage E7, voltage E8；
The operational amplifier OP8, operational amplifier OP10, operational amplifier OP14, operational amplifier OP16, operation amplifier Device OP19, operational amplifier OP21, operational amplifier OP24, operational amplifier OP26, operational amplifier OP12Positive input termination Ground；
The operational amplifier OP7, operational amplifier OP13, operational amplifier OP18, operational amplifier OP23Positive input End passes through resistance R respectively19, resistance R30, resistance R40, resistance R50Ground connection, operational amplifier OP7, operational amplifier OP13, computing puts Big device OP18, operational amplifier OP23Negative input end respectively pass through resistance R15, resistance R26, resistance R36, resistance R46Access voltage E9, voltage E10, voltage E11, voltage E12。
Preferably, the sequencer N3 includes operational amplifier OP28With operational amplifier OP29, wherein operation amplifier Device OP28Negative input end and operational amplifier OP3Output end connection, operational amplifier OP28Output end pass through resistance R54With Operational amplifier OP29Negative input end connection, operational amplifier OP29Negative input end pass through resistance R55With operational amplifier OP29 Output end connection, operational amplifier OP29Output end and multiplier MUL2Input two connect；Operational amplifier OP29With Operational amplifier OP29Positive input terminal ground connection.
Preferably, the operational amplifier OP1～operational amplifier OP29From TL082 operational amplifiers.
Preferably, the multiplier MUL1～multiplier MUL4From AD633 multipliers.
Preferably, the resistance R1～resistance R55From accurate adjustable resistance or accurate adjustable potentiometer.
Sequencer N2, sequencer N3 produce many wing hyperchaos signals of grid as switch controller, its Hardware circuit is more easy to realize.
The present invention having the beneficial effect that compared with the prior art：1) due to being segmented chi square function sequence conduct even symmetry more Producing grid multiple wing chaotic signal, the realization of its hardware circuit is more prone to switch controller；2) using the super mixed of the present invention Ignorant circuit, can produce grid multiple wing chaotic signal, and for the encryption in communication, its performance is more preferably.
Description of the drawings
Fig. 1 is general structure schematic diagram of the present invention；
Circuit diagrams of the Fig. 2 for generation switching control function S (y) sequencer N2；
Circuit diagrams of the Fig. 3 for generation switching control function T (z) sequencer N3；
Specific embodiment
Each device in figure：
OP1～OP5：The operational amplifier of basic Generation of Chaotic Signals N1；
MUL1～MUL3：The multiplier of basic Generation of Chaotic Signals N1；
OP6～OP27：Produce the operational amplifier of switching control function S (y) sequencer N2；
OP28～OP29：Produce the operational amplifier of switching control function T (z) sequencer N3；
E1～E12：The time delay voltage of sequencer N2；
Hereinafter implement for illustrating the present invention, but be not limited to the scope of the present invention.
The output end of the basic Generation of Chaotic Signals N1 respectively with sequencer N2, sequencer N3 it is defeated Enter end connection, sequencer N2, the output end of sequencer N3 are connected with basic Generation of Chaotic Signals N1 inputs.
As shown in figure 1, grid multiple wing chaos circuit, controls including basic Generation of Chaotic Signals N1, for producing switching The sequencer N2 of function S (y) processed, the sequencer N3 for producing switching control function T (z)；The basic chaos The output end of signal generating circuit N1 is connected with the input of sequencer N2, sequencer N3 respectively, sequencer N2, the output end of sequencer N3 are connected with the input of basic Generation of Chaotic Signals N1；
Wherein described basic Generation of Chaotic Signals N1 includes operational amplifier OP1, operational amplifier OP2, operation amplifier Device OP3, operational amplifier OP4, operational amplifier OP5, multiplier MUL1, multiplier MUL2With multiplier MUL3；
Wherein operational amplifier OP1Output end pass through electric capacity C1With operational amplifier OP1Negative input end connection, computing Amplifier OP1Negative input end respectively pass through resistance R1, resistance R2, resistance R3With multiplier MUL1Output end, operational amplifier OP1Output end, operational amplifier OP4Output end connection；
The operational amplifier OP2Output end pass through electric capacity C2With operational amplifier OP2Negative input end connection, computing Amplifier OP2Negative input end pass through resistance R4With operational amplifier OP5Output end connection；Operational amplifier OP2Output end It is connected with the input of sequencer N2；
The operational amplifier OP3Output end pass through electric capacity C3With operational amplifier OP3Negative input end connection, computing Amplifier OP3Negative input end respectively pass through resistance R5, resistance R6, resistance R7Input, multiplier with sequencer N3 MUL2Output end, multiplier MUL2Input two connect；The operational amplifier OP3Output end and sequencer N3 Input connection；
The operational amplifier OP4Output end pass through resistance R9With operational amplifier OP4Negative input end connection, computing Amplifier OP4Negative input end pass through resistance R8It is connected with the input of sequencer N2；
The operational amplifier OP5Output end pass through resistance R11With operational amplifier OP5Negative input end connection, computing Amplifier OP5Negative input end pass through resistance R10With operational amplifier OP1Output end connection；
The multiplier MUL2Input one, the output end respectively with sequencer N2 of input two, sequence occur The output end connection of device N3；
The multiplier MUL1Input two and multiplier MUL2Input two connect；
The multiplier MUL3Output end and multiplier MUL1Input one connect, multiplier MUL3Input one, The input respectively with sequencer N2 of input two, the input of sequencer N3 are connected；
The operational amplifier OP1, operational amplifier OP2, operational amplifier OP3, operational amplifier OP4, operational amplifier OP5Positive input terminal ground connection.
In specific implementation process, as shown in Fig. 2 sequencer N2 includes operational amplifier OP6, operational amplifier OP7, including operational amplifier OP8, including operational amplifier OP9, operational amplifier OP10, operational amplifier OP11, operation amplifier Device OP12, operational amplifier OP13, operational amplifier OP14, operational amplifier OP15, operational amplifier OP16, operational amplifier OP17, operational amplifier OP18, operational amplifier OP19, operational amplifier OP20, operational amplifier OP21, operational amplifier OP22、 Operational amplifier OP23, operational amplifier OP24, operational amplifier OP25, operational amplifier OP26, operational amplifier OP27And multiplication Device MUL4；
The operational amplifier OP6Positive input terminal and operational amplifier OP2Output end connection, operational amplifier OP6's Negative input end and operational amplifier OP6Output end connection；Operational amplifier OP6Output end and multiplier MUL4Input First, input two connects, multiplier MUL3Output end pass through resistance R12With operational amplifier OP12Negative input end connection；
The operational amplifier OP9Negative input end and operational amplifier OP2Output end connection, operational amplifier OP9's Output end passes through resistance R18With operational amplifier OP8Negative input end connection, operational amplifier OP8Negative input end pass through resistance R17With operational amplifier OP8Output end connection, operational amplifier OP8Output end pass through resistance R16With operational amplifier OP7 Negative input end connection, operational amplifier OP7Negative input end pass through resistance R14With operational amplifier OP7Output end connection, Operational amplifier OP7Output end pass sequentially through resistance R13, switch K1With operational amplifier OP12Negative input end connection；
The operational amplifier OP11Negative input end and operational amplifier OP2Output end connection, operational amplifier OP11 Output end pass through resistance R22With operational amplifier OP10Negative input end connection, operational amplifier OP10Negative input end pass through Resistance R21With operational amplifier OP10Output end connection；Operational amplifier OP10Output end pass through resistance R20With operation amplifier Device OP7Positive input terminal connection；
The operational amplifier OP15Negative input end and operational amplifier OP2Output end connection, operational amplifier OP15 Output end pass through resistance R29With operational amplifier OP14Negative input end connection, operational amplifier OP14Negative input end pass through Resistance R28With operational amplifier OP14Output end connection, operational amplifier OP14Output end pass through resistance R27With operation amplifier Device OP13Negative input end connection, operational amplifier OP13Negative input end pass through resistance R25With operational amplifier OP13Output end Connection, operational amplifier OP13Output end pass sequentially through resistance R24, switch K2With operational amplifier OP12Negative input end connect Connect；
The operational amplifier OP17Negative input end and operational amplifier OP2Output end connection, operational amplifier OP17 Output end pass through resistance R33With operational amplifier OP16Negative input end connection, operational amplifier OP16Negative input end pass through Resistance R32With operational amplifier OP16Output end connection；Operational amplifier OP16Output end pass through resistance R31With operation amplifier Device OP13Positive input terminal connection；
The operational amplifier OP20Negative input end and operational amplifier OP2Output end connection, operational amplifier OP20 Output end pass through resistance R39With operational amplifier OP19Negative input end connection, operational amplifier OP19Negative input end pass through Resistance R38With operational amplifier OP19Output end connection, operational amplifier OP19Output end pass through resistance R37With operation amplifier Device OP18Negative input end connection, operational amplifier OP18Negative input end pass through resistance R35With operational amplifier OP18Output end Connection, operational amplifier OP18Output end pass sequentially through resistance R34, switch K3With operational amplifier OP12Negative input end connect Connect；
The operational amplifier OP22Negative input end and operational amplifier OP2Output end connection, operational amplifier OP22 Output end pass through resistance R43With operational amplifier OP21Negative input end connection, operational amplifier OP21Negative input end pass through Resistance R42With operational amplifier OP21Output end connection；Operational amplifier OP21Output end pass through resistance R41With operation amplifier Device OP18Positive input terminal connection；
The operational amplifier OP25Negative input end and operational amplifier OP2Output end connection, operational amplifier OP25 Output end pass through resistance R49With operational amplifier OP24Negative input end connection, operational amplifier OP24Negative input end pass through Resistance R48With operational amplifier OP24Output end connection, operational amplifier OP24Output end pass through resistance R47With operation amplifier Device OP23Negative input end connection, operational amplifier OP23Negative input end pass through resistance R45With operational amplifier OP23Output end Connection, operational amplifier OP23Output end pass sequentially through resistance R44, switch K4With operational amplifier OP12Negative input end connect Connect；
The operational amplifier OP27Negative input end and operational amplifier OP2Output end connection, operational amplifier OP27 Output end pass through resistance R53With operational amplifier OP26Negative input end connection, operational amplifier OP26Negative input end pass through Resistance R52With operational amplifier OP26Output end connection；Operational amplifier OP26Output end pass through resistance R51With operation amplifier Device OP23Positive input terminal connection；
The operational amplifier OP12Negative input end pass through resistance R23With operational amplifier OP12Output end connection, fortune Calculate amplifier OP12Output end and multiplier MUL2Input one connect；
The operational amplifier OP9, operational amplifier OP11, operational amplifier OP15, operational amplifier OP17, operation amplifier Device OP20, operational amplifier OP22, operational amplifier OP25, operational amplifier OP27Positive input terminal be respectively connected to voltage E1, voltage E2, voltage E3, voltage E4, voltage E5, voltage E6, voltage E7, voltage E8；
The operational amplifier OP8, operational amplifier OP10, operational amplifier OP14, operational amplifier OP16, operation amplifier Device OP19, operational amplifier OP21, operational amplifier OP24, operational amplifier OP26, operational amplifier OP12Positive input termination Ground；
The operational amplifier OP7, operational amplifier OP13, operational amplifier OP18, operational amplifier OP23Positive input End passes through resistance R respectively19, resistance R30, resistance R40, resistance R50Ground connection, operational amplifier OP7, operational amplifier OP13, computing puts Big device OP18, operational amplifier OP23Negative input end respectively pass through resistance R15, resistance R26, resistance R36, resistance R46Access voltage E9, voltage E10, voltage E11, voltage E12。
In specific implementation process, as shown in figure 3, the sequencer N3 includes operational amplifier OP28And computing Amplifier OP29, wherein operational amplifier OP28Negative input end and operational amplifier OP3Output end connection, operational amplifier OP28Output end pass through resistance R54With operational amplifier OP29Negative input end connection, operational amplifier OP29Negative input end lead to Cross resistance R55With operational amplifier OP29Output end connection, operational amplifier OP29Output end and multiplier MUL2Input End two connects；Operational amplifier OP29With operational amplifier OP29Positive input terminal ground connection.
Connect circuit according to Fig. 1-Fig. 3, according to the data that table 1, table 2, table 3 are provided, it may be determined that each components and parts in each figure Parameter.Circuit produces the grid multiple wing chaotic signal based on switching control, on off state and the wing number of sequencer N2 The corresponding relation of amount is as shown in table 4.
According to Fig. 2, the mathematic(al) representation for obtaining switching control function S (y) of sequencer N2 is
In above formula, N=4, H0=2, H1=2.825, H2=4.645, H3=5.854, H4=6.432, E1=1.755, E2 =2.675, E3=3.525, E4=4.295.
According to Fig. 3, the mathematic(al) representation for obtaining switching control function T (z) of sequencer N3 is
T (z)=sgn (z) (2)
According to Fig. 1, under the state equation that can produce grid multiple wing chaotic signal is
Wherein, work as z0=0.35, z0=0.35, z0=0.3, z0=0.23, z0When=0.2,2 × 2,4 × 2,6 are produced respectively × 2,8 × 2,10 × 2 wing chaotic signals.
The selection of component of the present invention and supply voltage：All of operational amplifier, model in Fig. 1～Fig. 3 TL082, supply voltage are ± E=± 15V, and it is V that experiment measures the saturation value of now each op-amp output voltagesat=± 13.5V.All of multiplier in Fig. 1～Fig. 2, model AD633, supply voltage are ± E=± 15V.For the ease of circuit reality Test, in order to ensure the accuracy of resistance value, in Fig. 1～Fig. 3, all resistance are using accurate adjustable resistance or accurate adjustable potential Device.
Component parameter table of the present invention is as follows：
1 (unit of table：kΩ)
R1 5 R2 500 R4 1000
R5 10 R6 1000 R8 10
R9 10 R10 10 R11 10
2 (unit of table：V)
E1 1.755 E2 -1.755 E3 2.675
E4 -2.675 E5 3.525 E6 -3.525
E7 4.295 E8 -4.295 E9 2
E10 2 E11 2 E12 2
3 (unit of table：kΩ)
R12 50 R13 350.88 R14 10
R15 10 R16 10 R17 1
R18 13.5 R19 5 R20 10
R21 1 R22 13.5 R23 100
R24 215.28 R25 10 R26 10
R27 10 R28 1 R29 13.5
R30 5 R31 10 R32 1
R33 13.5 R34 170.82 R35 10
R36 10 R37 10 R38 1
R39 13.5 R40 5 R41 10
R42 1 R43 13.5 R44 155.47
R45 10 R46 10 R47 10
R48 1 R49 13.5 R50 5
R51 10 R52 1 R53 13.5
R54 13.5 R55 1
Resistance R in 4 Fig. 2 of table3、R7, on off state and wing quantity corresponding relation
R3 R7 K1 K2 K3 K4 Wing quantity
166.67 2857 Disconnect Disconnect Disconnect Disconnect 2×2
166.67 2857 Connect Disconnect Disconnect Disconnect 4×2
163.93 3333 Connect Connect Disconnect Disconnect 6×2
160.26 4347.8 Connect Connect Connect Disconnect 8×2
158.73 5000 Connect Connect Connect Connect 10×2

Claims (6)

1. grid multiple wing chaos circuit, it is characterised in that including basic Generation of Chaotic Signals N1, for producing switching control The sequencer N2 of function S (y), the sequencer N3 for producing switching control function T (z)；The basic chaos letter Number produce circuit N1 output end be connected with the input of sequencer N2, sequencer N3 respectively, sequencer N2, The output end of sequencer N3 is connected with the input of basic Generation of Chaotic Signals N1；
Wherein described basic Generation of Chaotic Signals N1 includes operational amplifier OP1, operational amplifier OP2, operational amplifier OP3, operational amplifier OP4, operational amplifier OP5, multiplier MUL1, multiplier MUL2With multiplier MUL3；
Wherein operational amplifier OP1Output end pass through electric capacity C1With operational amplifier OP1Negative input end connection, operation amplifier Device OP1Negative input end respectively pass through resistance R1, resistance R2, resistance R3With multiplier MUL1Output end, operational amplifier OP1's Output end, operational amplifier OP4Output end connection；
The operational amplifier OP2Output end pass through electric capacity C2With operational amplifier OP2Negative input end connection, operation amplifier Device OP2Negative input end pass through resistance R4With operational amplifier OP5Output end connection；Operational amplifier OP2Output end and sequence The input connection of row generator N2；
The operational amplifier OP3Output end pass through electric capacity C3With operational amplifier OP3Negative input end connection, operation amplifier Device OP3Negative input end respectively pass through resistance R5, resistance R6, resistance R7Input, multiplier MUL with sequencer N32's Output end, multiplier MUL2Input two connect；The operational amplifier OP3Output end and sequencer N3 input End connection；
The operational amplifier OP4Output end pass through resistance R9With operational amplifier OP4Negative input end connection, operation amplifier Device OP4Negative input end pass through resistance R8It is connected with the input of sequencer N2；
The operational amplifier OP5Output end pass through resistance R11With operational amplifier OP5Negative input end connection, operation amplifier Device OP5Negative input end pass through resistance R10With operational amplifier OP1Output end connection；
The multiplier MUL2Input one, input two output end respectively with sequencer N2, sequencer N3 Output end connects；
The multiplier MUL1Input two and multiplier MUL2Input two connect；
The multiplier MUL3Output end and multiplier MUL1Input one connect, multiplier MUL3Input one, input Two input respectively with sequencer N2 of end, the input of sequencer N3 are connected；
The operational amplifier OP1, operational amplifier OP2, operational amplifier OP3, operational amplifier OP4, operational amplifier OP5's Positive input terminal is grounded.
2. grid multiple wing chaos circuit according to claim 1, it is characterised in that sequencer N2 includes operation amplifier Device OP6, operational amplifier OP7, including operational amplifier OP8, including operational amplifier OP9, operational amplifier OP10, operation amplifier Device OP11, operational amplifier OP12, operational amplifier OP13, operational amplifier OP14, operational amplifier OP15, operational amplifier OP16, operational amplifier OP17, operational amplifier OP18, operational amplifier OP19, operational amplifier OP20, operational amplifier OP21、 Operational amplifier OP22, operational amplifier OP23, operational amplifier OP24, operational amplifier OP25, operational amplifier OP26, computing Amplifier OP27With multiplier MUL4；
The operational amplifier OP6Positive input terminal and operational amplifier OP2Output end connection, operational amplifier OP6It is negative defeated Enter end and operational amplifier OP6Output end connection；Operational amplifier OP6Output end and multiplier MUL4Input one, defeated Enter two connections of end, multiplier MUL3Output end pass through resistance R12With operational amplifier OP12Negative input end connection；
The operational amplifier OP9Negative input end and operational amplifier OP2Output end connection, operational amplifier OP9Output End is by resistance R18With operational amplifier OP8Negative input end connection, operational amplifier OP8Negative input end pass through resistance R17With Operational amplifier OP8Output end connection, operational amplifier OP8Output end pass through resistance R16With operational amplifier OP7It is negative defeated Enter end connection, operational amplifier OP7Negative input end pass through resistance R14With operational amplifier OP7Output end connection, computing puts Big device OP7Output end pass sequentially through resistance R13, switch K1With operational amplifier OP12Negative input end connection；
The operational amplifier OP11Negative input end and operational amplifier OP2Output end connection, operational amplifier OP11It is defeated Go out end by resistance R22With operational amplifier OP10Negative input end connection, operational amplifier OP10Negative input end pass through resistance R21With operational amplifier OP10Output end connection；Operational amplifier OP10Output end pass through resistance R20With operational amplifier OP7 Positive input terminal connection；
The operational amplifier OP15Negative input end and operational amplifier OP2Output end connection, operational amplifier OP15It is defeated Go out end by resistance R29With operational amplifier OP14Negative input end connection, operational amplifier OP14Negative input end pass through resistance R28With operational amplifier OP14Output end connection, operational amplifier OP14Output end pass through resistance R27With operational amplifier OP13Negative input end connection, operational amplifier OP13Negative input end pass through resistance R25With operational amplifier OP13Output end connect Connect, operational amplifier OP13Output end pass sequentially through resistance R24, switch K2With operational amplifier OP12Negative input end connection；
The operational amplifier OP17Negative input end and operational amplifier OP2Output end connection, operational amplifier OP17It is defeated Go out end by resistance R33With operational amplifier OP16Negative input end connection, operational amplifier OP16Negative input end pass through resistance R32With operational amplifier OP16Output end connection；Operational amplifier OP16Output end pass through resistance R31With operational amplifier OP13Positive input terminal connection；
The operational amplifier OP20Negative input end and operational amplifier OP2Output end connection, operational amplifier OP20It is defeated Go out end by resistance R39With operational amplifier OP19Negative input end connection, operational amplifier OP19Negative input end pass through resistance R38With operational amplifier OP19Output end connection, operational amplifier OP19Output end pass through resistance R37With operational amplifier OP18Negative input end connection, operational amplifier OP18Negative input end pass through resistance R35With operational amplifier OP18Output end connect Connect, operational amplifier OP18Output end pass sequentially through resistance R34, switch K3With operational amplifier OP12Negative input end connection；
The operational amplifier OP22Negative input end and operational amplifier OP2Output end connection, operational amplifier OP22It is defeated Go out end by resistance R43With operational amplifier OP21Negative input end connection, operational amplifier OP21Negative input end pass through resistance R42With operational amplifier OP21Output end connection；Operational amplifier OP21Output end pass through resistance R41With operational amplifier OP18Positive input terminal connection；
The operational amplifier OP25Negative input end and operational amplifier OP2Output end connection, operational amplifier OP25It is defeated Go out end by resistance R49With operational amplifier OP24Negative input end connection, operational amplifier OP24Negative input end pass through resistance R48With operational amplifier OP24Output end connection, operational amplifier OP24Output end pass through resistance R47With operational amplifier OP23Negative input end connection, operational amplifier OP23Negative input end pass through resistance R45With operational amplifier OP23Output end connect Connect, operational amplifier OP23Output end pass sequentially through resistance R44, switch K4With operational amplifier OP12Negative input end connection；
The operational amplifier OP27Negative input end and operational amplifier OP2Output end connection, operational amplifier OP27It is defeated Go out end by resistance R53With operational amplifier OP26Negative input end connection, operational amplifier OP26Negative input end pass through resistance R52With operational amplifier OP26Output end connection；Operational amplifier OP26Output end pass through resistance R51With operational amplifier OP23Positive input terminal connection；
The operational amplifier OP12Negative input end pass through resistance R23With operational amplifier OP12Output end connection, computing puts Big device OP12Output end and multiplier MUL2Input one connect；
The operational amplifier OP9, operational amplifier OP11, operational amplifier OP15, operational amplifier OP17, operational amplifier OP20, operational amplifier OP22, operational amplifier OP25, operational amplifier OP27Positive input terminal be respectively connected to voltage E1, voltage E2, voltage E3, voltage E4, voltage E5, voltage E6, voltage E7, voltage E8；
The operational amplifier OP8, operational amplifier OP10, operational amplifier OP14, operational amplifier OP16, operational amplifier OP19, operational amplifier OP21, operational amplifier OP24, operational amplifier OP26, operational amplifier OP12Positive input terminal ground connection；
The operational amplifier OP7, operational amplifier OP13, operational amplifier OP18, operational amplifier OP23Positive input terminal difference By resistance R19, resistance R30, resistance R40, resistance R50Ground connection, operational amplifier OP7, operational amplifier OP13, operational amplifier OP18, operational amplifier OP23Negative input end respectively pass through resistance R15, resistance R26, resistance R36, resistance R46Access voltage E9, electricity Pressure E10, voltage E11, voltage E12。
3. grid multiple wing chaos circuit according to claim 2, it is characterised in that the sequencer N3 includes computing Amplifier OP28With operational amplifier OP29, wherein operational amplifier OP28Negative input end and operational amplifier OP3Output end Connection, operational amplifier OP28Output end pass through resistance R54With operational amplifier OP29Negative input end connection, operational amplifier OP29Negative input end pass through resistance R55With operational amplifier OP29Output end connection, operational amplifier OP29Output end with take advantage of Musical instruments used in a Buddhist or Taoist mass MUL2Input two connect；Operational amplifier OP29With operational amplifier OP29Positive input terminal ground connection.
4. grid multiple wing chaos circuit according to claim 3, it is characterised in that the operational amplifier OP1～computing is put Big device OP29From TL082 operational amplifiers.
5. grid multiple wing chaos circuit according to claim 3, it is characterised in that the multiplier MUL1～multiplier MUL4From AD633 multipliers.
6. grid multiple wing chaos circuit according to claim 3, it is characterised in that the resistance R1～resistance R55From essence Close adjustable resistance or accurate adjustable potentiometer.
CN201621088517.1U 2016-09-28 2016-09-28 Chaos circuit of net multiple wing Expired - Fee Related CN206042010U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107294699A (en) * 2017-08-08 2017-10-24 佛山科学技术学院 A kind of three-dimensional multi-scroll chaotic signals generator
CN108599921A (en) * 2018-06-27 2018-09-28 佛山科学技术学院 A kind of grid multi-scroll chaotic signals generator
CN109361503A (en) * 2018-12-25 2019-02-19 佛山科学技术学院 A kind of multiple scrolls circuit based on sawtooth wave Anti-control for chaos

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107294699A (en) * 2017-08-08 2017-10-24 佛山科学技术学院 A kind of three-dimensional multi-scroll chaotic signals generator
CN107294699B (en) * 2017-08-08 2023-03-31 佛山科学技术学院 Three-dimensional multi-scroll chaotic signal generator
CN108599921A (en) * 2018-06-27 2018-09-28 佛山科学技术学院 A kind of grid multi-scroll chaotic signals generator
CN108599921B (en) * 2018-06-27 2023-11-03 佛山科学技术学院 Grid multi-scroll chaotic signal generator
CN109361503A (en) * 2018-12-25 2019-02-19 佛山科学技术学院 A kind of multiple scrolls circuit based on sawtooth wave Anti-control for chaos
CN109361503B (en) * 2018-12-25 2023-08-22 佛山科学技术学院 Multi-scroll circuit based on sawtooth wave chaos inverse control

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