CN113176482B - Test circuit, test system and test method thereof - Google Patents
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
- G01R31/2623—Circuits therefor for testing field effect transistors, i.e. FET's for measuring break-down voltage therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
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- G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
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Abstract
The invention provides a test circuit, a test system and a test method thereof.A ring oscillator in the test circuit starts oscillation under a first level signal sent by an enabling signal to generate an alternating current signal, a phase inverter module is conducted under the enabling signal, and the alternating current signal is loaded on a tested device through a phase inverter; under a second level signal sent by the enable signal, the ring oscillator stops oscillating, the inverter module is turned off, and related direct current tests can be performed on the tested device at the moment, so that test equipment and test steps are simplified, test time is saved, and test efficiency is improved.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing, and in particular, to a test circuit, a test system, and a test method thereof.
Background
In semiconductor manufacturing, both the TDDB (Time Dependent Dielectric Breakdown) test and the BTI (Bias Temperature instability) performance test are very important reliability test methods, which can be used to predict the lifetime of a semiconductor device.
However, with current processes, the devices typically operate at very high frequencies. Conventional dc TDDB and BTI tests underestimate device lifetime, and ac TDDB and BTI tests are critical to assessing device lifetime under actual operating conditions.
Conventional ac TDDB and BTI tests require an ac signal tester to be performed with an SMU (Source measurement Unit). The ac signal tester applies an ac signal to the device under test, and the SMU measures current and voltage or leakage current of the device under test.
Therefore, to complete the ac TDDB and BTI tests, not only a complex test system (including an ac signal tester and an SMU) is required, but also a fast switching between an ac signal and a dc signal is required, and thus the test system is complex, cumbersome to operate, and inefficient to test.
Disclosure of Invention
The embodiment of the invention provides a test circuit, a test system and a test method thereof, which simplify the test system and test steps and improve the test efficiency.
To solve the above problem, an embodiment of the present invention provides a test circuit for providing an ac signal to a device under test under control of an enable signal, where the enable signal includes a first level signal and a second level signal that are sequentially output, and the first level signal is different from the second level signal, including: the ring oscillator is used for receiving the enabling signal and starting oscillation when receiving the first level signal to generate an alternating current signal; the input end of the inverter module is connected with the output end of the ring oscillator and used for receiving the alternating current signal, and the output end of the inverter module is connected with the device to be tested; the inverter module is further configured to be turned on when receiving the first level signal and turned off when receiving the second level signal.
Optionally, the device under test is a MOSFET device, and the output of the inverter module is connected to the gate of the device under test.
Optionally, the ring oscillator comprises: a NAND gate circuit, a first input end of the NAND gate circuit is used for receiving the enabling signal; and the output ends of the plurality of inverters connected in series are connected to the second input end of the NAND gate circuit to form a loop.
Optionally, the number of the plurality of inverters connected in series is an even number.
Optionally, the inverter module comprises: the MOSFET switch device is conducted under the action of the enabling signal; the inverter module further comprises a CMOS inverter; the CMOS phase inverter comprises a P-type MOSFET and an N-type MOSFET, the grid electrode of the P-type MOSFET is connected with the grid electrode of the N-type MOSFET to serve as the input end of the CMOS phase inverter, and the drain electrode of the P-type MOSFET is connected with the drain electrode of the N-type MOSFET to serve as the output end of the CMOS phase inverter.
Optionally, the MOSFET switching device comprises: a first MOSFET switch device and a second MOSFET switch device; the drain electrode of the first MOSFET switching device is connected to a voltage source, the source electrode of the first MOSFET switching device is connected to the source electrode of the P-type MOSFET, and the grid electrode of the first MOSFET switching device is used for loading the enabling signal; the drain electrode of the second MOSFET switch device is connected to the source electrode of the N-type MOSFET, the source electrode of the second MOSFET switch device is connected to the ground terminal, and the grid electrode of the second MOSFET switch device is used for loading the enabling signal.
Optionally, the MOSFET switch device is an NMOS.
Accordingly, an embodiment of the present invention provides a test system, configured to test a device under test, including: the detection equipment is used for carrying out performance test on the device under test; the test circuit provided by the embodiment of the invention is used for providing an alternating current signal for a tested device; a voltage source for providing a supply voltage to the inverter module; an enable signal source for providing an enable signal to the ring oscillator and the inverter module.
Optionally, the detection device is a dc test device.
Optionally, the dc test device comprises an oscilloscope.
Correspondingly, an embodiment of the present invention provides a test method, including: providing a test system of an embodiment of the invention; loading the first level signal to the ring oscillator and the inverter module to enable the ring oscillator to generate an alternating current signal and enable the inverter module to be conducted; loading the second level signal to the ring oscillator and the inverter module to stop the ring oscillator from oscillating and turn off the inverter module; and carrying out performance test on the device under test by utilizing the detection equipment.
Optionally, the performance test comprises measuring performance parameters of the device under test, the performance parameters comprising one or more of a threshold voltage, a saturation circuit, a linear current, a transconductance, and a leakage current of the device under test.
Optionally, the method further comprises: and loading the enabling signal to the ring oscillator and the inverter module for multiple times, wherein the strength and the time of the enabling signal applied each time are different, and obtaining multiple measurement data corresponding to the strength and the time of the enabling signal.
Optionally, the method further comprises: and after the enabling signal is applied for multiple times, obtaining a performance test result of the tested device according to the multiple measurement data.
In the technical scheme provided by the embodiment of the invention, the ring oscillator starts oscillation under an enable signal to generate an alternating current signal, the inverter module is conducted under the enable signal, and the alternating current signal is loaded on a device to be tested through the inverter; the enabling signal is cut off, the inverter module is turned off, and at the moment, the related direct current test can be carried out on the tested device; according to the technical scheme of the embodiment of the invention, the alternating current test equipment is prevented from loading the alternating current signal to the tested device, so that the test equipment is simplified; and secondly, conversion between alternating current test equipment and direct current test equipment is not needed, so that the test steps are simplified, the test time is saved, and the test efficiency is improved.
Drawings
FIG. 1 is a schematic diagram of a test system.
FIG. 2 is a schematic diagram of a test circuit according to an embodiment of the present invention.
FIG. 3 is a block diagram of a ring oscillator and inverter module in a test circuit according to an embodiment of the present invention.
FIG. 4 is a flow chart of a testing method according to an embodiment of the present invention.
Detailed Description
As can be seen from the background art, the test system and the test method in the prior art are complex, the test method is complicated to operate, and the test efficiency needs to be improved. The reason for the problem is now analyzed in conjunction with the test system and method.
FIG. 1 shows a schematic diagram of a test system.
Referring to fig. 1, the Test system includes a DUT 10 (Device Under Test), an AC Test apparatus 11, and a DC Test apparatus 12.
The AC test device 11 is used for providing an alternating current signal for the DUT 10, and the DC test device is used for testing performance parameters such as current-voltage characteristics (IV characteristics) and leakage current of the DUT 10 so as to obtain performance variation conditions of the DUT 10 under the AC signal, thereby obtaining the results of service life, reliability and the like of the DUT 10. The DUT 10 is first connected to an AC test apparatus 11, continues to operate for a period of time under the action of the AC signal provided by the AC test apparatus 11, is then disconnected from the AC test apparatus 11, is connected to the DC test apparatus 12, and measures the electrical performance parameters of the DUT 10, and so on, repeatedly, so as to obtain a plurality of AC signals and measurement results of the IV characteristic, the leakage current, and the like of the DUT 10 over the test time, and further obtain test results of the lifetime, the reliability, and the like of the DUT 10.
The test system and the test method need two test devices and need to be switched continuously between the two test devices, so that the test time is long, the test operation is complicated, and the test efficiency is low.
To solve the above problem, an embodiment of the present invention provides a test circuit, a test system and a test method thereof, where the test circuit is configured to provide an ac signal to a device under test under control of an enable signal, the enable signal includes a first level signal and a second level signal that are sequentially output, and the first level signal is different from the second level signal, and the test circuit includes: the ring oscillator is used for receiving the enabling signal and starting oscillation when receiving the first level signal to generate an alternating current signal; the input end of the inverter module is connected with the output end of the ring oscillator and used for receiving the alternating current signal, and the output end of the inverter module is connected with the device to be tested; the inverter module is further configured to be turned on when receiving the first level signal and turned off when receiving the second level signal. According to the technical scheme of the embodiment of the invention, the alternating current test equipment is prevented from loading the alternating current signal to the tested device, so that the test equipment is simplified; and secondly, conversion between alternating current test equipment and direct current test equipment is not needed, so that the test steps are simplified, the test time is saved, and the test efficiency is improved.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
FIG. 2 is a schematic diagram of a test circuit according to an embodiment of the present invention. The test circuit 20 is configured to provide an ac signal to the device under test 203 under control of an enable signal, where the enable signal includes a first level signal and a second level signal that are sequentially output, and the first level signal is different from the second level signal, and the test circuit 20 includes: the ring oscillator 201 is used for receiving the enable signal and starting oscillation when receiving the first level signal to generate an alternating current signal; an inverter module 202 having an input connected to the output of the ring oscillator 201 for receiving the ac signal and an output connected to the device under test 203; the inverter module 202 is further configured to turn on when receiving the first level signal and turn off when receiving the second level signal.
The alternating current signal generated by the ring oscillator 201 is loaded onto the device under test 203 through the inverter module 202, after a certain length of time, the inverter module 202 is turned off when receiving the second level signal, and the loading of the alternating current signal to the device under test 203 is stopped, at this time, the related direct current test can be performed on the device under test 203.
The output voltage of the inverting input arithmetic circuit is opposite in phase to the input voltage, and the input resistance of the inverting input arithmetic circuit is usually large, so that a high voltage can be obtained for a signal with a small current. In addition, the output resistance of the inverting input operation circuit is almost zero, under the condition that the output voltage is not changed, a large current can be obtained, and the load can be easily pushed to work through the large current, so that the load carrying capacity is strong. In the embodiment of the present invention, the inverter module 202 belongs to an inverting input operation circuit, and therefore, the functions of stabilizing the ac signal and improving the load capacity of the belt can be achieved, so that the signal loaded on the device under test 203 is more stable.
Specifically, the device under test 203 is a MOSFET device, and since the BTI test usually measures parameters such as threshold Voltage (VTH), saturation current, linear current, transconductance and the like when the MOSFET is affected by temperature stress, an ac signal should be loaded on the gate of the device under test 203, in the embodiment of the present invention, the output end signal of the inverter module 202 is loaded on the gate of the device under test 203.
FIG. 3 is a block diagram of a ring oscillator and inverter module in a test circuit according to an embodiment of the present invention. Referring to fig. 3, the ring oscillator 201 includes: a nand gate circuit 301, wherein an input end a of the nand gate 301 is used for receiving the enable signal; the inverters 302 connected in series are connected to the output end of the nand gate circuit 301, and the output ends of the inverters 302 connected in series are connected to the second input end B of the nand gate circuit 301 to form a loop.
Specifically, the even number of inverters 302 can shape and delay the output signal of the nand gate circuit 301.
Specifically, referring to the drawings, when the logic level of the enable signal applied to the first input terminal a of the nand gate 301 is 1, that is, when the first input terminal a of the nand gate 301 receives a signal of 1, the output terminal signal of the nand gate 301 is an inverted signal of the signal at the second input terminal B, the inverted signal passes through an even number of inverters 302 and then a certain delay is generated, the delayed inverted signal is applied from the output terminal 303 to the second input terminal B, at this time, the inverted signal passes through the inversion of the nand gate 301 and becomes a positive-phase signal, and so on, the ring oscillator 201 starts to oscillate, thereby generating an ac signal at the output terminal 303.
When the logic level of the enable signal applied to the first input terminal a of the nand gate circuit 301 is 0, that is, when the signal received by the first input terminal a of the nand gate circuit 301 is 0, if the signal at the second input terminal B is 1, the output terminal signal of the nand gate circuit 301 is also 1, and an inverted signal cannot be generated, at this time, after an even number of the inverters 302, the signal applied to the second input terminal B by the signal at the output terminal 303 is unchanged, so that oscillation stops.
When the logic level of the enable signal applied to the first input a of the nand gate circuit 301 is 0, that is, the signal received at the first input a of the nand gate circuit 301 is 0, if the signal at the second input B is 0, the output signal of the nand gate circuit 301 is 1, and after passing through an even number of the inverters 302, the signal reaching the second input B is 1, and as described above, when the signal at the first input a is 0 and the signal at the second input B is 1, the oscillation stops.
Thus, when the enable signal logic level is 0, the ring oscillator 201 stops oscillating. As can be seen, the enable signal may switch the ring oscillator 201.
With continued reference to fig. 3, the inverter module 202 includes: a MOSFET switching device and a CMOS inverter; the CMOS inverter comprises a P-type MOSFET T307 and an N-type MOSFET308, the grid electrode of the P-type MOSFET 307T is connected with the grid electrode of the N-type MOSFET308 to serve as the input end of the CMOS inverter, the drain electrode of the P-type MOSFET307 is connected with the drain electrode of the N-type MOSFET308 to serve as the output end of the CMOS inverter, and the MOSFET switch device is conducted under the action of the enabling signal.
In an embodiment of the present invention, the MOSFET switching device includes: a first MOSFET switch device 305, a second MOSFET switch device 306; wherein the drain of the first MOSFET switch device 305 is connected to a voltage source 309, the source is connected to the source of the P-type MOSFET307, and the enable signal is applied to the gate; the drain of the second MOSFET switch device 306 is connected to the source of the N-type MOSFET308, the source is connected to ground 310, and the enable signal is applied to the gate.
Since the inverter module 202 is turned on when the enable signal is at a high level, that is, the MOSFET switch device is turned on when the turn-on voltage loaded on the MOSFET switch device is higher than a certain voltage, in this embodiment of the present invention, the MOSFET switch device is an NMOS. In addition, the NMOS has the characteristics of small on-resistance and relative simple manufacture as a switching device.
Specifically, the voltage when the enable signal has a logic level of 1 is higher than the turn-on voltage of the first MOSFET switch device 305 and the second MOSFET switch device 306, at this time, the first MOSFET switch device 305 and the second MOSFET switch device 306 are turned on, the supply voltage of the voltage source 309 passes through the first MOSFET switch device 305 and then acts on the source of the P-type MOSFET307, so that the source of the N-type MOSFET308 passes through the ground 310 of the second MOSFET switch device 306, and the CMOS is in a supplied state.
As mentioned above, when the logic level of the enable signal is 1, an ac signal is generated at the output terminal 303, the ac signal is applied to the input terminal of the CMOS inverter, i.e., the gates of the P-type MOSFET307 and the N-type MOSFET308, and the input noise tolerance of the CMOS inverter can reach VDD/2, so that the interference immunity is strong; meanwhile, the input impedance of the CMOS inverter is high, so that high voltage can be obtained only by a signal with small current; in addition, the output resistance of the CMOS inverter is small, and a large current can be obtained under the condition that the output voltage is not changed, and the large current can easily push a load to work, that is, the load carrying capability is strong.
In the embodiment of the present invention, the first MOSFET switch device 305 and the second MOSFET switch device 306 can also play a role in stabilizing the power supply voltage and stabilizing the ground terminal voltage in addition to the switching role, and specifically, the first MOSFET switch device 305 stabilizes the power supply voltage, and the second MOSFET switch device 306 stabilizes the ground terminal voltage, so that the CMOS inverter can be in a more stable operating state.
In the embodiment of the present invention, the voltage when the logic level of the enable signal is 0 is lower than the turn-on voltage of the first MOSFET switch device 305 and the second MOSFET switch device 306, so that, when the logic level of the enable signal is 0, referring to fig. 3, the first MOSFET switch device 305 and the second MOSFET switch device 306 are turned off, the CMOS inverter loses the supply voltage and becomes a high impedance state, thereby disconnecting the connection between the ring oscillator 201 and the device under test 203, and the ac signal loading process is stopped.
It should be noted that, in other embodiments of the present invention, the MOSFET switch device may further include only one MOSFET switch device, a drain of the MOSFET switch device is connected to a voltage source, a source of the MOSFET switch device is connected to a source of the P-type MOSFET, the enable signal is applied to the source of the MOSFET switch device, and the source of the N-type MOSFET is connected to a ground terminal.
Accordingly, an embodiment of the present invention further provides a test system for testing a device under test, and referring to fig. 2 and fig. 3, the test system is an embodiment of the present invention, and is used for testing a device under test 203, and includes: a test apparatus 311 for performing a performance test on the device under test 203; the test circuit 20 as described above for providing an alternating current signal to a device under test; a voltage source 309 for providing a supply voltage to the inverter module 202; an enable signal source 304 for providing an enable signal to the ring oscillator 201 and the inverter module 202.
Specifically, the detection device 311 is a direct current test device, and includes an oscilloscope. The test result can be visually observed or analyzed through the oscilloscope. The test equipment may be connected to the source, drain, gate and substrate of the device under test 203, and measure one or more of the parameters including current-voltage relationship and leakage current, according to various test requirements.
Correspondingly, an embodiment of the present invention further provides a testing method, and referring to fig. 4, which is a flowchart of the testing method according to the embodiment of the present invention, and with reference to fig. 2 and fig. 3, the testing method includes: providing the test system of the embodiment of the invention; the method comprises the following steps:
step 41, loading the second level signal to the ring oscillator 201 and the inverter module 202, stopping oscillation of the ring oscillator 201, and turning off the inverter module 202;
and step 42, performing performance test on the device under test 203 by using the detection equipment 311.
The performance test includes measuring performance parameters of the device under test 203 including one or more of threshold voltage, saturation circuit, linear current, transconductance, leakage current, etc. of the device under test 203.
Specifically, the ac signal is loaded on the device under test 203, after a period of loading time, the loading of the enable signal is stopped, the loading time and the loading signal strength are recorded, and then the detection device 311 is used to perform the performance test on the device under test 203.
The test method further comprises: the enable signal is applied to the ring oscillator 201 and the inverter module 202 a plurality of times, and the strength and time of the signal applied each time are the same or different, thereby obtaining a plurality of measurement data corresponding to the strength and time of the enable signal.
The test method further comprises the following steps: after applying the enable signal for a plurality of times, a performance test result of the device under test 203 is obtained according to the plurality of measurement data.
To sum up, in the technical solution provided in the embodiment of the present invention, the ring oscillator is configured to receive the enable signal, and start oscillation when receiving the first level signal, so as to generate an ac signal; the input end of the inverter module is connected with the output end of the ring oscillator and used for receiving the alternating current signal, and the output end of the inverter module is connected with the device to be tested; the inverter is also used for conducting when receiving the first level signal and conducting when receiving the second level signal, and then relevant direct current test can be carried out on the tested device. Firstly, the technical scheme of the embodiment of the invention avoids using alternating current test equipment to load alternating current signals on the tested device, thereby simplifying the test equipment; and secondly, conversion between alternating current test equipment and direct current test equipment is not needed, so that the test steps are simplified, the test time is saved, and the test efficiency is improved.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (12)
1. A test circuit for providing an ac signal to a device under test under control of an enable signal, the enable signal including a first level signal and a second level signal output sequentially, the first level signal being different from the second level signal, the test circuit comprising:
the ring oscillator is used for receiving the enabling signal and starting oscillation when receiving the first level signal to generate an alternating current signal;
the input end of the inverter module is connected with the output end of the ring oscillator and used for receiving the alternating current signal, and the output end of the inverter module is connected with the device to be tested; the inverter module is further used for being switched on when receiving the first level signal, being switched off when receiving the second level signal, and stopping loading the alternating current signal to the device under test;
the ring oscillator includes: a NAND gate circuit, a first input end of the NAND gate circuit is used for receiving the enabling signal;
the output ends of the inverters which are connected in series are connected to the second input end of the NAND gate circuit to form a loop; the number of the inverters connected in series is even.
2. The test circuit of claim 1, wherein the device under test is a MOSFET device, the output of the inverter module being connected to the gate of the device under test.
3. The test circuit of claim 1, wherein the inverter module comprises: the MOSFET switch device is conducted under the action of the enabling signal;
the inverter module further comprises a CMOS inverter; the CMOS phase inverter comprises a P-type MOSFET and an N-type MOSFET, the grid electrode of the P-type MOSFET is connected with the grid electrode of the N-type MOSFET to serve as the input end of the CMOS phase inverter, and the drain electrode of the P-type MOSFET is connected with the drain electrode of the N-type MOSFET to serve as the output end of the CMOS phase inverter.
4. The test circuit of claim 3, wherein the MOSFET switching device comprises: a first MOSFET switch device and a second MOSFET switch device; wherein,
the drain electrode of the first MOSFET switching device is connected to a voltage source, the source electrode of the first MOSFET switching device is connected to the source electrode of the P-type MOSFET, and the grid electrode of the first MOSFET switching device is used for loading the enabling signal;
the drain electrode of the second MOSFET switch device is connected to the source electrode of the N-type MOSFET, the source electrode of the second MOSFET switch device is connected to the ground end, and the grid electrode of the second MOSFET switch device is used for loading the enabling signal.
5. The test circuit of claim 4, wherein the MOSFET switch device is an NMOS.
6. A test system for testing a device under test, comprising:
the detection equipment is used for carrying out performance test on the device under test;
a test circuit according to any one of claims 1 to 5 for supplying an ac signal to a device under test;
a voltage source for providing a supply voltage to the inverter module;
an enable signal source for providing an enable signal to the ring oscillator and the inverter module.
7. The test system of claim 6, wherein the test device is a direct current test device.
8. The test system of claim 7, wherein the direct current test device comprises an oscilloscope.
9. A method of testing, comprising:
providing a test system according to any one of claims 6 to 8;
loading the first level signal to the ring oscillator and the inverter module to enable the ring oscillator to generate an alternating current signal and enable the inverter module to be conducted;
loading the second level signal to the ring oscillator and the inverter module to stop the ring oscillator from oscillating and turn off the inverter module;
and carrying out performance test on the device under test by utilizing the detection equipment.
10. The test method of claim 9, wherein the performance test comprises measuring performance parameters of the device under test, the performance parameters including one or more of threshold voltage, saturation circuitry, linear current, transconductance, and leakage current of the device under test.
11. The test method of claim 9, further comprising:
and loading the enabling signal to the ring oscillator and the inverter module for multiple times, wherein the strength and the time of the enabling signal applied each time are different, and obtaining multiple measurement data corresponding to the strength and the time of the enabling signal.
12. The test method of claim 11, further comprising: and after the enabling signal is applied for multiple times, obtaining a performance test result of the tested device according to the multiple measurement data.
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